linux/drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * Copyright (C) 2003 - 2009 NetXen, Inc.
   4 * Copyright (C) 2009 - QLogic Corporation.
   5 * All rights reserved.
   6 */
   7
   8#include "netxen_nic_hw.h"
   9#include "netxen_nic.h"
  10
  11#define NXHAL_VERSION   1
  12
  13static u32
  14netxen_poll_rsp(struct netxen_adapter *adapter)
  15{
  16        u32 rsp = NX_CDRP_RSP_OK;
  17        int     timeout = 0;
  18
  19        do {
  20                /* give atleast 1ms for firmware to respond */
  21                msleep(1);
  22
  23                if (++timeout > NX_OS_CRB_RETRY_COUNT)
  24                        return NX_CDRP_RSP_TIMEOUT;
  25
  26                rsp = NXRD32(adapter, NX_CDRP_CRB_OFFSET);
  27        } while (!NX_CDRP_IS_RSP(rsp));
  28
  29        return rsp;
  30}
  31
  32static u32
  33netxen_issue_cmd(struct netxen_adapter *adapter, struct netxen_cmd_args *cmd)
  34{
  35        u32 rsp;
  36        u32 signature = 0;
  37        u32 rcode = NX_RCODE_SUCCESS;
  38
  39        signature = NX_CDRP_SIGNATURE_MAKE(adapter->ahw.pci_func,
  40                                                NXHAL_VERSION);
  41        /* Acquire semaphore before accessing CRB */
  42        if (netxen_api_lock(adapter))
  43                return NX_RCODE_TIMEOUT;
  44
  45        NXWR32(adapter, NX_SIGN_CRB_OFFSET, signature);
  46
  47        NXWR32(adapter, NX_ARG1_CRB_OFFSET, cmd->req.arg1);
  48
  49        NXWR32(adapter, NX_ARG2_CRB_OFFSET, cmd->req.arg2);
  50
  51        NXWR32(adapter, NX_ARG3_CRB_OFFSET, cmd->req.arg3);
  52
  53        NXWR32(adapter, NX_CDRP_CRB_OFFSET, NX_CDRP_FORM_CMD(cmd->req.cmd));
  54
  55        rsp = netxen_poll_rsp(adapter);
  56
  57        if (rsp == NX_CDRP_RSP_TIMEOUT) {
  58                printk(KERN_ERR "%s: card response timeout.\n",
  59                                netxen_nic_driver_name);
  60
  61                rcode = NX_RCODE_TIMEOUT;
  62        } else if (rsp == NX_CDRP_RSP_FAIL) {
  63                rcode = NXRD32(adapter, NX_ARG1_CRB_OFFSET);
  64
  65                printk(KERN_ERR "%s: failed card response code:0x%x\n",
  66                                netxen_nic_driver_name, rcode);
  67        } else if (rsp == NX_CDRP_RSP_OK) {
  68                cmd->rsp.cmd = NX_RCODE_SUCCESS;
  69                if (cmd->rsp.arg2)
  70                        cmd->rsp.arg2 = NXRD32(adapter, NX_ARG2_CRB_OFFSET);
  71                if (cmd->rsp.arg3)
  72                        cmd->rsp.arg3 = NXRD32(adapter, NX_ARG3_CRB_OFFSET);
  73        }
  74
  75        if (cmd->rsp.arg1)
  76                cmd->rsp.arg1 = NXRD32(adapter, NX_ARG1_CRB_OFFSET);
  77        /* Release semaphore */
  78        netxen_api_unlock(adapter);
  79
  80        return rcode;
  81}
  82
  83static int
  84netxen_get_minidump_template_size(struct netxen_adapter *adapter)
  85{
  86        struct netxen_cmd_args cmd;
  87        memset(&cmd, 0, sizeof(cmd));
  88        cmd.req.cmd = NX_CDRP_CMD_TEMP_SIZE;
  89        memset(&cmd.rsp, 1, sizeof(struct _cdrp_cmd));
  90        netxen_issue_cmd(adapter, &cmd);
  91        if (cmd.rsp.cmd != NX_RCODE_SUCCESS) {
  92                dev_info(&adapter->pdev->dev,
  93                        "Can't get template size %d\n", cmd.rsp.cmd);
  94                return -EIO;
  95        }
  96        adapter->mdump.md_template_size = cmd.rsp.arg2;
  97        adapter->mdump.md_template_ver = cmd.rsp.arg3;
  98        return 0;
  99}
 100
 101static int
 102netxen_get_minidump_template(struct netxen_adapter *adapter)
 103{
 104        dma_addr_t md_template_addr;
 105        void *addr;
 106        u32 size;
 107        struct netxen_cmd_args cmd;
 108        size = adapter->mdump.md_template_size;
 109
 110        if (size == 0) {
 111                dev_err(&adapter->pdev->dev, "Can not capture Minidump "
 112                        "template. Invalid template size.\n");
 113                return NX_RCODE_INVALID_ARGS;
 114        }
 115
 116        addr = pci_zalloc_consistent(adapter->pdev, size, &md_template_addr);
 117        if (!addr) {
 118                dev_err(&adapter->pdev->dev, "Unable to allocate dmable memory for template.\n");
 119                return -ENOMEM;
 120        }
 121
 122        memset(&cmd, 0, sizeof(cmd));
 123        memset(&cmd.rsp, 1, sizeof(struct _cdrp_cmd));
 124        cmd.req.cmd = NX_CDRP_CMD_GET_TEMP_HDR;
 125        cmd.req.arg1 = LSD(md_template_addr);
 126        cmd.req.arg2 = MSD(md_template_addr);
 127        cmd.req.arg3 |= size;
 128        netxen_issue_cmd(adapter, &cmd);
 129
 130        if ((cmd.rsp.cmd == NX_RCODE_SUCCESS) && (size == cmd.rsp.arg2)) {
 131                memcpy(adapter->mdump.md_template, addr, size);
 132        } else {
 133                dev_err(&adapter->pdev->dev, "Failed to get minidump template, err_code : %d, requested_size : %d, actual_size : %d\n",
 134                        cmd.rsp.cmd, size, cmd.rsp.arg2);
 135        }
 136        pci_free_consistent(adapter->pdev, size, addr, md_template_addr);
 137        return 0;
 138}
 139
 140static u32
 141netxen_check_template_checksum(struct netxen_adapter *adapter)
 142{
 143        u64 sum =  0 ;
 144        u32 *buff = adapter->mdump.md_template;
 145        int count =  adapter->mdump.md_template_size/sizeof(uint32_t) ;
 146
 147        while (count-- > 0)
 148                sum += *buff++ ;
 149        while (sum >> 32)
 150                sum = (sum & 0xFFFFFFFF) +  (sum >> 32) ;
 151
 152        return ~sum;
 153}
 154
 155int
 156netxen_setup_minidump(struct netxen_adapter *adapter)
 157{
 158        int err = 0, i;
 159        u32 *template, *tmp_buf;
 160        err = netxen_get_minidump_template_size(adapter);
 161        if (err) {
 162                adapter->mdump.fw_supports_md = 0;
 163                if ((err == NX_RCODE_CMD_INVALID) ||
 164                        (err == NX_RCODE_CMD_NOT_IMPL)) {
 165                        dev_info(&adapter->pdev->dev,
 166                                "Flashed firmware version does not support minidump, minimum version required is [ %u.%u.%u ]\n",
 167                                NX_MD_SUPPORT_MAJOR, NX_MD_SUPPORT_MINOR,
 168                                NX_MD_SUPPORT_SUBVERSION);
 169                }
 170                return err;
 171        }
 172
 173        if (!adapter->mdump.md_template_size) {
 174                dev_err(&adapter->pdev->dev, "Error : Invalid template size "
 175                ",should be non-zero.\n");
 176                return -EIO;
 177        }
 178        adapter->mdump.md_template =
 179                kmalloc(adapter->mdump.md_template_size, GFP_KERNEL);
 180
 181        if (!adapter->mdump.md_template)
 182                return -ENOMEM;
 183
 184        err = netxen_get_minidump_template(adapter);
 185        if (err) {
 186                if (err == NX_RCODE_CMD_NOT_IMPL)
 187                        adapter->mdump.fw_supports_md = 0;
 188                goto free_template;
 189        }
 190
 191        if (netxen_check_template_checksum(adapter)) {
 192                dev_err(&adapter->pdev->dev, "Minidump template checksum Error\n");
 193                err = -EIO;
 194                goto free_template;
 195        }
 196
 197        adapter->mdump.md_capture_mask = NX_DUMP_MASK_DEF;
 198        tmp_buf = (u32 *) adapter->mdump.md_template;
 199        template = (u32 *) adapter->mdump.md_template;
 200        for (i = 0; i < adapter->mdump.md_template_size/sizeof(u32); i++)
 201                *template++ = __le32_to_cpu(*tmp_buf++);
 202        adapter->mdump.md_capture_buff = NULL;
 203        adapter->mdump.fw_supports_md = 1;
 204        adapter->mdump.md_enabled = 0;
 205
 206        return err;
 207
 208free_template:
 209        kfree(adapter->mdump.md_template);
 210        adapter->mdump.md_template = NULL;
 211        return err;
 212}
 213
 214
 215int
 216nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu)
 217{
 218        u32 rcode = NX_RCODE_SUCCESS;
 219        struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
 220        struct netxen_cmd_args cmd;
 221
 222        memset(&cmd, 0, sizeof(cmd));
 223        cmd.req.cmd = NX_CDRP_CMD_SET_MTU;
 224        cmd.req.arg1 = recv_ctx->context_id;
 225        cmd.req.arg2 = mtu;
 226        cmd.req.arg3 = 0;
 227
 228        if (recv_ctx->state == NX_HOST_CTX_STATE_ACTIVE)
 229                rcode = netxen_issue_cmd(adapter, &cmd);
 230
 231        if (rcode != NX_RCODE_SUCCESS)
 232                return -EIO;
 233
 234        return 0;
 235}
 236
 237int
 238nx_fw_cmd_set_gbe_port(struct netxen_adapter *adapter,
 239                        u32 speed, u32 duplex, u32 autoneg)
 240{
 241        struct netxen_cmd_args cmd;
 242
 243        memset(&cmd, 0, sizeof(cmd));
 244        cmd.req.cmd = NX_CDRP_CMD_CONFIG_GBE_PORT;
 245        cmd.req.arg1 = speed;
 246        cmd.req.arg2 = duplex;
 247        cmd.req.arg3 = autoneg;
 248        return netxen_issue_cmd(adapter, &cmd);
 249}
 250
 251static int
 252nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
 253{
 254        void *addr;
 255        nx_hostrq_rx_ctx_t *prq;
 256        nx_cardrsp_rx_ctx_t *prsp;
 257        nx_hostrq_rds_ring_t *prq_rds;
 258        nx_hostrq_sds_ring_t *prq_sds;
 259        nx_cardrsp_rds_ring_t *prsp_rds;
 260        nx_cardrsp_sds_ring_t *prsp_sds;
 261        struct nx_host_rds_ring *rds_ring;
 262        struct nx_host_sds_ring *sds_ring;
 263        struct netxen_cmd_args cmd;
 264
 265        dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
 266        u64 phys_addr;
 267
 268        int i, nrds_rings, nsds_rings;
 269        size_t rq_size, rsp_size;
 270        u32 cap, reg, val;
 271
 272        int err;
 273
 274        struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
 275
 276        nrds_rings = adapter->max_rds_rings;
 277        nsds_rings = adapter->max_sds_rings;
 278
 279        rq_size =
 280                SIZEOF_HOSTRQ_RX(nx_hostrq_rx_ctx_t, nrds_rings, nsds_rings);
 281        rsp_size =
 282                SIZEOF_CARDRSP_RX(nx_cardrsp_rx_ctx_t, nrds_rings, nsds_rings);
 283
 284        addr = pci_alloc_consistent(adapter->pdev,
 285                                rq_size, &hostrq_phys_addr);
 286        if (addr == NULL)
 287                return -ENOMEM;
 288        prq = addr;
 289
 290        addr = pci_alloc_consistent(adapter->pdev,
 291                        rsp_size, &cardrsp_phys_addr);
 292        if (addr == NULL) {
 293                err = -ENOMEM;
 294                goto out_free_rq;
 295        }
 296        prsp = addr;
 297
 298        prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
 299
 300        cap = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN);
 301        cap |= (NX_CAP0_JUMBO_CONTIGUOUS | NX_CAP0_LRO_CONTIGUOUS);
 302
 303        if (adapter->flags & NETXEN_FW_MSS_CAP)
 304                cap |= NX_CAP0_HW_LRO_MSS;
 305
 306        prq->capabilities[0] = cpu_to_le32(cap);
 307        prq->host_int_crb_mode =
 308                cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
 309        prq->host_rds_crb_mode =
 310                cpu_to_le32(NX_HOST_RDS_CRB_MODE_UNIQUE);
 311
 312        prq->num_rds_rings = cpu_to_le16(nrds_rings);
 313        prq->num_sds_rings = cpu_to_le16(nsds_rings);
 314        prq->rds_ring_offset = cpu_to_le32(0);
 315
 316        val = le32_to_cpu(prq->rds_ring_offset) +
 317                (sizeof(nx_hostrq_rds_ring_t) * nrds_rings);
 318        prq->sds_ring_offset = cpu_to_le32(val);
 319
 320        prq_rds = (nx_hostrq_rds_ring_t *)(prq->data +
 321                        le32_to_cpu(prq->rds_ring_offset));
 322
 323        for (i = 0; i < nrds_rings; i++) {
 324
 325                rds_ring = &recv_ctx->rds_rings[i];
 326
 327                prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
 328                prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
 329                prq_rds[i].ring_kind = cpu_to_le32(i);
 330                prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
 331        }
 332
 333        prq_sds = (nx_hostrq_sds_ring_t *)(prq->data +
 334                        le32_to_cpu(prq->sds_ring_offset));
 335
 336        for (i = 0; i < nsds_rings; i++) {
 337
 338                sds_ring = &recv_ctx->sds_rings[i];
 339
 340                prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
 341                prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
 342                prq_sds[i].msi_index = cpu_to_le16(i);
 343        }
 344
 345        phys_addr = hostrq_phys_addr;
 346        memset(&cmd, 0, sizeof(cmd));
 347        cmd.req.arg1 = (u32)(phys_addr >> 32);
 348        cmd.req.arg2 = (u32)(phys_addr & 0xffffffff);
 349        cmd.req.arg3 = rq_size;
 350        cmd.req.cmd = NX_CDRP_CMD_CREATE_RX_CTX;
 351        err = netxen_issue_cmd(adapter, &cmd);
 352        if (err) {
 353                printk(KERN_WARNING
 354                        "Failed to create rx ctx in firmware%d\n", err);
 355                goto out_free_rsp;
 356        }
 357
 358
 359        prsp_rds = ((nx_cardrsp_rds_ring_t *)
 360                         &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
 361
 362        for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
 363                rds_ring = &recv_ctx->rds_rings[i];
 364
 365                reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
 366                rds_ring->crb_rcv_producer = netxen_get_ioaddr(adapter,
 367                                NETXEN_NIC_REG(reg - 0x200));
 368        }
 369
 370        prsp_sds = ((nx_cardrsp_sds_ring_t *)
 371                        &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
 372
 373        for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
 374                sds_ring = &recv_ctx->sds_rings[i];
 375
 376                reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
 377                sds_ring->crb_sts_consumer = netxen_get_ioaddr(adapter,
 378                                NETXEN_NIC_REG(reg - 0x200));
 379
 380                reg = le32_to_cpu(prsp_sds[i].interrupt_crb);
 381                sds_ring->crb_intr_mask = netxen_get_ioaddr(adapter,
 382                                NETXEN_NIC_REG(reg - 0x200));
 383        }
 384
 385        recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
 386        recv_ctx->context_id = le16_to_cpu(prsp->context_id);
 387        recv_ctx->virt_port = prsp->virt_port;
 388
 389out_free_rsp:
 390        pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
 391out_free_rq:
 392        pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
 393        return err;
 394}
 395
 396static void
 397nx_fw_cmd_destroy_rx_ctx(struct netxen_adapter *adapter)
 398{
 399        struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
 400        struct netxen_cmd_args cmd;
 401
 402        memset(&cmd, 0, sizeof(cmd));
 403        cmd.req.arg1 = recv_ctx->context_id;
 404        cmd.req.arg2 = NX_DESTROY_CTX_RESET;
 405        cmd.req.arg3 = 0;
 406        cmd.req.cmd = NX_CDRP_CMD_DESTROY_RX_CTX;
 407
 408        if (netxen_issue_cmd(adapter, &cmd)) {
 409                printk(KERN_WARNING
 410                        "%s: Failed to destroy rx ctx in firmware\n",
 411                        netxen_nic_driver_name);
 412        }
 413}
 414
 415static int
 416nx_fw_cmd_create_tx_ctx(struct netxen_adapter *adapter)
 417{
 418        nx_hostrq_tx_ctx_t      *prq;
 419        nx_hostrq_cds_ring_t    *prq_cds;
 420        nx_cardrsp_tx_ctx_t     *prsp;
 421        void    *rq_addr, *rsp_addr;
 422        size_t  rq_size, rsp_size;
 423        u32     temp;
 424        int     err = 0;
 425        u64     offset, phys_addr;
 426        dma_addr_t      rq_phys_addr, rsp_phys_addr;
 427        struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
 428        struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
 429        struct netxen_cmd_args cmd;
 430
 431        rq_size = SIZEOF_HOSTRQ_TX(nx_hostrq_tx_ctx_t);
 432        rq_addr = pci_alloc_consistent(adapter->pdev,
 433                rq_size, &rq_phys_addr);
 434        if (!rq_addr)
 435                return -ENOMEM;
 436
 437        rsp_size = SIZEOF_CARDRSP_TX(nx_cardrsp_tx_ctx_t);
 438        rsp_addr = pci_alloc_consistent(adapter->pdev,
 439                rsp_size, &rsp_phys_addr);
 440        if (!rsp_addr) {
 441                err = -ENOMEM;
 442                goto out_free_rq;
 443        }
 444
 445        prq = rq_addr;
 446
 447        prsp = rsp_addr;
 448
 449        prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
 450
 451        temp = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN | NX_CAP0_LSO);
 452        prq->capabilities[0] = cpu_to_le32(temp);
 453
 454        prq->host_int_crb_mode =
 455                cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
 456
 457        prq->interrupt_ctl = 0;
 458        prq->msi_index = 0;
 459
 460        prq->dummy_dma_addr = cpu_to_le64(adapter->dummy_dma.phys_addr);
 461
 462        offset = recv_ctx->phys_addr + sizeof(struct netxen_ring_ctx);
 463        prq->cmd_cons_dma_addr = cpu_to_le64(offset);
 464
 465        prq_cds = &prq->cds_ring;
 466
 467        prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
 468        prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
 469
 470        phys_addr = rq_phys_addr;
 471        memset(&cmd, 0, sizeof(cmd));
 472        cmd.req.arg1 = (u32)(phys_addr >> 32);
 473        cmd.req.arg2 = ((u32)phys_addr & 0xffffffff);
 474        cmd.req.arg3 = rq_size;
 475        cmd.req.cmd = NX_CDRP_CMD_CREATE_TX_CTX;
 476        err = netxen_issue_cmd(adapter, &cmd);
 477
 478        if (err == NX_RCODE_SUCCESS) {
 479                temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
 480                tx_ring->crb_cmd_producer = netxen_get_ioaddr(adapter,
 481                                NETXEN_NIC_REG(temp - 0x200));
 482#if 0
 483                adapter->tx_state =
 484                        le32_to_cpu(prsp->host_ctx_state);
 485#endif
 486                adapter->tx_context_id =
 487                        le16_to_cpu(prsp->context_id);
 488        } else {
 489                printk(KERN_WARNING
 490                        "Failed to create tx ctx in firmware%d\n", err);
 491                err = -EIO;
 492        }
 493
 494        pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);
 495
 496out_free_rq:
 497        pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);
 498
 499        return err;
 500}
 501
 502static void
 503nx_fw_cmd_destroy_tx_ctx(struct netxen_adapter *adapter)
 504{
 505        struct netxen_cmd_args cmd;
 506
 507        memset(&cmd, 0, sizeof(cmd));
 508        cmd.req.arg1 = adapter->tx_context_id;
 509        cmd.req.arg2 = NX_DESTROY_CTX_RESET;
 510        cmd.req.arg3 = 0;
 511        cmd.req.cmd = NX_CDRP_CMD_DESTROY_TX_CTX;
 512        if (netxen_issue_cmd(adapter, &cmd)) {
 513                printk(KERN_WARNING
 514                        "%s: Failed to destroy tx ctx in firmware\n",
 515                        netxen_nic_driver_name);
 516        }
 517}
 518
 519int
 520nx_fw_cmd_query_phy(struct netxen_adapter *adapter, u32 reg, u32 *val)
 521{
 522        u32 rcode;
 523        struct netxen_cmd_args cmd;
 524
 525        memset(&cmd, 0, sizeof(cmd));
 526        cmd.req.arg1 = reg;
 527        cmd.req.arg2 = 0;
 528        cmd.req.arg3 = 0;
 529        cmd.req.cmd = NX_CDRP_CMD_READ_PHY;
 530        cmd.rsp.arg1 = 1;
 531        rcode = netxen_issue_cmd(adapter, &cmd);
 532        if (rcode != NX_RCODE_SUCCESS)
 533                return -EIO;
 534
 535        if (val == NULL)
 536                return -EIO;
 537
 538        *val = cmd.rsp.arg1;
 539        return 0;
 540}
 541
 542int
 543nx_fw_cmd_set_phy(struct netxen_adapter *adapter, u32 reg, u32 val)
 544{
 545        u32 rcode;
 546        struct netxen_cmd_args cmd;
 547
 548        memset(&cmd, 0, sizeof(cmd));
 549        cmd.req.arg1 = reg;
 550        cmd.req.arg2 = val;
 551        cmd.req.arg3 = 0;
 552        cmd.req.cmd = NX_CDRP_CMD_WRITE_PHY;
 553        rcode = netxen_issue_cmd(adapter, &cmd);
 554        if (rcode != NX_RCODE_SUCCESS)
 555                return -EIO;
 556
 557        return 0;
 558}
 559
 560static u64 ctx_addr_sig_regs[][3] = {
 561        {NETXEN_NIC_REG(0x188), NETXEN_NIC_REG(0x18c), NETXEN_NIC_REG(0x1c0)},
 562        {NETXEN_NIC_REG(0x190), NETXEN_NIC_REG(0x194), NETXEN_NIC_REG(0x1c4)},
 563        {NETXEN_NIC_REG(0x198), NETXEN_NIC_REG(0x19c), NETXEN_NIC_REG(0x1c8)},
 564        {NETXEN_NIC_REG(0x1a0), NETXEN_NIC_REG(0x1a4), NETXEN_NIC_REG(0x1cc)}
 565};
 566
 567#define CRB_CTX_ADDR_REG_LO(FUNC_ID)    (ctx_addr_sig_regs[FUNC_ID][0])
 568#define CRB_CTX_ADDR_REG_HI(FUNC_ID)    (ctx_addr_sig_regs[FUNC_ID][2])
 569#define CRB_CTX_SIGNATURE_REG(FUNC_ID)  (ctx_addr_sig_regs[FUNC_ID][1])
 570
 571#define lower32(x)      ((u32)((x) & 0xffffffff))
 572#define upper32(x)      ((u32)(((u64)(x) >> 32) & 0xffffffff))
 573
 574static struct netxen_recv_crb recv_crb_registers[] = {
 575        /* Instance 0 */
 576        {
 577                /* crb_rcv_producer: */
 578                {
 579                        NETXEN_NIC_REG(0x100),
 580                        /* Jumbo frames */
 581                        NETXEN_NIC_REG(0x110),
 582                        /* LRO */
 583                        NETXEN_NIC_REG(0x120)
 584                },
 585                /* crb_sts_consumer: */
 586                {
 587                        NETXEN_NIC_REG(0x138),
 588                        NETXEN_NIC_REG_2(0x000),
 589                        NETXEN_NIC_REG_2(0x004),
 590                        NETXEN_NIC_REG_2(0x008),
 591                },
 592                /* sw_int_mask */
 593                {
 594                        CRB_SW_INT_MASK_0,
 595                        NETXEN_NIC_REG_2(0x044),
 596                        NETXEN_NIC_REG_2(0x048),
 597                        NETXEN_NIC_REG_2(0x04c),
 598                },
 599        },
 600        /* Instance 1 */
 601        {
 602                /* crb_rcv_producer: */
 603                {
 604                        NETXEN_NIC_REG(0x144),
 605                        /* Jumbo frames */
 606                        NETXEN_NIC_REG(0x154),
 607                        /* LRO */
 608                        NETXEN_NIC_REG(0x164)
 609                },
 610                /* crb_sts_consumer: */
 611                {
 612                        NETXEN_NIC_REG(0x17c),
 613                        NETXEN_NIC_REG_2(0x020),
 614                        NETXEN_NIC_REG_2(0x024),
 615                        NETXEN_NIC_REG_2(0x028),
 616                },
 617                /* sw_int_mask */
 618                {
 619                        CRB_SW_INT_MASK_1,
 620                        NETXEN_NIC_REG_2(0x064),
 621                        NETXEN_NIC_REG_2(0x068),
 622                        NETXEN_NIC_REG_2(0x06c),
 623                },
 624        },
 625        /* Instance 2 */
 626        {
 627                /* crb_rcv_producer: */
 628                {
 629                        NETXEN_NIC_REG(0x1d8),
 630                        /* Jumbo frames */
 631                        NETXEN_NIC_REG(0x1f8),
 632                        /* LRO */
 633                        NETXEN_NIC_REG(0x208)
 634                },
 635                /* crb_sts_consumer: */
 636                {
 637                        NETXEN_NIC_REG(0x220),
 638                        NETXEN_NIC_REG_2(0x03c),
 639                        NETXEN_NIC_REG_2(0x03c),
 640                        NETXEN_NIC_REG_2(0x03c),
 641                },
 642                /* sw_int_mask */
 643                {
 644                        CRB_SW_INT_MASK_2,
 645                        NETXEN_NIC_REG_2(0x03c),
 646                        NETXEN_NIC_REG_2(0x03c),
 647                        NETXEN_NIC_REG_2(0x03c),
 648                },
 649        },
 650        /* Instance 3 */
 651        {
 652                /* crb_rcv_producer: */
 653                {
 654                        NETXEN_NIC_REG(0x22c),
 655                        /* Jumbo frames */
 656                        NETXEN_NIC_REG(0x23c),
 657                        /* LRO */
 658                        NETXEN_NIC_REG(0x24c)
 659                },
 660                /* crb_sts_consumer: */
 661                {
 662                        NETXEN_NIC_REG(0x264),
 663                        NETXEN_NIC_REG_2(0x03c),
 664                        NETXEN_NIC_REG_2(0x03c),
 665                        NETXEN_NIC_REG_2(0x03c),
 666                },
 667                /* sw_int_mask */
 668                {
 669                        CRB_SW_INT_MASK_3,
 670                        NETXEN_NIC_REG_2(0x03c),
 671                        NETXEN_NIC_REG_2(0x03c),
 672                        NETXEN_NIC_REG_2(0x03c),
 673                },
 674        },
 675};
 676
 677static int
 678netxen_init_old_ctx(struct netxen_adapter *adapter)
 679{
 680        struct netxen_recv_context *recv_ctx;
 681        struct nx_host_rds_ring *rds_ring;
 682        struct nx_host_sds_ring *sds_ring;
 683        struct nx_host_tx_ring *tx_ring;
 684        int ring;
 685        int port = adapter->portnum;
 686        struct netxen_ring_ctx *hwctx;
 687        u32 signature;
 688
 689        tx_ring = adapter->tx_ring;
 690        recv_ctx = &adapter->recv_ctx;
 691        hwctx = recv_ctx->hwctx;
 692
 693        hwctx->cmd_ring_addr = cpu_to_le64(tx_ring->phys_addr);
 694        hwctx->cmd_ring_size = cpu_to_le32(tx_ring->num_desc);
 695
 696
 697        for (ring = 0; ring < adapter->max_rds_rings; ring++) {
 698                rds_ring = &recv_ctx->rds_rings[ring];
 699
 700                hwctx->rcv_rings[ring].addr =
 701                        cpu_to_le64(rds_ring->phys_addr);
 702                hwctx->rcv_rings[ring].size =
 703                        cpu_to_le32(rds_ring->num_desc);
 704        }
 705
 706        for (ring = 0; ring < adapter->max_sds_rings; ring++) {
 707                sds_ring = &recv_ctx->sds_rings[ring];
 708
 709                if (ring == 0) {
 710                        hwctx->sts_ring_addr = cpu_to_le64(sds_ring->phys_addr);
 711                        hwctx->sts_ring_size = cpu_to_le32(sds_ring->num_desc);
 712                }
 713                hwctx->sts_rings[ring].addr = cpu_to_le64(sds_ring->phys_addr);
 714                hwctx->sts_rings[ring].size = cpu_to_le32(sds_ring->num_desc);
 715                hwctx->sts_rings[ring].msi_index = cpu_to_le16(ring);
 716        }
 717        hwctx->sts_ring_count = cpu_to_le32(adapter->max_sds_rings);
 718
 719        signature = (adapter->max_sds_rings > 1) ?
 720                NETXEN_CTX_SIGNATURE_V2 : NETXEN_CTX_SIGNATURE;
 721
 722        NXWR32(adapter, CRB_CTX_ADDR_REG_LO(port),
 723                        lower32(recv_ctx->phys_addr));
 724        NXWR32(adapter, CRB_CTX_ADDR_REG_HI(port),
 725                        upper32(recv_ctx->phys_addr));
 726        NXWR32(adapter, CRB_CTX_SIGNATURE_REG(port),
 727                        signature | port);
 728        return 0;
 729}
 730
 731int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
 732{
 733        void *addr;
 734        int err = 0;
 735        int ring;
 736        struct netxen_recv_context *recv_ctx;
 737        struct nx_host_rds_ring *rds_ring;
 738        struct nx_host_sds_ring *sds_ring;
 739        struct nx_host_tx_ring *tx_ring;
 740
 741        struct pci_dev *pdev = adapter->pdev;
 742        struct net_device *netdev = adapter->netdev;
 743        int port = adapter->portnum;
 744
 745        recv_ctx = &adapter->recv_ctx;
 746        tx_ring = adapter->tx_ring;
 747
 748        addr = pci_alloc_consistent(pdev,
 749                        sizeof(struct netxen_ring_ctx) + sizeof(uint32_t),
 750                        &recv_ctx->phys_addr);
 751        if (addr == NULL) {
 752                dev_err(&pdev->dev, "failed to allocate hw context\n");
 753                return -ENOMEM;
 754        }
 755
 756        recv_ctx->hwctx = addr;
 757        recv_ctx->hwctx->ctx_id = cpu_to_le32(port);
 758        recv_ctx->hwctx->cmd_consumer_offset =
 759                cpu_to_le64(recv_ctx->phys_addr +
 760                        sizeof(struct netxen_ring_ctx));
 761        tx_ring->hw_consumer =
 762                (__le32 *)(((char *)addr) + sizeof(struct netxen_ring_ctx));
 763
 764        /* cmd desc ring */
 765        addr = pci_alloc_consistent(pdev, TX_DESC_RINGSIZE(tx_ring),
 766                        &tx_ring->phys_addr);
 767
 768        if (addr == NULL) {
 769                dev_err(&pdev->dev, "%s: failed to allocate tx desc ring\n",
 770                                netdev->name);
 771                err = -ENOMEM;
 772                goto err_out_free;
 773        }
 774
 775        tx_ring->desc_head = addr;
 776
 777        for (ring = 0; ring < adapter->max_rds_rings; ring++) {
 778                rds_ring = &recv_ctx->rds_rings[ring];
 779                addr = pci_alloc_consistent(adapter->pdev,
 780                                RCV_DESC_RINGSIZE(rds_ring),
 781                                &rds_ring->phys_addr);
 782                if (addr == NULL) {
 783                        dev_err(&pdev->dev,
 784                                "%s: failed to allocate rds ring [%d]\n",
 785                                netdev->name, ring);
 786                        err = -ENOMEM;
 787                        goto err_out_free;
 788                }
 789                rds_ring->desc_head = addr;
 790
 791                if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
 792                        rds_ring->crb_rcv_producer =
 793                                netxen_get_ioaddr(adapter,
 794                        recv_crb_registers[port].crb_rcv_producer[ring]);
 795        }
 796
 797        for (ring = 0; ring < adapter->max_sds_rings; ring++) {
 798                sds_ring = &recv_ctx->sds_rings[ring];
 799
 800                addr = pci_alloc_consistent(adapter->pdev,
 801                                STATUS_DESC_RINGSIZE(sds_ring),
 802                                &sds_ring->phys_addr);
 803                if (addr == NULL) {
 804                        dev_err(&pdev->dev,
 805                                "%s: failed to allocate sds ring [%d]\n",
 806                                netdev->name, ring);
 807                        err = -ENOMEM;
 808                        goto err_out_free;
 809                }
 810                sds_ring->desc_head = addr;
 811
 812                if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
 813                        sds_ring->crb_sts_consumer =
 814                                netxen_get_ioaddr(adapter,
 815                                recv_crb_registers[port].crb_sts_consumer[ring]);
 816
 817                        sds_ring->crb_intr_mask =
 818                                netxen_get_ioaddr(adapter,
 819                                recv_crb_registers[port].sw_int_mask[ring]);
 820                }
 821        }
 822
 823
 824        if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
 825                if (test_and_set_bit(__NX_FW_ATTACHED, &adapter->state))
 826                        goto done;
 827                err = nx_fw_cmd_create_rx_ctx(adapter);
 828                if (err)
 829                        goto err_out_free;
 830                err = nx_fw_cmd_create_tx_ctx(adapter);
 831                if (err)
 832                        goto err_out_free;
 833        } else {
 834                err = netxen_init_old_ctx(adapter);
 835                if (err)
 836                        goto err_out_free;
 837        }
 838
 839done:
 840        return 0;
 841
 842err_out_free:
 843        netxen_free_hw_resources(adapter);
 844        return err;
 845}
 846
 847void netxen_free_hw_resources(struct netxen_adapter *adapter)
 848{
 849        struct netxen_recv_context *recv_ctx;
 850        struct nx_host_rds_ring *rds_ring;
 851        struct nx_host_sds_ring *sds_ring;
 852        struct nx_host_tx_ring *tx_ring;
 853        int ring;
 854
 855        int port = adapter->portnum;
 856
 857        if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
 858                if (!test_and_clear_bit(__NX_FW_ATTACHED, &adapter->state))
 859                        goto done;
 860
 861                nx_fw_cmd_destroy_rx_ctx(adapter);
 862                nx_fw_cmd_destroy_tx_ctx(adapter);
 863        } else {
 864                netxen_api_lock(adapter);
 865                NXWR32(adapter, CRB_CTX_SIGNATURE_REG(port),
 866                                NETXEN_CTX_D3_RESET | port);
 867                netxen_api_unlock(adapter);
 868        }
 869
 870        /* Allow dma queues to drain after context reset */
 871        msleep(20);
 872
 873done:
 874        recv_ctx = &adapter->recv_ctx;
 875
 876        if (recv_ctx->hwctx != NULL) {
 877                pci_free_consistent(adapter->pdev,
 878                                sizeof(struct netxen_ring_ctx) +
 879                                sizeof(uint32_t),
 880                                recv_ctx->hwctx,
 881                                recv_ctx->phys_addr);
 882                recv_ctx->hwctx = NULL;
 883        }
 884
 885        tx_ring = adapter->tx_ring;
 886        if (tx_ring->desc_head != NULL) {
 887                pci_free_consistent(adapter->pdev,
 888                                TX_DESC_RINGSIZE(tx_ring),
 889                                tx_ring->desc_head, tx_ring->phys_addr);
 890                tx_ring->desc_head = NULL;
 891        }
 892
 893        for (ring = 0; ring < adapter->max_rds_rings; ring++) {
 894                rds_ring = &recv_ctx->rds_rings[ring];
 895
 896                if (rds_ring->desc_head != NULL) {
 897                        pci_free_consistent(adapter->pdev,
 898                                        RCV_DESC_RINGSIZE(rds_ring),
 899                                        rds_ring->desc_head,
 900                                        rds_ring->phys_addr);
 901                        rds_ring->desc_head = NULL;
 902                }
 903        }
 904
 905        for (ring = 0; ring < adapter->max_sds_rings; ring++) {
 906                sds_ring = &recv_ctx->sds_rings[ring];
 907
 908                if (sds_ring->desc_head != NULL) {
 909                        pci_free_consistent(adapter->pdev,
 910                                STATUS_DESC_RINGSIZE(sds_ring),
 911                                sds_ring->desc_head,
 912                                sds_ring->phys_addr);
 913                        sds_ring->desc_head = NULL;
 914                }
 915        }
 916}
 917
 918