1
2
3
4#ifndef __MT7615_H
5#define __MT7615_H
6
7#include <linux/completion.h>
8#include <linux/interrupt.h>
9#include <linux/ktime.h>
10#include <linux/regmap.h>
11#include "../mt76.h"
12#include "regs.h"
13
14#define MT7615_MAX_INTERFACES 16
15#define MT7615_MAX_WMM_SETS 4
16#define MT7663_WTBL_SIZE 32
17#define MT7615_WTBL_SIZE 128
18#define MT7615_WTBL_RESERVED (mt7615_wtbl_size(dev) - 1)
19#define MT7615_WTBL_STA (MT7615_WTBL_RESERVED - \
20 MT7615_MAX_INTERFACES)
21
22#define MT7615_PM_TIMEOUT (HZ / 12)
23#define MT7615_WATCHDOG_TIME (HZ / 10)
24#define MT7615_HW_SCAN_TIMEOUT (HZ / 10)
25#define MT7615_RESET_TIMEOUT (30 * HZ)
26#define MT7615_RATE_RETRY 2
27
28#define MT7615_TX_RING_SIZE 1024
29#define MT7615_TX_MGMT_RING_SIZE 128
30#define MT7615_TX_MCU_RING_SIZE 128
31#define MT7615_TX_FWDL_RING_SIZE 128
32
33#define MT7615_RX_RING_SIZE 1024
34#define MT7615_RX_MCU_RING_SIZE 512
35
36#define MT7615_DRV_OWN_RETRY_COUNT 10
37
38#define MT7615_FIRMWARE_CR4 "mediatek/mt7615_cr4.bin"
39#define MT7615_FIRMWARE_N9 "mediatek/mt7615_n9.bin"
40#define MT7615_ROM_PATCH "mediatek/mt7615_rom_patch.bin"
41
42#define MT7622_FIRMWARE_N9 "mediatek/mt7622_n9.bin"
43#define MT7622_ROM_PATCH "mediatek/mt7622_rom_patch.bin"
44
45#define MT7615_FIRMWARE_V1 1
46#define MT7615_FIRMWARE_V2 2
47#define MT7615_FIRMWARE_V3 3
48
49#define MT7663_OFFLOAD_ROM_PATCH "mediatek/mt7663pr2h.bin"
50#define MT7663_OFFLOAD_FIRMWARE_N9 "mediatek/mt7663_n9_v3.bin"
51#define MT7663_ROM_PATCH "mediatek/mt7663pr2h_rebb.bin"
52#define MT7663_FIRMWARE_N9 "mediatek/mt7663_n9_rebb.bin"
53
54#define MT7615_EEPROM_SIZE 1024
55#define MT7615_TOKEN_SIZE 4096
56
57#define MT_FRAC_SCALE 12
58#define MT_FRAC(val, div) (((val) << MT_FRAC_SCALE) / (div))
59
60#define MT_CHFREQ_VALID BIT(7)
61#define MT_CHFREQ_DBDC_IDX BIT(6)
62#define MT_CHFREQ_SEQ GENMASK(5, 0)
63
64#define MT7615_BAR_RATE_DEFAULT 0x4b
65#define MT7615_CFEND_RATE_DEFAULT 0x49
66#define MT7615_CFEND_RATE_11B 0x03
67
68#define MT7615_SCAN_IE_LEN 600
69#define MT7615_MAX_SCHED_SCAN_INTERVAL 10
70#define MT7615_MAX_SCHED_SCAN_SSID 10
71#define MT7615_MAX_SCAN_MATCH 16
72
73struct mt7615_vif;
74struct mt7615_sta;
75struct mt7615_dfs_pulse;
76struct mt7615_dfs_pattern;
77enum mt7615_cipher_type;
78
79enum mt7615_hw_txq_id {
80 MT7615_TXQ_MAIN,
81 MT7615_TXQ_EXT,
82 MT7615_TXQ_MCU,
83 MT7615_TXQ_FWDL,
84};
85
86enum mt7622_hw_txq_id {
87 MT7622_TXQ_AC0,
88 MT7622_TXQ_AC1,
89 MT7622_TXQ_AC2,
90 MT7622_TXQ_FWDL = MT7615_TXQ_FWDL,
91 MT7622_TXQ_AC3,
92 MT7622_TXQ_MGMT,
93 MT7622_TXQ_MCU = 15,
94};
95
96struct mt7615_rate_set {
97 struct ieee80211_tx_rate probe_rate;
98 struct ieee80211_tx_rate rates[4];
99};
100
101struct mt7615_rate_desc {
102 bool rateset;
103 u16 probe_val;
104 u16 val[4];
105 u8 bw_idx;
106 u8 bw;
107};
108
109struct mt7615_wtbl_rate_desc {
110 struct list_head node;
111
112 struct mt7615_rate_desc rate;
113 struct mt7615_sta *sta;
114};
115
116struct mt7615_sta {
117 struct mt76_wcid wcid;
118
119 struct mt7615_vif *vif;
120
121 struct list_head poll_list;
122 u32 airtime_ac[8];
123
124 struct ieee80211_tx_rate rates[4];
125
126 struct mt7615_rate_set rateset[2];
127 u32 rate_set_tsf;
128
129 u8 rate_count;
130 u8 n_rates;
131
132 u8 rate_probe;
133};
134
135struct mt7615_vif {
136 u8 idx;
137 u8 omac_idx;
138 u8 band_idx;
139 u8 wmm_idx;
140 u8 scan_seq_num;
141
142 struct mt7615_sta sta;
143};
144
145struct mib_stats {
146 u16 ack_fail_cnt;
147 u16 fcs_err_cnt;
148 u16 rts_cnt;
149 u16 rts_retries_cnt;
150 u16 ba_miss_cnt;
151 unsigned long aggr_per;
152};
153
154struct mt7615_phy {
155 struct mt76_phy *mt76;
156 struct mt7615_dev *dev;
157
158 struct ieee80211_vif *monitor_vif;
159
160 u8 n_beacon_vif;
161
162 u32 rxfilter;
163 u64 omac_mask;
164
165 u16 noise;
166
167 bool scs_en;
168
169 unsigned long last_cca_adj;
170 int false_cca_ofdm, false_cca_cck;
171 s8 ofdm_sensitivity;
172 s8 cck_sensitivity;
173
174 u16 chainmask;
175
176 s16 coverage_class;
177 u8 slottime;
178
179 u8 chfreq;
180 u8 rdd_state;
181 int dfs_state;
182
183 __le32 rx_ampdu_ts;
184 u32 ampdu_ref;
185
186 struct mib_stats mib;
187
188 struct delayed_work mac_work;
189 u8 mac_work_count;
190
191 struct sk_buff_head scan_event_list;
192 struct delayed_work scan_work;
193
194 struct work_struct roc_work;
195 struct timer_list roc_timer;
196 wait_queue_head_t roc_wait;
197 bool roc_grant;
198};
199
200#define mt7615_mcu_add_tx_ba(dev, ...) (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__)
201#define mt7615_mcu_add_rx_ba(dev, ...) (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__)
202#define mt7615_mcu_sta_add(dev, ...) (dev)->mcu_ops->sta_add((dev), __VA_ARGS__)
203#define mt7615_mcu_add_dev_info(dev, ...) (dev)->mcu_ops->add_dev_info((dev), __VA_ARGS__)
204#define mt7615_mcu_add_bss_info(phy, ...) (phy->dev)->mcu_ops->add_bss_info((phy), __VA_ARGS__)
205#define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev), __VA_ARGS__)
206#define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev), __VA_ARGS__)
207#define mt7615_mcu_set_drv_ctrl(dev) (dev)->mcu_ops->set_drv_ctrl((dev))
208#define mt7615_mcu_set_fw_ctrl(dev) (dev)->mcu_ops->set_fw_ctrl((dev))
209struct mt7615_mcu_ops {
210 int (*add_tx_ba)(struct mt7615_dev *dev,
211 struct ieee80211_ampdu_params *params,
212 bool enable);
213 int (*add_rx_ba)(struct mt7615_dev *dev,
214 struct ieee80211_ampdu_params *params,
215 bool enable);
216 int (*sta_add)(struct mt7615_dev *dev,
217 struct ieee80211_vif *vif,
218 struct ieee80211_sta *sta, bool enable);
219 int (*add_dev_info)(struct mt7615_dev *dev,
220 struct ieee80211_vif *vif, bool enable);
221 int (*add_bss_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
222 struct ieee80211_sta *sta, bool enable);
223 int (*add_beacon_offload)(struct mt7615_dev *dev,
224 struct ieee80211_hw *hw,
225 struct ieee80211_vif *vif, bool enable);
226 int (*set_pm_state)(struct mt7615_dev *dev, int band, int state);
227 int (*set_drv_ctrl)(struct mt7615_dev *dev);
228 int (*set_fw_ctrl)(struct mt7615_dev *dev);
229};
230
231struct mt7615_dev {
232 union {
233 struct mt76_dev mt76;
234 struct mt76_phy mphy;
235 };
236
237 const struct mt76_bus_ops *bus_ops;
238 struct tasklet_struct irq_tasklet;
239
240 struct mt7615_phy phy;
241 u64 omac_mask;
242
243 u16 chainmask;
244
245 struct ieee80211_ops *ops;
246 const struct mt7615_mcu_ops *mcu_ops;
247 struct regmap *infracfg;
248 const u32 *reg_map;
249
250 struct work_struct mcu_work;
251
252 struct work_struct reset_work;
253 wait_queue_head_t reset_wait;
254 u32 reset_state;
255
256 struct list_head sta_poll_list;
257 spinlock_t sta_poll_lock;
258
259 struct {
260 u8 n_pulses;
261 u32 period;
262 u16 width;
263 s16 power;
264 } radar_pattern;
265 u32 hw_pattern;
266
267 bool fw_debug;
268 bool flash_eeprom;
269 bool dbdc_support;
270
271 spinlock_t token_lock;
272 struct idr token;
273
274 u8 fw_ver;
275
276 struct work_struct rate_work;
277 struct list_head wrd_head;
278
279 u32 debugfs_rf_wf;
280 u32 debugfs_rf_reg;
281
282 u32 muar_mask;
283
284#ifdef CONFIG_NL80211_TESTMODE
285 struct {
286 u32 *reg_backup;
287
288 s16 last_freq_offset;
289 u8 last_rcpi[4];
290 s8 last_ib_rssi[4];
291 s8 last_wb_rssi[4];
292 } test;
293#endif
294
295 struct {
296 bool enable;
297
298 spinlock_t txq_lock;
299 struct {
300 struct mt7615_sta *msta;
301 struct sk_buff *skb;
302 } tx_q[IEEE80211_NUM_ACS];
303
304 struct work_struct wake_work;
305 struct completion wake_cmpl;
306
307 struct delayed_work ps_work;
308 unsigned long last_activity;
309 unsigned long idle_timeout;
310 } pm;
311};
312
313enum tx_pkt_queue_idx {
314 MT_LMAC_AC00,
315 MT_LMAC_AC01,
316 MT_LMAC_AC02,
317 MT_LMAC_AC03,
318 MT_LMAC_ALTX0 = 0x10,
319 MT_LMAC_BMC0,
320 MT_LMAC_BCN0,
321 MT_LMAC_PSMP0,
322 MT_LMAC_ALTX1,
323 MT_LMAC_BMC1,
324 MT_LMAC_BCN1,
325 MT_LMAC_PSMP1,
326};
327
328enum {
329 HW_BSSID_0 = 0x0,
330 HW_BSSID_1,
331 HW_BSSID_2,
332 HW_BSSID_3,
333 HW_BSSID_MAX = HW_BSSID_3,
334 EXT_BSSID_START = 0x10,
335 EXT_BSSID_1,
336 EXT_BSSID_15 = 0x1f,
337 EXT_BSSID_MAX = EXT_BSSID_15,
338 REPEATER_BSSID_START = 0x20,
339 REPEATER_BSSID_MAX = 0x3f,
340};
341
342enum {
343 MT_RX_SEL0,
344 MT_RX_SEL1,
345};
346
347enum mt7615_rdd_cmd {
348 RDD_STOP,
349 RDD_START,
350 RDD_DET_MODE,
351 RDD_DET_STOP,
352 RDD_CAC_START,
353 RDD_CAC_END,
354 RDD_NORMAL_START,
355 RDD_DISABLE_DFS_CAL,
356 RDD_PULSE_DBG,
357 RDD_READ_PULSE,
358 RDD_RESUME_BF,
359};
360
361static inline struct mt7615_phy *
362mt7615_hw_phy(struct ieee80211_hw *hw)
363{
364 struct mt76_phy *phy = hw->priv;
365
366 return phy->priv;
367}
368
369static inline struct mt7615_dev *
370mt7615_hw_dev(struct ieee80211_hw *hw)
371{
372 struct mt76_phy *phy = hw->priv;
373
374 return container_of(phy->dev, struct mt7615_dev, mt76);
375}
376
377static inline struct mt7615_phy *
378mt7615_ext_phy(struct mt7615_dev *dev)
379{
380 struct mt76_phy *phy = dev->mt76.phy2;
381
382 if (!phy)
383 return NULL;
384
385 return phy->priv;
386}
387
388extern struct ieee80211_rate mt7615_rates[12];
389extern const struct ieee80211_ops mt7615_ops;
390extern const u32 mt7615e_reg_map[__MT_BASE_MAX];
391extern const u32 mt7663e_reg_map[__MT_BASE_MAX];
392extern const u32 mt7663_usb_sdio_reg_map[__MT_BASE_MAX];
393extern struct pci_driver mt7615_pci_driver;
394extern struct platform_driver mt7622_wmac_driver;
395extern const struct mt76_testmode_ops mt7615_testmode_ops;
396
397#ifdef CONFIG_MT7622_WMAC
398int mt7622_wmac_init(struct mt7615_dev *dev);
399#else
400static inline int mt7622_wmac_init(struct mt7615_dev *dev)
401{
402 return 0;
403}
404#endif
405
406int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base,
407 int irq, const u32 *map);
408u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);
409
410void mt7615_check_offload_capability(struct mt7615_dev *dev);
411void mt7615_init_device(struct mt7615_dev *dev);
412int mt7615_register_device(struct mt7615_dev *dev);
413void mt7615_unregister_device(struct mt7615_dev *dev);
414int mt7615_register_ext_phy(struct mt7615_dev *dev);
415void mt7615_unregister_ext_phy(struct mt7615_dev *dev);
416int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr);
417int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev,
418 struct ieee80211_channel *chan,
419 u8 chain_idx);
420int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev,
421 enum nl80211_band band);
422int mt7615_wait_pdma_busy(struct mt7615_dev *dev);
423int mt7615_dma_init(struct mt7615_dev *dev);
424void mt7615_dma_cleanup(struct mt7615_dev *dev);
425int mt7615_mcu_init(struct mt7615_dev *dev);
426bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev);
427void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
428 struct ieee80211_tx_rate *probe_rate,
429 struct ieee80211_tx_rate *rates);
430void mt7615_pm_wake_work(struct work_struct *work);
431int mt7615_pm_wake(struct mt7615_dev *dev);
432void mt7615_pm_power_save_sched(struct mt7615_dev *dev);
433void mt7615_pm_power_save_work(struct work_struct *work);
434int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev);
435int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd);
436int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue,
437 const struct ieee80211_tx_queue_params *params);
438void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb);
439int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev,
440 enum mt7615_rdd_cmd cmd, u8 index,
441 u8 rx_sel, u8 val);
442int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev);
443int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl);
444
445static inline bool is_mt7622(struct mt76_dev *dev)
446{
447 if (!IS_ENABLED(CONFIG_MT7622_WMAC))
448 return false;
449
450 return mt76_chip(dev) == 0x7622;
451}
452
453static inline bool is_mt7615(struct mt76_dev *dev)
454{
455 return mt76_chip(dev) == 0x7615 || mt76_chip(dev) == 0x7611;
456}
457
458static inline bool is_mt7663(struct mt76_dev *dev)
459{
460 return mt76_chip(dev) == 0x7663;
461}
462
463static inline bool is_mt7611(struct mt76_dev *dev)
464{
465 return mt76_chip(dev) == 0x7611;
466}
467
468static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask)
469{
470 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
471
472 tasklet_schedule(&dev->irq_tasklet);
473}
474
475static inline bool mt7615_firmware_offload(struct mt7615_dev *dev)
476{
477 return dev->fw_ver > MT7615_FIRMWARE_V2;
478}
479
480static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev)
481{
482 if (is_mt7663(&dev->mt76) && mt7615_firmware_offload(dev))
483 return MT7663_WTBL_SIZE;
484 else
485 return MT7615_WTBL_SIZE;
486}
487
488static inline void mt7615_mutex_acquire(struct mt7615_dev *dev)
489 __acquires(&dev->mt76.mutex)
490{
491 mutex_lock(&dev->mt76.mutex);
492 mt7615_pm_wake(dev);
493}
494
495static inline void mt7615_mutex_release(struct mt7615_dev *dev)
496 __releases(&dev->mt76.mutex)
497{
498 mt7615_pm_power_save_sched(dev);
499 mutex_unlock(&dev->mt76.mutex);
500}
501
502static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac)
503{
504 static const u8 lmac_queue_map[] = {
505 [IEEE80211_AC_BK] = MT_LMAC_AC00,
506 [IEEE80211_AC_BE] = MT_LMAC_AC01,
507 [IEEE80211_AC_VI] = MT_LMAC_AC02,
508 [IEEE80211_AC_VO] = MT_LMAC_AC03,
509 };
510
511 if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map)))
512 return MT_LMAC_AC01;
513
514 return lmac_queue_map[ac];
515}
516
517static inline u32 mt7615_tx_mcu_int_mask(struct mt7615_dev *dev)
518{
519 return MT_INT_TX_DONE(dev->mt76.q_mcu[MT_MCUQ_WM]->hw_idx);
520}
521
522void mt7615_dma_reset(struct mt7615_dev *dev);
523void mt7615_scan_work(struct work_struct *work);
524void mt7615_roc_work(struct work_struct *work);
525void mt7615_roc_timer(struct timer_list *timer);
526void mt7615_init_txpower(struct mt7615_dev *dev,
527 struct ieee80211_supported_band *sband);
528void mt7615_phy_init(struct mt7615_dev *dev);
529void mt7615_mac_init(struct mt7615_dev *dev);
530int mt7615_set_channel(struct mt7615_phy *phy);
531
532int mt7615_mcu_restart(struct mt76_dev *dev);
533void mt7615_update_channel(struct mt76_dev *mdev);
534bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask);
535void mt7615_mac_reset_counters(struct mt7615_dev *dev);
536void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy);
537void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable);
538void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy);
539void mt7615_mac_sta_poll(struct mt7615_dev *dev);
540int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
541 struct sk_buff *skb, struct mt76_wcid *wcid,
542 struct ieee80211_sta *sta, int pid,
543 struct ieee80211_key_conf *key, bool beacon);
544void mt7615_mac_set_timing(struct mt7615_phy *phy);
545int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev,
546 struct mt76_wcid *wcid,
547 struct ieee80211_key_conf *key,
548 enum set_key_cmd cmd);
549int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
550 struct ieee80211_key_conf *key,
551 enum set_key_cmd cmd);
552void mt7615_mac_reset_work(struct work_struct *work);
553u32 mt7615_mac_get_sta_tid_sn(struct mt7615_dev *dev, int wcid, u8 tid);
554
555int mt7615_mcu_parse_response(struct mt76_dev *mdev, int cmd,
556 struct sk_buff *skb, int seq);
557u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg);
558int mt7615_rf_wr(struct mt7615_dev *dev, u32 wf, u32 reg, u32 val);
559int mt7615_mcu_set_dbdc(struct mt7615_dev *dev);
560int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);
561int mt7615_mcu_set_mac_enable(struct mt7615_dev *dev, int band, bool enable);
562int mt7615_mcu_set_rts_thresh(struct mt7615_phy *phy, u32 val);
563int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index);
564int mt7615_mcu_set_tx_power(struct mt7615_phy *phy);
565void mt7615_mcu_exit(struct mt7615_dev *dev);
566void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb,
567 int cmd, int *wait_seq);
568int mt7615_mcu_set_channel_domain(struct mt7615_phy *phy);
569int mt7615_mcu_hw_scan(struct mt7615_phy *phy, struct ieee80211_vif *vif,
570 struct ieee80211_scan_request *scan_req);
571int mt7615_mcu_cancel_hw_scan(struct mt7615_phy *phy,
572 struct ieee80211_vif *vif);
573int mt7615_mcu_sched_scan_req(struct mt7615_phy *phy,
574 struct ieee80211_vif *vif,
575 struct cfg80211_sched_scan_request *sreq);
576int mt7615_mcu_sched_scan_enable(struct mt7615_phy *phy,
577 struct ieee80211_vif *vif,
578 bool enable);
579
580int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
581 enum mt76_txq_id qid, struct mt76_wcid *wcid,
582 struct ieee80211_sta *sta,
583 struct mt76_tx_info *tx_info);
584
585void mt7615_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
586
587void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
588 struct sk_buff *skb);
589void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
590int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
591 struct ieee80211_sta *sta);
592void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
593 struct ieee80211_sta *sta);
594void mt7615_mac_work(struct work_struct *work);
595void mt7615_txp_skb_unmap(struct mt76_dev *dev,
596 struct mt76_txwi_cache *txwi);
597int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val);
598int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev,
599 const struct mt7615_dfs_pulse *pulse);
600int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index,
601 const struct mt7615_dfs_pattern *pattern);
602int mt7615_mcu_set_test_param(struct mt7615_dev *dev, u8 param, bool test_mode,
603 u32 val);
604int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable);
605int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy);
606int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy);
607int mt7615_mcu_set_vif_ps(struct mt7615_dev *dev, struct ieee80211_vif *vif);
608int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy);
609
610int mt7615_mcu_set_p2p_oppps(struct ieee80211_hw *hw,
611 struct ieee80211_vif *vif);
612int mt7615_mcu_set_roc(struct mt7615_phy *phy, struct ieee80211_vif *vif,
613 struct ieee80211_channel *chan, int duration);
614
615int mt7615_init_debugfs(struct mt7615_dev *dev);
616int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq);
617
618int mt7615_mac_set_beacon_filter(struct mt7615_phy *phy,
619 struct ieee80211_vif *vif,
620 bool enable);
621int mt7615_mcu_set_bss_pm(struct mt7615_dev *dev, struct ieee80211_vif *vif,
622 bool enable);
623int mt7615_mcu_set_hif_suspend(struct mt7615_dev *dev, bool suspend);
624void mt7615_mcu_set_suspend_iter(void *priv, u8 *mac,
625 struct ieee80211_vif *vif);
626int mt7615_mcu_update_gtk_rekey(struct ieee80211_hw *hw,
627 struct ieee80211_vif *vif,
628 struct cfg80211_gtk_rekey_data *key);
629int mt7615_mcu_update_arp_filter(struct ieee80211_hw *hw,
630 struct ieee80211_vif *vif,
631 struct ieee80211_bss_conf *info);
632int __mt7663_load_firmware(struct mt7615_dev *dev);
633u32 mt7615_mcu_reg_rr(struct mt76_dev *dev, u32 offset);
634void mt7615_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val);
635
636
637int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
638 enum mt76_txq_id qid, struct mt76_wcid *wcid,
639 struct ieee80211_sta *sta,
640 struct mt76_tx_info *tx_info);
641bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update);
642void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
643 struct mt76_queue_entry *e);
644int mt7663_usb_sdio_register_device(struct mt7615_dev *dev);
645int mt7663u_mcu_init(struct mt7615_dev *dev);
646
647
648u32 mt7663s_read_pcr(struct mt7615_dev *dev);
649int mt7663s_mcu_init(struct mt7615_dev *dev);
650void mt7663s_txrx_worker(struct mt76_worker *w);
651void mt7663s_rx_work(struct work_struct *work);
652void mt7663s_sdio_irq(struct sdio_func *func);
653
654#endif
655
