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6
7#include <linux/device.h>
8#include <linux/interrupt.h>
9#include <linux/irq.h>
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/msi.h>
13#include <linux/pci.h>
14#include <linux/pci-ecam.h>
15#include <linux/srcu.h>
16#include <linux/rculist.h>
17#include <linux/rcupdate.h>
18
19#include <asm/irqdomain.h>
20#include <asm/device.h>
21#include <asm/msi.h>
22
23#define VMD_CFGBAR 0
24#define VMD_MEMBAR1 2
25#define VMD_MEMBAR2 4
26
27#define PCI_REG_VMCAP 0x40
28#define BUS_RESTRICT_CAP(vmcap) (vmcap & 0x1)
29#define PCI_REG_VMCONFIG 0x44
30#define BUS_RESTRICT_CFG(vmcfg) ((vmcfg >> 8) & 0x3)
31#define PCI_REG_VMLOCK 0x70
32#define MB2_SHADOW_EN(vmlock) (vmlock & 0x2)
33
34#define MB2_SHADOW_OFFSET 0x2000
35#define MB2_SHADOW_SIZE 16
36
37enum vmd_features {
38
39
40
41
42
43 VMD_FEAT_HAS_MEMBAR_SHADOW = (1 << 0),
44
45
46
47
48
49 VMD_FEAT_HAS_BUS_RESTRICTIONS = (1 << 1),
50
51
52
53
54
55 VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP = (1 << 2),
56
57
58
59
60
61 VMD_FEAT_OFFSET_FIRST_VECTOR = (1 << 3),
62};
63
64
65
66
67static DEFINE_RAW_SPINLOCK(list_lock);
68
69
70
71
72
73
74
75
76
77
78
79struct vmd_irq {
80 struct list_head node;
81 struct vmd_irq_list *irq;
82 bool enabled;
83 unsigned int virq;
84};
85
86
87
88
89
90
91
92
93struct vmd_irq_list {
94 struct list_head irq_list;
95 struct srcu_struct srcu;
96 unsigned int count;
97};
98
99struct vmd_dev {
100 struct pci_dev *dev;
101
102 spinlock_t cfg_lock;
103 void __iomem *cfgbar;
104
105 int msix_count;
106 struct vmd_irq_list *irqs;
107
108 struct pci_sysdata sysdata;
109 struct resource resources[3];
110 struct irq_domain *irq_domain;
111 struct pci_bus *bus;
112 u8 busn_start;
113 u8 first_vec;
114};
115
116static inline struct vmd_dev *vmd_from_bus(struct pci_bus *bus)
117{
118 return container_of(bus->sysdata, struct vmd_dev, sysdata);
119}
120
121static inline unsigned int index_from_irqs(struct vmd_dev *vmd,
122 struct vmd_irq_list *irqs)
123{
124 return irqs - vmd->irqs;
125}
126
127
128
129
130
131
132
133
134
135static void vmd_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
136{
137 struct vmd_irq *vmdirq = data->chip_data;
138 struct vmd_irq_list *irq = vmdirq->irq;
139 struct vmd_dev *vmd = irq_data_get_irq_handler_data(data);
140
141 memset(msg, 0, sizeof(*msg));
142 msg->address_hi = X86_MSI_BASE_ADDRESS_HIGH;
143 msg->arch_addr_lo.base_address = X86_MSI_BASE_ADDRESS_LOW;
144 msg->arch_addr_lo.destid_0_7 = index_from_irqs(vmd, irq);
145}
146
147
148
149
150static void vmd_irq_enable(struct irq_data *data)
151{
152 struct vmd_irq *vmdirq = data->chip_data;
153 unsigned long flags;
154
155 raw_spin_lock_irqsave(&list_lock, flags);
156 WARN_ON(vmdirq->enabled);
157 list_add_tail_rcu(&vmdirq->node, &vmdirq->irq->irq_list);
158 vmdirq->enabled = true;
159 raw_spin_unlock_irqrestore(&list_lock, flags);
160
161 data->chip->irq_unmask(data);
162}
163
164static void vmd_irq_disable(struct irq_data *data)
165{
166 struct vmd_irq *vmdirq = data->chip_data;
167 unsigned long flags;
168
169 data->chip->irq_mask(data);
170
171 raw_spin_lock_irqsave(&list_lock, flags);
172 if (vmdirq->enabled) {
173 list_del_rcu(&vmdirq->node);
174 vmdirq->enabled = false;
175 }
176 raw_spin_unlock_irqrestore(&list_lock, flags);
177}
178
179
180
181
182
183static int vmd_irq_set_affinity(struct irq_data *data,
184 const struct cpumask *dest, bool force)
185{
186 return -EINVAL;
187}
188
189static struct irq_chip vmd_msi_controller = {
190 .name = "VMD-MSI",
191 .irq_enable = vmd_irq_enable,
192 .irq_disable = vmd_irq_disable,
193 .irq_compose_msi_msg = vmd_compose_msi_msg,
194 .irq_set_affinity = vmd_irq_set_affinity,
195};
196
197static irq_hw_number_t vmd_get_hwirq(struct msi_domain_info *info,
198 msi_alloc_info_t *arg)
199{
200 return 0;
201}
202
203
204
205
206
207static struct vmd_irq_list *vmd_next_irq(struct vmd_dev *vmd, struct msi_desc *desc)
208{
209 unsigned long flags;
210 int i, best;
211
212 if (vmd->msix_count == 1 + vmd->first_vec)
213 return &vmd->irqs[vmd->first_vec];
214
215
216
217
218
219 switch (msi_desc_to_pci_dev(desc)->class) {
220 case PCI_CLASS_STORAGE_EXPRESS:
221 break;
222 default:
223 return &vmd->irqs[vmd->first_vec];
224 }
225
226 raw_spin_lock_irqsave(&list_lock, flags);
227 best = vmd->first_vec + 1;
228 for (i = best; i < vmd->msix_count; i++)
229 if (vmd->irqs[i].count < vmd->irqs[best].count)
230 best = i;
231 vmd->irqs[best].count++;
232 raw_spin_unlock_irqrestore(&list_lock, flags);
233
234 return &vmd->irqs[best];
235}
236
237static int vmd_msi_init(struct irq_domain *domain, struct msi_domain_info *info,
238 unsigned int virq, irq_hw_number_t hwirq,
239 msi_alloc_info_t *arg)
240{
241 struct msi_desc *desc = arg->desc;
242 struct vmd_dev *vmd = vmd_from_bus(msi_desc_to_pci_dev(desc)->bus);
243 struct vmd_irq *vmdirq = kzalloc(sizeof(*vmdirq), GFP_KERNEL);
244 unsigned int index, vector;
245
246 if (!vmdirq)
247 return -ENOMEM;
248
249 INIT_LIST_HEAD(&vmdirq->node);
250 vmdirq->irq = vmd_next_irq(vmd, desc);
251 vmdirq->virq = virq;
252 index = index_from_irqs(vmd, vmdirq->irq);
253 vector = pci_irq_vector(vmd->dev, index);
254
255 irq_domain_set_info(domain, virq, vector, info->chip, vmdirq,
256 handle_untracked_irq, vmd, NULL);
257 return 0;
258}
259
260static void vmd_msi_free(struct irq_domain *domain,
261 struct msi_domain_info *info, unsigned int virq)
262{
263 struct vmd_irq *vmdirq = irq_get_chip_data(virq);
264 unsigned long flags;
265
266 synchronize_srcu(&vmdirq->irq->srcu);
267
268
269 raw_spin_lock_irqsave(&list_lock, flags);
270 vmdirq->irq->count--;
271 raw_spin_unlock_irqrestore(&list_lock, flags);
272
273 kfree(vmdirq);
274}
275
276static int vmd_msi_prepare(struct irq_domain *domain, struct device *dev,
277 int nvec, msi_alloc_info_t *arg)
278{
279 struct pci_dev *pdev = to_pci_dev(dev);
280 struct vmd_dev *vmd = vmd_from_bus(pdev->bus);
281
282 if (nvec > vmd->msix_count)
283 return vmd->msix_count;
284
285 memset(arg, 0, sizeof(*arg));
286 return 0;
287}
288
289static void vmd_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
290{
291 arg->desc = desc;
292}
293
294static struct msi_domain_ops vmd_msi_domain_ops = {
295 .get_hwirq = vmd_get_hwirq,
296 .msi_init = vmd_msi_init,
297 .msi_free = vmd_msi_free,
298 .msi_prepare = vmd_msi_prepare,
299 .set_desc = vmd_set_desc,
300};
301
302static struct msi_domain_info vmd_msi_domain_info = {
303 .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
304 MSI_FLAG_PCI_MSIX,
305 .ops = &vmd_msi_domain_ops,
306 .chip = &vmd_msi_controller,
307};
308
309static int vmd_create_irq_domain(struct vmd_dev *vmd)
310{
311 struct fwnode_handle *fn;
312
313 fn = irq_domain_alloc_named_id_fwnode("VMD-MSI", vmd->sysdata.domain);
314 if (!fn)
315 return -ENODEV;
316
317 vmd->irq_domain = pci_msi_create_irq_domain(fn, &vmd_msi_domain_info, NULL);
318 if (!vmd->irq_domain) {
319 irq_domain_free_fwnode(fn);
320 return -ENODEV;
321 }
322
323 return 0;
324}
325
326static void vmd_remove_irq_domain(struct vmd_dev *vmd)
327{
328 if (vmd->irq_domain) {
329 struct fwnode_handle *fn = vmd->irq_domain->fwnode;
330
331 irq_domain_remove(vmd->irq_domain);
332 irq_domain_free_fwnode(fn);
333 }
334}
335
336static void __iomem *vmd_cfg_addr(struct vmd_dev *vmd, struct pci_bus *bus,
337 unsigned int devfn, int reg, int len)
338{
339 unsigned int busnr_ecam = bus->number - vmd->busn_start;
340 u32 offset = PCIE_ECAM_OFFSET(busnr_ecam, devfn, reg);
341
342 if (offset + len >= resource_size(&vmd->dev->resource[VMD_CFGBAR]))
343 return NULL;
344
345 return vmd->cfgbar + offset;
346}
347
348
349
350
351
352static int vmd_pci_read(struct pci_bus *bus, unsigned int devfn, int reg,
353 int len, u32 *value)
354{
355 struct vmd_dev *vmd = vmd_from_bus(bus);
356 void __iomem *addr = vmd_cfg_addr(vmd, bus, devfn, reg, len);
357 unsigned long flags;
358 int ret = 0;
359
360 if (!addr)
361 return -EFAULT;
362
363 spin_lock_irqsave(&vmd->cfg_lock, flags);
364 switch (len) {
365 case 1:
366 *value = readb(addr);
367 break;
368 case 2:
369 *value = readw(addr);
370 break;
371 case 4:
372 *value = readl(addr);
373 break;
374 default:
375 ret = -EINVAL;
376 break;
377 }
378 spin_unlock_irqrestore(&vmd->cfg_lock, flags);
379 return ret;
380}
381
382
383
384
385
386
387static int vmd_pci_write(struct pci_bus *bus, unsigned int devfn, int reg,
388 int len, u32 value)
389{
390 struct vmd_dev *vmd = vmd_from_bus(bus);
391 void __iomem *addr = vmd_cfg_addr(vmd, bus, devfn, reg, len);
392 unsigned long flags;
393 int ret = 0;
394
395 if (!addr)
396 return -EFAULT;
397
398 spin_lock_irqsave(&vmd->cfg_lock, flags);
399 switch (len) {
400 case 1:
401 writeb(value, addr);
402 readb(addr);
403 break;
404 case 2:
405 writew(value, addr);
406 readw(addr);
407 break;
408 case 4:
409 writel(value, addr);
410 readl(addr);
411 break;
412 default:
413 ret = -EINVAL;
414 break;
415 }
416 spin_unlock_irqrestore(&vmd->cfg_lock, flags);
417 return ret;
418}
419
420static struct pci_ops vmd_ops = {
421 .read = vmd_pci_read,
422 .write = vmd_pci_write,
423};
424
425static void vmd_attach_resources(struct vmd_dev *vmd)
426{
427 vmd->dev->resource[VMD_MEMBAR1].child = &vmd->resources[1];
428 vmd->dev->resource[VMD_MEMBAR2].child = &vmd->resources[2];
429}
430
431static void vmd_detach_resources(struct vmd_dev *vmd)
432{
433 vmd->dev->resource[VMD_MEMBAR1].child = NULL;
434 vmd->dev->resource[VMD_MEMBAR2].child = NULL;
435}
436
437
438
439
440
441
442
443static int vmd_find_free_domain(void)
444{
445 int domain = 0xffff;
446 struct pci_bus *bus = NULL;
447
448 while ((bus = pci_find_next_bus(bus)) != NULL)
449 domain = max_t(int, domain, pci_domain_nr(bus));
450 return domain + 1;
451}
452
453static int vmd_get_phys_offsets(struct vmd_dev *vmd, bool native_hint,
454 resource_size_t *offset1,
455 resource_size_t *offset2)
456{
457 struct pci_dev *dev = vmd->dev;
458 u64 phys1, phys2;
459
460 if (native_hint) {
461 u32 vmlock;
462 int ret;
463
464 ret = pci_read_config_dword(dev, PCI_REG_VMLOCK, &vmlock);
465 if (ret || vmlock == ~0)
466 return -ENODEV;
467
468 if (MB2_SHADOW_EN(vmlock)) {
469 void __iomem *membar2;
470
471 membar2 = pci_iomap(dev, VMD_MEMBAR2, 0);
472 if (!membar2)
473 return -ENOMEM;
474 phys1 = readq(membar2 + MB2_SHADOW_OFFSET);
475 phys2 = readq(membar2 + MB2_SHADOW_OFFSET + 8);
476 pci_iounmap(dev, membar2);
477 } else
478 return 0;
479 } else {
480
481 int pos = pci_find_capability(dev, PCI_CAP_ID_VNDR);
482 u32 reg, regu;
483
484 pci_read_config_dword(dev, pos + 4, ®);
485
486
487 if (pos && reg == 0x53484457) {
488 pci_read_config_dword(dev, pos + 8, ®);
489 pci_read_config_dword(dev, pos + 12, ®u);
490 phys1 = (u64) regu << 32 | reg;
491
492 pci_read_config_dword(dev, pos + 16, ®);
493 pci_read_config_dword(dev, pos + 20, ®u);
494 phys2 = (u64) regu << 32 | reg;
495 } else
496 return 0;
497 }
498
499 *offset1 = dev->resource[VMD_MEMBAR1].start -
500 (phys1 & PCI_BASE_ADDRESS_MEM_MASK);
501 *offset2 = dev->resource[VMD_MEMBAR2].start -
502 (phys2 & PCI_BASE_ADDRESS_MEM_MASK);
503
504 return 0;
505}
506
507static int vmd_get_bus_number_start(struct vmd_dev *vmd)
508{
509 struct pci_dev *dev = vmd->dev;
510 u16 reg;
511
512 pci_read_config_word(dev, PCI_REG_VMCAP, ®);
513 if (BUS_RESTRICT_CAP(reg)) {
514 pci_read_config_word(dev, PCI_REG_VMCONFIG, ®);
515
516 switch (BUS_RESTRICT_CFG(reg)) {
517 case 0:
518 vmd->busn_start = 0;
519 break;
520 case 1:
521 vmd->busn_start = 128;
522 break;
523 case 2:
524 vmd->busn_start = 224;
525 break;
526 default:
527 pci_err(dev, "Unknown Bus Offset Setting (%d)\n",
528 BUS_RESTRICT_CFG(reg));
529 return -ENODEV;
530 }
531 }
532
533 return 0;
534}
535
536static irqreturn_t vmd_irq(int irq, void *data)
537{
538 struct vmd_irq_list *irqs = data;
539 struct vmd_irq *vmdirq;
540 int idx;
541
542 idx = srcu_read_lock(&irqs->srcu);
543 list_for_each_entry_rcu(vmdirq, &irqs->irq_list, node)
544 generic_handle_irq(vmdirq->virq);
545 srcu_read_unlock(&irqs->srcu, idx);
546
547 return IRQ_HANDLED;
548}
549
550static int vmd_alloc_irqs(struct vmd_dev *vmd)
551{
552 struct pci_dev *dev = vmd->dev;
553 int i, err;
554
555 vmd->msix_count = pci_msix_vec_count(dev);
556 if (vmd->msix_count < 0)
557 return -ENODEV;
558
559 vmd->msix_count = pci_alloc_irq_vectors(dev, vmd->first_vec + 1,
560 vmd->msix_count, PCI_IRQ_MSIX);
561 if (vmd->msix_count < 0)
562 return vmd->msix_count;
563
564 vmd->irqs = devm_kcalloc(&dev->dev, vmd->msix_count, sizeof(*vmd->irqs),
565 GFP_KERNEL);
566 if (!vmd->irqs)
567 return -ENOMEM;
568
569 for (i = 0; i < vmd->msix_count; i++) {
570 err = init_srcu_struct(&vmd->irqs[i].srcu);
571 if (err)
572 return err;
573
574 INIT_LIST_HEAD(&vmd->irqs[i].irq_list);
575 err = devm_request_irq(&dev->dev, pci_irq_vector(dev, i),
576 vmd_irq, IRQF_NO_THREAD,
577 "vmd", &vmd->irqs[i]);
578 if (err)
579 return err;
580 }
581
582 return 0;
583}
584
585static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
586{
587 struct pci_sysdata *sd = &vmd->sysdata;
588 struct resource *res;
589 u32 upper_bits;
590 unsigned long flags;
591 LIST_HEAD(resources);
592 resource_size_t offset[2] = {0};
593 resource_size_t membar2_offset = 0x2000;
594 struct pci_bus *child;
595 int ret;
596
597
598
599
600
601
602
603 if (features & VMD_FEAT_HAS_MEMBAR_SHADOW) {
604 membar2_offset = MB2_SHADOW_OFFSET + MB2_SHADOW_SIZE;
605 ret = vmd_get_phys_offsets(vmd, true, &offset[0], &offset[1]);
606 if (ret)
607 return ret;
608 } else if (features & VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP) {
609 ret = vmd_get_phys_offsets(vmd, false, &offset[0], &offset[1]);
610 if (ret)
611 return ret;
612 }
613
614
615
616
617
618 if (features & VMD_FEAT_HAS_BUS_RESTRICTIONS) {
619 ret = vmd_get_bus_number_start(vmd);
620 if (ret)
621 return ret;
622 }
623
624 res = &vmd->dev->resource[VMD_CFGBAR];
625 vmd->resources[0] = (struct resource) {
626 .name = "VMD CFGBAR",
627 .start = vmd->busn_start,
628 .end = vmd->busn_start + (resource_size(res) >> 20) - 1,
629 .flags = IORESOURCE_BUS | IORESOURCE_PCI_FIXED,
630 };
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649 res = &vmd->dev->resource[VMD_MEMBAR1];
650 upper_bits = upper_32_bits(res->end);
651 flags = res->flags & ~IORESOURCE_SIZEALIGN;
652 if (!upper_bits)
653 flags &= ~IORESOURCE_MEM_64;
654 vmd->resources[1] = (struct resource) {
655 .name = "VMD MEMBAR1",
656 .start = res->start,
657 .end = res->end,
658 .flags = flags,
659 .parent = res,
660 };
661
662 res = &vmd->dev->resource[VMD_MEMBAR2];
663 upper_bits = upper_32_bits(res->end);
664 flags = res->flags & ~IORESOURCE_SIZEALIGN;
665 if (!upper_bits)
666 flags &= ~IORESOURCE_MEM_64;
667 vmd->resources[2] = (struct resource) {
668 .name = "VMD MEMBAR2",
669 .start = res->start + membar2_offset,
670 .end = res->end,
671 .flags = flags,
672 .parent = res,
673 };
674
675 sd->vmd_dev = vmd->dev;
676 sd->domain = vmd_find_free_domain();
677 if (sd->domain < 0)
678 return sd->domain;
679
680 sd->node = pcibus_to_node(vmd->dev->bus);
681
682 ret = vmd_create_irq_domain(vmd);
683 if (ret)
684 return ret;
685
686
687
688
689
690 irq_domain_update_bus_token(vmd->irq_domain, DOMAIN_BUS_VMD_MSI);
691
692 pci_add_resource(&resources, &vmd->resources[0]);
693 pci_add_resource_offset(&resources, &vmd->resources[1], offset[0]);
694 pci_add_resource_offset(&resources, &vmd->resources[2], offset[1]);
695
696 vmd->bus = pci_create_root_bus(&vmd->dev->dev, vmd->busn_start,
697 &vmd_ops, sd, &resources);
698 if (!vmd->bus) {
699 pci_free_resource_list(&resources);
700 vmd_remove_irq_domain(vmd);
701 return -ENODEV;
702 }
703
704 vmd_attach_resources(vmd);
705 if (vmd->irq_domain)
706 dev_set_msi_domain(&vmd->bus->dev, vmd->irq_domain);
707
708 pci_scan_child_bus(vmd->bus);
709 pci_assign_unassigned_bus_resources(vmd->bus);
710
711
712
713
714
715
716 list_for_each_entry(child, &vmd->bus->children, node)
717 pcie_bus_configure_settings(child);
718
719 pci_bus_add_devices(vmd->bus);
720
721 WARN(sysfs_create_link(&vmd->dev->dev.kobj, &vmd->bus->dev.kobj,
722 "domain"), "Can't create symlink to domain\n");
723 return 0;
724}
725
726static int vmd_probe(struct pci_dev *dev, const struct pci_device_id *id)
727{
728 unsigned long features = (unsigned long) id->driver_data;
729 struct vmd_dev *vmd;
730 int err;
731
732 if (resource_size(&dev->resource[VMD_CFGBAR]) < (1 << 20))
733 return -ENOMEM;
734
735 vmd = devm_kzalloc(&dev->dev, sizeof(*vmd), GFP_KERNEL);
736 if (!vmd)
737 return -ENOMEM;
738
739 vmd->dev = dev;
740 err = pcim_enable_device(dev);
741 if (err < 0)
742 return err;
743
744 vmd->cfgbar = pcim_iomap(dev, VMD_CFGBAR, 0);
745 if (!vmd->cfgbar)
746 return -ENOMEM;
747
748 pci_set_master(dev);
749 if (dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(64)) &&
750 dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)))
751 return -ENODEV;
752
753 if (features & VMD_FEAT_OFFSET_FIRST_VECTOR)
754 vmd->first_vec = 1;
755
756 err = vmd_alloc_irqs(vmd);
757 if (err)
758 return err;
759
760 spin_lock_init(&vmd->cfg_lock);
761 pci_set_drvdata(dev, vmd);
762 err = vmd_enable_domain(vmd, features);
763 if (err)
764 return err;
765
766 dev_info(&vmd->dev->dev, "Bound to PCI domain %04x\n",
767 vmd->sysdata.domain);
768 return 0;
769}
770
771static void vmd_cleanup_srcu(struct vmd_dev *vmd)
772{
773 int i;
774
775 for (i = 0; i < vmd->msix_count; i++)
776 cleanup_srcu_struct(&vmd->irqs[i].srcu);
777}
778
779static void vmd_remove(struct pci_dev *dev)
780{
781 struct vmd_dev *vmd = pci_get_drvdata(dev);
782
783 sysfs_remove_link(&vmd->dev->dev.kobj, "domain");
784 pci_stop_root_bus(vmd->bus);
785 pci_remove_root_bus(vmd->bus);
786 vmd_cleanup_srcu(vmd);
787 vmd_detach_resources(vmd);
788 vmd_remove_irq_domain(vmd);
789}
790
791#ifdef CONFIG_PM_SLEEP
792static int vmd_suspend(struct device *dev)
793{
794 struct pci_dev *pdev = to_pci_dev(dev);
795 struct vmd_dev *vmd = pci_get_drvdata(pdev);
796 int i;
797
798 for (i = 0; i < vmd->msix_count; i++)
799 devm_free_irq(dev, pci_irq_vector(pdev, i), &vmd->irqs[i]);
800
801 return 0;
802}
803
804static int vmd_resume(struct device *dev)
805{
806 struct pci_dev *pdev = to_pci_dev(dev);
807 struct vmd_dev *vmd = pci_get_drvdata(pdev);
808 int err, i;
809
810 for (i = 0; i < vmd->msix_count; i++) {
811 err = devm_request_irq(dev, pci_irq_vector(pdev, i),
812 vmd_irq, IRQF_NO_THREAD,
813 "vmd", &vmd->irqs[i]);
814 if (err)
815 return err;
816 }
817
818 return 0;
819}
820#endif
821static SIMPLE_DEV_PM_OPS(vmd_dev_pm_ops, vmd_suspend, vmd_resume);
822
823static const struct pci_device_id vmd_ids[] = {
824 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_201D),
825 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP,},
826 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_28C0),
827 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW |
828 VMD_FEAT_HAS_BUS_RESTRICTIONS,},
829 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x467f),
830 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
831 VMD_FEAT_HAS_BUS_RESTRICTIONS |
832 VMD_FEAT_OFFSET_FIRST_VECTOR,},
833 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4c3d),
834 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
835 VMD_FEAT_HAS_BUS_RESTRICTIONS |
836 VMD_FEAT_OFFSET_FIRST_VECTOR,},
837 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_9A0B),
838 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
839 VMD_FEAT_HAS_BUS_RESTRICTIONS |
840 VMD_FEAT_OFFSET_FIRST_VECTOR,},
841 {0,}
842};
843MODULE_DEVICE_TABLE(pci, vmd_ids);
844
845static struct pci_driver vmd_drv = {
846 .name = "vmd",
847 .id_table = vmd_ids,
848 .probe = vmd_probe,
849 .remove = vmd_remove,
850 .driver = {
851 .pm = &vmd_dev_pm_ops,
852 },
853};
854module_pci_driver(vmd_drv);
855
856MODULE_AUTHOR("Intel Corporation");
857MODULE_LICENSE("GPL v2");
858MODULE_VERSION("0.6");
859