LXR linux/drivers/rtc/rtc-mxc.c

   1// SPDX-License-Identifier: GPL-2.0+
   2//
   3// Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
   4
   5#include <linux/io.h>
   6#include <linux/rtc.h>
   7#include <linux/module.h>
   8#include <linux/slab.h>
   9#include <linux/interrupt.h>
  10#include <linux/platform_device.h>
  11#include <linux/pm_wakeirq.h>
  12#include <linux/clk.h>
  13#include <linux/of.h>
  14#include <linux/of_device.h>
  15
  16#define RTC_INPUT_CLK_32768HZ   (0x00 << 5)
  17#define RTC_INPUT_CLK_32000HZ   (0x01 << 5)
  18#define RTC_INPUT_CLK_38400HZ   (0x02 << 5)
  19
  20#define RTC_SW_BIT      (1 << 0)
  21#define RTC_ALM_BIT     (1 << 2)
  22#define RTC_1HZ_BIT     (1 << 4)
  23#define RTC_2HZ_BIT     (1 << 7)
  24#define RTC_SAM0_BIT    (1 << 8)
  25#define RTC_SAM1_BIT    (1 << 9)
  26#define RTC_SAM2_BIT    (1 << 10)
  27#define RTC_SAM3_BIT    (1 << 11)
  28#define RTC_SAM4_BIT    (1 << 12)
  29#define RTC_SAM5_BIT    (1 << 13)
  30#define RTC_SAM6_BIT    (1 << 14)
  31#define RTC_SAM7_BIT    (1 << 15)
  32#define PIT_ALL_ON      (RTC_2HZ_BIT | RTC_SAM0_BIT | RTC_SAM1_BIT | \
  33                         RTC_SAM2_BIT | RTC_SAM3_BIT | RTC_SAM4_BIT | \
  34                         RTC_SAM5_BIT | RTC_SAM6_BIT | RTC_SAM7_BIT)
  35
  36#define RTC_ENABLE_BIT  (1 << 7)
  37
  38#define MAX_PIE_NUM     9
  39#define MAX_PIE_FREQ    512
  40
  41#define MXC_RTC_TIME    0
  42#define MXC_RTC_ALARM   1
  43
  44#define RTC_HOURMIN     0x00    /*  32bit rtc hour/min counter reg */
  45#define RTC_SECOND      0x04    /*  32bit rtc seconds counter reg */
  46#define RTC_ALRM_HM     0x08    /*  32bit rtc alarm hour/min reg */
  47#define RTC_ALRM_SEC    0x0C    /*  32bit rtc alarm seconds reg */
  48#define RTC_RTCCTL      0x10    /*  32bit rtc control reg */
  49#define RTC_RTCISR      0x14    /*  32bit rtc interrupt status reg */
  50#define RTC_RTCIENR     0x18    /*  32bit rtc interrupt enable reg */
  51#define RTC_STPWCH      0x1C    /*  32bit rtc stopwatch min reg */
  52#define RTC_DAYR        0x20    /*  32bit rtc days counter reg */
  53#define RTC_DAYALARM    0x24    /*  32bit rtc day alarm reg */
  54#define RTC_TEST1       0x28    /*  32bit rtc test reg 1 */
  55#define RTC_TEST2       0x2C    /*  32bit rtc test reg 2 */
  56#define RTC_TEST3       0x30    /*  32bit rtc test reg 3 */
  57
  58enum imx_rtc_type {
  59        IMX1_RTC,
  60        IMX21_RTC,
  61};
  62
  63struct rtc_plat_data {
  64        struct rtc_device *rtc;
  65        void __iomem *ioaddr;
  66        int irq;
  67        struct clk *clk_ref;
  68        struct clk *clk_ipg;
  69        struct rtc_time g_rtc_alarm;
  70        enum imx_rtc_type devtype;
  71};
  72
  73static const struct of_device_id imx_rtc_dt_ids[] = {
  74        { .compatible = "fsl,imx1-rtc", .data = (const void *)IMX1_RTC },
  75        { .compatible = "fsl,imx21-rtc", .data = (const void *)IMX21_RTC },
  76        {}
  77};
  78MODULE_DEVICE_TABLE(of, imx_rtc_dt_ids);
  79
  80static inline int is_imx1_rtc(struct rtc_plat_data *data)
  81{
  82        return data->devtype == IMX1_RTC;
  83}
  84
  85/*
  86 * This function is used to obtain the RTC time or the alarm value in
  87 * second.
  88 */
  89static time64_t get_alarm_or_time(struct device *dev, int time_alarm)
  90{
  91        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
  92        void __iomem *ioaddr = pdata->ioaddr;
  93        u32 day = 0, hr = 0, min = 0, sec = 0, hr_min = 0;
  94
  95        switch (time_alarm) {
  96        case MXC_RTC_TIME:
  97                day = readw(ioaddr + RTC_DAYR);
  98                hr_min = readw(ioaddr + RTC_HOURMIN);
  99                sec = readw(ioaddr + RTC_SECOND);
 100                break;
 101        case MXC_RTC_ALARM:
 102                day = readw(ioaddr + RTC_DAYALARM);
 103                hr_min = readw(ioaddr + RTC_ALRM_HM) & 0xffff;
 104                sec = readw(ioaddr + RTC_ALRM_SEC);
 105                break;
 106        }
 107
 108        hr = hr_min >> 8;
 109        min = hr_min & 0xff;
 110
 111        return ((((time64_t)day * 24 + hr) * 60) + min) * 60 + sec;
 112}
 113
 114/*
 115 * This function sets the RTC alarm value or the time value.
 116 */
 117static void set_alarm_or_time(struct device *dev, int time_alarm, time64_t time)
 118{
 119        u32 tod, day, hr, min, sec, temp;
 120        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 121        void __iomem *ioaddr = pdata->ioaddr;
 122
 123        day = div_s64_rem(time, 86400, &tod);
 124
 125        /* time is within a day now */
 126        hr = tod / 3600;
 127        tod -= hr * 3600;
 128
 129        /* time is within an hour now */
 130        min = tod / 60;
 131        sec = tod - min * 60;
 132
 133        temp = (hr << 8) + min;
 134
 135        switch (time_alarm) {
 136        case MXC_RTC_TIME:
 137                writew(day, ioaddr + RTC_DAYR);
 138                writew(sec, ioaddr + RTC_SECOND);
 139                writew(temp, ioaddr + RTC_HOURMIN);
 140                break;
 141        case MXC_RTC_ALARM:
 142                writew(day, ioaddr + RTC_DAYALARM);
 143                writew(sec, ioaddr + RTC_ALRM_SEC);
 144                writew(temp, ioaddr + RTC_ALRM_HM);
 145                break;
 146        }
 147}
 148
 149/*
 150 * This function updates the RTC alarm registers and then clears all the
 151 * interrupt status bits.
 152 */
 153static void rtc_update_alarm(struct device *dev, struct rtc_time *alrm)
 154{
 155        time64_t time;
 156        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 157        void __iomem *ioaddr = pdata->ioaddr;
 158
 159        time = rtc_tm_to_time64(alrm);
 160
 161        /* clear all the interrupt status bits */
 162        writew(readw(ioaddr + RTC_RTCISR), ioaddr + RTC_RTCISR);
 163        set_alarm_or_time(dev, MXC_RTC_ALARM, time);
 164}
 165
 166static void mxc_rtc_irq_enable(struct device *dev, unsigned int bit,
 167                                unsigned int enabled)
 168{
 169        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 170        void __iomem *ioaddr = pdata->ioaddr;
 171        u32 reg;
 172        unsigned long flags;
 173
 174        spin_lock_irqsave(&pdata->rtc->irq_lock, flags);
 175        reg = readw(ioaddr + RTC_RTCIENR);
 176
 177        if (enabled)
 178                reg |= bit;
 179        else
 180                reg &= ~bit;
 181
 182        writew(reg, ioaddr + RTC_RTCIENR);
 183        spin_unlock_irqrestore(&pdata->rtc->irq_lock, flags);
 184}
 185
 186/* This function is the RTC interrupt service routine. */
 187static irqreturn_t mxc_rtc_interrupt(int irq, void *dev_id)
 188{
 189        struct platform_device *pdev = dev_id;
 190        struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 191        void __iomem *ioaddr = pdata->ioaddr;
 192        unsigned long flags;
 193        u32 status;
 194        u32 events = 0;
 195
 196        spin_lock_irqsave(&pdata->rtc->irq_lock, flags);
 197        status = readw(ioaddr + RTC_RTCISR) & readw(ioaddr + RTC_RTCIENR);
 198        /* clear interrupt sources */
 199        writew(status, ioaddr + RTC_RTCISR);
 200
 201        /* update irq data & counter */
 202        if (status & RTC_ALM_BIT) {
 203                events |= (RTC_AF | RTC_IRQF);
 204                /* RTC alarm should be one-shot */
 205                mxc_rtc_irq_enable(&pdev->dev, RTC_ALM_BIT, 0);
 206        }
 207
 208        if (status & PIT_ALL_ON)
 209                events |= (RTC_PF | RTC_IRQF);
 210
 211        rtc_update_irq(pdata->rtc, 1, events);
 212        spin_unlock_irqrestore(&pdata->rtc->irq_lock, flags);
 213
 214        return IRQ_HANDLED;
 215}
 216
 217static int mxc_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 218{
 219        mxc_rtc_irq_enable(dev, RTC_ALM_BIT, enabled);
 220        return 0;
 221}
 222
 223/*
 224 * This function reads the current RTC time into tm in Gregorian date.
 225 */
 226static int mxc_rtc_read_time(struct device *dev, struct rtc_time *tm)
 227{
 228        time64_t val;
 229
 230        /* Avoid roll-over from reading the different registers */
 231        do {
 232                val = get_alarm_or_time(dev, MXC_RTC_TIME);
 233        } while (val != get_alarm_or_time(dev, MXC_RTC_TIME));
 234
 235        rtc_time64_to_tm(val, tm);
 236
 237        return 0;
 238}
 239
 240/*
 241 * This function sets the internal RTC time based on tm in Gregorian date.
 242 */
 243static int mxc_rtc_set_time(struct device *dev, struct rtc_time *tm)
 244{
 245        time64_t time = rtc_tm_to_time64(tm);
 246
 247        /* Avoid roll-over from reading the different registers */
 248        do {
 249                set_alarm_or_time(dev, MXC_RTC_TIME, time);
 250        } while (time != get_alarm_or_time(dev, MXC_RTC_TIME));
 251
 252        return 0;
 253}
 254
 255/*
 256 * This function reads the current alarm value into the passed in 'alrm'
 257 * argument. It updates the alrm's pending field value based on the whether
 258 * an alarm interrupt occurs or not.
 259 */
 260static int mxc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 261{
 262        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 263        void __iomem *ioaddr = pdata->ioaddr;
 264
 265        rtc_time64_to_tm(get_alarm_or_time(dev, MXC_RTC_ALARM), &alrm->time);
 266        alrm->pending = ((readw(ioaddr + RTC_RTCISR) & RTC_ALM_BIT)) ? 1 : 0;
 267
 268        return 0;
 269}
 270
 271/*
 272 * This function sets the RTC alarm based on passed in alrm.
 273 */
 274static int mxc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 275{
 276        struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 277
 278        rtc_update_alarm(dev, &alrm->time);
 279
 280        memcpy(&pdata->g_rtc_alarm, &alrm->time, sizeof(struct rtc_time));
 281        mxc_rtc_irq_enable(dev, RTC_ALM_BIT, alrm->enabled);
 282
 283        return 0;
 284}
 285
 286/* RTC layer */
 287static const struct rtc_class_ops mxc_rtc_ops = {
 288        .read_time              = mxc_rtc_read_time,
 289        .set_time               = mxc_rtc_set_time,
 290        .read_alarm             = mxc_rtc_read_alarm,
 291        .set_alarm              = mxc_rtc_set_alarm,
 292        .alarm_irq_enable       = mxc_rtc_alarm_irq_enable,
 293};
 294
 295static void mxc_rtc_action(void *p)
 296{
 297        struct rtc_plat_data *pdata = p;
 298
 299        clk_disable_unprepare(pdata->clk_ref);
 300        clk_disable_unprepare(pdata->clk_ipg);
 301}
 302
 303static int mxc_rtc_probe(struct platform_device *pdev)
 304{
 305        struct rtc_device *rtc;
 306        struct rtc_plat_data *pdata = NULL;
 307        u32 reg;
 308        unsigned long rate;
 309        int ret;
 310
 311        pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
 312        if (!pdata)
 313                return -ENOMEM;
 314
 315        pdata->devtype = (enum imx_rtc_type)of_device_get_match_data(&pdev->dev);
 316
 317        pdata->ioaddr = devm_platform_ioremap_resource(pdev, 0);
 318        if (IS_ERR(pdata->ioaddr))
 319                return PTR_ERR(pdata->ioaddr);
 320
 321        rtc = devm_rtc_allocate_device(&pdev->dev);
 322        if (IS_ERR(rtc))
 323                return PTR_ERR(rtc);
 324
 325        pdata->rtc = rtc;
 326        rtc->ops = &mxc_rtc_ops;
 327        if (is_imx1_rtc(pdata)) {
 328                struct rtc_time tm;
 329
 330                /* 9bit days + hours minutes seconds */
 331                rtc->range_max = (1 << 9) * 86400 - 1;
 332
 333                /*
 334                 * Set the start date as beginning of the current year. This can
 335                 * be overridden using device tree.
 336                 */
 337                rtc_time64_to_tm(ktime_get_real_seconds(), &tm);
 338                rtc->start_secs =  mktime64(tm.tm_year, 1, 1, 0, 0, 0);
 339                rtc->set_start_time = true;
 340        } else {
 341                /* 16bit days + hours minutes seconds */
 342                rtc->range_max = (1 << 16) * 86400ULL - 1;
 343        }
 344
 345        pdata->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
 346        if (IS_ERR(pdata->clk_ipg)) {
 347                dev_err(&pdev->dev, "unable to get ipg clock!\n");
 348                return PTR_ERR(pdata->clk_ipg);
 349        }
 350
 351        ret = clk_prepare_enable(pdata->clk_ipg);
 352        if (ret)
 353                return ret;
 354
 355        pdata->clk_ref = devm_clk_get(&pdev->dev, "ref");
 356        if (IS_ERR(pdata->clk_ref)) {
 357                clk_disable_unprepare(pdata->clk_ipg);
 358                dev_err(&pdev->dev, "unable to get ref clock!\n");
 359                return PTR_ERR(pdata->clk_ref);
 360        }
 361
 362        ret = clk_prepare_enable(pdata->clk_ref);
 363        if (ret) {
 364                clk_disable_unprepare(pdata->clk_ipg);
 365                return ret;
 366        }
 367
 368        ret = devm_add_action_or_reset(&pdev->dev, mxc_rtc_action, pdata);
 369        if (ret)
 370                return ret;
 371
 372        rate = clk_get_rate(pdata->clk_ref);
 373
 374        if (rate == 32768)
 375                reg = RTC_INPUT_CLK_32768HZ;
 376        else if (rate == 32000)
 377                reg = RTC_INPUT_CLK_32000HZ;
 378        else if (rate == 38400)
 379                reg = RTC_INPUT_CLK_38400HZ;
 380        else {
 381                dev_err(&pdev->dev, "rtc clock is not valid (%lu)\n", rate);
 382                return -EINVAL;
 383        }
 384
 385        reg |= RTC_ENABLE_BIT;
 386        writew(reg, (pdata->ioaddr + RTC_RTCCTL));
 387        if (((readw(pdata->ioaddr + RTC_RTCCTL)) & RTC_ENABLE_BIT) == 0) {
 388                dev_err(&pdev->dev, "hardware module can't be enabled!\n");
 389                return -EIO;
 390        }
 391
 392        platform_set_drvdata(pdev, pdata);
 393
 394        /* Configure and enable the RTC */
 395        pdata->irq = platform_get_irq(pdev, 0);
 396
 397        if (pdata->irq >= 0 &&
 398            devm_request_irq(&pdev->dev, pdata->irq, mxc_rtc_interrupt,
 399                             IRQF_SHARED, pdev->name, pdev) < 0) {
 400                dev_warn(&pdev->dev, "interrupt not available.\n");
 401                pdata->irq = -1;
 402        }
 403
 404        if (pdata->irq >= 0) {
 405                device_init_wakeup(&pdev->dev, 1);
 406                ret = dev_pm_set_wake_irq(&pdev->dev, pdata->irq);
 407                if (ret)
 408                        dev_err(&pdev->dev, "failed to enable irq wake\n");
 409        }
 410
 411        ret = devm_rtc_register_device(rtc);
 412
 413        return ret;
 414}
 415
 416static struct platform_driver mxc_rtc_driver = {
 417        .driver = {
 418                   .name        = "mxc_rtc",
 419                   .of_match_table = of_match_ptr(imx_rtc_dt_ids),
 420        },
 421        .probe = mxc_rtc_probe,
 422};
 423
 424module_platform_driver(mxc_rtc_driver)
 425
 426MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
 427MODULE_DESCRIPTION("RTC driver for Freescale MXC");
 428MODULE_LICENSE("GPL");
 429
 430