linux/drivers/rtc/rtc-pcf2127.c
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   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * An I2C and SPI driver for the NXP PCF2127/29 RTC
   4 * Copyright 2013 Til-Technologies
   5 *
   6 * Author: Renaud Cerrato <r.cerrato@til-technologies.fr>
   7 *
   8 * Watchdog and tamper functions
   9 * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
  10 *
  11 * based on the other drivers in this same directory.
  12 *
  13 * Datasheet: http://cache.nxp.com/documents/data_sheet/PCF2127.pdf
  14 */
  15
  16#include <linux/i2c.h>
  17#include <linux/spi/spi.h>
  18#include <linux/bcd.h>
  19#include <linux/rtc.h>
  20#include <linux/slab.h>
  21#include <linux/module.h>
  22#include <linux/of.h>
  23#include <linux/of_irq.h>
  24#include <linux/regmap.h>
  25#include <linux/watchdog.h>
  26
  27/* Control register 1 */
  28#define PCF2127_REG_CTRL1               0x00
  29#define PCF2127_BIT_CTRL1_TSF1                  BIT(4)
  30/* Control register 2 */
  31#define PCF2127_REG_CTRL2               0x01
  32#define PCF2127_BIT_CTRL2_AIE                   BIT(1)
  33#define PCF2127_BIT_CTRL2_TSIE                  BIT(2)
  34#define PCF2127_BIT_CTRL2_AF                    BIT(4)
  35#define PCF2127_BIT_CTRL2_TSF2                  BIT(5)
  36#define PCF2127_BIT_CTRL2_WDTF                  BIT(6)
  37/* Control register 3 */
  38#define PCF2127_REG_CTRL3               0x02
  39#define PCF2127_BIT_CTRL3_BLIE                  BIT(0)
  40#define PCF2127_BIT_CTRL3_BIE                   BIT(1)
  41#define PCF2127_BIT_CTRL3_BLF                   BIT(2)
  42#define PCF2127_BIT_CTRL3_BF                    BIT(3)
  43#define PCF2127_BIT_CTRL3_BTSE                  BIT(4)
  44/* Time and date registers */
  45#define PCF2127_REG_SC                  0x03
  46#define PCF2127_BIT_SC_OSF                      BIT(7)
  47#define PCF2127_REG_MN                  0x04
  48#define PCF2127_REG_HR                  0x05
  49#define PCF2127_REG_DM                  0x06
  50#define PCF2127_REG_DW                  0x07
  51#define PCF2127_REG_MO                  0x08
  52#define PCF2127_REG_YR                  0x09
  53/* Alarm registers */
  54#define PCF2127_REG_ALARM_SC            0x0A
  55#define PCF2127_REG_ALARM_MN            0x0B
  56#define PCF2127_REG_ALARM_HR            0x0C
  57#define PCF2127_REG_ALARM_DM            0x0D
  58#define PCF2127_REG_ALARM_DW            0x0E
  59#define PCF2127_BIT_ALARM_AE                    BIT(7)
  60/* Watchdog registers */
  61#define PCF2127_REG_WD_CTL              0x10
  62#define PCF2127_BIT_WD_CTL_TF0                  BIT(0)
  63#define PCF2127_BIT_WD_CTL_TF1                  BIT(1)
  64#define PCF2127_BIT_WD_CTL_CD0                  BIT(6)
  65#define PCF2127_BIT_WD_CTL_CD1                  BIT(7)
  66#define PCF2127_REG_WD_VAL              0x11
  67/* Tamper timestamp registers */
  68#define PCF2127_REG_TS_CTRL             0x12
  69#define PCF2127_BIT_TS_CTRL_TSOFF               BIT(6)
  70#define PCF2127_BIT_TS_CTRL_TSM                 BIT(7)
  71#define PCF2127_REG_TS_SC               0x13
  72#define PCF2127_REG_TS_MN               0x14
  73#define PCF2127_REG_TS_HR               0x15
  74#define PCF2127_REG_TS_DM               0x16
  75#define PCF2127_REG_TS_MO               0x17
  76#define PCF2127_REG_TS_YR               0x18
  77/*
  78 * RAM registers
  79 * PCF2127 has 512 bytes general-purpose static RAM (SRAM) that is
  80 * battery backed and can survive a power outage.
  81 * PCF2129 doesn't have this feature.
  82 */
  83#define PCF2127_REG_RAM_ADDR_MSB        0x1A
  84#define PCF2127_REG_RAM_WRT_CMD         0x1C
  85#define PCF2127_REG_RAM_RD_CMD          0x1D
  86
  87/* Watchdog timer value constants */
  88#define PCF2127_WD_VAL_STOP             0
  89#define PCF2127_WD_VAL_MIN              2
  90#define PCF2127_WD_VAL_MAX              255
  91#define PCF2127_WD_VAL_DEFAULT          60
  92
  93struct pcf2127 {
  94        struct rtc_device *rtc;
  95        struct watchdog_device wdd;
  96        struct regmap *regmap;
  97};
  98
  99/*
 100 * In the routines that deal directly with the pcf2127 hardware, we use
 101 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
 102 */
 103static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm)
 104{
 105        struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 106        unsigned char buf[10];
 107        int ret;
 108
 109        /*
 110         * Avoid reading CTRL2 register as it causes WD_VAL register
 111         * value to reset to 0 which means watchdog is stopped.
 112         */
 113        ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL3,
 114                               (buf + PCF2127_REG_CTRL3),
 115                               ARRAY_SIZE(buf) - PCF2127_REG_CTRL3);
 116        if (ret) {
 117                dev_err(dev, "%s: read error\n", __func__);
 118                return ret;
 119        }
 120
 121        if (buf[PCF2127_REG_CTRL3] & PCF2127_BIT_CTRL3_BLF)
 122                dev_info(dev,
 123                        "low voltage detected, check/replace RTC battery.\n");
 124
 125        /* Clock integrity is not guaranteed when OSF flag is set. */
 126        if (buf[PCF2127_REG_SC] & PCF2127_BIT_SC_OSF) {
 127                /*
 128                 * no need clear the flag here,
 129                 * it will be cleared once the new date is saved
 130                 */
 131                dev_warn(dev,
 132                         "oscillator stop detected, date/time is not reliable\n");
 133                return -EINVAL;
 134        }
 135
 136        dev_dbg(dev,
 137                "%s: raw data is cr3=%02x, sec=%02x, min=%02x, hr=%02x, "
 138                "mday=%02x, wday=%02x, mon=%02x, year=%02x\n",
 139                __func__, buf[PCF2127_REG_CTRL3], buf[PCF2127_REG_SC],
 140                buf[PCF2127_REG_MN], buf[PCF2127_REG_HR],
 141                buf[PCF2127_REG_DM], buf[PCF2127_REG_DW],
 142                buf[PCF2127_REG_MO], buf[PCF2127_REG_YR]);
 143
 144        tm->tm_sec = bcd2bin(buf[PCF2127_REG_SC] & 0x7F);
 145        tm->tm_min = bcd2bin(buf[PCF2127_REG_MN] & 0x7F);
 146        tm->tm_hour = bcd2bin(buf[PCF2127_REG_HR] & 0x3F); /* rtc hr 0-23 */
 147        tm->tm_mday = bcd2bin(buf[PCF2127_REG_DM] & 0x3F);
 148        tm->tm_wday = buf[PCF2127_REG_DW] & 0x07;
 149        tm->tm_mon = bcd2bin(buf[PCF2127_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */
 150        tm->tm_year = bcd2bin(buf[PCF2127_REG_YR]);
 151        tm->tm_year += 100;
 152
 153        dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
 154                "mday=%d, mon=%d, year=%d, wday=%d\n",
 155                __func__,
 156                tm->tm_sec, tm->tm_min, tm->tm_hour,
 157                tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
 158
 159        return 0;
 160}
 161
 162static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
 163{
 164        struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 165        unsigned char buf[7];
 166        int i = 0, err;
 167
 168        dev_dbg(dev, "%s: secs=%d, mins=%d, hours=%d, "
 169                "mday=%d, mon=%d, year=%d, wday=%d\n",
 170                __func__,
 171                tm->tm_sec, tm->tm_min, tm->tm_hour,
 172                tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
 173
 174        /* hours, minutes and seconds */
 175        buf[i++] = bin2bcd(tm->tm_sec); /* this will also clear OSF flag */
 176        buf[i++] = bin2bcd(tm->tm_min);
 177        buf[i++] = bin2bcd(tm->tm_hour);
 178        buf[i++] = bin2bcd(tm->tm_mday);
 179        buf[i++] = tm->tm_wday & 0x07;
 180
 181        /* month, 1 - 12 */
 182        buf[i++] = bin2bcd(tm->tm_mon + 1);
 183
 184        /* year */
 185        buf[i++] = bin2bcd(tm->tm_year - 100);
 186
 187        /* write register's data */
 188        err = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_SC, buf, i);
 189        if (err) {
 190                dev_err(dev,
 191                        "%s: err=%d", __func__, err);
 192                return err;
 193        }
 194
 195        return 0;
 196}
 197
 198static int pcf2127_rtc_ioctl(struct device *dev,
 199                                unsigned int cmd, unsigned long arg)
 200{
 201        struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 202        int val, touser = 0;
 203        int ret;
 204
 205        switch (cmd) {
 206        case RTC_VL_READ:
 207                ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &val);
 208                if (ret)
 209                        return ret;
 210
 211                if (val & PCF2127_BIT_CTRL3_BLF)
 212                        touser |= RTC_VL_BACKUP_LOW;
 213
 214                if (val & PCF2127_BIT_CTRL3_BF)
 215                        touser |= RTC_VL_BACKUP_SWITCH;
 216
 217                return put_user(touser, (unsigned int __user *)arg);
 218
 219        case RTC_VL_CLR:
 220                return regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
 221                                          PCF2127_BIT_CTRL3_BF, 0);
 222
 223        default:
 224                return -ENOIOCTLCMD;
 225        }
 226}
 227
 228static const struct rtc_class_ops pcf2127_rtc_ops = {
 229        .ioctl          = pcf2127_rtc_ioctl,
 230        .read_time      = pcf2127_rtc_read_time,
 231        .set_time       = pcf2127_rtc_set_time,
 232};
 233
 234static int pcf2127_nvmem_read(void *priv, unsigned int offset,
 235                              void *val, size_t bytes)
 236{
 237        struct pcf2127 *pcf2127 = priv;
 238        int ret;
 239        unsigned char offsetbuf[] = { offset >> 8, offset };
 240
 241        ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
 242                                offsetbuf, 2);
 243        if (ret)
 244                return ret;
 245
 246        return regmap_bulk_read(pcf2127->regmap, PCF2127_REG_RAM_RD_CMD,
 247                                val, bytes);
 248}
 249
 250static int pcf2127_nvmem_write(void *priv, unsigned int offset,
 251                               void *val, size_t bytes)
 252{
 253        struct pcf2127 *pcf2127 = priv;
 254        int ret;
 255        unsigned char offsetbuf[] = { offset >> 8, offset };
 256
 257        ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
 258                                offsetbuf, 2);
 259        if (ret)
 260                return ret;
 261
 262        return regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_WRT_CMD,
 263                                 val, bytes);
 264}
 265
 266/* watchdog driver */
 267
 268static int pcf2127_wdt_ping(struct watchdog_device *wdd)
 269{
 270        struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
 271
 272        return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL, wdd->timeout);
 273}
 274
 275/*
 276 * Restart watchdog timer if feature is active.
 277 *
 278 * Note: Reading CTRL2 register causes watchdog to stop which is unfortunate,
 279 * since register also contain control/status flags for other features.
 280 * Always call this function after reading CTRL2 register.
 281 */
 282static int pcf2127_wdt_active_ping(struct watchdog_device *wdd)
 283{
 284        int ret = 0;
 285
 286        if (watchdog_active(wdd)) {
 287                ret = pcf2127_wdt_ping(wdd);
 288                if (ret)
 289                        dev_err(wdd->parent,
 290                                "%s: watchdog restart failed, ret=%d\n",
 291                                __func__, ret);
 292        }
 293
 294        return ret;
 295}
 296
 297static int pcf2127_wdt_start(struct watchdog_device *wdd)
 298{
 299        return pcf2127_wdt_ping(wdd);
 300}
 301
 302static int pcf2127_wdt_stop(struct watchdog_device *wdd)
 303{
 304        struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
 305
 306        return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL,
 307                            PCF2127_WD_VAL_STOP);
 308}
 309
 310static int pcf2127_wdt_set_timeout(struct watchdog_device *wdd,
 311                                   unsigned int new_timeout)
 312{
 313        dev_dbg(wdd->parent, "new watchdog timeout: %is (old: %is)\n",
 314                new_timeout, wdd->timeout);
 315
 316        wdd->timeout = new_timeout;
 317
 318        return pcf2127_wdt_active_ping(wdd);
 319}
 320
 321static const struct watchdog_info pcf2127_wdt_info = {
 322        .identity = "NXP PCF2127/PCF2129 Watchdog",
 323        .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
 324};
 325
 326static const struct watchdog_ops pcf2127_watchdog_ops = {
 327        .owner = THIS_MODULE,
 328        .start = pcf2127_wdt_start,
 329        .stop = pcf2127_wdt_stop,
 330        .ping = pcf2127_wdt_ping,
 331        .set_timeout = pcf2127_wdt_set_timeout,
 332};
 333
 334static int pcf2127_watchdog_init(struct device *dev, struct pcf2127 *pcf2127)
 335{
 336        u32 wdd_timeout;
 337        int ret;
 338
 339        if (!IS_ENABLED(CONFIG_WATCHDOG) ||
 340            !device_property_read_bool(dev, "reset-source"))
 341                return 0;
 342
 343        pcf2127->wdd.parent = dev;
 344        pcf2127->wdd.info = &pcf2127_wdt_info;
 345        pcf2127->wdd.ops = &pcf2127_watchdog_ops;
 346        pcf2127->wdd.min_timeout = PCF2127_WD_VAL_MIN;
 347        pcf2127->wdd.max_timeout = PCF2127_WD_VAL_MAX;
 348        pcf2127->wdd.timeout = PCF2127_WD_VAL_DEFAULT;
 349        pcf2127->wdd.min_hw_heartbeat_ms = 500;
 350        pcf2127->wdd.status = WATCHDOG_NOWAYOUT_INIT_STATUS;
 351
 352        watchdog_set_drvdata(&pcf2127->wdd, pcf2127);
 353
 354        /* Test if watchdog timer is started by bootloader */
 355        ret = regmap_read(pcf2127->regmap, PCF2127_REG_WD_VAL, &wdd_timeout);
 356        if (ret)
 357                return ret;
 358
 359        if (wdd_timeout)
 360                set_bit(WDOG_HW_RUNNING, &pcf2127->wdd.status);
 361
 362        return devm_watchdog_register_device(dev, &pcf2127->wdd);
 363}
 364
 365/* Alarm */
 366static int pcf2127_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 367{
 368        struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 369        unsigned int buf[5], ctrl2;
 370        int ret;
 371
 372        ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
 373        if (ret)
 374                return ret;
 375
 376        ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 377        if (ret)
 378                return ret;
 379
 380        ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_ALARM_SC, buf,
 381                               sizeof(buf));
 382        if (ret)
 383                return ret;
 384
 385        alrm->enabled = ctrl2 & PCF2127_BIT_CTRL2_AIE;
 386        alrm->pending = ctrl2 & PCF2127_BIT_CTRL2_AF;
 387
 388        alrm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
 389        alrm->time.tm_min = bcd2bin(buf[1] & 0x7F);
 390        alrm->time.tm_hour = bcd2bin(buf[2] & 0x3F);
 391        alrm->time.tm_mday = bcd2bin(buf[3] & 0x3F);
 392
 393        return 0;
 394}
 395
 396static int pcf2127_rtc_alarm_irq_enable(struct device *dev, u32 enable)
 397{
 398        struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 399        int ret;
 400
 401        ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 402                                 PCF2127_BIT_CTRL2_AIE,
 403                                 enable ? PCF2127_BIT_CTRL2_AIE : 0);
 404        if (ret)
 405                return ret;
 406
 407        return pcf2127_wdt_active_ping(&pcf2127->wdd);
 408}
 409
 410static int pcf2127_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 411{
 412        struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 413        uint8_t buf[5];
 414        int ret;
 415
 416        ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 417                                 PCF2127_BIT_CTRL2_AF, 0);
 418        if (ret)
 419                return ret;
 420
 421        ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 422        if (ret)
 423                return ret;
 424
 425        buf[0] = bin2bcd(alrm->time.tm_sec);
 426        buf[1] = bin2bcd(alrm->time.tm_min);
 427        buf[2] = bin2bcd(alrm->time.tm_hour);
 428        buf[3] = bin2bcd(alrm->time.tm_mday);
 429        buf[4] = PCF2127_BIT_ALARM_AE; /* Do not match on week day */
 430
 431        ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_ALARM_SC, buf,
 432                                sizeof(buf));
 433        if (ret)
 434                return ret;
 435
 436        return pcf2127_rtc_alarm_irq_enable(dev, alrm->enabled);
 437}
 438
 439static irqreturn_t pcf2127_rtc_irq(int irq, void *dev)
 440{
 441        struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 442        unsigned int ctrl2 = 0;
 443        int ret = 0;
 444
 445        ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
 446        if (ret)
 447                return IRQ_NONE;
 448
 449        if (!(ctrl2 & PCF2127_BIT_CTRL2_AF))
 450                return IRQ_NONE;
 451
 452        regmap_write(pcf2127->regmap, PCF2127_REG_CTRL2,
 453                     ctrl2 & ~(PCF2127_BIT_CTRL2_AF | PCF2127_BIT_CTRL2_WDTF));
 454
 455        rtc_update_irq(pcf2127->rtc, 1, RTC_IRQF | RTC_AF);
 456
 457        pcf2127_wdt_active_ping(&pcf2127->wdd);
 458
 459        return IRQ_HANDLED;
 460}
 461
 462static const struct rtc_class_ops pcf2127_rtc_alrm_ops = {
 463        .ioctl            = pcf2127_rtc_ioctl,
 464        .read_time        = pcf2127_rtc_read_time,
 465        .set_time         = pcf2127_rtc_set_time,
 466        .read_alarm       = pcf2127_rtc_read_alarm,
 467        .set_alarm        = pcf2127_rtc_set_alarm,
 468        .alarm_irq_enable = pcf2127_rtc_alarm_irq_enable,
 469};
 470
 471/* sysfs interface */
 472
 473static ssize_t timestamp0_store(struct device *dev,
 474                                struct device_attribute *attr,
 475                                const char *buf, size_t count)
 476{
 477        struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
 478        int ret;
 479
 480        ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
 481                                 PCF2127_BIT_CTRL1_TSF1, 0);
 482        if (ret) {
 483                dev_err(dev, "%s: update ctrl1 ret=%d\n", __func__, ret);
 484                return ret;
 485        }
 486
 487        ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 488                                 PCF2127_BIT_CTRL2_TSF2, 0);
 489        if (ret) {
 490                dev_err(dev, "%s: update ctrl2 ret=%d\n", __func__, ret);
 491                return ret;
 492        }
 493
 494        ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 495        if (ret)
 496                return ret;
 497
 498        return count;
 499};
 500
 501static ssize_t timestamp0_show(struct device *dev,
 502                               struct device_attribute *attr, char *buf)
 503{
 504        struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
 505        struct rtc_time tm;
 506        int ret;
 507        unsigned char data[25];
 508
 509        ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL1, data,
 510                               sizeof(data));
 511        if (ret) {
 512                dev_err(dev, "%s: read error ret=%d\n", __func__, ret);
 513                return ret;
 514        }
 515
 516        dev_dbg(dev,
 517                "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, ts_sc=%02x, "
 518                "ts_mn=%02x, ts_hr=%02x, ts_dm=%02x, ts_mo=%02x, ts_yr=%02x\n",
 519                __func__, data[PCF2127_REG_CTRL1], data[PCF2127_REG_CTRL2],
 520                data[PCF2127_REG_CTRL3], data[PCF2127_REG_TS_SC],
 521                data[PCF2127_REG_TS_MN], data[PCF2127_REG_TS_HR],
 522                data[PCF2127_REG_TS_DM], data[PCF2127_REG_TS_MO],
 523                data[PCF2127_REG_TS_YR]);
 524
 525        ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 526        if (ret)
 527                return ret;
 528
 529        if (!(data[PCF2127_REG_CTRL1] & PCF2127_BIT_CTRL1_TSF1) &&
 530            !(data[PCF2127_REG_CTRL2] & PCF2127_BIT_CTRL2_TSF2))
 531                return 0;
 532
 533        tm.tm_sec = bcd2bin(data[PCF2127_REG_TS_SC] & 0x7F);
 534        tm.tm_min = bcd2bin(data[PCF2127_REG_TS_MN] & 0x7F);
 535        tm.tm_hour = bcd2bin(data[PCF2127_REG_TS_HR] & 0x3F);
 536        tm.tm_mday = bcd2bin(data[PCF2127_REG_TS_DM] & 0x3F);
 537        /* TS_MO register (month) value range: 1-12 */
 538        tm.tm_mon = bcd2bin(data[PCF2127_REG_TS_MO] & 0x1F) - 1;
 539        tm.tm_year = bcd2bin(data[PCF2127_REG_TS_YR]);
 540        if (tm.tm_year < 70)
 541                tm.tm_year += 100; /* assume we are in 1970...2069 */
 542
 543        ret = rtc_valid_tm(&tm);
 544        if (ret)
 545                return ret;
 546
 547        return sprintf(buf, "%llu\n",
 548                       (unsigned long long)rtc_tm_to_time64(&tm));
 549};
 550
 551static DEVICE_ATTR_RW(timestamp0);
 552
 553static struct attribute *pcf2127_attrs[] = {
 554        &dev_attr_timestamp0.attr,
 555        NULL
 556};
 557
 558static const struct attribute_group pcf2127_attr_group = {
 559        .attrs  = pcf2127_attrs,
 560};
 561
 562static int pcf2127_probe(struct device *dev, struct regmap *regmap,
 563                         int alarm_irq, const char *name, bool has_nvmem)
 564{
 565        struct pcf2127 *pcf2127;
 566        int ret = 0;
 567
 568        dev_dbg(dev, "%s\n", __func__);
 569
 570        pcf2127 = devm_kzalloc(dev, sizeof(*pcf2127), GFP_KERNEL);
 571        if (!pcf2127)
 572                return -ENOMEM;
 573
 574        pcf2127->regmap = regmap;
 575
 576        dev_set_drvdata(dev, pcf2127);
 577
 578        pcf2127->rtc = devm_rtc_allocate_device(dev);
 579        if (IS_ERR(pcf2127->rtc))
 580                return PTR_ERR(pcf2127->rtc);
 581
 582        pcf2127->rtc->ops = &pcf2127_rtc_ops;
 583        pcf2127->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
 584        pcf2127->rtc->range_max = RTC_TIMESTAMP_END_2099;
 585        pcf2127->rtc->set_start_time = true; /* Sets actual start to 1970 */
 586        pcf2127->rtc->uie_unsupported = 1;
 587
 588        if (alarm_irq > 0) {
 589                ret = devm_request_threaded_irq(dev, alarm_irq, NULL,
 590                                                pcf2127_rtc_irq,
 591                                                IRQF_TRIGGER_LOW | IRQF_ONESHOT,
 592                                                dev_name(dev), dev);
 593                if (ret) {
 594                        dev_err(dev, "failed to request alarm irq\n");
 595                        return ret;
 596                }
 597        }
 598
 599        if (alarm_irq > 0 || device_property_read_bool(dev, "wakeup-source")) {
 600                device_init_wakeup(dev, true);
 601                pcf2127->rtc->ops = &pcf2127_rtc_alrm_ops;
 602        }
 603
 604        if (has_nvmem) {
 605                struct nvmem_config nvmem_cfg = {
 606                        .priv = pcf2127,
 607                        .reg_read = pcf2127_nvmem_read,
 608                        .reg_write = pcf2127_nvmem_write,
 609                        .size = 512,
 610                };
 611
 612                ret = devm_rtc_nvmem_register(pcf2127->rtc, &nvmem_cfg);
 613        }
 614
 615        /*
 616         * Watchdog timer enabled and reset pin /RST activated when timed out.
 617         * Select 1Hz clock source for watchdog timer.
 618         * Note: Countdown timer disabled and not available.
 619         */
 620        ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_WD_CTL,
 621                                 PCF2127_BIT_WD_CTL_CD1 |
 622                                 PCF2127_BIT_WD_CTL_CD0 |
 623                                 PCF2127_BIT_WD_CTL_TF1 |
 624                                 PCF2127_BIT_WD_CTL_TF0,
 625                                 PCF2127_BIT_WD_CTL_CD1 |
 626                                 PCF2127_BIT_WD_CTL_CD0 |
 627                                 PCF2127_BIT_WD_CTL_TF1);
 628        if (ret) {
 629                dev_err(dev, "%s: watchdog config (wd_ctl) failed\n", __func__);
 630                return ret;
 631        }
 632
 633        pcf2127_watchdog_init(dev, pcf2127);
 634
 635        /*
 636         * Disable battery low/switch-over timestamp and interrupts.
 637         * Clear battery interrupt flags which can block new trigger events.
 638         * Note: This is the default chip behaviour but added to ensure
 639         * correct tamper timestamp and interrupt function.
 640         */
 641        ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
 642                                 PCF2127_BIT_CTRL3_BTSE |
 643                                 PCF2127_BIT_CTRL3_BIE |
 644                                 PCF2127_BIT_CTRL3_BLIE, 0);
 645        if (ret) {
 646                dev_err(dev, "%s: interrupt config (ctrl3) failed\n",
 647                        __func__);
 648                return ret;
 649        }
 650
 651        /*
 652         * Enable timestamp function and store timestamp of first trigger
 653         * event until TSF1 and TFS2 interrupt flags are cleared.
 654         */
 655        ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_TS_CTRL,
 656                                 PCF2127_BIT_TS_CTRL_TSOFF |
 657                                 PCF2127_BIT_TS_CTRL_TSM,
 658                                 PCF2127_BIT_TS_CTRL_TSM);
 659        if (ret) {
 660                dev_err(dev, "%s: tamper detection config (ts_ctrl) failed\n",
 661                        __func__);
 662                return ret;
 663        }
 664
 665        /*
 666         * Enable interrupt generation when TSF1 or TSF2 timestamp flags
 667         * are set. Interrupt signal is an open-drain output and can be
 668         * left floating if unused.
 669         */
 670        ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 671                                 PCF2127_BIT_CTRL2_TSIE,
 672                                 PCF2127_BIT_CTRL2_TSIE);
 673        if (ret) {
 674                dev_err(dev, "%s: tamper detection config (ctrl2) failed\n",
 675                        __func__);
 676                return ret;
 677        }
 678
 679        ret = rtc_add_group(pcf2127->rtc, &pcf2127_attr_group);
 680        if (ret) {
 681                dev_err(dev, "%s: tamper sysfs registering failed\n",
 682                        __func__);
 683                return ret;
 684        }
 685
 686        return devm_rtc_register_device(pcf2127->rtc);
 687}
 688
 689#ifdef CONFIG_OF
 690static const struct of_device_id pcf2127_of_match[] = {
 691        { .compatible = "nxp,pcf2127" },
 692        { .compatible = "nxp,pcf2129" },
 693        { .compatible = "nxp,pca2129" },
 694        {}
 695};
 696MODULE_DEVICE_TABLE(of, pcf2127_of_match);
 697#endif
 698
 699#if IS_ENABLED(CONFIG_I2C)
 700
 701static int pcf2127_i2c_write(void *context, const void *data, size_t count)
 702{
 703        struct device *dev = context;
 704        struct i2c_client *client = to_i2c_client(dev);
 705        int ret;
 706
 707        ret = i2c_master_send(client, data, count);
 708        if (ret != count)
 709                return ret < 0 ? ret : -EIO;
 710
 711        return 0;
 712}
 713
 714static int pcf2127_i2c_gather_write(void *context,
 715                                const void *reg, size_t reg_size,
 716                                const void *val, size_t val_size)
 717{
 718        struct device *dev = context;
 719        struct i2c_client *client = to_i2c_client(dev);
 720        int ret;
 721        void *buf;
 722
 723        if (WARN_ON(reg_size != 1))
 724                return -EINVAL;
 725
 726        buf = kmalloc(val_size + 1, GFP_KERNEL);
 727        if (!buf)
 728                return -ENOMEM;
 729
 730        memcpy(buf, reg, 1);
 731        memcpy(buf + 1, val, val_size);
 732
 733        ret = i2c_master_send(client, buf, val_size + 1);
 734
 735        kfree(buf);
 736
 737        if (ret != val_size + 1)
 738                return ret < 0 ? ret : -EIO;
 739
 740        return 0;
 741}
 742
 743static int pcf2127_i2c_read(void *context, const void *reg, size_t reg_size,
 744                                void *val, size_t val_size)
 745{
 746        struct device *dev = context;
 747        struct i2c_client *client = to_i2c_client(dev);
 748        int ret;
 749
 750        if (WARN_ON(reg_size != 1))
 751                return -EINVAL;
 752
 753        ret = i2c_master_send(client, reg, 1);
 754        if (ret != 1)
 755                return ret < 0 ? ret : -EIO;
 756
 757        ret = i2c_master_recv(client, val, val_size);
 758        if (ret != val_size)
 759                return ret < 0 ? ret : -EIO;
 760
 761        return 0;
 762}
 763
 764/*
 765 * The reason we need this custom regmap_bus instead of using regmap_init_i2c()
 766 * is that the STOP condition is required between set register address and
 767 * read register data when reading from registers.
 768 */
 769static const struct regmap_bus pcf2127_i2c_regmap = {
 770        .write = pcf2127_i2c_write,
 771        .gather_write = pcf2127_i2c_gather_write,
 772        .read = pcf2127_i2c_read,
 773};
 774
 775static struct i2c_driver pcf2127_i2c_driver;
 776
 777static int pcf2127_i2c_probe(struct i2c_client *client,
 778                                const struct i2c_device_id *id)
 779{
 780        struct regmap *regmap;
 781        static const struct regmap_config config = {
 782                .reg_bits = 8,
 783                .val_bits = 8,
 784                .max_register = 0x1d,
 785        };
 786
 787        if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
 788                return -ENODEV;
 789
 790        regmap = devm_regmap_init(&client->dev, &pcf2127_i2c_regmap,
 791                                        &client->dev, &config);
 792        if (IS_ERR(regmap)) {
 793                dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
 794                        __func__, PTR_ERR(regmap));
 795                return PTR_ERR(regmap);
 796        }
 797
 798        return pcf2127_probe(&client->dev, regmap, client->irq,
 799                             pcf2127_i2c_driver.driver.name, id->driver_data);
 800}
 801
 802static const struct i2c_device_id pcf2127_i2c_id[] = {
 803        { "pcf2127", 1 },
 804        { "pcf2129", 0 },
 805        { "pca2129", 0 },
 806        { }
 807};
 808MODULE_DEVICE_TABLE(i2c, pcf2127_i2c_id);
 809
 810static struct i2c_driver pcf2127_i2c_driver = {
 811        .driver         = {
 812                .name   = "rtc-pcf2127-i2c",
 813                .of_match_table = of_match_ptr(pcf2127_of_match),
 814        },
 815        .probe          = pcf2127_i2c_probe,
 816        .id_table       = pcf2127_i2c_id,
 817};
 818
 819static int pcf2127_i2c_register_driver(void)
 820{
 821        return i2c_add_driver(&pcf2127_i2c_driver);
 822}
 823
 824static void pcf2127_i2c_unregister_driver(void)
 825{
 826        i2c_del_driver(&pcf2127_i2c_driver);
 827}
 828
 829#else
 830
 831static int pcf2127_i2c_register_driver(void)
 832{
 833        return 0;
 834}
 835
 836static void pcf2127_i2c_unregister_driver(void)
 837{
 838}
 839
 840#endif
 841
 842#if IS_ENABLED(CONFIG_SPI_MASTER)
 843
 844static struct spi_driver pcf2127_spi_driver;
 845
 846static int pcf2127_spi_probe(struct spi_device *spi)
 847{
 848        static const struct regmap_config config = {
 849                .reg_bits = 8,
 850                .val_bits = 8,
 851                .read_flag_mask = 0xa0,
 852                .write_flag_mask = 0x20,
 853                .max_register = 0x1d,
 854        };
 855        struct regmap *regmap;
 856
 857        regmap = devm_regmap_init_spi(spi, &config);
 858        if (IS_ERR(regmap)) {
 859                dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
 860                        __func__, PTR_ERR(regmap));
 861                return PTR_ERR(regmap);
 862        }
 863
 864        return pcf2127_probe(&spi->dev, regmap, spi->irq,
 865                             pcf2127_spi_driver.driver.name,
 866                             spi_get_device_id(spi)->driver_data);
 867}
 868
 869static const struct spi_device_id pcf2127_spi_id[] = {
 870        { "pcf2127", 1 },
 871        { "pcf2129", 0 },
 872        { "pca2129", 0 },
 873        { }
 874};
 875MODULE_DEVICE_TABLE(spi, pcf2127_spi_id);
 876
 877static struct spi_driver pcf2127_spi_driver = {
 878        .driver         = {
 879                .name   = "rtc-pcf2127-spi",
 880                .of_match_table = of_match_ptr(pcf2127_of_match),
 881        },
 882        .probe          = pcf2127_spi_probe,
 883        .id_table       = pcf2127_spi_id,
 884};
 885
 886static int pcf2127_spi_register_driver(void)
 887{
 888        return spi_register_driver(&pcf2127_spi_driver);
 889}
 890
 891static void pcf2127_spi_unregister_driver(void)
 892{
 893        spi_unregister_driver(&pcf2127_spi_driver);
 894}
 895
 896#else
 897
 898static int pcf2127_spi_register_driver(void)
 899{
 900        return 0;
 901}
 902
 903static void pcf2127_spi_unregister_driver(void)
 904{
 905}
 906
 907#endif
 908
 909static int __init pcf2127_init(void)
 910{
 911        int ret;
 912
 913        ret = pcf2127_i2c_register_driver();
 914        if (ret) {
 915                pr_err("Failed to register pcf2127 i2c driver: %d\n", ret);
 916                return ret;
 917        }
 918
 919        ret = pcf2127_spi_register_driver();
 920        if (ret) {
 921                pr_err("Failed to register pcf2127 spi driver: %d\n", ret);
 922                pcf2127_i2c_unregister_driver();
 923        }
 924
 925        return ret;
 926}
 927module_init(pcf2127_init)
 928
 929static void __exit pcf2127_exit(void)
 930{
 931        pcf2127_spi_unregister_driver();
 932        pcf2127_i2c_unregister_driver();
 933}
 934module_exit(pcf2127_exit)
 935
 936MODULE_AUTHOR("Renaud Cerrato <r.cerrato@til-technologies.fr>");
 937MODULE_DESCRIPTION("NXP PCF2127/29 RTC driver");
 938MODULE_LICENSE("GPL v2");
 939