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23#ifndef _H_LPFC_DEBUG_FS
24#define _H_LPFC_DEBUG_FS
25
26#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
27
28
29#define LPFC_DEBUG_TRC_ENTRY_SIZE 100
30
31
32#define LPFC_NODELIST_SIZE 8192
33#define LPFC_NODELIST_ENTRY_SIZE 120
34
35
36#define LPFC_DUMPHBASLIM_SIZE 4096
37
38
39#define LPFC_DUMPHOSTSLIM_SIZE 4096
40
41
42#define LPFC_DUMPSLIQINFO_SIZE 4096
43
44
45#define LPFC_HBQINFO_SIZE 8192
46
47
48#define LPFC_NVMESTAT_SIZE 8192
49#define LPFC_IOKTIME_SIZE 8192
50#define LPFC_NVMEIO_TRC_SIZE 8192
51
52
53#define LPFC_SCSISTAT_SIZE 8192
54
55#define LPFC_DEBUG_OUT_LINE_SZ 80
56
57
58
59
60
61
62#define LPFC_PCI_CFG_BROWSE 0xffff
63#define LPFC_PCI_CFG_RD_CMD_ARG 2
64#define LPFC_PCI_CFG_WR_CMD_ARG 3
65#define LPFC_PCI_CFG_SIZE 4096
66#define LPFC_PCI_CFG_RD_SIZE (LPFC_PCI_CFG_SIZE/4)
67
68#define IDIAG_PCICFG_WHERE_INDX 0
69#define IDIAG_PCICFG_COUNT_INDX 1
70#define IDIAG_PCICFG_VALUE_INDX 2
71
72
73#define LPFC_PCI_BAR_BROWSE 0xffff
74#define LPFC_PCI_BAR_RD_CMD_ARG 3
75#define LPFC_PCI_BAR_WR_CMD_ARG 3
76
77#define LPFC_PCI_IF0_BAR0_SIZE (1024 * 16)
78#define LPFC_PCI_IF0_BAR1_SIZE (1024 * 128)
79#define LPFC_PCI_IF0_BAR2_SIZE (1024 * 128)
80#define LPFC_PCI_IF2_BAR0_SIZE (1024 * 32)
81
82#define LPFC_PCI_BAR_RD_BUF_SIZE 4096
83#define LPFC_PCI_BAR_RD_SIZE (LPFC_PCI_BAR_RD_BUF_SIZE/4)
84
85#define LPFC_PCI_IF0_BAR0_RD_SIZE (LPFC_PCI_IF0_BAR0_SIZE/4)
86#define LPFC_PCI_IF0_BAR1_RD_SIZE (LPFC_PCI_IF0_BAR1_SIZE/4)
87#define LPFC_PCI_IF0_BAR2_RD_SIZE (LPFC_PCI_IF0_BAR2_SIZE/4)
88#define LPFC_PCI_IF2_BAR0_RD_SIZE (LPFC_PCI_IF2_BAR0_SIZE/4)
89
90#define IDIAG_BARACC_BAR_NUM_INDX 0
91#define IDIAG_BARACC_OFF_SET_INDX 1
92#define IDIAG_BARACC_ACC_MOD_INDX 2
93#define IDIAG_BARACC_REG_VAL_INDX 2
94#define IDIAG_BARACC_BAR_SZE_INDX 3
95
96#define IDIAG_BARACC_BAR_0 0
97#define IDIAG_BARACC_BAR_1 1
98#define IDIAG_BARACC_BAR_2 2
99
100#define SINGLE_WORD 1
101
102
103#define LPFC_QUE_INFO_GET_BUF_SIZE 4096
104
105
106#define LPFC_QUE_ACC_BROWSE 0xffff
107#define LPFC_QUE_ACC_RD_CMD_ARG 4
108#define LPFC_QUE_ACC_WR_CMD_ARG 6
109#define LPFC_QUE_ACC_BUF_SIZE 4096
110#define LPFC_QUE_ACC_SIZE (LPFC_QUE_ACC_BUF_SIZE/2)
111
112#define LPFC_IDIAG_EQ 1
113#define LPFC_IDIAG_CQ 2
114#define LPFC_IDIAG_MQ 3
115#define LPFC_IDIAG_WQ 4
116#define LPFC_IDIAG_RQ 5
117
118#define IDIAG_QUEACC_QUETP_INDX 0
119#define IDIAG_QUEACC_QUEID_INDX 1
120#define IDIAG_QUEACC_INDEX_INDX 2
121#define IDIAG_QUEACC_COUNT_INDX 3
122#define IDIAG_QUEACC_OFFST_INDX 4
123#define IDIAG_QUEACC_VALUE_INDX 5
124
125
126#define LPFC_DRB_ACC_ALL 0xffff
127#define LPFC_DRB_ACC_RD_CMD_ARG 1
128#define LPFC_DRB_ACC_WR_CMD_ARG 2
129#define LPFC_DRB_ACC_BUF_SIZE 256
130
131#define LPFC_DRB_EQ 1
132#define LPFC_DRB_CQ 2
133#define LPFC_DRB_MQ 3
134#define LPFC_DRB_WQ 4
135#define LPFC_DRB_RQ 5
136
137#define LPFC_DRB_MAX 5
138
139#define IDIAG_DRBACC_REGID_INDX 0
140#define IDIAG_DRBACC_VALUE_INDX 1
141
142
143#define LPFC_CTL_ACC_ALL 0xffff
144#define LPFC_CTL_ACC_RD_CMD_ARG 1
145#define LPFC_CTL_ACC_WR_CMD_ARG 2
146#define LPFC_CTL_ACC_BUF_SIZE 256
147
148#define LPFC_CTL_PORT_SEM 1
149#define LPFC_CTL_PORT_STA 2
150#define LPFC_CTL_PORT_CTL 3
151#define LPFC_CTL_PORT_ER1 4
152#define LPFC_CTL_PORT_ER2 5
153#define LPFC_CTL_PDEV_CTL 6
154
155#define LPFC_CTL_MAX 6
156
157#define IDIAG_CTLACC_REGID_INDX 0
158#define IDIAG_CTLACC_VALUE_INDX 1
159
160
161#define LPFC_MBX_DMP_ARG 4
162
163#define LPFC_MBX_ACC_BUF_SIZE 512
164#define LPFC_MBX_ACC_LBUF_SZ 128
165
166#define LPFC_MBX_DMP_MBX_WORD 0x00000001
167#define LPFC_MBX_DMP_MBX_BYTE 0x00000002
168#define LPFC_MBX_DMP_MBX_ALL (LPFC_MBX_DMP_MBX_WORD | LPFC_MBX_DMP_MBX_BYTE)
169
170#define LPFC_BSG_DMP_MBX_RD_MBX 0x00000001
171#define LPFC_BSG_DMP_MBX_RD_BUF 0x00000002
172#define LPFC_BSG_DMP_MBX_WR_MBX 0x00000004
173#define LPFC_BSG_DMP_MBX_WR_BUF 0x00000008
174#define LPFC_BSG_DMP_MBX_ALL (LPFC_BSG_DMP_MBX_RD_MBX | \
175 LPFC_BSG_DMP_MBX_RD_BUF | \
176 LPFC_BSG_DMP_MBX_WR_MBX | \
177 LPFC_BSG_DMP_MBX_WR_BUF)
178
179#define LPFC_MBX_DMP_ALL 0xffff
180#define LPFC_MBX_ALL_CMD 0xff
181
182#define IDIAG_MBXACC_MBCMD_INDX 0
183#define IDIAG_MBXACC_DPMAP_INDX 1
184#define IDIAG_MBXACC_DPCNT_INDX 2
185#define IDIAG_MBXACC_WDCNT_INDX 3
186
187
188#define LPFC_EXT_ACC_CMD_ARG 1
189#define LPFC_EXT_ACC_BUF_SIZE 4096
190
191#define LPFC_EXT_ACC_AVAIL 0x1
192#define LPFC_EXT_ACC_ALLOC 0x2
193#define LPFC_EXT_ACC_DRIVR 0x4
194#define LPFC_EXT_ACC_ALL (LPFC_EXT_ACC_DRIVR | \
195 LPFC_EXT_ACC_AVAIL | \
196 LPFC_EXT_ACC_ALLOC)
197
198#define IDIAG_EXTACC_EXMAP_INDX 0
199
200#define SIZE_U8 sizeof(uint8_t)
201#define SIZE_U16 sizeof(uint16_t)
202#define SIZE_U32 sizeof(uint32_t)
203
204#define lpfc_nvmeio_data(phba, fmt, arg...) \
205 { \
206 if (phba->nvmeio_trc_on) \
207 lpfc_debugfs_nvme_trc(phba, fmt, ##arg); \
208 }
209
210struct lpfc_debug {
211 char *i_private;
212 char op;
213#define LPFC_IDIAG_OP_RD 1
214#define LPFC_IDIAG_OP_WR 2
215 char *buffer;
216 int len;
217};
218
219struct lpfc_debugfs_trc {
220 char *fmt;
221 uint32_t data1;
222 uint32_t data2;
223 uint32_t data3;
224 uint32_t seq_cnt;
225 unsigned long jif;
226};
227
228struct lpfc_debugfs_nvmeio_trc {
229 char *fmt;
230 uint16_t data1;
231 uint16_t data2;
232 uint32_t data3;
233};
234
235struct lpfc_idiag_offset {
236 uint32_t last_rd;
237};
238
239#define LPFC_IDIAG_CMD_DATA_SIZE 8
240struct lpfc_idiag_cmd {
241 uint32_t opcode;
242#define LPFC_IDIAG_CMD_PCICFG_RD 0x00000001
243#define LPFC_IDIAG_CMD_PCICFG_WR 0x00000002
244#define LPFC_IDIAG_CMD_PCICFG_ST 0x00000003
245#define LPFC_IDIAG_CMD_PCICFG_CL 0x00000004
246
247#define LPFC_IDIAG_CMD_BARACC_RD 0x00000008
248#define LPFC_IDIAG_CMD_BARACC_WR 0x00000009
249#define LPFC_IDIAG_CMD_BARACC_ST 0x0000000a
250#define LPFC_IDIAG_CMD_BARACC_CL 0x0000000b
251
252#define LPFC_IDIAG_CMD_QUEACC_RD 0x00000011
253#define LPFC_IDIAG_CMD_QUEACC_WR 0x00000012
254#define LPFC_IDIAG_CMD_QUEACC_ST 0x00000013
255#define LPFC_IDIAG_CMD_QUEACC_CL 0x00000014
256
257#define LPFC_IDIAG_CMD_DRBACC_RD 0x00000021
258#define LPFC_IDIAG_CMD_DRBACC_WR 0x00000022
259#define LPFC_IDIAG_CMD_DRBACC_ST 0x00000023
260#define LPFC_IDIAG_CMD_DRBACC_CL 0x00000024
261
262#define LPFC_IDIAG_CMD_CTLACC_RD 0x00000031
263#define LPFC_IDIAG_CMD_CTLACC_WR 0x00000032
264#define LPFC_IDIAG_CMD_CTLACC_ST 0x00000033
265#define LPFC_IDIAG_CMD_CTLACC_CL 0x00000034
266
267#define LPFC_IDIAG_CMD_MBXACC_DP 0x00000041
268#define LPFC_IDIAG_BSG_MBXACC_DP 0x00000042
269
270#define LPFC_IDIAG_CMD_EXTACC_RD 0x00000051
271
272 uint32_t data[LPFC_IDIAG_CMD_DATA_SIZE];
273};
274
275struct lpfc_idiag {
276 uint32_t active;
277 struct lpfc_idiag_cmd cmd;
278 struct lpfc_idiag_offset offset;
279 void *ptr_private;
280};
281
282#else
283
284#define lpfc_nvmeio_data(phba, fmt, arg...) \
285 no_printk(fmt, ##arg)
286
287#endif
288
289
290#define LPFC_DUMP_MULTIXRIPOOL_SIZE 8192
291
292enum {
293 DUMP_IO,
294 DUMP_MBX,
295 DUMP_ELS,
296 DUMP_NVMELS,
297};
298
299
300#define LPFC_DISC_TRC_ELS_CMD 0x1
301#define LPFC_DISC_TRC_ELS_RSP 0x2
302#define LPFC_DISC_TRC_ELS_UNSOL 0x4
303#define LPFC_DISC_TRC_ELS_ALL 0x7
304#define LPFC_DISC_TRC_MBOX_VPORT 0x8
305#define LPFC_DISC_TRC_MBOX 0x10
306#define LPFC_DISC_TRC_MBOX_ALL 0x18
307#define LPFC_DISC_TRC_CT 0x20
308#define LPFC_DISC_TRC_DSM 0x40
309#define LPFC_DISC_TRC_RPORT 0x80
310#define LPFC_DISC_TRC_NODE 0x100
311
312#define LPFC_DISC_TRC_DISCOVERY 0xef
313
314#endif
315
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329
330
331static void
332lpfc_debug_dump_qe(struct lpfc_queue *q, uint32_t idx)
333{
334 char line_buf[LPFC_LBUF_SZ];
335 int i, esize, qe_word_cnt, len;
336 uint32_t *pword;
337
338
339 if (!q)
340 return;
341 if (idx >= q->entry_count)
342 return;
343
344 esize = q->entry_size;
345 qe_word_cnt = esize / sizeof(uint32_t);
346 pword = lpfc_sli4_qe(q, idx);
347
348 len = 0;
349 len += scnprintf(line_buf+len, LPFC_LBUF_SZ-len, "QE[%04d]: ", idx);
350 if (qe_word_cnt > 8)
351 printk(KERN_ERR "%s\n", line_buf);
352
353 for (i = 0; i < qe_word_cnt; i++) {
354 if (!(i % 8)) {
355 if (i != 0)
356 printk(KERN_ERR "%s\n", line_buf);
357 if (qe_word_cnt > 8) {
358 len = 0;
359 memset(line_buf, 0, LPFC_LBUF_SZ);
360 len += scnprintf(line_buf+len, LPFC_LBUF_SZ-len,
361 "%03d: ", i);
362 }
363 }
364 len += scnprintf(line_buf+len, LPFC_LBUF_SZ-len, "%08x ",
365 ((uint32_t)*pword) & 0xffffffff);
366 pword++;
367 }
368 if (qe_word_cnt <= 8 || (i - 1) % 8)
369 printk(KERN_ERR "%s\n", line_buf);
370}
371
372
373
374
375
376
377
378
379static inline void
380lpfc_debug_dump_q(struct lpfc_queue *q)
381{
382 int idx, entry_count;
383
384
385 if (!q)
386 return;
387
388 dev_printk(KERN_ERR, &(((q->phba))->pcidev)->dev,
389 "%d: [qid:%d, type:%d, subtype:%d, "
390 "qe_size:%d, qe_count:%d, "
391 "host_index:%d, port_index:%d]\n",
392 (q->phba)->brd_no,
393 q->queue_id, q->type, q->subtype,
394 q->entry_size, q->entry_count,
395 q->host_index, q->hba_index);
396 entry_count = q->entry_count;
397 for (idx = 0; idx < entry_count; idx++)
398 lpfc_debug_dump_qe(q, idx);
399 printk(KERN_ERR "\n");
400}
401
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408
409
410static inline void
411lpfc_debug_dump_wq(struct lpfc_hba *phba, int qtype, int wqidx)
412{
413 struct lpfc_queue *wq;
414 char *qtypestr;
415
416 if (qtype == DUMP_IO) {
417 wq = phba->sli4_hba.hdwq[wqidx].io_wq;
418 qtypestr = "IO";
419 } else if (qtype == DUMP_MBX) {
420 wq = phba->sli4_hba.mbx_wq;
421 qtypestr = "MBX";
422 } else if (qtype == DUMP_ELS) {
423 wq = phba->sli4_hba.els_wq;
424 qtypestr = "ELS";
425 } else if (qtype == DUMP_NVMELS) {
426 wq = phba->sli4_hba.nvmels_wq;
427 qtypestr = "NVMELS";
428 } else
429 return;
430
431 if (qtype == DUMP_IO)
432 pr_err("%s WQ: WQ[Idx:%d|Qid:%d]\n",
433 qtypestr, wqidx, wq->queue_id);
434 else
435 pr_err("%s WQ: WQ[Qid:%d]\n",
436 qtypestr, wq->queue_id);
437
438 lpfc_debug_dump_q(wq);
439}
440
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443
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446
447
448
449
450static inline void
451lpfc_debug_dump_cq(struct lpfc_hba *phba, int qtype, int wqidx)
452{
453 struct lpfc_queue *wq, *cq, *eq;
454 char *qtypestr;
455 int eqidx;
456
457
458 eq = NULL;
459
460 if (qtype == DUMP_IO) {
461 wq = phba->sli4_hba.hdwq[wqidx].io_wq;
462 cq = phba->sli4_hba.hdwq[wqidx].io_cq;
463 qtypestr = "IO";
464 } else if (qtype == DUMP_MBX) {
465 wq = phba->sli4_hba.mbx_wq;
466 cq = phba->sli4_hba.mbx_cq;
467 qtypestr = "MBX";
468 } else if (qtype == DUMP_ELS) {
469 wq = phba->sli4_hba.els_wq;
470 cq = phba->sli4_hba.els_cq;
471 qtypestr = "ELS";
472 } else if (qtype == DUMP_NVMELS) {
473 wq = phba->sli4_hba.nvmels_wq;
474 cq = phba->sli4_hba.nvmels_cq;
475 qtypestr = "NVMELS";
476 } else
477 return;
478
479 for (eqidx = 0; eqidx < phba->cfg_hdw_queue; eqidx++) {
480 eq = phba->sli4_hba.hdwq[eqidx].hba_eq;
481 if (cq->assoc_qid == eq->queue_id)
482 break;
483 }
484 if (eqidx == phba->cfg_hdw_queue) {
485 pr_err("Couldn't find EQ for CQ. Using EQ[0]\n");
486 eqidx = 0;
487 eq = phba->sli4_hba.hdwq[0].hba_eq;
488 }
489
490 if (qtype == DUMP_IO)
491 pr_err("%s CQ: WQ[Idx:%d|Qid%d]->CQ[Idx%d|Qid%d]"
492 "->EQ[Idx:%d|Qid:%d]:\n",
493 qtypestr, wqidx, wq->queue_id, wqidx, cq->queue_id,
494 eqidx, eq->queue_id);
495 else
496 pr_err("%s CQ: WQ[Qid:%d]->CQ[Qid:%d]"
497 "->EQ[Idx:%d|Qid:%d]:\n",
498 qtypestr, wq->queue_id, cq->queue_id,
499 eqidx, eq->queue_id);
500
501 lpfc_debug_dump_q(cq);
502}
503
504
505
506
507
508
509
510
511
512static inline void
513lpfc_debug_dump_hba_eq(struct lpfc_hba *phba, int qidx)
514{
515 struct lpfc_queue *qp;
516
517 qp = phba->sli4_hba.hdwq[qidx].hba_eq;
518
519 pr_err("EQ[Idx:%d|Qid:%d]\n", qidx, qp->queue_id);
520
521 lpfc_debug_dump_q(qp);
522}
523
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527
528
529
530static inline void
531lpfc_debug_dump_dat_rq(struct lpfc_hba *phba)
532{
533 printk(KERN_ERR "DAT RQ: RQ[Qid:%d]\n",
534 phba->sli4_hba.dat_rq->queue_id);
535 lpfc_debug_dump_q(phba->sli4_hba.dat_rq);
536}
537
538
539
540
541
542
543
544static inline void
545lpfc_debug_dump_hdr_rq(struct lpfc_hba *phba)
546{
547 printk(KERN_ERR "HDR RQ: RQ[Qid:%d]\n",
548 phba->sli4_hba.hdr_rq->queue_id);
549 lpfc_debug_dump_q(phba->sli4_hba.hdr_rq);
550}
551
552
553
554
555
556
557
558
559
560static inline void
561lpfc_debug_dump_wq_by_id(struct lpfc_hba *phba, int qid)
562{
563 int wq_idx;
564
565 for (wq_idx = 0; wq_idx < phba->cfg_hdw_queue; wq_idx++)
566 if (phba->sli4_hba.hdwq[wq_idx].io_wq->queue_id == qid)
567 break;
568 if (wq_idx < phba->cfg_hdw_queue) {
569 pr_err("IO WQ[Idx:%d|Qid:%d]\n", wq_idx, qid);
570 lpfc_debug_dump_q(phba->sli4_hba.hdwq[wq_idx].io_wq);
571 return;
572 }
573
574 if (phba->sli4_hba.els_wq->queue_id == qid) {
575 pr_err("ELS WQ[Qid:%d]\n", qid);
576 lpfc_debug_dump_q(phba->sli4_hba.els_wq);
577 return;
578 }
579
580 if (phba->sli4_hba.nvmels_wq->queue_id == qid) {
581 pr_err("NVME LS WQ[Qid:%d]\n", qid);
582 lpfc_debug_dump_q(phba->sli4_hba.nvmels_wq);
583 }
584}
585
586
587
588
589
590
591
592
593
594static inline void
595lpfc_debug_dump_mq_by_id(struct lpfc_hba *phba, int qid)
596{
597 if (phba->sli4_hba.mbx_wq->queue_id == qid) {
598 printk(KERN_ERR "MBX WQ[Qid:%d]\n", qid);
599 lpfc_debug_dump_q(phba->sli4_hba.mbx_wq);
600 }
601}
602
603
604
605
606
607
608
609
610
611static inline void
612lpfc_debug_dump_rq_by_id(struct lpfc_hba *phba, int qid)
613{
614 if (phba->sli4_hba.hdr_rq->queue_id == qid) {
615 printk(KERN_ERR "HDR RQ[Qid:%d]\n", qid);
616 lpfc_debug_dump_q(phba->sli4_hba.hdr_rq);
617 return;
618 }
619 if (phba->sli4_hba.dat_rq->queue_id == qid) {
620 printk(KERN_ERR "DAT RQ[Qid:%d]\n", qid);
621 lpfc_debug_dump_q(phba->sli4_hba.dat_rq);
622 }
623}
624
625
626
627
628
629
630
631
632
633static inline void
634lpfc_debug_dump_cq_by_id(struct lpfc_hba *phba, int qid)
635{
636 int cq_idx;
637
638 for (cq_idx = 0; cq_idx < phba->cfg_hdw_queue; cq_idx++)
639 if (phba->sli4_hba.hdwq[cq_idx].io_cq->queue_id == qid)
640 break;
641
642 if (cq_idx < phba->cfg_hdw_queue) {
643 pr_err("IO CQ[Idx:%d|Qid:%d]\n", cq_idx, qid);
644 lpfc_debug_dump_q(phba->sli4_hba.hdwq[cq_idx].io_cq);
645 return;
646 }
647
648 if (phba->sli4_hba.els_cq->queue_id == qid) {
649 pr_err("ELS CQ[Qid:%d]\n", qid);
650 lpfc_debug_dump_q(phba->sli4_hba.els_cq);
651 return;
652 }
653
654 if (phba->sli4_hba.nvmels_cq->queue_id == qid) {
655 pr_err("NVME LS CQ[Qid:%d]\n", qid);
656 lpfc_debug_dump_q(phba->sli4_hba.nvmels_cq);
657 return;
658 }
659
660 if (phba->sli4_hba.mbx_cq->queue_id == qid) {
661 pr_err("MBX CQ[Qid:%d]\n", qid);
662 lpfc_debug_dump_q(phba->sli4_hba.mbx_cq);
663 }
664}
665
666
667
668
669
670
671
672
673
674static inline void
675lpfc_debug_dump_eq_by_id(struct lpfc_hba *phba, int qid)
676{
677 int eq_idx;
678
679 for (eq_idx = 0; eq_idx < phba->cfg_hdw_queue; eq_idx++)
680 if (phba->sli4_hba.hdwq[eq_idx].hba_eq->queue_id == qid)
681 break;
682
683 if (eq_idx < phba->cfg_hdw_queue) {
684 printk(KERN_ERR "FCP EQ[Idx:%d|Qid:%d]\n", eq_idx, qid);
685 lpfc_debug_dump_q(phba->sli4_hba.hdwq[eq_idx].hba_eq);
686 return;
687 }
688}
689
690void lpfc_debug_dump_all_queues(struct lpfc_hba *);
691