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9#include <linux/acpi.h>
10#include <linux/dmi.h>
11#include <linux/io.h>
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/pci.h>
15#include <linux/property.h>
16#include <linux/serial_core.h>
17#include <linux/serial_reg.h>
18#include <linux/slab.h>
19#include <linux/string.h>
20#include <linux/tty.h>
21#include <linux/8250_pci.h>
22#include <linux/delay.h>
23
24#include <asm/byteorder.h>
25
26#include "8250.h"
27
28#define PCI_DEVICE_ID_ACCESSIO_COM_2S 0x1052
29#define PCI_DEVICE_ID_ACCESSIO_COM_4S 0x105d
30#define PCI_DEVICE_ID_ACCESSIO_COM_8S 0x106c
31#define PCI_DEVICE_ID_ACCESSIO_COM232_8 0x10a8
32#define PCI_DEVICE_ID_ACCESSIO_COM_2SM 0x10d2
33#define PCI_DEVICE_ID_ACCESSIO_COM_4SM 0x10db
34#define PCI_DEVICE_ID_ACCESSIO_COM_8SM 0x10ea
35
36#define PCI_DEVICE_ID_COMMTECH_4224PCI335 0x0002
37#define PCI_DEVICE_ID_COMMTECH_4222PCI335 0x0004
38#define PCI_DEVICE_ID_COMMTECH_2324PCI335 0x000a
39#define PCI_DEVICE_ID_COMMTECH_2328PCI335 0x000b
40#define PCI_DEVICE_ID_COMMTECH_4224PCIE 0x0020
41#define PCI_DEVICE_ID_COMMTECH_4228PCIE 0x0021
42#define PCI_DEVICE_ID_COMMTECH_4222PCIE 0x0022
43#define PCI_DEVICE_ID_EXAR_XR17V4358 0x4358
44#define PCI_DEVICE_ID_EXAR_XR17V8358 0x8358
45
46#define UART_EXAR_INT0 0x80
47#define UART_EXAR_8XMODE 0x88
48#define UART_EXAR_SLEEP 0x8b
49#define UART_EXAR_DVID 0x8d
50
51#define UART_EXAR_FCTR 0x08
52#define UART_FCTR_EXAR_IRDA 0x10
53#define UART_FCTR_EXAR_485 0x20
54#define UART_FCTR_EXAR_TRGA 0x00
55#define UART_FCTR_EXAR_TRGB 0x60
56#define UART_FCTR_EXAR_TRGC 0x80
57#define UART_FCTR_EXAR_TRGD 0xc0
58
59#define UART_EXAR_TXTRG 0x0a
60#define UART_EXAR_RXTRG 0x0b
61
62#define UART_EXAR_MPIOINT_7_0 0x8f
63#define UART_EXAR_MPIOLVL_7_0 0x90
64#define UART_EXAR_MPIO3T_7_0 0x91
65#define UART_EXAR_MPIOINV_7_0 0x92
66#define UART_EXAR_MPIOSEL_7_0 0x93
67#define UART_EXAR_MPIOOD_7_0 0x94
68#define UART_EXAR_MPIOINT_15_8 0x95
69#define UART_EXAR_MPIOLVL_15_8 0x96
70#define UART_EXAR_MPIO3T_15_8 0x97
71#define UART_EXAR_MPIOINV_15_8 0x98
72#define UART_EXAR_MPIOSEL_15_8 0x99
73#define UART_EXAR_MPIOOD_15_8 0x9a
74
75#define UART_EXAR_RS485_DLY(x) ((x) << 4)
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96
97#define IOT2040_UART_MODE_RS232 0x01
98#define IOT2040_UART_MODE_RS485 0x02
99#define IOT2040_UART_MODE_RS422 0x03
100#define IOT2040_UART_TERMINATE_BUS 0x04
101
102#define IOT2040_UART1_MASK 0x0f
103#define IOT2040_UART2_SHIFT 4
104
105#define IOT2040_UARTS_DEFAULT_MODE 0x11
106#define IOT2040_UARTS_GPIO_LO_MODE 0x88
107
108
109#define IOT2040_UARTS_ENABLE 0x03
110#define IOT2040_UARTS_GPIO_HI_MODE 0xF8
111
112struct exar8250;
113
114struct exar8250_platform {
115 int (*rs485_config)(struct uart_port *, struct serial_rs485 *);
116 int (*register_gpio)(struct pci_dev *, struct uart_8250_port *);
117};
118
119
120
121
122
123
124
125
126struct exar8250_board {
127 unsigned int num_ports;
128 unsigned int reg_shift;
129 int (*setup)(struct exar8250 *, struct pci_dev *,
130 struct uart_8250_port *, int);
131 void (*exit)(struct pci_dev *pcidev);
132};
133
134struct exar8250 {
135 unsigned int nr;
136 struct exar8250_board *board;
137 void __iomem *virt;
138 int line[];
139};
140
141static void exar_pm(struct uart_port *port, unsigned int state, unsigned int old)
142{
143
144
145
146
147
148
149 serial_port_out(port, UART_EXAR_SLEEP, state ? 0xff : 0);
150}
151
152
153
154
155
156static unsigned int xr17v35x_get_divisor(struct uart_port *p, unsigned int baud,
157 unsigned int *frac)
158{
159 unsigned int quot_16;
160
161 quot_16 = DIV_ROUND_CLOSEST(p->uartclk, baud);
162 *frac = quot_16 & 0x0f;
163
164 return quot_16 >> 4;
165}
166
167static void xr17v35x_set_divisor(struct uart_port *p, unsigned int baud,
168 unsigned int quot, unsigned int quot_frac)
169{
170 serial8250_do_set_divisor(p, baud, quot, quot_frac);
171
172
173 quot_frac |= serial_port_in(p, 0x2) & 0xf0;
174 serial_port_out(p, 0x2, quot_frac);
175}
176
177static int xr17v35x_startup(struct uart_port *port)
178{
179
180
181
182
183 serial_port_out(port, UART_XR_EFR, UART_EFR_ECB);
184
185
186
187
188
189 serial_port_out(port, UART_IER, 0);
190
191 return serial8250_do_startup(port);
192}
193
194static void exar_shutdown(struct uart_port *port)
195{
196 unsigned char lsr;
197 bool tx_complete = false;
198 struct uart_8250_port *up = up_to_u8250p(port);
199 struct circ_buf *xmit = &port->state->xmit;
200 int i = 0;
201
202 do {
203 lsr = serial_in(up, UART_LSR);
204 if (lsr & (UART_LSR_TEMT | UART_LSR_THRE))
205 tx_complete = true;
206 else
207 tx_complete = false;
208 usleep_range(1000, 1100);
209 } while (!uart_circ_empty(xmit) && !tx_complete && i++ < 1000);
210
211 serial8250_do_shutdown(port);
212}
213
214static int default_setup(struct exar8250 *priv, struct pci_dev *pcidev,
215 int idx, unsigned int offset,
216 struct uart_8250_port *port)
217{
218 const struct exar8250_board *board = priv->board;
219 unsigned int bar = 0;
220 unsigned char status;
221
222 port->port.iotype = UPIO_MEM;
223 port->port.mapbase = pci_resource_start(pcidev, bar) + offset;
224 port->port.membase = priv->virt + offset;
225 port->port.regshift = board->reg_shift;
226
227
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230
231
232
233
234 status = readb(port->port.membase + UART_EXAR_DVID);
235 if (status == 0x82 || status == 0x84 || status == 0x88) {
236 port->port.type = PORT_XR17V35X;
237
238 port->port.get_divisor = xr17v35x_get_divisor;
239 port->port.set_divisor = xr17v35x_set_divisor;
240
241 port->port.startup = xr17v35x_startup;
242 } else {
243 port->port.type = PORT_XR17D15X;
244 }
245
246 port->port.pm = exar_pm;
247 port->port.shutdown = exar_shutdown;
248
249 return 0;
250}
251
252static int
253pci_fastcom335_setup(struct exar8250 *priv, struct pci_dev *pcidev,
254 struct uart_8250_port *port, int idx)
255{
256 unsigned int offset = idx * 0x200;
257 unsigned int baud = 1843200;
258 u8 __iomem *p;
259 int err;
260
261 port->port.uartclk = baud * 16;
262
263 err = default_setup(priv, pcidev, idx, offset, port);
264 if (err)
265 return err;
266
267 p = port->port.membase;
268
269 writeb(0x00, p + UART_EXAR_8XMODE);
270 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR);
271 writeb(32, p + UART_EXAR_TXTRG);
272 writeb(32, p + UART_EXAR_RXTRG);
273
274
275
276
277 if (idx == 0) {
278 switch (pcidev->device) {
279 case PCI_DEVICE_ID_COMMTECH_4222PCI335:
280 case PCI_DEVICE_ID_COMMTECH_4224PCI335:
281 writeb(0x78, p + UART_EXAR_MPIOLVL_7_0);
282 writeb(0x00, p + UART_EXAR_MPIOINV_7_0);
283 writeb(0x00, p + UART_EXAR_MPIOSEL_7_0);
284 break;
285 case PCI_DEVICE_ID_COMMTECH_2324PCI335:
286 case PCI_DEVICE_ID_COMMTECH_2328PCI335:
287 writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
288 writeb(0xc0, p + UART_EXAR_MPIOINV_7_0);
289 writeb(0xc0, p + UART_EXAR_MPIOSEL_7_0);
290 break;
291 }
292 writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
293 writeb(0x00, p + UART_EXAR_MPIO3T_7_0);
294 writeb(0x00, p + UART_EXAR_MPIOOD_7_0);
295 }
296
297 return 0;
298}
299
300static int
301pci_connect_tech_setup(struct exar8250 *priv, struct pci_dev *pcidev,
302 struct uart_8250_port *port, int idx)
303{
304 unsigned int offset = idx * 0x200;
305 unsigned int baud = 1843200;
306
307 port->port.uartclk = baud * 16;
308 return default_setup(priv, pcidev, idx, offset, port);
309}
310
311static int
312pci_xr17c154_setup(struct exar8250 *priv, struct pci_dev *pcidev,
313 struct uart_8250_port *port, int idx)
314{
315 unsigned int offset = idx * 0x200;
316 unsigned int baud = 921600;
317
318 port->port.uartclk = baud * 16;
319 return default_setup(priv, pcidev, idx, offset, port);
320}
321
322static void setup_gpio(struct pci_dev *pcidev, u8 __iomem *p)
323{
324
325
326
327
328
329
330 u8 dir = 0x00;
331
332 if ((pcidev->vendor == PCI_VENDOR_ID_EXAR) &&
333 (pcidev->subsystem_vendor != PCI_VENDOR_ID_SEALEVEL)) {
334
335 dir = 0xff;
336 } else {
337
338 dir = 0x00;
339 }
340
341 writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
342 writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
343 writeb(0x00, p + UART_EXAR_MPIO3T_7_0);
344 writeb(0x00, p + UART_EXAR_MPIOINV_7_0);
345 writeb(dir, p + UART_EXAR_MPIOSEL_7_0);
346 writeb(0x00, p + UART_EXAR_MPIOOD_7_0);
347 writeb(0x00, p + UART_EXAR_MPIOINT_15_8);
348 writeb(0x00, p + UART_EXAR_MPIOLVL_15_8);
349 writeb(0x00, p + UART_EXAR_MPIO3T_15_8);
350 writeb(0x00, p + UART_EXAR_MPIOINV_15_8);
351 writeb(dir, p + UART_EXAR_MPIOSEL_15_8);
352 writeb(0x00, p + UART_EXAR_MPIOOD_15_8);
353}
354
355static void *
356__xr17v35x_register_gpio(struct pci_dev *pcidev,
357 const struct property_entry *properties)
358{
359 struct platform_device *pdev;
360
361 pdev = platform_device_alloc("gpio_exar", PLATFORM_DEVID_AUTO);
362 if (!pdev)
363 return NULL;
364
365 pdev->dev.parent = &pcidev->dev;
366 ACPI_COMPANION_SET(&pdev->dev, ACPI_COMPANION(&pcidev->dev));
367
368 if (platform_device_add_properties(pdev, properties) < 0 ||
369 platform_device_add(pdev) < 0) {
370 platform_device_put(pdev);
371 return NULL;
372 }
373
374 return pdev;
375}
376
377static const struct property_entry exar_gpio_properties[] = {
378 PROPERTY_ENTRY_U32("exar,first-pin", 0),
379 PROPERTY_ENTRY_U32("ngpios", 16),
380 { }
381};
382
383static int xr17v35x_register_gpio(struct pci_dev *pcidev,
384 struct uart_8250_port *port)
385{
386 if (pcidev->vendor == PCI_VENDOR_ID_EXAR)
387 port->port.private_data =
388 __xr17v35x_register_gpio(pcidev, exar_gpio_properties);
389
390 return 0;
391}
392
393static int generic_rs485_config(struct uart_port *port,
394 struct serial_rs485 *rs485)
395{
396 bool is_rs485 = !!(rs485->flags & SER_RS485_ENABLED);
397 u8 __iomem *p = port->membase;
398 u8 value;
399
400 value = readb(p + UART_EXAR_FCTR);
401 if (is_rs485)
402 value |= UART_FCTR_EXAR_485;
403 else
404 value &= ~UART_FCTR_EXAR_485;
405
406 writeb(value, p + UART_EXAR_FCTR);
407
408 if (is_rs485)
409 writeb(UART_EXAR_RS485_DLY(4), p + UART_MSR);
410
411 port->rs485 = *rs485;
412
413 return 0;
414}
415
416static const struct exar8250_platform exar8250_default_platform = {
417 .register_gpio = xr17v35x_register_gpio,
418 .rs485_config = generic_rs485_config,
419};
420
421static int iot2040_rs485_config(struct uart_port *port,
422 struct serial_rs485 *rs485)
423{
424 bool is_rs485 = !!(rs485->flags & SER_RS485_ENABLED);
425 u8 __iomem *p = port->membase;
426 u8 mask = IOT2040_UART1_MASK;
427 u8 mode, value;
428
429 if (is_rs485) {
430 if (rs485->flags & SER_RS485_RX_DURING_TX)
431 mode = IOT2040_UART_MODE_RS422;
432 else
433 mode = IOT2040_UART_MODE_RS485;
434
435 if (rs485->flags & SER_RS485_TERMINATE_BUS)
436 mode |= IOT2040_UART_TERMINATE_BUS;
437 } else {
438 mode = IOT2040_UART_MODE_RS232;
439 }
440
441 if (port->line == 3) {
442 mask <<= IOT2040_UART2_SHIFT;
443 mode <<= IOT2040_UART2_SHIFT;
444 }
445
446 value = readb(p + UART_EXAR_MPIOLVL_7_0);
447 value &= ~mask;
448 value |= mode;
449 writeb(value, p + UART_EXAR_MPIOLVL_7_0);
450
451 return generic_rs485_config(port, rs485);
452}
453
454static const struct property_entry iot2040_gpio_properties[] = {
455 PROPERTY_ENTRY_U32("exar,first-pin", 10),
456 PROPERTY_ENTRY_U32("ngpios", 1),
457 { }
458};
459
460static int iot2040_register_gpio(struct pci_dev *pcidev,
461 struct uart_8250_port *port)
462{
463 u8 __iomem *p = port->port.membase;
464
465 writeb(IOT2040_UARTS_DEFAULT_MODE, p + UART_EXAR_MPIOLVL_7_0);
466 writeb(IOT2040_UARTS_GPIO_LO_MODE, p + UART_EXAR_MPIOSEL_7_0);
467 writeb(IOT2040_UARTS_ENABLE, p + UART_EXAR_MPIOLVL_15_8);
468 writeb(IOT2040_UARTS_GPIO_HI_MODE, p + UART_EXAR_MPIOSEL_15_8);
469
470 port->port.private_data =
471 __xr17v35x_register_gpio(pcidev, iot2040_gpio_properties);
472
473 return 0;
474}
475
476static const struct exar8250_platform iot2040_platform = {
477 .rs485_config = iot2040_rs485_config,
478 .register_gpio = iot2040_register_gpio,
479};
480
481
482
483
484
485
486static const struct dmi_system_id exar_platforms[] = {
487 {
488 .matches = {
489 DMI_EXACT_MATCH(DMI_BOARD_NAME, "SIMATIC IOT2000"),
490 },
491 .driver_data = (void *)&iot2040_platform,
492 },
493 {}
494};
495
496static int
497pci_xr17v35x_setup(struct exar8250 *priv, struct pci_dev *pcidev,
498 struct uart_8250_port *port, int idx)
499{
500 const struct exar8250_platform *platform;
501 const struct dmi_system_id *dmi_match;
502 unsigned int offset = idx * 0x400;
503 unsigned int baud = 7812500;
504 u8 __iomem *p;
505 int ret;
506
507 dmi_match = dmi_first_match(exar_platforms);
508 if (dmi_match)
509 platform = dmi_match->driver_data;
510 else
511 platform = &exar8250_default_platform;
512
513 port->port.uartclk = baud * 16;
514 port->port.rs485_config = platform->rs485_config;
515
516
517
518
519
520 if (idx >= 8)
521 port->port.uartclk /= 2;
522
523 ret = default_setup(priv, pcidev, idx, offset, port);
524 if (ret)
525 return ret;
526
527 p = port->port.membase;
528
529 writeb(0x00, p + UART_EXAR_8XMODE);
530 writeb(UART_FCTR_EXAR_TRGD, p + UART_EXAR_FCTR);
531 writeb(128, p + UART_EXAR_TXTRG);
532 writeb(128, p + UART_EXAR_RXTRG);
533
534 if (idx == 0) {
535
536 setup_gpio(pcidev, p);
537
538 ret = platform->register_gpio(pcidev, port);
539 }
540
541 return ret;
542}
543
544static void pci_xr17v35x_exit(struct pci_dev *pcidev)
545{
546 struct exar8250 *priv = pci_get_drvdata(pcidev);
547 struct uart_8250_port *port = serial8250_get_port(priv->line[0]);
548 struct platform_device *pdev = port->port.private_data;
549
550 platform_device_unregister(pdev);
551 port->port.private_data = NULL;
552}
553
554static inline void exar_misc_clear(struct exar8250 *priv)
555{
556
557 readb(priv->virt + UART_EXAR_INT0);
558
559
560 if (priv->board->num_ports > 8)
561 readb(priv->virt + 0x2000 + UART_EXAR_INT0);
562}
563
564
565
566
567
568
569
570
571
572
573static irqreturn_t exar_misc_handler(int irq, void *data)
574{
575 exar_misc_clear(data);
576
577 return IRQ_HANDLED;
578}
579
580static int
581exar_pci_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
582{
583 unsigned int nr_ports, i, bar = 0, maxnr;
584 struct exar8250_board *board;
585 struct uart_8250_port uart;
586 struct exar8250 *priv;
587 int rc;
588
589 board = (struct exar8250_board *)ent->driver_data;
590 if (!board)
591 return -EINVAL;
592
593 rc = pcim_enable_device(pcidev);
594 if (rc)
595 return rc;
596
597 maxnr = pci_resource_len(pcidev, bar) >> (board->reg_shift + 3);
598
599 nr_ports = board->num_ports ? board->num_ports : pcidev->device & 0x0f;
600
601 priv = devm_kzalloc(&pcidev->dev, struct_size(priv, line, nr_ports), GFP_KERNEL);
602 if (!priv)
603 return -ENOMEM;
604
605 priv->board = board;
606 priv->virt = pcim_iomap(pcidev, bar, 0);
607 if (!priv->virt)
608 return -ENOMEM;
609
610 pci_set_master(pcidev);
611
612 rc = pci_alloc_irq_vectors(pcidev, 1, 1, PCI_IRQ_ALL_TYPES);
613 if (rc < 0)
614 return rc;
615
616 memset(&uart, 0, sizeof(uart));
617 uart.port.flags = UPF_SHARE_IRQ | UPF_EXAR_EFR | UPF_FIXED_TYPE | UPF_FIXED_PORT;
618 uart.port.irq = pci_irq_vector(pcidev, 0);
619 uart.port.dev = &pcidev->dev;
620
621 rc = devm_request_irq(&pcidev->dev, uart.port.irq, exar_misc_handler,
622 IRQF_SHARED, "exar_uart", priv);
623 if (rc)
624 return rc;
625
626
627 exar_misc_clear(priv);
628
629 for (i = 0; i < nr_ports && i < maxnr; i++) {
630 rc = board->setup(priv, pcidev, &uart, i);
631 if (rc) {
632 dev_err(&pcidev->dev, "Failed to setup port %u\n", i);
633 break;
634 }
635
636 dev_dbg(&pcidev->dev, "Setup PCI port: port %lx, irq %d, type %d\n",
637 uart.port.iobase, uart.port.irq, uart.port.iotype);
638
639 priv->line[i] = serial8250_register_8250_port(&uart);
640 if (priv->line[i] < 0) {
641 dev_err(&pcidev->dev,
642 "Couldn't register serial port %lx, irq %d, type %d, error %d\n",
643 uart.port.iobase, uart.port.irq,
644 uart.port.iotype, priv->line[i]);
645 break;
646 }
647 }
648 priv->nr = i;
649 pci_set_drvdata(pcidev, priv);
650 return 0;
651}
652
653static void exar_pci_remove(struct pci_dev *pcidev)
654{
655 struct exar8250 *priv = pci_get_drvdata(pcidev);
656 unsigned int i;
657
658 for (i = 0; i < priv->nr; i++)
659 serial8250_unregister_port(priv->line[i]);
660
661 if (priv->board->exit)
662 priv->board->exit(pcidev);
663}
664
665static int __maybe_unused exar_suspend(struct device *dev)
666{
667 struct pci_dev *pcidev = to_pci_dev(dev);
668 struct exar8250 *priv = pci_get_drvdata(pcidev);
669 unsigned int i;
670
671 for (i = 0; i < priv->nr; i++)
672 if (priv->line[i] >= 0)
673 serial8250_suspend_port(priv->line[i]);
674
675
676 if (priv->board->exit)
677 priv->board->exit(pcidev);
678
679 return 0;
680}
681
682static int __maybe_unused exar_resume(struct device *dev)
683{
684 struct exar8250 *priv = dev_get_drvdata(dev);
685 unsigned int i;
686
687 exar_misc_clear(priv);
688
689 for (i = 0; i < priv->nr; i++)
690 if (priv->line[i] >= 0)
691 serial8250_resume_port(priv->line[i]);
692
693 return 0;
694}
695
696static SIMPLE_DEV_PM_OPS(exar_pci_pm, exar_suspend, exar_resume);
697
698static const struct exar8250_board acces_com_2x = {
699 .num_ports = 2,
700 .setup = pci_xr17c154_setup,
701};
702
703static const struct exar8250_board acces_com_4x = {
704 .num_ports = 4,
705 .setup = pci_xr17c154_setup,
706};
707
708static const struct exar8250_board acces_com_8x = {
709 .num_ports = 8,
710 .setup = pci_xr17c154_setup,
711};
712
713
714static const struct exar8250_board pbn_fastcom335_2 = {
715 .num_ports = 2,
716 .setup = pci_fastcom335_setup,
717};
718
719static const struct exar8250_board pbn_fastcom335_4 = {
720 .num_ports = 4,
721 .setup = pci_fastcom335_setup,
722};
723
724static const struct exar8250_board pbn_fastcom335_8 = {
725 .num_ports = 8,
726 .setup = pci_fastcom335_setup,
727};
728
729static const struct exar8250_board pbn_connect = {
730 .setup = pci_connect_tech_setup,
731};
732
733static const struct exar8250_board pbn_exar_ibm_saturn = {
734 .num_ports = 1,
735 .setup = pci_xr17c154_setup,
736};
737
738static const struct exar8250_board pbn_exar_XR17C15x = {
739 .setup = pci_xr17c154_setup,
740};
741
742static const struct exar8250_board pbn_exar_XR17V35x = {
743 .setup = pci_xr17v35x_setup,
744 .exit = pci_xr17v35x_exit,
745};
746
747static const struct exar8250_board pbn_fastcom35x_2 = {
748 .num_ports = 2,
749 .setup = pci_xr17v35x_setup,
750 .exit = pci_xr17v35x_exit,
751};
752
753static const struct exar8250_board pbn_fastcom35x_4 = {
754 .num_ports = 4,
755 .setup = pci_xr17v35x_setup,
756 .exit = pci_xr17v35x_exit,
757};
758
759static const struct exar8250_board pbn_fastcom35x_8 = {
760 .num_ports = 8,
761 .setup = pci_xr17v35x_setup,
762 .exit = pci_xr17v35x_exit,
763};
764
765static const struct exar8250_board pbn_exar_XR17V4358 = {
766 .num_ports = 12,
767 .setup = pci_xr17v35x_setup,
768 .exit = pci_xr17v35x_exit,
769};
770
771static const struct exar8250_board pbn_exar_XR17V8358 = {
772 .num_ports = 16,
773 .setup = pci_xr17v35x_setup,
774 .exit = pci_xr17v35x_exit,
775};
776
777#define CONNECT_DEVICE(devid, sdevid, bd) { \
778 PCI_DEVICE_SUB( \
779 PCI_VENDOR_ID_EXAR, \
780 PCI_DEVICE_ID_EXAR_##devid, \
781 PCI_SUBVENDOR_ID_CONNECT_TECH, \
782 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_##sdevid), 0, 0, \
783 (kernel_ulong_t)&bd \
784 }
785
786#define EXAR_DEVICE(vend, devid, bd) { PCI_DEVICE_DATA(vend, devid, &bd) }
787
788#define IBM_DEVICE(devid, sdevid, bd) { \
789 PCI_DEVICE_SUB( \
790 PCI_VENDOR_ID_EXAR, \
791 PCI_DEVICE_ID_EXAR_##devid, \
792 PCI_VENDOR_ID_IBM, \
793 PCI_SUBDEVICE_ID_IBM_##sdevid), 0, 0, \
794 (kernel_ulong_t)&bd \
795 }
796
797static const struct pci_device_id exar_pci_tbl[] = {
798 EXAR_DEVICE(ACCESSIO, COM_2S, acces_com_2x),
799 EXAR_DEVICE(ACCESSIO, COM_4S, acces_com_4x),
800 EXAR_DEVICE(ACCESSIO, COM_8S, acces_com_8x),
801 EXAR_DEVICE(ACCESSIO, COM232_8, acces_com_8x),
802 EXAR_DEVICE(ACCESSIO, COM_2SM, acces_com_2x),
803 EXAR_DEVICE(ACCESSIO, COM_4SM, acces_com_4x),
804 EXAR_DEVICE(ACCESSIO, COM_8SM, acces_com_8x),
805
806 CONNECT_DEVICE(XR17C152, UART_2_232, pbn_connect),
807 CONNECT_DEVICE(XR17C154, UART_4_232, pbn_connect),
808 CONNECT_DEVICE(XR17C158, UART_8_232, pbn_connect),
809 CONNECT_DEVICE(XR17C152, UART_1_1, pbn_connect),
810 CONNECT_DEVICE(XR17C154, UART_2_2, pbn_connect),
811 CONNECT_DEVICE(XR17C158, UART_4_4, pbn_connect),
812 CONNECT_DEVICE(XR17C152, UART_2, pbn_connect),
813 CONNECT_DEVICE(XR17C154, UART_4, pbn_connect),
814 CONNECT_DEVICE(XR17C158, UART_8, pbn_connect),
815 CONNECT_DEVICE(XR17C152, UART_2_485, pbn_connect),
816 CONNECT_DEVICE(XR17C154, UART_4_485, pbn_connect),
817 CONNECT_DEVICE(XR17C158, UART_8_485, pbn_connect),
818
819 IBM_DEVICE(XR17C152, SATURN_SERIAL_ONE_PORT, pbn_exar_ibm_saturn),
820
821
822 EXAR_DEVICE(EXAR, XR17C152, pbn_exar_XR17C15x),
823 EXAR_DEVICE(EXAR, XR17C154, pbn_exar_XR17C15x),
824 EXAR_DEVICE(EXAR, XR17C158, pbn_exar_XR17C15x),
825
826
827 EXAR_DEVICE(EXAR, XR17V352, pbn_exar_XR17V35x),
828 EXAR_DEVICE(EXAR, XR17V354, pbn_exar_XR17V35x),
829 EXAR_DEVICE(EXAR, XR17V358, pbn_exar_XR17V35x),
830 EXAR_DEVICE(EXAR, XR17V4358, pbn_exar_XR17V4358),
831 EXAR_DEVICE(EXAR, XR17V8358, pbn_exar_XR17V8358),
832 EXAR_DEVICE(COMMTECH, 4222PCIE, pbn_fastcom35x_2),
833 EXAR_DEVICE(COMMTECH, 4224PCIE, pbn_fastcom35x_4),
834 EXAR_DEVICE(COMMTECH, 4228PCIE, pbn_fastcom35x_8),
835
836 EXAR_DEVICE(COMMTECH, 4222PCI335, pbn_fastcom335_2),
837 EXAR_DEVICE(COMMTECH, 4224PCI335, pbn_fastcom335_4),
838 EXAR_DEVICE(COMMTECH, 2324PCI335, pbn_fastcom335_4),
839 EXAR_DEVICE(COMMTECH, 2328PCI335, pbn_fastcom335_8),
840 { 0, }
841};
842MODULE_DEVICE_TABLE(pci, exar_pci_tbl);
843
844static struct pci_driver exar_pci_driver = {
845 .name = "exar_serial",
846 .probe = exar_pci_probe,
847 .remove = exar_pci_remove,
848 .driver = {
849 .pm = &exar_pci_pm,
850 },
851 .id_table = exar_pci_tbl,
852};
853module_pci_driver(exar_pci_driver);
854
855MODULE_LICENSE("GPL");
856MODULE_DESCRIPTION("Exar Serial Driver");
857MODULE_AUTHOR("Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>");
858