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41#include <linux/clk.h>
42#include <linux/console.h>
43#include <linux/delay.h>
44#include <linux/init.h>
45#include <linux/io.h>
46#include <linux/irq.h>
47#include <linux/module.h>
48#include <linux/of.h>
49#include <linux/of_irq.h>
50#include <linux/platform_device.h>
51#include <linux/serial_core.h>
52#include <linux/serial_reg.h>
53#include <linux/slab.h>
54#include <linux/tty.h>
55#include <linux/tty_flip.h>
56
57
58
59
60
61
62#define SIFIVE_SERIAL_TXDATA_OFFS 0x0
63#define SIFIVE_SERIAL_TXDATA_FULL_SHIFT 31
64#define SIFIVE_SERIAL_TXDATA_FULL_MASK (1 << SIFIVE_SERIAL_TXDATA_FULL_SHIFT)
65#define SIFIVE_SERIAL_TXDATA_DATA_SHIFT 0
66#define SIFIVE_SERIAL_TXDATA_DATA_MASK (0xff << SIFIVE_SERIAL_TXDATA_DATA_SHIFT)
67
68
69#define SIFIVE_SERIAL_RXDATA_OFFS 0x4
70#define SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT 31
71#define SIFIVE_SERIAL_RXDATA_EMPTY_MASK (1 << SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT)
72#define SIFIVE_SERIAL_RXDATA_DATA_SHIFT 0
73#define SIFIVE_SERIAL_RXDATA_DATA_MASK (0xff << SIFIVE_SERIAL_RXDATA_DATA_SHIFT)
74
75
76#define SIFIVE_SERIAL_TXCTRL_OFFS 0x8
77#define SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT 16
78#define SIFIVE_SERIAL_TXCTRL_TXCNT_MASK (0x7 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT)
79#define SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT 1
80#define SIFIVE_SERIAL_TXCTRL_NSTOP_MASK (1 << SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT)
81#define SIFIVE_SERIAL_TXCTRL_TXEN_SHIFT 0
82#define SIFIVE_SERIAL_TXCTRL_TXEN_MASK (1 << SIFIVE_SERIAL_TXCTRL_TXEN_SHIFT)
83
84
85#define SIFIVE_SERIAL_RXCTRL_OFFS 0xC
86#define SIFIVE_SERIAL_RXCTRL_RXCNT_SHIFT 16
87#define SIFIVE_SERIAL_RXCTRL_RXCNT_MASK (0x7 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT)
88#define SIFIVE_SERIAL_RXCTRL_RXEN_SHIFT 0
89#define SIFIVE_SERIAL_RXCTRL_RXEN_MASK (1 << SIFIVE_SERIAL_RXCTRL_RXEN_SHIFT)
90
91
92#define SIFIVE_SERIAL_IE_OFFS 0x10
93#define SIFIVE_SERIAL_IE_RXWM_SHIFT 1
94#define SIFIVE_SERIAL_IE_RXWM_MASK (1 << SIFIVE_SERIAL_IE_RXWM_SHIFT)
95#define SIFIVE_SERIAL_IE_TXWM_SHIFT 0
96#define SIFIVE_SERIAL_IE_TXWM_MASK (1 << SIFIVE_SERIAL_IE_TXWM_SHIFT)
97
98
99#define SIFIVE_SERIAL_IP_OFFS 0x14
100#define SIFIVE_SERIAL_IP_RXWM_SHIFT 1
101#define SIFIVE_SERIAL_IP_RXWM_MASK (1 << SIFIVE_SERIAL_IP_RXWM_SHIFT)
102#define SIFIVE_SERIAL_IP_TXWM_SHIFT 0
103#define SIFIVE_SERIAL_IP_TXWM_MASK (1 << SIFIVE_SERIAL_IP_TXWM_SHIFT)
104
105
106#define SIFIVE_SERIAL_DIV_OFFS 0x18
107#define SIFIVE_SERIAL_DIV_DIV_SHIFT 0
108#define SIFIVE_SERIAL_DIV_DIV_MASK (0xffff << SIFIVE_SERIAL_IP_DIV_SHIFT)
109
110
111
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114
115
116
117
118#define SIFIVE_SERIAL_MAX_PORTS 8
119
120
121
122
123
124#define SIFIVE_DEFAULT_BAUD_RATE 115200
125
126
127#define SIFIVE_SERIAL_NAME "sifive-serial"
128
129
130#define SIFIVE_TTY_PREFIX "ttySIF"
131
132
133#define SIFIVE_TX_FIFO_DEPTH 8
134
135
136#define SIFIVE_RX_FIFO_DEPTH 8
137
138#if (SIFIVE_TX_FIFO_DEPTH != SIFIVE_RX_FIFO_DEPTH)
139#error Driver does not support configurations with different TX, RX FIFO sizes
140#endif
141
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157
158struct sifive_serial_port {
159 struct uart_port port;
160 struct device *dev;
161 unsigned char ier;
162 unsigned long clkin_rate;
163 unsigned long baud_rate;
164 struct clk *clk;
165 struct notifier_block clk_notifier;
166};
167
168
169
170
171
172#define port_to_sifive_serial_port(p) (container_of((p), \
173 struct sifive_serial_port, \
174 port))
175
176#define notifier_to_sifive_serial_port(nb) (container_of((nb), \
177 struct sifive_serial_port, \
178 clk_notifier))
179
180
181
182
183static void sifive_serial_stop_tx(struct uart_port *port);
184
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200
201static void __ssp_early_writel(u32 v, u16 offs, struct uart_port *port)
202{
203 writel_relaxed(v, port->membase + offs);
204}
205
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220
221static u32 __ssp_early_readl(struct uart_port *port, u16 offs)
222{
223 return readl_relaxed(port->membase + offs);
224}
225
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235
236
237static void __ssp_writel(u32 v, u16 offs, struct sifive_serial_port *ssp)
238{
239 __ssp_early_writel(v, offs, &ssp->port);
240}
241
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253
254static u32 __ssp_readl(struct sifive_serial_port *ssp, u16 offs)
255{
256 return __ssp_early_readl(&ssp->port, offs);
257}
258
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269
270static int sifive_serial_is_txfifo_full(struct sifive_serial_port *ssp)
271{
272 return __ssp_readl(ssp, SIFIVE_SERIAL_TXDATA_OFFS) &
273 SIFIVE_SERIAL_TXDATA_FULL_MASK;
274}
275
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285
286
287static void __ssp_transmit_char(struct sifive_serial_port *ssp, int ch)
288{
289 __ssp_writel(ch, SIFIVE_SERIAL_TXDATA_OFFS, ssp);
290}
291
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298
299
300
301static void __ssp_transmit_chars(struct sifive_serial_port *ssp)
302{
303 struct circ_buf *xmit = &ssp->port.state->xmit;
304 int count;
305
306 if (ssp->port.x_char) {
307 __ssp_transmit_char(ssp, ssp->port.x_char);
308 ssp->port.icount.tx++;
309 ssp->port.x_char = 0;
310 return;
311 }
312 if (uart_circ_empty(xmit) || uart_tx_stopped(&ssp->port)) {
313 sifive_serial_stop_tx(&ssp->port);
314 return;
315 }
316 count = SIFIVE_TX_FIFO_DEPTH;
317 do {
318 __ssp_transmit_char(ssp, xmit->buf[xmit->tail]);
319 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
320 ssp->port.icount.tx++;
321 if (uart_circ_empty(xmit))
322 break;
323 } while (--count > 0);
324
325 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
326 uart_write_wakeup(&ssp->port);
327
328 if (uart_circ_empty(xmit))
329 sifive_serial_stop_tx(&ssp->port);
330}
331
332
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336
337
338
339static void __ssp_enable_txwm(struct sifive_serial_port *ssp)
340{
341 if (ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK)
342 return;
343
344 ssp->ier |= SIFIVE_SERIAL_IE_TXWM_MASK;
345 __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
346}
347
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353
354
355static void __ssp_enable_rxwm(struct sifive_serial_port *ssp)
356{
357 if (ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK)
358 return;
359
360 ssp->ier |= SIFIVE_SERIAL_IE_RXWM_MASK;
361 __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
362}
363
364
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367
368
369
370
371static void __ssp_disable_txwm(struct sifive_serial_port *ssp)
372{
373 if (!(ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK))
374 return;
375
376 ssp->ier &= ~SIFIVE_SERIAL_IE_TXWM_MASK;
377 __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
378}
379
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385
386
387static void __ssp_disable_rxwm(struct sifive_serial_port *ssp)
388{
389 if (!(ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK))
390 return;
391
392 ssp->ier &= ~SIFIVE_SERIAL_IE_RXWM_MASK;
393 __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
394}
395
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407
408static char __ssp_receive_char(struct sifive_serial_port *ssp, char *is_empty)
409{
410 u32 v;
411 u8 ch;
412
413 v = __ssp_readl(ssp, SIFIVE_SERIAL_RXDATA_OFFS);
414
415 if (!is_empty)
416 WARN_ON(1);
417 else
418 *is_empty = (v & SIFIVE_SERIAL_RXDATA_EMPTY_MASK) >>
419 SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT;
420
421 ch = (v & SIFIVE_SERIAL_RXDATA_DATA_MASK) >>
422 SIFIVE_SERIAL_RXDATA_DATA_SHIFT;
423
424 return ch;
425}
426
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434
435
436static void __ssp_receive_chars(struct sifive_serial_port *ssp)
437{
438 unsigned char ch;
439 char is_empty;
440 int c;
441
442 for (c = SIFIVE_RX_FIFO_DEPTH; c > 0; --c) {
443 ch = __ssp_receive_char(ssp, &is_empty);
444 if (is_empty)
445 break;
446
447 ssp->port.icount.rx++;
448 uart_insert_char(&ssp->port, 0, 0, ch, TTY_NORMAL);
449 }
450
451 spin_unlock(&ssp->port.lock);
452 tty_flip_buffer_push(&ssp->port.state->port);
453 spin_lock(&ssp->port.lock);
454}
455
456
457
458
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460
461
462
463
464static void __ssp_update_div(struct sifive_serial_port *ssp)
465{
466 u16 div;
467
468 div = DIV_ROUND_UP(ssp->clkin_rate, ssp->baud_rate) - 1;
469
470 __ssp_writel(div, SIFIVE_SERIAL_DIV_OFFS, ssp);
471}
472
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481
482
483static void __ssp_update_baud_rate(struct sifive_serial_port *ssp,
484 unsigned int rate)
485{
486 if (ssp->baud_rate == rate)
487 return;
488
489 ssp->baud_rate = rate;
490 __ssp_update_div(ssp);
491}
492
493
494
495
496
497
498
499
500static void __ssp_set_stop_bits(struct sifive_serial_port *ssp, char nstop)
501{
502 u32 v;
503
504 if (nstop < 1 || nstop > 2) {
505 WARN_ON(1);
506 return;
507 }
508
509 v = __ssp_readl(ssp, SIFIVE_SERIAL_TXCTRL_OFFS);
510 v &= ~SIFIVE_SERIAL_TXCTRL_NSTOP_MASK;
511 v |= (nstop - 1) << SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT;
512 __ssp_writel(v, SIFIVE_SERIAL_TXCTRL_OFFS, ssp);
513}
514
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520
521
522
523static void __maybe_unused __ssp_wait_for_xmitr(struct sifive_serial_port *ssp)
524{
525 while (sifive_serial_is_txfifo_full(ssp))
526 udelay(1);
527}
528
529
530
531
532
533static void sifive_serial_stop_tx(struct uart_port *port)
534{
535 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
536
537 __ssp_disable_txwm(ssp);
538}
539
540static void sifive_serial_stop_rx(struct uart_port *port)
541{
542 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
543
544 __ssp_disable_rxwm(ssp);
545}
546
547static void sifive_serial_start_tx(struct uart_port *port)
548{
549 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
550
551 __ssp_enable_txwm(ssp);
552}
553
554static irqreturn_t sifive_serial_irq(int irq, void *dev_id)
555{
556 struct sifive_serial_port *ssp = dev_id;
557 u32 ip;
558
559 spin_lock(&ssp->port.lock);
560
561 ip = __ssp_readl(ssp, SIFIVE_SERIAL_IP_OFFS);
562 if (!ip) {
563 spin_unlock(&ssp->port.lock);
564 return IRQ_NONE;
565 }
566
567 if (ip & SIFIVE_SERIAL_IP_RXWM_MASK)
568 __ssp_receive_chars(ssp);
569 if (ip & SIFIVE_SERIAL_IP_TXWM_MASK)
570 __ssp_transmit_chars(ssp);
571
572 spin_unlock(&ssp->port.lock);
573
574 return IRQ_HANDLED;
575}
576
577static unsigned int sifive_serial_tx_empty(struct uart_port *port)
578{
579 return TIOCSER_TEMT;
580}
581
582static unsigned int sifive_serial_get_mctrl(struct uart_port *port)
583{
584 return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
585}
586
587static void sifive_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
588{
589
590}
591
592static void sifive_serial_break_ctl(struct uart_port *port, int break_state)
593{
594
595}
596
597static int sifive_serial_startup(struct uart_port *port)
598{
599 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
600
601 __ssp_enable_rxwm(ssp);
602
603 return 0;
604}
605
606static void sifive_serial_shutdown(struct uart_port *port)
607{
608 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
609
610 __ssp_disable_rxwm(ssp);
611 __ssp_disable_txwm(ssp);
612}
613
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619
620
621
622
623
624
625
626
627static int sifive_serial_clk_notifier(struct notifier_block *nb,
628 unsigned long event, void *data)
629{
630 struct clk_notifier_data *cnd = data;
631 struct sifive_serial_port *ssp = notifier_to_sifive_serial_port(nb);
632
633 if (event == PRE_RATE_CHANGE) {
634
635
636
637
638
639
640 __ssp_wait_for_xmitr(ssp);
641
642
643
644
645
646
647
648
649
650 udelay(DIV_ROUND_UP(12 * 1000 * 1000, ssp->baud_rate));
651 }
652
653 if (event == POST_RATE_CHANGE && ssp->clkin_rate != cnd->new_rate) {
654 ssp->clkin_rate = cnd->new_rate;
655 __ssp_update_div(ssp);
656 }
657
658 return NOTIFY_OK;
659}
660
661static void sifive_serial_set_termios(struct uart_port *port,
662 struct ktermios *termios,
663 struct ktermios *old)
664{
665 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
666 unsigned long flags;
667 u32 v, old_v;
668 int rate;
669 char nstop;
670
671 if ((termios->c_cflag & CSIZE) != CS8)
672 dev_err_once(ssp->port.dev, "only 8-bit words supported\n");
673 if (termios->c_iflag & (INPCK | PARMRK))
674 dev_err_once(ssp->port.dev, "parity checking not supported\n");
675 if (termios->c_iflag & BRKINT)
676 dev_err_once(ssp->port.dev, "BREAK detection not supported\n");
677
678
679 nstop = (termios->c_cflag & CSTOPB) ? 2 : 1;
680 __ssp_set_stop_bits(ssp, nstop);
681
682
683 rate = uart_get_baud_rate(port, termios, old, 0, ssp->clkin_rate / 16);
684 __ssp_update_baud_rate(ssp, rate);
685
686 spin_lock_irqsave(&ssp->port.lock, flags);
687
688
689 uart_update_timeout(port, termios->c_cflag, rate);
690
691 ssp->port.read_status_mask = 0;
692
693
694 v = __ssp_readl(ssp, SIFIVE_SERIAL_RXCTRL_OFFS);
695 old_v = v;
696 if ((termios->c_cflag & CREAD) == 0)
697 v &= SIFIVE_SERIAL_RXCTRL_RXEN_MASK;
698 else
699 v |= SIFIVE_SERIAL_RXCTRL_RXEN_MASK;
700 if (v != old_v)
701 __ssp_writel(v, SIFIVE_SERIAL_RXCTRL_OFFS, ssp);
702
703 spin_unlock_irqrestore(&ssp->port.lock, flags);
704}
705
706static void sifive_serial_release_port(struct uart_port *port)
707{
708}
709
710static int sifive_serial_request_port(struct uart_port *port)
711{
712 return 0;
713}
714
715static void sifive_serial_config_port(struct uart_port *port, int flags)
716{
717 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
718
719 ssp->port.type = PORT_SIFIVE_V0;
720}
721
722static int sifive_serial_verify_port(struct uart_port *port,
723 struct serial_struct *ser)
724{
725 return -EINVAL;
726}
727
728static const char *sifive_serial_type(struct uart_port *port)
729{
730 return port->type == PORT_SIFIVE_V0 ? "SiFive UART v0" : NULL;
731}
732
733#ifdef CONFIG_CONSOLE_POLL
734static int sifive_serial_poll_get_char(struct uart_port *port)
735{
736 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
737 char is_empty, ch;
738
739 ch = __ssp_receive_char(ssp, &is_empty);
740 if (is_empty)
741 return NO_POLL_CHAR;
742
743 return ch;
744}
745
746static void sifive_serial_poll_put_char(struct uart_port *port,
747 unsigned char c)
748{
749 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
750
751 __ssp_wait_for_xmitr(ssp);
752 __ssp_transmit_char(ssp, c);
753}
754#endif
755
756
757
758
759
760#ifdef CONFIG_SERIAL_EARLYCON
761static void early_sifive_serial_putc(struct uart_port *port, int c)
762{
763 while (__ssp_early_readl(port, SIFIVE_SERIAL_TXDATA_OFFS) &
764 SIFIVE_SERIAL_TXDATA_FULL_MASK)
765 cpu_relax();
766
767 __ssp_early_writel(c, SIFIVE_SERIAL_TXDATA_OFFS, port);
768}
769
770static void early_sifive_serial_write(struct console *con, const char *s,
771 unsigned int n)
772{
773 struct earlycon_device *dev = con->data;
774 struct uart_port *port = &dev->port;
775
776 uart_console_write(port, s, n, early_sifive_serial_putc);
777}
778
779static int __init early_sifive_serial_setup(struct earlycon_device *dev,
780 const char *options)
781{
782 struct uart_port *port = &dev->port;
783
784 if (!port->membase)
785 return -ENODEV;
786
787 dev->con->write = early_sifive_serial_write;
788
789 return 0;
790}
791
792OF_EARLYCON_DECLARE(sifive, "sifive,uart0", early_sifive_serial_setup);
793OF_EARLYCON_DECLARE(sifive, "sifive,fu540-c000-uart0",
794 early_sifive_serial_setup);
795#endif
796
797
798
799
800
801#ifdef CONFIG_SERIAL_SIFIVE_CONSOLE
802
803static struct sifive_serial_port *sifive_serial_console_ports[SIFIVE_SERIAL_MAX_PORTS];
804
805static void sifive_serial_console_putchar(struct uart_port *port, int ch)
806{
807 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
808
809 __ssp_wait_for_xmitr(ssp);
810 __ssp_transmit_char(ssp, ch);
811}
812
813static void sifive_serial_console_write(struct console *co, const char *s,
814 unsigned int count)
815{
816 struct sifive_serial_port *ssp = sifive_serial_console_ports[co->index];
817 unsigned long flags;
818 unsigned int ier;
819 int locked = 1;
820
821 if (!ssp)
822 return;
823
824 local_irq_save(flags);
825 if (ssp->port.sysrq)
826 locked = 0;
827 else if (oops_in_progress)
828 locked = spin_trylock(&ssp->port.lock);
829 else
830 spin_lock(&ssp->port.lock);
831
832 ier = __ssp_readl(ssp, SIFIVE_SERIAL_IE_OFFS);
833 __ssp_writel(0, SIFIVE_SERIAL_IE_OFFS, ssp);
834
835 uart_console_write(&ssp->port, s, count, sifive_serial_console_putchar);
836
837 __ssp_writel(ier, SIFIVE_SERIAL_IE_OFFS, ssp);
838
839 if (locked)
840 spin_unlock(&ssp->port.lock);
841 local_irq_restore(flags);
842}
843
844static int __init sifive_serial_console_setup(struct console *co, char *options)
845{
846 struct sifive_serial_port *ssp;
847 int baud = SIFIVE_DEFAULT_BAUD_RATE;
848 int bits = 8;
849 int parity = 'n';
850 int flow = 'n';
851
852 if (co->index < 0 || co->index >= SIFIVE_SERIAL_MAX_PORTS)
853 return -ENODEV;
854
855 ssp = sifive_serial_console_ports[co->index];
856 if (!ssp)
857 return -ENODEV;
858
859 if (options)
860 uart_parse_options(options, &baud, &parity, &bits, &flow);
861
862 return uart_set_options(&ssp->port, co, baud, parity, bits, flow);
863}
864
865static struct uart_driver sifive_serial_uart_driver;
866
867static struct console sifive_serial_console = {
868 .name = SIFIVE_TTY_PREFIX,
869 .write = sifive_serial_console_write,
870 .device = uart_console_device,
871 .setup = sifive_serial_console_setup,
872 .flags = CON_PRINTBUFFER,
873 .index = -1,
874 .data = &sifive_serial_uart_driver,
875};
876
877static int __init sifive_console_init(void)
878{
879 register_console(&sifive_serial_console);
880 return 0;
881}
882
883console_initcall(sifive_console_init);
884
885static void __ssp_add_console_port(struct sifive_serial_port *ssp)
886{
887 sifive_serial_console_ports[ssp->port.line] = ssp;
888}
889
890static void __ssp_remove_console_port(struct sifive_serial_port *ssp)
891{
892 sifive_serial_console_ports[ssp->port.line] = 0;
893}
894
895#define SIFIVE_SERIAL_CONSOLE (&sifive_serial_console)
896
897#else
898
899#define SIFIVE_SERIAL_CONSOLE NULL
900
901static void __ssp_add_console_port(struct sifive_serial_port *ssp)
902{}
903static void __ssp_remove_console_port(struct sifive_serial_port *ssp)
904{}
905
906#endif
907
908static const struct uart_ops sifive_serial_uops = {
909 .tx_empty = sifive_serial_tx_empty,
910 .set_mctrl = sifive_serial_set_mctrl,
911 .get_mctrl = sifive_serial_get_mctrl,
912 .stop_tx = sifive_serial_stop_tx,
913 .start_tx = sifive_serial_start_tx,
914 .stop_rx = sifive_serial_stop_rx,
915 .break_ctl = sifive_serial_break_ctl,
916 .startup = sifive_serial_startup,
917 .shutdown = sifive_serial_shutdown,
918 .set_termios = sifive_serial_set_termios,
919 .type = sifive_serial_type,
920 .release_port = sifive_serial_release_port,
921 .request_port = sifive_serial_request_port,
922 .config_port = sifive_serial_config_port,
923 .verify_port = sifive_serial_verify_port,
924#ifdef CONFIG_CONSOLE_POLL
925 .poll_get_char = sifive_serial_poll_get_char,
926 .poll_put_char = sifive_serial_poll_put_char,
927#endif
928};
929
930static struct uart_driver sifive_serial_uart_driver = {
931 .owner = THIS_MODULE,
932 .driver_name = SIFIVE_SERIAL_NAME,
933 .dev_name = SIFIVE_TTY_PREFIX,
934 .nr = SIFIVE_SERIAL_MAX_PORTS,
935 .cons = SIFIVE_SERIAL_CONSOLE,
936};
937
938static int sifive_serial_probe(struct platform_device *pdev)
939{
940 struct sifive_serial_port *ssp;
941 struct resource *mem;
942 struct clk *clk;
943 void __iomem *base;
944 int irq, id, r;
945
946 irq = platform_get_irq(pdev, 0);
947 if (irq < 0)
948 return -EPROBE_DEFER;
949
950 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
951 base = devm_ioremap_resource(&pdev->dev, mem);
952 if (IS_ERR(base)) {
953 dev_err(&pdev->dev, "could not acquire device memory\n");
954 return PTR_ERR(base);
955 }
956
957 clk = devm_clk_get(&pdev->dev, NULL);
958 if (IS_ERR(clk)) {
959 dev_err(&pdev->dev, "unable to find controller clock\n");
960 return PTR_ERR(clk);
961 }
962
963 id = of_alias_get_id(pdev->dev.of_node, "serial");
964 if (id < 0) {
965 dev_err(&pdev->dev, "missing aliases entry\n");
966 return id;
967 }
968
969#ifdef CONFIG_SERIAL_SIFIVE_CONSOLE
970 if (id > SIFIVE_SERIAL_MAX_PORTS) {
971 dev_err(&pdev->dev, "too many UARTs (%d)\n", id);
972 return -EINVAL;
973 }
974#endif
975
976 ssp = devm_kzalloc(&pdev->dev, sizeof(*ssp), GFP_KERNEL);
977 if (!ssp)
978 return -ENOMEM;
979
980 ssp->port.dev = &pdev->dev;
981 ssp->port.type = PORT_SIFIVE_V0;
982 ssp->port.iotype = UPIO_MEM;
983 ssp->port.irq = irq;
984 ssp->port.fifosize = SIFIVE_TX_FIFO_DEPTH;
985 ssp->port.ops = &sifive_serial_uops;
986 ssp->port.line = id;
987 ssp->port.mapbase = mem->start;
988 ssp->port.membase = base;
989 ssp->dev = &pdev->dev;
990 ssp->clk = clk;
991 ssp->clk_notifier.notifier_call = sifive_serial_clk_notifier;
992
993 r = clk_notifier_register(ssp->clk, &ssp->clk_notifier);
994 if (r) {
995 dev_err(&pdev->dev, "could not register clock notifier: %d\n",
996 r);
997 goto probe_out1;
998 }
999
1000
1001 ssp->clkin_rate = clk_get_rate(ssp->clk);
1002 ssp->baud_rate = SIFIVE_DEFAULT_BAUD_RATE;
1003 ssp->port.uartclk = ssp->baud_rate * 16;
1004 __ssp_update_div(ssp);
1005
1006 platform_set_drvdata(pdev, ssp);
1007
1008
1009 __ssp_writel((1 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT) |
1010 SIFIVE_SERIAL_TXCTRL_TXEN_MASK,
1011 SIFIVE_SERIAL_TXCTRL_OFFS, ssp);
1012
1013
1014 __ssp_writel((0 << SIFIVE_SERIAL_RXCTRL_RXCNT_SHIFT) |
1015 SIFIVE_SERIAL_RXCTRL_RXEN_MASK,
1016 SIFIVE_SERIAL_RXCTRL_OFFS, ssp);
1017
1018 r = request_irq(ssp->port.irq, sifive_serial_irq, ssp->port.irqflags,
1019 dev_name(&pdev->dev), ssp);
1020 if (r) {
1021 dev_err(&pdev->dev, "could not attach interrupt: %d\n", r);
1022 goto probe_out2;
1023 }
1024
1025 __ssp_add_console_port(ssp);
1026
1027 r = uart_add_one_port(&sifive_serial_uart_driver, &ssp->port);
1028 if (r != 0) {
1029 dev_err(&pdev->dev, "could not add uart: %d\n", r);
1030 goto probe_out3;
1031 }
1032
1033 return 0;
1034
1035probe_out3:
1036 __ssp_remove_console_port(ssp);
1037 free_irq(ssp->port.irq, ssp);
1038probe_out2:
1039 clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
1040probe_out1:
1041 return r;
1042}
1043
1044static int sifive_serial_remove(struct platform_device *dev)
1045{
1046 struct sifive_serial_port *ssp = platform_get_drvdata(dev);
1047
1048 __ssp_remove_console_port(ssp);
1049 uart_remove_one_port(&sifive_serial_uart_driver, &ssp->port);
1050 free_irq(ssp->port.irq, ssp);
1051 clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
1052
1053 return 0;
1054}
1055
1056static const struct of_device_id sifive_serial_of_match[] = {
1057 { .compatible = "sifive,fu540-c000-uart0" },
1058 { .compatible = "sifive,uart0" },
1059 {},
1060};
1061MODULE_DEVICE_TABLE(of, sifive_serial_of_match);
1062
1063static struct platform_driver sifive_serial_platform_driver = {
1064 .probe = sifive_serial_probe,
1065 .remove = sifive_serial_remove,
1066 .driver = {
1067 .name = SIFIVE_SERIAL_NAME,
1068 .of_match_table = of_match_ptr(sifive_serial_of_match),
1069 },
1070};
1071
1072static int __init sifive_serial_init(void)
1073{
1074 int r;
1075
1076 r = uart_register_driver(&sifive_serial_uart_driver);
1077 if (r)
1078 goto init_out1;
1079
1080 r = platform_driver_register(&sifive_serial_platform_driver);
1081 if (r)
1082 goto init_out2;
1083
1084 return 0;
1085
1086init_out2:
1087 uart_unregister_driver(&sifive_serial_uart_driver);
1088init_out1:
1089 return r;
1090}
1091
1092static void __exit sifive_serial_exit(void)
1093{
1094 platform_driver_unregister(&sifive_serial_platform_driver);
1095 uart_unregister_driver(&sifive_serial_uart_driver);
1096}
1097
1098module_init(sifive_serial_init);
1099module_exit(sifive_serial_exit);
1100
1101MODULE_DESCRIPTION("SiFive UART serial driver");
1102MODULE_LICENSE("GPL");
1103MODULE_AUTHOR("Paul Walmsley <paul@pwsan.com>");
1104