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9#ifndef _XHCI_MTK_H_
10#define _XHCI_MTK_H_
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12#include "xhci.h"
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20#define XHCI_MTK_MAX_ESIT 64
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28struct mu3h_sch_tt {
29 DECLARE_BITMAP(split_bit_map, XHCI_MTK_MAX_ESIT);
30 struct list_head ep_list;
31 struct usb_tt *usb_tt;
32 int tt_port;
33};
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44struct mu3h_sch_bw_info {
45 u32 bus_bw[XHCI_MTK_MAX_ESIT];
46 struct list_head bw_ep_list;
47};
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80struct mu3h_sch_ep_info {
81 u32 esit;
82 u32 num_budget_microframes;
83 u32 bw_cost_per_microframe;
84 struct list_head endpoint;
85 struct list_head tt_endpoint;
86 struct mu3h_sch_tt *sch_tt;
87 u32 ep_type;
88 u32 maxpkt;
89 void *ep;
90 bool allocated;
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95 u32 offset;
96 u32 repeat;
97 u32 pkts;
98 u32 cs_count;
99 u32 burst_mode;
100 u32 bw_budget_table[];
101};
102
103#define MU3C_U3_PORT_MAX 4
104#define MU3C_U2_PORT_MAX 5
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115struct mu3c_ippc_regs {
116 __le32 ip_pw_ctr0;
117 __le32 ip_pw_ctr1;
118 __le32 ip_pw_ctr2;
119 __le32 ip_pw_ctr3;
120 __le32 ip_pw_sts1;
121 __le32 ip_pw_sts2;
122 __le32 reserved0[3];
123 __le32 ip_xhci_cap;
124 __le32 reserved1[2];
125 __le64 u3_ctrl_p[MU3C_U3_PORT_MAX];
126 __le64 u2_ctrl_p[MU3C_U2_PORT_MAX];
127 __le32 reserved2;
128 __le32 u2_phy_pll;
129 __le32 reserved3[33];
130};
131
132struct xhci_hcd_mtk {
133 struct device *dev;
134 struct usb_hcd *hcd;
135 struct mu3h_sch_bw_info *sch_array;
136 struct list_head bw_ep_chk_list;
137 struct mu3c_ippc_regs __iomem *ippc_regs;
138 bool has_ippc;
139 int num_u2_ports;
140 int num_u3_ports;
141 int u3p_dis_msk;
142 struct regulator *vusb33;
143 struct regulator *vbus;
144 struct clk *sys_clk;
145 struct clk *xhci_clk;
146 struct clk *ref_clk;
147 struct clk *mcu_clk;
148 struct clk *dma_clk;
149 struct regmap *pericfg;
150 struct phy **phys;
151 int num_phys;
152 bool lpm_support;
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154 bool uwk_en;
155 struct regmap *uwk;
156 u32 uwk_reg_base;
157 u32 uwk_vers;
158};
159
160static inline struct xhci_hcd_mtk *hcd_to_mtk(struct usb_hcd *hcd)
161{
162 return dev_get_drvdata(hcd->self.controller);
163}
164
165#if IS_ENABLED(CONFIG_USB_XHCI_MTK)
166int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk);
167void xhci_mtk_sch_exit(struct xhci_hcd_mtk *mtk);
168int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
169 struct usb_host_endpoint *ep);
170void xhci_mtk_drop_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
171 struct usb_host_endpoint *ep);
172int xhci_mtk_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev);
173void xhci_mtk_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev);
174
175#else
176static inline int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd,
177 struct usb_device *udev, struct usb_host_endpoint *ep)
178{
179 return 0;
180}
181
182static inline void xhci_mtk_drop_ep_quirk(struct usb_hcd *hcd,
183 struct usb_device *udev, struct usb_host_endpoint *ep)
184{
185}
186
187static inline int xhci_mtk_check_bandwidth(struct usb_hcd *hcd,
188 struct usb_device *udev)
189{
190 return 0;
191}
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193static inline void xhci_mtk_reset_bandwidth(struct usb_hcd *hcd,
194 struct usb_device *udev)
195{
196}
197#endif
198
199#endif
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