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7#ifndef __ASM_ARM_KVM_PMU_H
8#define __ASM_ARM_KVM_PMU_H
9
10#include <linux/perf_event.h>
11#include <asm/perf_event.h>
12
13#define ARMV8_PMU_CYCLE_IDX (ARMV8_PMU_MAX_COUNTERS - 1)
14#define ARMV8_PMU_MAX_COUNTER_PAIRS ((ARMV8_PMU_MAX_COUNTERS + 1) >> 1)
15
16#ifdef CONFIG_HW_PERF_EVENTS
17
18struct kvm_pmc {
19 u8 idx;
20 struct perf_event *perf_event;
21};
22
23struct kvm_pmu {
24 int irq_num;
25 struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS];
26 DECLARE_BITMAP(chained, ARMV8_PMU_MAX_COUNTER_PAIRS);
27 bool created;
28 bool irq_level;
29 struct irq_work overflow_work;
30};
31
32#define kvm_arm_pmu_irq_initialized(v) ((v)->arch.pmu.irq_num >= VGIC_NR_SGIS)
33u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx);
34void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val);
35u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu);
36u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1);
37void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu);
38void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu);
39void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu);
40void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val);
41void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val);
42void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu);
43void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu);
44bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu);
45void kvm_pmu_update_run(struct kvm_vcpu *vcpu);
46void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val);
47void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val);
48void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data,
49 u64 select_idx);
50bool kvm_arm_support_pmu_v3(void);
51int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu,
52 struct kvm_device_attr *attr);
53int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu,
54 struct kvm_device_attr *attr);
55int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu,
56 struct kvm_device_attr *attr);
57int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu);
58#else
59struct kvm_pmu {
60};
61
62#define kvm_arm_pmu_irq_initialized(v) (false)
63static inline u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu,
64 u64 select_idx)
65{
66 return 0;
67}
68static inline void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu,
69 u64 select_idx, u64 val) {}
70static inline u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu)
71{
72 return 0;
73}
74static inline void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu) {}
75static inline void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu) {}
76static inline void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) {}
77static inline void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val) {}
78static inline void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val) {}
79static inline void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {}
80static inline void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {}
81static inline bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu)
82{
83 return false;
84}
85static inline void kvm_pmu_update_run(struct kvm_vcpu *vcpu) {}
86static inline void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) {}
87static inline void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) {}
88static inline void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu,
89 u64 data, u64 select_idx) {}
90static inline bool kvm_arm_support_pmu_v3(void) { return false; }
91static inline int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu,
92 struct kvm_device_attr *attr)
93{
94 return -ENXIO;
95}
96static inline int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu,
97 struct kvm_device_attr *attr)
98{
99 return -ENXIO;
100}
101static inline int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu,
102 struct kvm_device_attr *attr)
103{
104 return -ENXIO;
105}
106static inline int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu)
107{
108 return 0;
109}
110static inline u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1)
111{
112 return 0;
113}
114#endif
115
116#endif
117