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124#include <linux/delay.h>
125#include <linux/init.h>
126#include <linux/interrupt.h>
127#include <linux/pci.h>
128#include <linux/slab.h>
129#include <linux/module.h>
130#include <linux/dma-mapping.h>
131#include <sound/core.h>
132#include <sound/initval.h>
133#include <sound/pcm.h>
134#include <sound/ac97_codec.h>
135#include <sound/info.h>
136
137MODULE_AUTHOR("James Courtier-Dutton <James@superbug.demon.co.uk>");
138MODULE_DESCRIPTION("CA0106");
139MODULE_LICENSE("GPL");
140MODULE_SUPPORTED_DEVICE("{{Creative,SB CA0106 chip}}");
141
142
143static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
144static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
145static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
146static uint subsystem[SNDRV_CARDS];
147
148module_param_array(index, int, NULL, 0444);
149MODULE_PARM_DESC(index, "Index value for the CA0106 soundcard.");
150module_param_array(id, charp, NULL, 0444);
151MODULE_PARM_DESC(id, "ID string for the CA0106 soundcard.");
152module_param_array(enable, bool, NULL, 0444);
153MODULE_PARM_DESC(enable, "Enable the CA0106 soundcard.");
154module_param_array(subsystem, uint, NULL, 0444);
155MODULE_PARM_DESC(subsystem, "Force card subsystem model.");
156
157#include "ca0106.h"
158
159static const struct snd_ca0106_details ca0106_chip_details[] = {
160
161
162
163
164
165 { .serial = 0x10131102,
166 .name = "X-Fi Extreme Audio [SBxxxx]",
167 .gpio_type = 1,
168 .i2c_adc = 1 } ,
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183 { .serial = 0x10121102,
184 .name = "X-Fi Extreme Audio [SB0790]",
185 .gpio_type = 1,
186 .i2c_adc = 1 } ,
187
188
189 { .serial = 0x10021102,
190 .name = "AudigyLS [SB0310]",
191 .ac97 = 1 } ,
192
193 { .serial = 0x10051102,
194 .name = "AudigyLS [SB0310b]",
195 .ac97 = 1 } ,
196
197 { .serial = 0x10061102,
198 .name = "Live! 7.1 24bit [SB0410]",
199 .gpio_type = 1,
200 .i2c_adc = 1 } ,
201
202 { .serial = 0x10071102,
203 .name = "Live! 7.1 24bit [SB0413]",
204 .gpio_type = 1,
205 .i2c_adc = 1 } ,
206
207
208
209
210
211
212 { .serial = 0x100a1102,
213 .name = "Audigy SE [SB0570]",
214 .gpio_type = 1,
215 .i2c_adc = 1,
216 .spi_dac = 0x4021 } ,
217
218
219
220
221
222
223 { .serial = 0x10111102,
224 .name = "Audigy SE OEM [SB0570a]",
225 .gpio_type = 1,
226 .i2c_adc = 1,
227 .spi_dac = 0x4021 } ,
228
229
230
231
232 { .serial = 0x10041102,
233 .name = "Sound Blaster 5.1vx [SB1070]",
234 .gpio_type = 1,
235 .i2c_adc = 0,
236 .spi_dac = 0x0124
237 } ,
238
239
240
241
242
243
244 { .serial = 0x10091462,
245 .name = "MSI K8N Diamond MB [SB0438]",
246 .gpio_type = 2,
247 .i2c_adc = 1 } ,
248
249 { .serial = 0x10091102,
250 .name = "MSI K8N Diamond MB",
251 .gpio_type = 2,
252 .i2c_adc = 1,
253 .spi_dac = 0x4021 } ,
254
255
256
257
258 { .serial = 0x1458a006,
259 .name = "Giga-byte GA-G1975X",
260 .gpio_type = 1,
261 .i2c_adc = 1 },
262
263
264
265
266
267 { .serial = 0x30381297,
268 .name = "Shuttle XPC SD31P [SD31P]",
269 .gpio_type = 1,
270 .i2c_adc = 1 } ,
271
272
273
274
275
276 { .serial = 0x30411297,
277 .name = "Shuttle XPC SD11G5 [SD11G5]",
278 .gpio_type = 1,
279 .i2c_adc = 1 } ,
280 { .serial = 0,
281 .name = "AudigyLS [Unknown]" }
282};
283
284
285static const struct snd_pcm_hardware snd_ca0106_playback_hw = {
286 .info = SNDRV_PCM_INFO_MMAP |
287 SNDRV_PCM_INFO_INTERLEAVED |
288 SNDRV_PCM_INFO_BLOCK_TRANSFER |
289 SNDRV_PCM_INFO_MMAP_VALID |
290 SNDRV_PCM_INFO_SYNC_START,
291 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
292 .rates = (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
293 SNDRV_PCM_RATE_192000),
294 .rate_min = 48000,
295 .rate_max = 192000,
296 .channels_min = 2,
297 .channels_max = 2,
298 .buffer_bytes_max = ((65536 - 64) * 8),
299 .period_bytes_min = 64,
300 .period_bytes_max = (65536 - 64),
301 .periods_min = 2,
302 .periods_max = 8,
303 .fifo_size = 0,
304};
305
306static const struct snd_pcm_hardware snd_ca0106_capture_hw = {
307 .info = (SNDRV_PCM_INFO_MMAP |
308 SNDRV_PCM_INFO_INTERLEAVED |
309 SNDRV_PCM_INFO_BLOCK_TRANSFER |
310 SNDRV_PCM_INFO_MMAP_VALID),
311 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
312#if 0
313 .rates = (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
314 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
315 .rate_min = 44100,
316#else
317 .rates = (SNDRV_PCM_RATE_48000 |
318 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
319 .rate_min = 48000,
320#endif
321 .rate_max = 192000,
322 .channels_min = 2,
323 .channels_max = 2,
324 .buffer_bytes_max = 65536 - 128,
325 .period_bytes_min = 64,
326 .period_bytes_max = 32768 - 64,
327 .periods_min = 2,
328 .periods_max = 2,
329 .fifo_size = 0,
330};
331
332unsigned int snd_ca0106_ptr_read(struct snd_ca0106 * emu,
333 unsigned int reg,
334 unsigned int chn)
335{
336 unsigned long flags;
337 unsigned int regptr, val;
338
339 regptr = (reg << 16) | chn;
340
341 spin_lock_irqsave(&emu->emu_lock, flags);
342 outl(regptr, emu->port + PTR);
343 val = inl(emu->port + DATA);
344 spin_unlock_irqrestore(&emu->emu_lock, flags);
345 return val;
346}
347
348void snd_ca0106_ptr_write(struct snd_ca0106 *emu,
349 unsigned int reg,
350 unsigned int chn,
351 unsigned int data)
352{
353 unsigned int regptr;
354 unsigned long flags;
355
356 regptr = (reg << 16) | chn;
357
358 spin_lock_irqsave(&emu->emu_lock, flags);
359 outl(regptr, emu->port + PTR);
360 outl(data, emu->port + DATA);
361 spin_unlock_irqrestore(&emu->emu_lock, flags);
362}
363
364int snd_ca0106_spi_write(struct snd_ca0106 * emu,
365 unsigned int data)
366{
367 unsigned int reset, set;
368 unsigned int reg, tmp;
369 int n, result;
370 reg = SPI;
371 if (data > 0xffff)
372 return 1;
373 tmp = snd_ca0106_ptr_read(emu, reg, 0);
374 reset = (tmp & ~0x3ffff) | 0x20000;
375 set = reset | 0x10000;
376 snd_ca0106_ptr_write(emu, reg, 0, reset | data);
377 tmp = snd_ca0106_ptr_read(emu, reg, 0);
378 snd_ca0106_ptr_write(emu, reg, 0, set | data);
379 result = 1;
380
381 for (n = 0; n < 100; n++) {
382 udelay(10);
383 tmp = snd_ca0106_ptr_read(emu, reg, 0);
384 if (!(tmp & 0x10000)) {
385 result = 0;
386 break;
387 }
388 }
389 if (result)
390 return 1;
391 snd_ca0106_ptr_write(emu, reg, 0, reset | data);
392 tmp = snd_ca0106_ptr_read(emu, reg, 0);
393 return 0;
394}
395
396
397int snd_ca0106_i2c_write(struct snd_ca0106 *emu,
398 u32 reg,
399 u32 value)
400{
401 u32 tmp;
402 int timeout = 0;
403 int status;
404 int retry;
405 if ((reg > 0x7f) || (value > 0x1ff)) {
406 dev_err(emu->card->dev, "i2c_write: invalid values.\n");
407 return -EINVAL;
408 }
409
410 tmp = reg << 25 | value << 16;
411
412
413
414
415
416
417
418 snd_ca0106_ptr_write(emu, I2C_D1, 0, tmp);
419
420 for (retry = 0; retry < 10; retry++) {
421
422
423
424 tmp = 0;
425 tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
426 snd_ca0106_ptr_write(emu, I2C_A, 0, tmp);
427
428
429 while (1) {
430 status = snd_ca0106_ptr_read(emu, I2C_A, 0);
431
432 timeout++;
433 if ((status & I2C_A_ADC_START) == 0)
434 break;
435
436 if (timeout > 1000)
437 break;
438 }
439
440 if ((status & I2C_A_ADC_ABORT) == 0)
441 break;
442 }
443
444 if (retry == 10) {
445 dev_err(emu->card->dev, "Writing to ADC failed!\n");
446 return -EINVAL;
447 }
448
449 return 0;
450}
451
452
453static void snd_ca0106_intr_enable(struct snd_ca0106 *emu, unsigned int intrenb)
454{
455 unsigned long flags;
456 unsigned int intr_enable;
457
458 spin_lock_irqsave(&emu->emu_lock, flags);
459 intr_enable = inl(emu->port + INTE) | intrenb;
460 outl(intr_enable, emu->port + INTE);
461 spin_unlock_irqrestore(&emu->emu_lock, flags);
462}
463
464static void snd_ca0106_intr_disable(struct snd_ca0106 *emu, unsigned int intrenb)
465{
466 unsigned long flags;
467 unsigned int intr_enable;
468
469 spin_lock_irqsave(&emu->emu_lock, flags);
470 intr_enable = inl(emu->port + INTE) & ~intrenb;
471 outl(intr_enable, emu->port + INTE);
472 spin_unlock_irqrestore(&emu->emu_lock, flags);
473}
474
475
476static void snd_ca0106_pcm_free_substream(struct snd_pcm_runtime *runtime)
477{
478 kfree(runtime->private_data);
479}
480
481static const int spi_dacd_reg[] = {
482 SPI_DACD0_REG,
483 SPI_DACD1_REG,
484 SPI_DACD2_REG,
485 0,
486 SPI_DACD4_REG,
487};
488static const int spi_dacd_bit[] = {
489 SPI_DACD0_BIT,
490 SPI_DACD1_BIT,
491 SPI_DACD2_BIT,
492 0,
493 SPI_DACD4_BIT,
494};
495
496static void restore_spdif_bits(struct snd_ca0106 *chip, int idx)
497{
498 if (chip->spdif_str_bits[idx] != chip->spdif_bits[idx]) {
499 chip->spdif_str_bits[idx] = chip->spdif_bits[idx];
500 snd_ca0106_ptr_write(chip, SPCS0 + idx, 0,
501 chip->spdif_str_bits[idx]);
502 }
503}
504
505static int snd_ca0106_channel_dac(struct snd_ca0106 *chip,
506 const struct snd_ca0106_details *details,
507 int channel_id)
508{
509 switch (channel_id) {
510 case PCM_FRONT_CHANNEL:
511 return (details->spi_dac & 0xf000) >> (4 * 3);
512 case PCM_REAR_CHANNEL:
513 return (details->spi_dac & 0x0f00) >> (4 * 2);
514 case PCM_CENTER_LFE_CHANNEL:
515 return (details->spi_dac & 0x00f0) >> (4 * 1);
516 case PCM_UNKNOWN_CHANNEL:
517 return (details->spi_dac & 0x000f) >> (4 * 0);
518 default:
519 dev_dbg(chip->card->dev, "ca0106: unknown channel_id %d\n",
520 channel_id);
521 }
522 return 0;
523}
524
525static int snd_ca0106_pcm_power_dac(struct snd_ca0106 *chip, int channel_id,
526 int power)
527{
528 if (chip->details->spi_dac) {
529 const int dac = snd_ca0106_channel_dac(chip, chip->details,
530 channel_id);
531 const int reg = spi_dacd_reg[dac];
532 const int bit = spi_dacd_bit[dac];
533
534 if (power)
535
536 chip->spi_dac_reg[reg] &= ~bit;
537 else
538
539 chip->spi_dac_reg[reg] |= bit;
540 if (snd_ca0106_spi_write(chip, chip->spi_dac_reg[reg]) != 0)
541 return -ENXIO;
542 }
543 return 0;
544}
545
546
547static int snd_ca0106_pcm_open_playback_channel(struct snd_pcm_substream *substream,
548 int channel_id)
549{
550 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
551 struct snd_ca0106_channel *channel = &(chip->playback_channels[channel_id]);
552 struct snd_ca0106_pcm *epcm;
553 struct snd_pcm_runtime *runtime = substream->runtime;
554 int err;
555
556 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
557
558 if (epcm == NULL)
559 return -ENOMEM;
560 epcm->emu = chip;
561 epcm->substream = substream;
562 epcm->channel_id=channel_id;
563
564 runtime->private_data = epcm;
565 runtime->private_free = snd_ca0106_pcm_free_substream;
566
567 runtime->hw = snd_ca0106_playback_hw;
568
569 channel->emu = chip;
570 channel->number = channel_id;
571
572 channel->use = 1;
573
574
575
576
577
578 channel->epcm = epcm;
579 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
580 return err;
581 if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
582 return err;
583 snd_pcm_set_sync(substream);
584
585
586 if (channel_id != PCM_FRONT_CHANNEL) {
587 err = snd_ca0106_pcm_power_dac(chip, channel_id, 1);
588 if (err < 0)
589 return err;
590 }
591
592 restore_spdif_bits(chip, channel_id);
593
594 return 0;
595}
596
597
598static int snd_ca0106_pcm_close_playback(struct snd_pcm_substream *substream)
599{
600 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
601 struct snd_pcm_runtime *runtime = substream->runtime;
602 struct snd_ca0106_pcm *epcm = runtime->private_data;
603 chip->playback_channels[epcm->channel_id].use = 0;
604
605 restore_spdif_bits(chip, epcm->channel_id);
606
607
608 if (epcm->channel_id != PCM_FRONT_CHANNEL) {
609 int err;
610 err = snd_ca0106_pcm_power_dac(chip, epcm->channel_id, 0);
611 if (err < 0)
612 return err;
613 }
614
615
616 return 0;
617}
618
619static int snd_ca0106_pcm_open_playback_front(struct snd_pcm_substream *substream)
620{
621 return snd_ca0106_pcm_open_playback_channel(substream, PCM_FRONT_CHANNEL);
622}
623
624static int snd_ca0106_pcm_open_playback_center_lfe(struct snd_pcm_substream *substream)
625{
626 return snd_ca0106_pcm_open_playback_channel(substream, PCM_CENTER_LFE_CHANNEL);
627}
628
629static int snd_ca0106_pcm_open_playback_unknown(struct snd_pcm_substream *substream)
630{
631 return snd_ca0106_pcm_open_playback_channel(substream, PCM_UNKNOWN_CHANNEL);
632}
633
634static int snd_ca0106_pcm_open_playback_rear(struct snd_pcm_substream *substream)
635{
636 return snd_ca0106_pcm_open_playback_channel(substream, PCM_REAR_CHANNEL);
637}
638
639
640static int snd_ca0106_pcm_open_capture_channel(struct snd_pcm_substream *substream,
641 int channel_id)
642{
643 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
644 struct snd_ca0106_channel *channel = &(chip->capture_channels[channel_id]);
645 struct snd_ca0106_pcm *epcm;
646 struct snd_pcm_runtime *runtime = substream->runtime;
647 int err;
648
649 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
650 if (!epcm)
651 return -ENOMEM;
652
653 epcm->emu = chip;
654 epcm->substream = substream;
655 epcm->channel_id=channel_id;
656
657 runtime->private_data = epcm;
658 runtime->private_free = snd_ca0106_pcm_free_substream;
659
660 runtime->hw = snd_ca0106_capture_hw;
661
662 channel->emu = chip;
663 channel->number = channel_id;
664
665 channel->use = 1;
666
667
668
669
670
671 channel->epcm = epcm;
672 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
673 return err;
674
675 if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
676 return err;
677 return 0;
678}
679
680
681static int snd_ca0106_pcm_close_capture(struct snd_pcm_substream *substream)
682{
683 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
684 struct snd_pcm_runtime *runtime = substream->runtime;
685 struct snd_ca0106_pcm *epcm = runtime->private_data;
686 chip->capture_channels[epcm->channel_id].use = 0;
687
688 return 0;
689}
690
691static int snd_ca0106_pcm_open_0_capture(struct snd_pcm_substream *substream)
692{
693 return snd_ca0106_pcm_open_capture_channel(substream, 0);
694}
695
696static int snd_ca0106_pcm_open_1_capture(struct snd_pcm_substream *substream)
697{
698 return snd_ca0106_pcm_open_capture_channel(substream, 1);
699}
700
701static int snd_ca0106_pcm_open_2_capture(struct snd_pcm_substream *substream)
702{
703 return snd_ca0106_pcm_open_capture_channel(substream, 2);
704}
705
706static int snd_ca0106_pcm_open_3_capture(struct snd_pcm_substream *substream)
707{
708 return snd_ca0106_pcm_open_capture_channel(substream, 3);
709}
710
711
712static int snd_ca0106_pcm_prepare_playback(struct snd_pcm_substream *substream)
713{
714 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
715 struct snd_pcm_runtime *runtime = substream->runtime;
716 struct snd_ca0106_pcm *epcm = runtime->private_data;
717 int channel = epcm->channel_id;
718 u32 *table_base = (u32 *)(emu->buffer.area+(8*16*channel));
719 u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
720 u32 hcfg_mask = HCFG_PLAYBACK_S32_LE;
721 u32 hcfg_set = 0x00000000;
722 u32 hcfg;
723 u32 reg40_mask = 0x30000 << (channel<<1);
724 u32 reg40_set = 0;
725 u32 reg40;
726
727 u32 reg71_mask = 0x03030000 ;
728 u32 reg71_set = 0;
729 u32 reg71;
730 int i;
731
732#if 0
733 dev_dbg(emu->card->dev,
734 "prepare:channel_number=%d, rate=%d, format=0x%x, "
735 "channels=%d, buffer_size=%ld, period_size=%ld, "
736 "periods=%u, frames_to_bytes=%d\n",
737 channel, runtime->rate, runtime->format,
738 runtime->channels, runtime->buffer_size,
739 runtime->period_size, runtime->periods,
740 frames_to_bytes(runtime, 1));
741 dev_dbg(emu->card->dev,
742 "dma_addr=%x, dma_area=%p, table_base=%p\n",
743 runtime->dma_addr, runtime->dma_area, table_base);
744 dev_dbg(emu->card->dev,
745 "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
746 emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
747#endif
748
749
750
751 switch (runtime->rate) {
752 case 44100:
753 reg40_set = 0x10000 << (channel<<1);
754 reg71_set = 0x01010000;
755 break;
756 case 48000:
757 reg40_set = 0;
758 reg71_set = 0;
759 break;
760 case 96000:
761 reg40_set = 0x20000 << (channel<<1);
762 reg71_set = 0x02020000;
763 break;
764 case 192000:
765 reg40_set = 0x30000 << (channel<<1);
766 reg71_set = 0x03030000;
767 break;
768 default:
769 reg40_set = 0;
770 reg71_set = 0;
771 break;
772 }
773
774
775 switch (runtime->format) {
776 case SNDRV_PCM_FORMAT_S16_LE:
777 hcfg_set = 0;
778 break;
779 case SNDRV_PCM_FORMAT_S32_LE:
780 hcfg_set = HCFG_PLAYBACK_S32_LE;
781 break;
782 default:
783 hcfg_set = 0;
784 break;
785 }
786 hcfg = inl(emu->port + HCFG) ;
787 hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
788 outl(hcfg, emu->port + HCFG);
789 reg40 = snd_ca0106_ptr_read(emu, 0x40, 0);
790 reg40 = (reg40 & ~reg40_mask) | reg40_set;
791 snd_ca0106_ptr_write(emu, 0x40, 0, reg40);
792 reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
793 reg71 = (reg71 & ~reg71_mask) | reg71_set;
794 snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
795
796
797 for(i=0; i < runtime->periods; i++) {
798 table_base[i*2] = runtime->dma_addr + (i * period_size_bytes);
799 table_base[i*2+1] = period_size_bytes << 16;
800 }
801
802 snd_ca0106_ptr_write(emu, PLAYBACK_LIST_ADDR, channel, emu->buffer.addr+(8*16*channel));
803 snd_ca0106_ptr_write(emu, PLAYBACK_LIST_SIZE, channel, (runtime->periods - 1) << 19);
804 snd_ca0106_ptr_write(emu, PLAYBACK_LIST_PTR, channel, 0);
805 snd_ca0106_ptr_write(emu, PLAYBACK_DMA_ADDR, channel, runtime->dma_addr);
806 snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, frames_to_bytes(runtime, runtime->period_size)<<16);
807
808 snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, 0);
809 snd_ca0106_ptr_write(emu, PLAYBACK_POINTER, channel, 0);
810 snd_ca0106_ptr_write(emu, 0x07, channel, 0x0);
811 snd_ca0106_ptr_write(emu, 0x08, channel, 0);
812 snd_ca0106_ptr_write(emu, PLAYBACK_MUTE, 0x0, 0x0);
813#if 0
814 snd_ca0106_ptr_write(emu, SPCS0, 0,
815 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
816 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
817 SPCS_GENERATIONSTATUS | 0x00001200 |
818 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT );
819#endif
820
821 return 0;
822}
823
824
825static int snd_ca0106_pcm_prepare_capture(struct snd_pcm_substream *substream)
826{
827 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
828 struct snd_pcm_runtime *runtime = substream->runtime;
829 struct snd_ca0106_pcm *epcm = runtime->private_data;
830 int channel = epcm->channel_id;
831 u32 hcfg_mask = HCFG_CAPTURE_S32_LE;
832 u32 hcfg_set = 0x00000000;
833 u32 hcfg;
834 u32 over_sampling=0x2;
835 u32 reg71_mask = 0x0000c000 ;
836 u32 reg71_set = 0;
837 u32 reg71;
838
839#if 0
840 dev_dbg(emu->card->dev,
841 "prepare:channel_number=%d, rate=%d, format=0x%x, "
842 "channels=%d, buffer_size=%ld, period_size=%ld, "
843 "periods=%u, frames_to_bytes=%d\n",
844 channel, runtime->rate, runtime->format,
845 runtime->channels, runtime->buffer_size,
846 runtime->period_size, runtime->periods,
847 frames_to_bytes(runtime, 1));
848 dev_dbg(emu->card->dev,
849 "dma_addr=%x, dma_area=%p, table_base=%p\n",
850 runtime->dma_addr, runtime->dma_area, table_base);
851 dev_dbg(emu->card->dev,
852 "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
853 emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
854#endif
855
856 switch (runtime->rate) {
857 case 44100:
858 reg71_set = 0x00004000;
859 break;
860 case 48000:
861 reg71_set = 0;
862 break;
863 case 96000:
864 reg71_set = 0x00008000;
865 over_sampling=0xa;
866 break;
867 case 192000:
868 reg71_set = 0x0000c000;
869 over_sampling=0xa;
870 break;
871 default:
872 reg71_set = 0;
873 break;
874 }
875
876
877 switch (runtime->format) {
878 case SNDRV_PCM_FORMAT_S16_LE:
879 hcfg_set = 0;
880 break;
881 case SNDRV_PCM_FORMAT_S32_LE:
882 hcfg_set = HCFG_CAPTURE_S32_LE;
883 break;
884 default:
885 hcfg_set = 0;
886 break;
887 }
888 hcfg = inl(emu->port + HCFG) ;
889 hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
890 outl(hcfg, emu->port + HCFG);
891 reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
892 reg71 = (reg71 & ~reg71_mask) | reg71_set;
893 snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
894 if (emu->details->i2c_adc == 1) {
895 snd_ca0106_i2c_write(emu, ADC_MASTER, over_sampling);
896 }
897
898
899
900
901
902
903
904
905
906
907 snd_ca0106_ptr_write(emu, 0x13, channel, 0);
908 snd_ca0106_ptr_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr);
909 snd_ca0106_ptr_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size)<<16);
910 snd_ca0106_ptr_write(emu, CAPTURE_POINTER, channel, 0);
911
912 return 0;
913}
914
915
916static int snd_ca0106_pcm_trigger_playback(struct snd_pcm_substream *substream,
917 int cmd)
918{
919 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
920 struct snd_pcm_runtime *runtime;
921 struct snd_ca0106_pcm *epcm;
922 int channel;
923 int result = 0;
924 struct snd_pcm_substream *s;
925 u32 basic = 0;
926 u32 extended = 0;
927 u32 bits;
928 int running = 0;
929
930 switch (cmd) {
931 case SNDRV_PCM_TRIGGER_START:
932 case SNDRV_PCM_TRIGGER_RESUME:
933 running = 1;
934 break;
935 case SNDRV_PCM_TRIGGER_STOP:
936 case SNDRV_PCM_TRIGGER_SUSPEND:
937 default:
938 running = 0;
939 break;
940 }
941 snd_pcm_group_for_each_entry(s, substream) {
942 if (snd_pcm_substream_chip(s) != emu ||
943 s->stream != SNDRV_PCM_STREAM_PLAYBACK)
944 continue;
945 runtime = s->runtime;
946 epcm = runtime->private_data;
947 channel = epcm->channel_id;
948
949 epcm->running = running;
950 basic |= (0x1 << channel);
951 extended |= (0x10 << channel);
952 snd_pcm_trigger_done(s, substream);
953 }
954
955
956 switch (cmd) {
957 case SNDRV_PCM_TRIGGER_START:
958 case SNDRV_PCM_TRIGGER_RESUME:
959 bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
960 bits |= extended;
961 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
962 bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
963 bits |= basic;
964 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
965 break;
966 case SNDRV_PCM_TRIGGER_STOP:
967 case SNDRV_PCM_TRIGGER_SUSPEND:
968 bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
969 bits &= ~basic;
970 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
971 bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
972 bits &= ~extended;
973 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
974 break;
975 default:
976 result = -EINVAL;
977 break;
978 }
979 return result;
980}
981
982
983static int snd_ca0106_pcm_trigger_capture(struct snd_pcm_substream *substream,
984 int cmd)
985{
986 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
987 struct snd_pcm_runtime *runtime = substream->runtime;
988 struct snd_ca0106_pcm *epcm = runtime->private_data;
989 int channel = epcm->channel_id;
990 int result = 0;
991
992 switch (cmd) {
993 case SNDRV_PCM_TRIGGER_START:
994 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) | (0x110000<<channel));
995 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0)|(0x100<<channel));
996 epcm->running = 1;
997 break;
998 case SNDRV_PCM_TRIGGER_STOP:
999 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0) & ~(0x100<<channel));
1000 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) & ~(0x110000<<channel));
1001 epcm->running = 0;
1002 break;
1003 default:
1004 result = -EINVAL;
1005 break;
1006 }
1007 return result;
1008}
1009
1010
1011static snd_pcm_uframes_t
1012snd_ca0106_pcm_pointer_playback(struct snd_pcm_substream *substream)
1013{
1014 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
1015 struct snd_pcm_runtime *runtime = substream->runtime;
1016 struct snd_ca0106_pcm *epcm = runtime->private_data;
1017 unsigned int ptr, prev_ptr;
1018 int channel = epcm->channel_id;
1019 int timeout = 10;
1020
1021 if (!epcm->running)
1022 return 0;
1023
1024 prev_ptr = -1;
1025 do {
1026 ptr = snd_ca0106_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
1027 ptr = (ptr >> 3) * runtime->period_size;
1028 ptr += bytes_to_frames(runtime,
1029 snd_ca0106_ptr_read(emu, PLAYBACK_POINTER, channel));
1030 if (ptr >= runtime->buffer_size)
1031 ptr -= runtime->buffer_size;
1032 if (prev_ptr == ptr)
1033 return ptr;
1034 prev_ptr = ptr;
1035 } while (--timeout);
1036 dev_warn(emu->card->dev, "ca0106: unstable DMA pointer!\n");
1037 return 0;
1038}
1039
1040
1041static snd_pcm_uframes_t
1042snd_ca0106_pcm_pointer_capture(struct snd_pcm_substream *substream)
1043{
1044 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
1045 struct snd_pcm_runtime *runtime = substream->runtime;
1046 struct snd_ca0106_pcm *epcm = runtime->private_data;
1047 snd_pcm_uframes_t ptr, ptr1, ptr2 = 0;
1048 int channel = epcm->channel_id;
1049
1050 if (!epcm->running)
1051 return 0;
1052
1053 ptr1 = snd_ca0106_ptr_read(emu, CAPTURE_POINTER, channel);
1054 ptr2 = bytes_to_frames(runtime, ptr1);
1055 ptr=ptr2;
1056 if (ptr >= runtime->buffer_size)
1057 ptr -= runtime->buffer_size;
1058
1059
1060
1061
1062
1063
1064
1065 return ptr;
1066}
1067
1068
1069static const struct snd_pcm_ops snd_ca0106_playback_front_ops = {
1070 .open = snd_ca0106_pcm_open_playback_front,
1071 .close = snd_ca0106_pcm_close_playback,
1072 .prepare = snd_ca0106_pcm_prepare_playback,
1073 .trigger = snd_ca0106_pcm_trigger_playback,
1074 .pointer = snd_ca0106_pcm_pointer_playback,
1075};
1076
1077static const struct snd_pcm_ops snd_ca0106_capture_0_ops = {
1078 .open = snd_ca0106_pcm_open_0_capture,
1079 .close = snd_ca0106_pcm_close_capture,
1080 .prepare = snd_ca0106_pcm_prepare_capture,
1081 .trigger = snd_ca0106_pcm_trigger_capture,
1082 .pointer = snd_ca0106_pcm_pointer_capture,
1083};
1084
1085static const struct snd_pcm_ops snd_ca0106_capture_1_ops = {
1086 .open = snd_ca0106_pcm_open_1_capture,
1087 .close = snd_ca0106_pcm_close_capture,
1088 .prepare = snd_ca0106_pcm_prepare_capture,
1089 .trigger = snd_ca0106_pcm_trigger_capture,
1090 .pointer = snd_ca0106_pcm_pointer_capture,
1091};
1092
1093static const struct snd_pcm_ops snd_ca0106_capture_2_ops = {
1094 .open = snd_ca0106_pcm_open_2_capture,
1095 .close = snd_ca0106_pcm_close_capture,
1096 .prepare = snd_ca0106_pcm_prepare_capture,
1097 .trigger = snd_ca0106_pcm_trigger_capture,
1098 .pointer = snd_ca0106_pcm_pointer_capture,
1099};
1100
1101static const struct snd_pcm_ops snd_ca0106_capture_3_ops = {
1102 .open = snd_ca0106_pcm_open_3_capture,
1103 .close = snd_ca0106_pcm_close_capture,
1104 .prepare = snd_ca0106_pcm_prepare_capture,
1105 .trigger = snd_ca0106_pcm_trigger_capture,
1106 .pointer = snd_ca0106_pcm_pointer_capture,
1107};
1108
1109static const struct snd_pcm_ops snd_ca0106_playback_center_lfe_ops = {
1110 .open = snd_ca0106_pcm_open_playback_center_lfe,
1111 .close = snd_ca0106_pcm_close_playback,
1112 .prepare = snd_ca0106_pcm_prepare_playback,
1113 .trigger = snd_ca0106_pcm_trigger_playback,
1114 .pointer = snd_ca0106_pcm_pointer_playback,
1115};
1116
1117static const struct snd_pcm_ops snd_ca0106_playback_unknown_ops = {
1118 .open = snd_ca0106_pcm_open_playback_unknown,
1119 .close = snd_ca0106_pcm_close_playback,
1120 .prepare = snd_ca0106_pcm_prepare_playback,
1121 .trigger = snd_ca0106_pcm_trigger_playback,
1122 .pointer = snd_ca0106_pcm_pointer_playback,
1123};
1124
1125static const struct snd_pcm_ops snd_ca0106_playback_rear_ops = {
1126 .open = snd_ca0106_pcm_open_playback_rear,
1127 .close = snd_ca0106_pcm_close_playback,
1128 .prepare = snd_ca0106_pcm_prepare_playback,
1129 .trigger = snd_ca0106_pcm_trigger_playback,
1130 .pointer = snd_ca0106_pcm_pointer_playback,
1131};
1132
1133
1134static unsigned short snd_ca0106_ac97_read(struct snd_ac97 *ac97,
1135 unsigned short reg)
1136{
1137 struct snd_ca0106 *emu = ac97->private_data;
1138 unsigned long flags;
1139 unsigned short val;
1140
1141 spin_lock_irqsave(&emu->emu_lock, flags);
1142 outb(reg, emu->port + AC97ADDRESS);
1143 val = inw(emu->port + AC97DATA);
1144 spin_unlock_irqrestore(&emu->emu_lock, flags);
1145 return val;
1146}
1147
1148static void snd_ca0106_ac97_write(struct snd_ac97 *ac97,
1149 unsigned short reg, unsigned short val)
1150{
1151 struct snd_ca0106 *emu = ac97->private_data;
1152 unsigned long flags;
1153
1154 spin_lock_irqsave(&emu->emu_lock, flags);
1155 outb(reg, emu->port + AC97ADDRESS);
1156 outw(val, emu->port + AC97DATA);
1157 spin_unlock_irqrestore(&emu->emu_lock, flags);
1158}
1159
1160static int snd_ca0106_ac97(struct snd_ca0106 *chip)
1161{
1162 struct snd_ac97_bus *pbus;
1163 struct snd_ac97_template ac97;
1164 int err;
1165 static const struct snd_ac97_bus_ops ops = {
1166 .write = snd_ca0106_ac97_write,
1167 .read = snd_ca0106_ac97_read,
1168 };
1169
1170 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
1171 return err;
1172 pbus->no_vra = 1;
1173
1174 memset(&ac97, 0, sizeof(ac97));
1175 ac97.private_data = chip;
1176 ac97.scaps = AC97_SCAP_NO_SPDIF;
1177 return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1178}
1179
1180static void ca0106_stop_chip(struct snd_ca0106 *chip);
1181
1182static int snd_ca0106_free(struct snd_ca0106 *chip)
1183{
1184 if (chip->res_port != NULL) {
1185
1186 ca0106_stop_chip(chip);
1187 }
1188 if (chip->irq >= 0)
1189 free_irq(chip->irq, chip);
1190
1191#if 1
1192 if (chip->buffer.area)
1193 snd_dma_free_pages(&chip->buffer);
1194#endif
1195
1196
1197 release_and_free_resource(chip->res_port);
1198
1199 pci_disable_device(chip->pci);
1200 kfree(chip);
1201 return 0;
1202}
1203
1204static int snd_ca0106_dev_free(struct snd_device *device)
1205{
1206 struct snd_ca0106 *chip = device->device_data;
1207 return snd_ca0106_free(chip);
1208}
1209
1210static irqreturn_t snd_ca0106_interrupt(int irq, void *dev_id)
1211{
1212 unsigned int status;
1213
1214 struct snd_ca0106 *chip = dev_id;
1215 int i;
1216 int mask;
1217 unsigned int stat76;
1218 struct snd_ca0106_channel *pchannel;
1219
1220 status = inl(chip->port + IPR);
1221 if (! status)
1222 return IRQ_NONE;
1223
1224 stat76 = snd_ca0106_ptr_read(chip, EXTENDED_INT, 0);
1225
1226
1227
1228
1229
1230
1231 mask = 0x11;
1232 for(i = 0; i < 4; i++) {
1233 pchannel = &(chip->playback_channels[i]);
1234 if (stat76 & mask) {
1235
1236 if(pchannel->use) {
1237 snd_pcm_period_elapsed(pchannel->epcm->substream);
1238
1239 }
1240 }
1241
1242
1243
1244
1245 mask <<= 1;
1246 }
1247 mask = 0x110000;
1248 for(i = 0; i < 4; i++) {
1249 pchannel = &(chip->capture_channels[i]);
1250 if (stat76 & mask) {
1251
1252 if(pchannel->use) {
1253 snd_pcm_period_elapsed(pchannel->epcm->substream);
1254
1255 }
1256 }
1257
1258
1259
1260
1261 mask <<= 1;
1262 }
1263
1264 snd_ca0106_ptr_write(chip, EXTENDED_INT, 0, stat76);
1265
1266 if (chip->midi.dev_id &&
1267 (status & (chip->midi.ipr_tx|chip->midi.ipr_rx))) {
1268 if (chip->midi.interrupt)
1269 chip->midi.interrupt(&chip->midi, status);
1270 else
1271 chip->midi.interrupt_disable(&chip->midi, chip->midi.tx_enable | chip->midi.rx_enable);
1272 }
1273
1274
1275 outl(status, chip->port+IPR);
1276
1277 return IRQ_HANDLED;
1278}
1279
1280static const struct snd_pcm_chmap_elem surround_map[] = {
1281 { .channels = 2,
1282 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
1283 { }
1284};
1285
1286static const struct snd_pcm_chmap_elem clfe_map[] = {
1287 { .channels = 2,
1288 .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } },
1289 { }
1290};
1291
1292static const struct snd_pcm_chmap_elem side_map[] = {
1293 { .channels = 2,
1294 .map = { SNDRV_CHMAP_SL, SNDRV_CHMAP_SR } },
1295 { }
1296};
1297
1298static int snd_ca0106_pcm(struct snd_ca0106 *emu, int device)
1299{
1300 struct snd_pcm *pcm;
1301 struct snd_pcm_substream *substream;
1302 const struct snd_pcm_chmap_elem *map = NULL;
1303 int err;
1304
1305 err = snd_pcm_new(emu->card, "ca0106", device, 1, 1, &pcm);
1306 if (err < 0)
1307 return err;
1308
1309 pcm->private_data = emu;
1310
1311 switch (device) {
1312 case 0:
1313 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_front_ops);
1314 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_0_ops);
1315 map = snd_pcm_std_chmaps;
1316 break;
1317 case 1:
1318 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_rear_ops);
1319 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_1_ops);
1320 map = surround_map;
1321 break;
1322 case 2:
1323 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_center_lfe_ops);
1324 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_2_ops);
1325 map = clfe_map;
1326 break;
1327 case 3:
1328 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_unknown_ops);
1329 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_3_ops);
1330 map = side_map;
1331 break;
1332 }
1333
1334 pcm->info_flags = 0;
1335 strcpy(pcm->name, "CA0106");
1336
1337 for(substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1338 substream;
1339 substream = substream->next) {
1340 snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV,
1341 &emu->pci->dev,
1342 64*1024, 64*1024);
1343 }
1344
1345 for (substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
1346 substream;
1347 substream = substream->next) {
1348 snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV,
1349 &emu->pci->dev,
1350 64*1024, 64*1024);
1351 }
1352
1353 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2,
1354 1 << 2, NULL);
1355 if (err < 0)
1356 return err;
1357
1358 emu->pcm[device] = pcm;
1359
1360 return 0;
1361}
1362
1363#define SPI_REG(reg, value) (((reg) << SPI_REG_SHIFT) | (value))
1364static const unsigned int spi_dac_init[] = {
1365 SPI_REG(SPI_LDA1_REG, SPI_DA_BIT_0dB),
1366 SPI_REG(SPI_RDA1_REG, SPI_DA_BIT_0dB),
1367 SPI_REG(SPI_PL_REG, SPI_PL_BIT_L_L | SPI_PL_BIT_R_R | SPI_IZD_BIT),
1368 SPI_REG(SPI_FMT_REG, SPI_FMT_BIT_I2S | SPI_IWL_BIT_24),
1369 SPI_REG(SPI_LDA2_REG, SPI_DA_BIT_0dB),
1370 SPI_REG(SPI_RDA2_REG, SPI_DA_BIT_0dB),
1371 SPI_REG(SPI_LDA3_REG, SPI_DA_BIT_0dB),
1372 SPI_REG(SPI_RDA3_REG, SPI_DA_BIT_0dB),
1373 SPI_REG(SPI_MASTDA_REG, SPI_DA_BIT_0dB),
1374 SPI_REG(9, 0x00),
1375 SPI_REG(SPI_MS_REG, SPI_DACD0_BIT | SPI_DACD1_BIT | SPI_DACD2_BIT),
1376 SPI_REG(12, 0x00),
1377 SPI_REG(SPI_LDA4_REG, SPI_DA_BIT_0dB),
1378 SPI_REG(SPI_RDA4_REG, SPI_DA_BIT_0dB | SPI_DA_BIT_UPDATE),
1379 SPI_REG(SPI_DACD4_REG, SPI_DACD4_BIT),
1380};
1381
1382static const unsigned int i2c_adc_init[][2] = {
1383 { 0x17, 0x00 },
1384 { 0x07, 0x00 },
1385 { 0x0b, 0x22 },
1386 { 0x0c, 0x22 },
1387 { 0x0d, 0x08 },
1388 { 0x0e, 0xcf },
1389 { 0x0f, 0xcf },
1390 { 0x10, 0x7b },
1391 { 0x11, 0x00 },
1392 { 0x12, 0x32 },
1393 { 0x13, 0x00 },
1394 { 0x14, 0xa6 },
1395 { 0x15, ADC_MUX_LINEIN },
1396};
1397
1398static void ca0106_init_chip(struct snd_ca0106 *chip, int resume)
1399{
1400 int ch;
1401 unsigned int def_bits;
1402
1403 outl(0, chip->port + INTE);
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419 def_bits =
1420 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1421 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1422 SPCS_GENERATIONSTATUS | 0x00001200 |
1423 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1424 if (!resume) {
1425 chip->spdif_str_bits[0] = chip->spdif_bits[0] = def_bits;
1426 chip->spdif_str_bits[1] = chip->spdif_bits[1] = def_bits;
1427 chip->spdif_str_bits[2] = chip->spdif_bits[2] = def_bits;
1428 chip->spdif_str_bits[3] = chip->spdif_bits[3] = def_bits;
1429 }
1430
1431 snd_ca0106_ptr_write(chip, SPCS1, 0, chip->spdif_str_bits[1]);
1432 snd_ca0106_ptr_write(chip, SPCS0, 0, chip->spdif_str_bits[0]);
1433 snd_ca0106_ptr_write(chip, SPCS2, 0, chip->spdif_str_bits[2]);
1434 snd_ca0106_ptr_write(chip, SPCS3, 0, chip->spdif_str_bits[3]);
1435
1436 snd_ca0106_ptr_write(chip, PLAYBACK_MUTE, 0, 0x00fc0000);
1437 snd_ca0106_ptr_write(chip, CAPTURE_MUTE, 0, 0x00fc0000);
1438
1439
1440 outb(AC97_REC_GAIN, chip->port + AC97ADDRESS);
1441 outw(0x8000, chip->port + AC97DATA);
1442#if 0
1443 snd_ca0106_ptr_write(chip, SPCS0, 0, 0x2108006);
1444 snd_ca0106_ptr_write(chip, 0x42, 0, 0x2108006);
1445 snd_ca0106_ptr_write(chip, 0x43, 0, 0x2108006);
1446 snd_ca0106_ptr_write(chip, 0x44, 0, 0x2108006);
1447#endif
1448
1449
1450
1451
1452
1453 snd_ca0106_ptr_write(chip, SPDIF_SELECT1, 0, 0xf);
1454
1455
1456
1457 snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0x000f0000);
1458
1459 chip->spdif_enable = 0;
1460
1461
1462
1463
1464 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 0, 0x40c81000);
1465
1466
1467
1468 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 1, 0xffffffff);
1469
1470 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 2, 0x30300000);
1471
1472 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 3, 0x00700000);
1473
1474 snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING1, 0, 0x32765410);
1475 snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING2, 0, 0x76767676);
1476 snd_ca0106_ptr_write(chip, CAPTURE_ROUTING1, 0, 0x32765410);
1477 snd_ca0106_ptr_write(chip, CAPTURE_ROUTING2, 0, 0x76767676);
1478
1479 for (ch = 0; ch < 4; ch++) {
1480
1481 snd_ca0106_ptr_write(chip, CAPTURE_VOLUME1, ch, 0x30303030);
1482 snd_ca0106_ptr_write(chip, CAPTURE_VOLUME2, ch, 0x30303030);
1483#if 0
1484 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0x40404040);
1485 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0x40404040);
1486 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0xffffffff);
1487 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0xffffffff);
1488#endif
1489 }
1490 if (chip->details->i2c_adc == 1) {
1491
1492 snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
1493
1494 if (!resume)
1495 chip->capture_source = 3;
1496 } else if (chip->details->ac97 == 1) {
1497
1498 snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x444400e4);
1499
1500 if (!resume)
1501 chip->capture_source = 4;
1502 } else {
1503
1504 snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
1505
1506 if (!resume)
1507 chip->capture_source = 3;
1508 }
1509
1510 if (chip->details->gpio_type == 2) {
1511
1512
1513
1514
1515 outl(0x0, chip->port+GPIO);
1516
1517 outl(0x005f5301, chip->port+GPIO);
1518 } else if (chip->details->gpio_type == 1) {
1519
1520
1521
1522
1523 outl(0x0, chip->port+GPIO);
1524
1525 outl(0x005f5301, chip->port+GPIO);
1526 } else {
1527 outl(0x0, chip->port+GPIO);
1528 outl(0x005f03a3, chip->port+GPIO);
1529
1530 }
1531 snd_ca0106_intr_enable(chip, 0x105);
1532
1533
1534
1535
1536
1537
1538 outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port+HCFG);
1539
1540 if (chip->details->i2c_adc == 1) {
1541
1542 int size, n;
1543
1544 size = ARRAY_SIZE(i2c_adc_init);
1545
1546 for (n = 0; n < size; n++)
1547 snd_ca0106_i2c_write(chip, i2c_adc_init[n][0],
1548 i2c_adc_init[n][1]);
1549 for (n = 0; n < 4; n++) {
1550 chip->i2c_capture_volume[n][0] = 0xcf;
1551 chip->i2c_capture_volume[n][1] = 0xcf;
1552 }
1553 chip->i2c_capture_source = 2;
1554
1555
1556 }
1557
1558 if (chip->details->spi_dac) {
1559
1560 int size, n;
1561
1562 size = ARRAY_SIZE(spi_dac_init);
1563 for (n = 0; n < size; n++) {
1564 int reg = spi_dac_init[n] >> SPI_REG_SHIFT;
1565
1566 snd_ca0106_spi_write(chip, spi_dac_init[n]);
1567 if (reg < ARRAY_SIZE(chip->spi_dac_reg))
1568 chip->spi_dac_reg[reg] = spi_dac_init[n];
1569 }
1570
1571
1572 snd_ca0106_pcm_power_dac(chip, PCM_FRONT_CHANNEL, 1);
1573 }
1574}
1575
1576static void ca0106_stop_chip(struct snd_ca0106 *chip)
1577{
1578
1579 snd_ca0106_ptr_write(chip, BASIC_INTERRUPT, 0, 0);
1580 outl(0, chip->port + INTE);
1581 snd_ca0106_ptr_write(chip, EXTENDED_INT_MASK, 0, 0);
1582 udelay(1000);
1583
1584
1585 outl(0, chip->port + HCFG);
1586
1587
1588
1589
1590}
1591
1592static int snd_ca0106_create(int dev, struct snd_card *card,
1593 struct pci_dev *pci,
1594 struct snd_ca0106 **rchip)
1595{
1596 struct snd_ca0106 *chip;
1597 const struct snd_ca0106_details *c;
1598 int err;
1599 static const struct snd_device_ops ops = {
1600 .dev_free = snd_ca0106_dev_free,
1601 };
1602
1603 *rchip = NULL;
1604
1605 err = pci_enable_device(pci);
1606 if (err < 0)
1607 return err;
1608 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(32)) < 0 ||
1609 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)) < 0) {
1610 dev_err(card->dev, "error to set 32bit mask DMA\n");
1611 pci_disable_device(pci);
1612 return -ENXIO;
1613 }
1614
1615 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1616 if (chip == NULL) {
1617 pci_disable_device(pci);
1618 return -ENOMEM;
1619 }
1620
1621 chip->card = card;
1622 chip->pci = pci;
1623 chip->irq = -1;
1624
1625 spin_lock_init(&chip->emu_lock);
1626
1627 chip->port = pci_resource_start(pci, 0);
1628 chip->res_port = request_region(chip->port, 0x20, "snd_ca0106");
1629 if (!chip->res_port) {
1630 snd_ca0106_free(chip);
1631 dev_err(card->dev, "cannot allocate the port\n");
1632 return -EBUSY;
1633 }
1634
1635 if (request_irq(pci->irq, snd_ca0106_interrupt,
1636 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1637 snd_ca0106_free(chip);
1638 dev_err(card->dev, "cannot grab irq\n");
1639 return -EBUSY;
1640 }
1641 chip->irq = pci->irq;
1642 card->sync_irq = chip->irq;
1643
1644
1645 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev,
1646 1024, &chip->buffer) < 0) {
1647 snd_ca0106_free(chip);
1648 return -ENOMEM;
1649 }
1650
1651 pci_set_master(pci);
1652
1653 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
1654 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
1655 dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n",
1656 chip->model, pci->revision, chip->serial);
1657 strcpy(card->driver, "CA0106");
1658 strcpy(card->shortname, "CA0106");
1659
1660 for (c = ca0106_chip_details; c->serial; c++) {
1661 if (subsystem[dev]) {
1662 if (c->serial == subsystem[dev])
1663 break;
1664 } else if (c->serial == chip->serial)
1665 break;
1666 }
1667 chip->details = c;
1668 if (subsystem[dev]) {
1669 dev_info(card->dev, "Sound card name=%s, "
1670 "subsystem=0x%x. Forced to subsystem=0x%x\n",
1671 c->name, chip->serial, subsystem[dev]);
1672 }
1673
1674 sprintf(card->longname, "%s at 0x%lx irq %i",
1675 c->name, chip->port, chip->irq);
1676
1677 ca0106_init_chip(chip, 0);
1678
1679 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1680 if (err < 0) {
1681 snd_ca0106_free(chip);
1682 return err;
1683 }
1684 *rchip = chip;
1685 return 0;
1686}
1687
1688
1689static void ca0106_midi_interrupt_enable(struct snd_ca_midi *midi, int intr)
1690{
1691 snd_ca0106_intr_enable((struct snd_ca0106 *)(midi->dev_id), intr);
1692}
1693
1694static void ca0106_midi_interrupt_disable(struct snd_ca_midi *midi, int intr)
1695{
1696 snd_ca0106_intr_disable((struct snd_ca0106 *)(midi->dev_id), intr);
1697}
1698
1699static unsigned char ca0106_midi_read(struct snd_ca_midi *midi, int idx)
1700{
1701 return (unsigned char)snd_ca0106_ptr_read((struct snd_ca0106 *)(midi->dev_id),
1702 midi->port + idx, 0);
1703}
1704
1705static void ca0106_midi_write(struct snd_ca_midi *midi, int data, int idx)
1706{
1707 snd_ca0106_ptr_write((struct snd_ca0106 *)(midi->dev_id), midi->port + idx, 0, data);
1708}
1709
1710static struct snd_card *ca0106_dev_id_card(void *dev_id)
1711{
1712 return ((struct snd_ca0106 *)dev_id)->card;
1713}
1714
1715static int ca0106_dev_id_port(void *dev_id)
1716{
1717 return ((struct snd_ca0106 *)dev_id)->port;
1718}
1719
1720static int snd_ca0106_midi(struct snd_ca0106 *chip, unsigned int channel)
1721{
1722 struct snd_ca_midi *midi;
1723 char *name;
1724 int err;
1725
1726 if (channel == CA0106_MIDI_CHAN_B) {
1727 name = "CA0106 MPU-401 (UART) B";
1728 midi = &chip->midi2;
1729 midi->tx_enable = INTE_MIDI_TX_B;
1730 midi->rx_enable = INTE_MIDI_RX_B;
1731 midi->ipr_tx = IPR_MIDI_TX_B;
1732 midi->ipr_rx = IPR_MIDI_RX_B;
1733 midi->port = MIDI_UART_B_DATA;
1734 } else {
1735 name = "CA0106 MPU-401 (UART)";
1736 midi = &chip->midi;
1737 midi->tx_enable = INTE_MIDI_TX_A;
1738 midi->rx_enable = INTE_MIDI_TX_B;
1739 midi->ipr_tx = IPR_MIDI_TX_A;
1740 midi->ipr_rx = IPR_MIDI_RX_A;
1741 midi->port = MIDI_UART_A_DATA;
1742 }
1743
1744 midi->reset = CA0106_MPU401_RESET;
1745 midi->enter_uart = CA0106_MPU401_ENTER_UART;
1746 midi->ack = CA0106_MPU401_ACK;
1747
1748 midi->input_avail = CA0106_MIDI_INPUT_AVAIL;
1749 midi->output_ready = CA0106_MIDI_OUTPUT_READY;
1750
1751 midi->channel = channel;
1752
1753 midi->interrupt_enable = ca0106_midi_interrupt_enable;
1754 midi->interrupt_disable = ca0106_midi_interrupt_disable;
1755
1756 midi->read = ca0106_midi_read;
1757 midi->write = ca0106_midi_write;
1758
1759 midi->get_dev_id_card = ca0106_dev_id_card;
1760 midi->get_dev_id_port = ca0106_dev_id_port;
1761
1762 midi->dev_id = chip;
1763
1764 if ((err = ca_midi_init(chip, midi, 0, name)) < 0)
1765 return err;
1766
1767 return 0;
1768}
1769
1770
1771static int snd_ca0106_probe(struct pci_dev *pci,
1772 const struct pci_device_id *pci_id)
1773{
1774 static int dev;
1775 struct snd_card *card;
1776 struct snd_ca0106 *chip;
1777 int i, err;
1778
1779 if (dev >= SNDRV_CARDS)
1780 return -ENODEV;
1781 if (!enable[dev]) {
1782 dev++;
1783 return -ENOENT;
1784 }
1785
1786 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1787 0, &card);
1788 if (err < 0)
1789 return err;
1790
1791 err = snd_ca0106_create(dev, card, pci, &chip);
1792 if (err < 0)
1793 goto error;
1794 card->private_data = chip;
1795
1796 for (i = 0; i < 4; i++) {
1797 err = snd_ca0106_pcm(chip, i);
1798 if (err < 0)
1799 goto error;
1800 }
1801
1802 if (chip->details->ac97 == 1) {
1803
1804 err = snd_ca0106_ac97(chip);
1805 if (err < 0)
1806 goto error;
1807 }
1808 err = snd_ca0106_mixer(chip);
1809 if (err < 0)
1810 goto error;
1811
1812 dev_dbg(card->dev, "probe for MIDI channel A ...");
1813 err = snd_ca0106_midi(chip, CA0106_MIDI_CHAN_A);
1814 if (err < 0)
1815 goto error;
1816 dev_dbg(card->dev, " done.\n");
1817
1818#ifdef CONFIG_SND_PROC_FS
1819 snd_ca0106_proc_init(chip);
1820#endif
1821
1822 err = snd_card_register(card);
1823 if (err < 0)
1824 goto error;
1825
1826 pci_set_drvdata(pci, card);
1827 dev++;
1828 return 0;
1829
1830 error:
1831 snd_card_free(card);
1832 return err;
1833}
1834
1835static void snd_ca0106_remove(struct pci_dev *pci)
1836{
1837 snd_card_free(pci_get_drvdata(pci));
1838}
1839
1840#ifdef CONFIG_PM_SLEEP
1841static int snd_ca0106_suspend(struct device *dev)
1842{
1843 struct snd_card *card = dev_get_drvdata(dev);
1844 struct snd_ca0106 *chip = card->private_data;
1845
1846 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1847 if (chip->details->ac97)
1848 snd_ac97_suspend(chip->ac97);
1849 snd_ca0106_mixer_suspend(chip);
1850
1851 ca0106_stop_chip(chip);
1852 return 0;
1853}
1854
1855static int snd_ca0106_resume(struct device *dev)
1856{
1857 struct snd_card *card = dev_get_drvdata(dev);
1858 struct snd_ca0106 *chip = card->private_data;
1859 int i;
1860
1861 ca0106_init_chip(chip, 1);
1862
1863 if (chip->details->ac97)
1864 snd_ac97_resume(chip->ac97);
1865 snd_ca0106_mixer_resume(chip);
1866 if (chip->details->spi_dac) {
1867 for (i = 0; i < ARRAY_SIZE(chip->spi_dac_reg); i++)
1868 snd_ca0106_spi_write(chip, chip->spi_dac_reg[i]);
1869 }
1870
1871 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1872 return 0;
1873}
1874
1875static SIMPLE_DEV_PM_OPS(snd_ca0106_pm, snd_ca0106_suspend, snd_ca0106_resume);
1876#define SND_CA0106_PM_OPS &snd_ca0106_pm
1877#else
1878#define SND_CA0106_PM_OPS NULL
1879#endif
1880
1881
1882static const struct pci_device_id snd_ca0106_ids[] = {
1883 { PCI_VDEVICE(CREATIVE, 0x0007), 0 },
1884 { 0, }
1885};
1886MODULE_DEVICE_TABLE(pci, snd_ca0106_ids);
1887
1888
1889static struct pci_driver ca0106_driver = {
1890 .name = KBUILD_MODNAME,
1891 .id_table = snd_ca0106_ids,
1892 .probe = snd_ca0106_probe,
1893 .remove = snd_ca0106_remove,
1894 .driver = {
1895 .pm = SND_CA0106_PM_OPS,
1896 },
1897};
1898
1899module_pci_driver(ca0106_driver);
1900
