linux/sound/soc/codecs/max98390.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * max98390.c  --  MAX98390 ALSA Soc Audio driver
   4 *
   5 * Copyright (C) 2020 Maxim Integrated Products
   6 *
   7 */
   8
   9#include <linux/acpi.h>
  10#include <linux/cdev.h>
  11#include <linux/dmi.h>
  12#include <linux/firmware.h>
  13#include <linux/gpio.h>
  14#include <linux/i2c.h>
  15#include <linux/module.h>
  16#include <linux/of_gpio.h>
  17#include <linux/regmap.h>
  18#include <linux/slab.h>
  19#include <linux/time.h>
  20#include <sound/pcm.h>
  21#include <sound/pcm_params.h>
  22#include <sound/soc.h>
  23#include <sound/tlv.h>
  24
  25#include "max98390.h"
  26
  27static struct reg_default max98390_reg_defaults[] = {
  28        {MAX98390_INT_EN1, 0xf0},
  29        {MAX98390_INT_EN2, 0x00},
  30        {MAX98390_INT_EN3, 0x00},
  31        {MAX98390_INT_FLAG_CLR1, 0x00},
  32        {MAX98390_INT_FLAG_CLR2, 0x00},
  33        {MAX98390_INT_FLAG_CLR3, 0x00},
  34        {MAX98390_IRQ_CTRL, 0x01},
  35        {MAX98390_CLK_MON, 0x6d},
  36        {MAX98390_DAT_MON, 0x03},
  37        {MAX98390_WDOG_CTRL, 0x00},
  38        {MAX98390_WDOG_RST, 0x00},
  39        {MAX98390_MEAS_ADC_THERM_WARN_THRESH, 0x75},
  40        {MAX98390_MEAS_ADC_THERM_SHDN_THRESH, 0x8c},
  41        {MAX98390_MEAS_ADC_THERM_HYSTERESIS, 0x08},
  42        {MAX98390_PIN_CFG, 0x55},
  43        {MAX98390_PCM_RX_EN_A, 0x00},
  44        {MAX98390_PCM_RX_EN_B, 0x00},
  45        {MAX98390_PCM_TX_EN_A, 0x00},
  46        {MAX98390_PCM_TX_EN_B, 0x00},
  47        {MAX98390_PCM_TX_HIZ_CTRL_A, 0xff},
  48        {MAX98390_PCM_TX_HIZ_CTRL_B, 0xff},
  49        {MAX98390_PCM_CH_SRC_1, 0x00},
  50        {MAX98390_PCM_CH_SRC_2, 0x00},
  51        {MAX98390_PCM_CH_SRC_3, 0x00},
  52        {MAX98390_PCM_MODE_CFG, 0xc0},
  53        {MAX98390_PCM_MASTER_MODE, 0x1c},
  54        {MAX98390_PCM_CLK_SETUP, 0x44},
  55        {MAX98390_PCM_SR_SETUP, 0x08},
  56        {MAX98390_ICC_RX_EN_A, 0x00},
  57        {MAX98390_ICC_RX_EN_B, 0x00},
  58        {MAX98390_ICC_TX_EN_A, 0x00},
  59        {MAX98390_ICC_TX_EN_B, 0x00},
  60        {MAX98390_ICC_HIZ_MANUAL_MODE, 0x00},
  61        {MAX98390_ICC_TX_HIZ_EN_A, 0x00},
  62        {MAX98390_ICC_TX_HIZ_EN_B, 0x00},
  63        {MAX98390_ICC_LNK_EN, 0x00},
  64        {MAX98390_R2039_AMP_DSP_CFG, 0x0f},
  65        {MAX98390_R203A_AMP_EN, 0x81},
  66        {MAX98390_TONE_GEN_DC_CFG, 0x00},
  67        {MAX98390_SPK_SRC_SEL, 0x00},
  68        {MAX98390_SSM_CFG, 0x85},
  69        {MAX98390_MEAS_EN, 0x03},
  70        {MAX98390_MEAS_DSP_CFG, 0x0f},
  71        {MAX98390_BOOST_CTRL0, 0x1c},
  72        {MAX98390_BOOST_CTRL3, 0x01},
  73        {MAX98390_BOOST_CTRL1, 0x40},
  74        {MAX98390_MEAS_ADC_CFG, 0x07},
  75        {MAX98390_MEAS_ADC_BASE_MSB, 0x00},
  76        {MAX98390_MEAS_ADC_BASE_LSB, 0x23},
  77        {MAX98390_ADC_CH0_DIVIDE, 0x00},
  78        {MAX98390_ADC_CH1_DIVIDE, 0x00},
  79        {MAX98390_ADC_CH2_DIVIDE, 0x00},
  80        {MAX98390_ADC_CH0_FILT_CFG, 0x00},
  81        {MAX98390_ADC_CH1_FILT_CFG, 0x00},
  82        {MAX98390_ADC_CH2_FILT_CFG, 0x00},
  83        {MAX98390_PWR_GATE_CTL, 0x2c},
  84        {MAX98390_BROWNOUT_EN, 0x00},
  85        {MAX98390_BROWNOUT_INFINITE_HOLD, 0x00},
  86        {MAX98390_BROWNOUT_INFINITE_HOLD_CLR, 0x00},
  87        {MAX98390_BROWNOUT_LVL_HOLD, 0x00},
  88        {MAX98390_BROWNOUT_LVL1_THRESH, 0x00},
  89        {MAX98390_BROWNOUT_LVL2_THRESH, 0x00},
  90        {MAX98390_BROWNOUT_LVL3_THRESH, 0x00},
  91        {MAX98390_BROWNOUT_LVL4_THRESH, 0x00},
  92        {MAX98390_BROWNOUT_THRESH_HYSTERYSIS, 0x00},
  93        {MAX98390_BROWNOUT_AMP_LIMITER_ATK_REL, 0x1f},
  94        {MAX98390_BROWNOUT_AMP_GAIN_ATK_REL, 0x00},
  95        {MAX98390_BROWNOUT_AMP1_CLIP_MODE, 0x00},
  96        {MAX98390_BROWNOUT_LVL1_CUR_LIMIT, 0x00},
  97        {MAX98390_BROWNOUT_LVL1_AMP1_CTRL1, 0x00},
  98        {MAX98390_BROWNOUT_LVL1_AMP1_CTRL2, 0x00},
  99        {MAX98390_BROWNOUT_LVL1_AMP1_CTRL3, 0x00},
 100        {MAX98390_BROWNOUT_LVL2_CUR_LIMIT, 0x00},
 101        {MAX98390_BROWNOUT_LVL2_AMP1_CTRL1, 0x00},
 102        {MAX98390_BROWNOUT_LVL2_AMP1_CTRL2, 0x00},
 103        {MAX98390_BROWNOUT_LVL2_AMP1_CTRL3, 0x00},
 104        {MAX98390_BROWNOUT_LVL3_CUR_LIMIT, 0x00},
 105        {MAX98390_BROWNOUT_LVL3_AMP1_CTRL1, 0x00},
 106        {MAX98390_BROWNOUT_LVL3_AMP1_CTRL2, 0x00},
 107        {MAX98390_BROWNOUT_LVL3_AMP1_CTRL3, 0x00},
 108        {MAX98390_BROWNOUT_LVL4_CUR_LIMIT, 0x00},
 109        {MAX98390_BROWNOUT_LVL4_AMP1_CTRL1, 0x00},
 110        {MAX98390_BROWNOUT_LVL4_AMP1_CTRL2, 0x00},
 111        {MAX98390_BROWNOUT_LVL4_AMP1_CTRL3, 0x00},
 112        {MAX98390_BROWNOUT_ILIM_HLD, 0x00},
 113        {MAX98390_BROWNOUT_LIM_HLD, 0x00},
 114        {MAX98390_BROWNOUT_CLIP_HLD, 0x00},
 115        {MAX98390_BROWNOUT_GAIN_HLD, 0x00},
 116        {MAX98390_ENV_TRACK_VOUT_HEADROOM, 0x0f},
 117        {MAX98390_ENV_TRACK_BOOST_VOUT_DELAY, 0x80},
 118        {MAX98390_ENV_TRACK_REL_RATE, 0x07},
 119        {MAX98390_ENV_TRACK_HOLD_RATE, 0x07},
 120        {MAX98390_ENV_TRACK_CTRL, 0x01},
 121        {MAX98390_BOOST_BYPASS1, 0x49},
 122        {MAX98390_BOOST_BYPASS2, 0x2b},
 123        {MAX98390_BOOST_BYPASS3, 0x08},
 124        {MAX98390_FET_SCALING1, 0x00},
 125        {MAX98390_FET_SCALING2, 0x03},
 126        {MAX98390_FET_SCALING3, 0x00},
 127        {MAX98390_FET_SCALING4, 0x07},
 128        {MAX98390_SPK_SPEEDUP, 0x00},
 129        {DSMIG_WB_DRC_RELEASE_TIME_1, 0x00},
 130        {DSMIG_WB_DRC_RELEASE_TIME_2, 0x00},
 131        {DSMIG_WB_DRC_ATTACK_TIME_1, 0x00},
 132        {DSMIG_WB_DRC_ATTACK_TIME_2, 0x00},
 133        {DSMIG_WB_DRC_COMPRESSION_RATIO, 0x00},
 134        {DSMIG_WB_DRC_COMPRESSION_THRESHOLD, 0x00},
 135        {DSMIG_WB_DRC_MAKEUPGAIN, 0x00},
 136        {DSMIG_WB_DRC_NOISE_GATE_THRESHOLD, 0x00},
 137        {DSMIG_WBDRC_HPF_ENABLE, 0x00},
 138        {DSMIG_WB_DRC_TEST_SMOOTHER_OUT_EN, 0x00},
 139        {DSMIG_PPR_THRESHOLD, 0x00},
 140        {DSM_STEREO_BASS_CHANNEL_SELECT, 0x00},
 141        {DSM_TPROT_THRESHOLD_BYTE0, 0x00},
 142        {DSM_TPROT_THRESHOLD_BYTE1, 0x00},
 143        {DSM_TPROT_ROOM_TEMPERATURE_BYTE0, 0x00},
 144        {DSM_TPROT_ROOM_TEMPERATURE_BYTE1, 0x00},
 145        {DSM_TPROT_RECIP_RDC_ROOM_BYTE0, 0x00},
 146        {DSM_TPROT_RECIP_RDC_ROOM_BYTE1, 0x00},
 147        {DSM_TPROT_RECIP_RDC_ROOM_BYTE2, 0x00},
 148        {DSM_TPROT_RECIP_TCONST_BYTE0, 0x00},
 149        {DSM_TPROT_RECIP_TCONST_BYTE1, 0x00},
 150        {DSM_TPROT_RECIP_TCONST_BYTE2, 0x00},
 151        {DSM_THERMAL_ATTENUATION_SETTINGS, 0x00},
 152        {DSM_THERMAL_PILOT_TONE_ATTENUATION, 0x00},
 153        {DSM_TPROT_PG_TEMP_THRESH_BYTE0, 0x00},
 154        {DSM_TPROT_PG_TEMP_THRESH_BYTE1, 0x00},
 155        {DSMIG_DEBUZZER_THRESHOLD, 0x00},
 156        {DSMIG_DEBUZZER_ALPHA_COEF_TEST_ONLY, 0x08},
 157        {DSM_VOL_ENA, 0x20},
 158        {DSM_VOL_CTRL, 0xa0},
 159        {DSMIG_EN, 0x00},
 160        {MAX98390_R23E1_DSP_GLOBAL_EN, 0x00},
 161        {MAX98390_R23FF_GLOBAL_EN, 0x00},
 162};
 163
 164static int max98390_dsm_calibrate(struct snd_soc_component *component);
 165
 166static int max98390_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
 167{
 168        struct snd_soc_component *component = codec_dai->component;
 169        struct max98390_priv *max98390 =
 170                snd_soc_component_get_drvdata(component);
 171        unsigned int mode;
 172        unsigned int format;
 173        unsigned int invert = 0;
 174
 175        dev_dbg(component->dev, "%s: fmt 0x%08X\n", __func__, fmt);
 176
 177        switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 178        case SND_SOC_DAIFMT_CBS_CFS:
 179                mode = MAX98390_PCM_MASTER_MODE_SLAVE;
 180                break;
 181        case SND_SOC_DAIFMT_CBM_CFM:
 182                max98390->master = true;
 183                mode = MAX98390_PCM_MASTER_MODE_MASTER;
 184                break;
 185        default:
 186                dev_err(component->dev, "DAI clock mode unsupported\n");
 187                return -EINVAL;
 188        }
 189
 190        regmap_update_bits(max98390->regmap,
 191                MAX98390_PCM_MASTER_MODE,
 192                MAX98390_PCM_MASTER_MODE_MASK,
 193                mode);
 194
 195        switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 196        case SND_SOC_DAIFMT_NB_NF:
 197                break;
 198        case SND_SOC_DAIFMT_IB_NF:
 199                invert = MAX98390_PCM_MODE_CFG_PCM_BCLKEDGE;
 200                break;
 201        default:
 202                dev_err(component->dev, "DAI invert mode unsupported\n");
 203                return -EINVAL;
 204        }
 205
 206        regmap_update_bits(max98390->regmap,
 207                MAX98390_PCM_MODE_CFG,
 208                MAX98390_PCM_MODE_CFG_PCM_BCLKEDGE,
 209                invert);
 210
 211        /* interface format */
 212        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 213        case SND_SOC_DAIFMT_I2S:
 214                format = MAX98390_PCM_FORMAT_I2S;
 215                break;
 216        case SND_SOC_DAIFMT_LEFT_J:
 217                format = MAX98390_PCM_FORMAT_LJ;
 218                break;
 219        case SND_SOC_DAIFMT_DSP_A:
 220                format = MAX98390_PCM_FORMAT_TDM_MODE1;
 221                break;
 222        case SND_SOC_DAIFMT_DSP_B:
 223                format = MAX98390_PCM_FORMAT_TDM_MODE0;
 224                break;
 225        default:
 226                return -EINVAL;
 227        }
 228
 229        regmap_update_bits(max98390->regmap,
 230                MAX98390_PCM_MODE_CFG,
 231                MAX98390_PCM_MODE_CFG_FORMAT_MASK,
 232                format << MAX98390_PCM_MODE_CFG_FORMAT_SHIFT);
 233
 234        return 0;
 235}
 236
 237static int max98390_get_bclk_sel(int bclk)
 238{
 239        int i;
 240        /* BCLKs per LRCLK */
 241        static int bclk_sel_table[] = {
 242                32, 48, 64, 96, 128, 192, 256, 320, 384, 512,
 243        };
 244        /* match BCLKs per LRCLK */
 245        for (i = 0; i < ARRAY_SIZE(bclk_sel_table); i++) {
 246                if (bclk_sel_table[i] == bclk)
 247                        return i + 2;
 248        }
 249        return 0;
 250}
 251
 252static int max98390_set_clock(struct snd_soc_component *component,
 253                struct snd_pcm_hw_params *params)
 254{
 255        struct max98390_priv *max98390 =
 256                snd_soc_component_get_drvdata(component);
 257        /* codec MCLK rate in master mode */
 258        static int rate_table[] = {
 259                5644800, 6000000, 6144000, 6500000,
 260                9600000, 11289600, 12000000, 12288000,
 261                13000000, 19200000,
 262        };
 263        /* BCLK/LRCLK ratio calculation */
 264        int blr_clk_ratio = params_channels(params)
 265                * snd_pcm_format_width(params_format(params));
 266        int value;
 267
 268        if (max98390->master) {
 269                int i;
 270                /* match rate to closest value */
 271                for (i = 0; i < ARRAY_SIZE(rate_table); i++) {
 272                        if (rate_table[i] >= max98390->sysclk)
 273                                break;
 274                }
 275                if (i == ARRAY_SIZE(rate_table)) {
 276                        dev_err(component->dev, "failed to find proper clock rate.\n");
 277                        return -EINVAL;
 278                }
 279
 280                regmap_update_bits(max98390->regmap,
 281                        MAX98390_PCM_MASTER_MODE,
 282                        MAX98390_PCM_MASTER_MODE_MCLK_MASK,
 283                        i << MAX98390_PCM_MASTER_MODE_MCLK_RATE_SHIFT);
 284        }
 285
 286        if (!max98390->tdm_mode) {
 287                /* BCLK configuration */
 288                value = max98390_get_bclk_sel(blr_clk_ratio);
 289                if (!value) {
 290                        dev_err(component->dev, "format unsupported %d\n",
 291                                params_format(params));
 292                        return -EINVAL;
 293                }
 294
 295                regmap_update_bits(max98390->regmap,
 296                        MAX98390_PCM_CLK_SETUP,
 297                        MAX98390_PCM_CLK_SETUP_BSEL_MASK,
 298                        value);
 299        }
 300        return 0;
 301}
 302
 303static int max98390_dai_hw_params(struct snd_pcm_substream *substream,
 304                struct snd_pcm_hw_params *params,
 305                struct snd_soc_dai *dai)
 306{
 307        struct snd_soc_component *component =
 308                dai->component;
 309        struct max98390_priv *max98390 =
 310                snd_soc_component_get_drvdata(component);
 311
 312        unsigned int sampling_rate;
 313        unsigned int chan_sz;
 314
 315        /* pcm mode configuration */
 316        switch (snd_pcm_format_width(params_format(params))) {
 317        case 16:
 318                chan_sz = MAX98390_PCM_MODE_CFG_CHANSZ_16;
 319                break;
 320        case 24:
 321                chan_sz = MAX98390_PCM_MODE_CFG_CHANSZ_24;
 322                break;
 323        case 32:
 324                chan_sz = MAX98390_PCM_MODE_CFG_CHANSZ_32;
 325                break;
 326        default:
 327                dev_err(component->dev, "format unsupported %d\n",
 328                        params_format(params));
 329                goto err;
 330        }
 331
 332        regmap_update_bits(max98390->regmap,
 333                MAX98390_PCM_MODE_CFG,
 334                MAX98390_PCM_MODE_CFG_CHANSZ_MASK, chan_sz);
 335
 336        dev_dbg(component->dev, "format supported %d",
 337                params_format(params));
 338
 339        /* sampling rate configuration */
 340        switch (params_rate(params)) {
 341        case 8000:
 342                sampling_rate = MAX98390_PCM_SR_SET1_SR_8000;
 343                break;
 344        case 11025:
 345                sampling_rate = MAX98390_PCM_SR_SET1_SR_11025;
 346                break;
 347        case 12000:
 348                sampling_rate = MAX98390_PCM_SR_SET1_SR_12000;
 349                break;
 350        case 16000:
 351                sampling_rate = MAX98390_PCM_SR_SET1_SR_16000;
 352                break;
 353        case 22050:
 354                sampling_rate = MAX98390_PCM_SR_SET1_SR_22050;
 355                break;
 356        case 24000:
 357                sampling_rate = MAX98390_PCM_SR_SET1_SR_24000;
 358                break;
 359        case 32000:
 360                sampling_rate = MAX98390_PCM_SR_SET1_SR_32000;
 361                break;
 362        case 44100:
 363                sampling_rate = MAX98390_PCM_SR_SET1_SR_44100;
 364                break;
 365        case 48000:
 366                sampling_rate = MAX98390_PCM_SR_SET1_SR_48000;
 367                break;
 368        default:
 369                dev_err(component->dev, "rate %d not supported\n",
 370                        params_rate(params));
 371                goto err;
 372        }
 373
 374        /* set DAI_SR to correct LRCLK frequency */
 375        regmap_update_bits(max98390->regmap,
 376                MAX98390_PCM_SR_SETUP,
 377                MAX98390_PCM_SR_SET1_SR_MASK,
 378                sampling_rate);
 379
 380        return max98390_set_clock(component, params);
 381err:
 382        return -EINVAL;
 383}
 384
 385static int max98390_dai_tdm_slot(struct snd_soc_dai *dai,
 386                unsigned int tx_mask, unsigned int rx_mask,
 387                int slots, int slot_width)
 388{
 389        struct snd_soc_component *component = dai->component;
 390        struct max98390_priv *max98390 =
 391                snd_soc_component_get_drvdata(component);
 392
 393        int bsel;
 394        unsigned int chan_sz;
 395
 396        if (!tx_mask && !rx_mask && !slots && !slot_width)
 397                max98390->tdm_mode = false;
 398        else
 399                max98390->tdm_mode = true;
 400
 401        dev_dbg(component->dev,
 402                "Tdm mode : %d\n", max98390->tdm_mode);
 403
 404        /* BCLK configuration */
 405        bsel = max98390_get_bclk_sel(slots * slot_width);
 406        if (!bsel) {
 407                dev_err(component->dev, "BCLK %d not supported\n",
 408                        slots * slot_width);
 409                return -EINVAL;
 410        }
 411
 412        regmap_update_bits(max98390->regmap,
 413                MAX98390_PCM_CLK_SETUP,
 414                MAX98390_PCM_CLK_SETUP_BSEL_MASK,
 415                bsel);
 416
 417        /* Channel size configuration */
 418        switch (slot_width) {
 419        case 16:
 420                chan_sz = MAX98390_PCM_MODE_CFG_CHANSZ_16;
 421                break;
 422        case 24:
 423                chan_sz = MAX98390_PCM_MODE_CFG_CHANSZ_24;
 424                break;
 425        case 32:
 426                chan_sz = MAX98390_PCM_MODE_CFG_CHANSZ_32;
 427                break;
 428        default:
 429                dev_err(component->dev, "format unsupported %d\n",
 430                        slot_width);
 431                return -EINVAL;
 432        }
 433
 434        regmap_update_bits(max98390->regmap,
 435                MAX98390_PCM_MODE_CFG,
 436                MAX98390_PCM_MODE_CFG_CHANSZ_MASK, chan_sz);
 437
 438        /* Rx slot configuration */
 439        regmap_write(max98390->regmap,
 440                MAX98390_PCM_RX_EN_A,
 441                rx_mask & 0xFF);
 442        regmap_write(max98390->regmap,
 443                MAX98390_PCM_RX_EN_B,
 444                (rx_mask & 0xFF00) >> 8);
 445
 446        /* Tx slot Hi-Z configuration */
 447        regmap_write(max98390->regmap,
 448                MAX98390_PCM_TX_HIZ_CTRL_A,
 449                ~tx_mask & 0xFF);
 450        regmap_write(max98390->regmap,
 451                MAX98390_PCM_TX_HIZ_CTRL_B,
 452                (~tx_mask & 0xFF00) >> 8);
 453
 454        return 0;
 455}
 456
 457static int max98390_dai_set_sysclk(struct snd_soc_dai *dai,
 458                int clk_id, unsigned int freq, int dir)
 459{
 460        struct snd_soc_component *component = dai->component;
 461        struct max98390_priv *max98390 =
 462                snd_soc_component_get_drvdata(component);
 463
 464        max98390->sysclk = freq;
 465        return 0;
 466}
 467
 468static const struct snd_soc_dai_ops max98390_dai_ops = {
 469        .set_sysclk = max98390_dai_set_sysclk,
 470        .set_fmt = max98390_dai_set_fmt,
 471        .hw_params = max98390_dai_hw_params,
 472        .set_tdm_slot = max98390_dai_tdm_slot,
 473};
 474
 475static int max98390_dac_event(struct snd_soc_dapm_widget *w,
 476                struct snd_kcontrol *kcontrol, int event)
 477{
 478        struct snd_soc_component *component =
 479                snd_soc_dapm_to_component(w->dapm);
 480        struct max98390_priv *max98390 =
 481                snd_soc_component_get_drvdata(component);
 482
 483        switch (event) {
 484        case SND_SOC_DAPM_POST_PMU:
 485                regmap_update_bits(max98390->regmap,
 486                        MAX98390_R203A_AMP_EN,
 487                        MAX98390_AMP_EN_MASK, 1);
 488                regmap_update_bits(max98390->regmap,
 489                        MAX98390_R23FF_GLOBAL_EN,
 490                        MAX98390_GLOBAL_EN_MASK, 1);
 491                break;
 492        case SND_SOC_DAPM_POST_PMD:
 493                regmap_update_bits(max98390->regmap,
 494                        MAX98390_R23FF_GLOBAL_EN,
 495                        MAX98390_GLOBAL_EN_MASK, 0);
 496                regmap_update_bits(max98390->regmap,
 497                        MAX98390_R203A_AMP_EN,
 498                        MAX98390_AMP_EN_MASK, 0);
 499                break;
 500        }
 501        return 0;
 502}
 503
 504static const char * const max98390_switch_text[] = {
 505        "Left", "Right", "LeftRight"};
 506
 507static const char * const max98390_boost_voltage_text[] = {
 508        "6.5V", "6.625V", "6.75V", "6.875V", "7V", "7.125V", "7.25V", "7.375V",
 509        "7.5V", "7.625V", "7.75V", "7.875V", "8V", "8.125V", "8.25V", "8.375V",
 510        "8.5V", "8.625V", "8.75V", "8.875V", "9V", "9.125V", "9.25V", "9.375V",
 511        "9.5V", "9.625V", "9.75V", "9.875V", "10V"
 512};
 513
 514static SOC_ENUM_SINGLE_DECL(max98390_boost_voltage,
 515                MAX98390_BOOST_CTRL0, 0,
 516                max98390_boost_voltage_text);
 517
 518static DECLARE_TLV_DB_SCALE(max98390_spk_tlv, 300, 300, 0);
 519static DECLARE_TLV_DB_SCALE(max98390_digital_tlv, -8000, 50, 0);
 520
 521static const char * const max98390_current_limit_text[] = {
 522        "0.00A", "0.50A", "1.00A", "1.05A", "1.10A", "1.15A", "1.20A", "1.25A",
 523        "1.30A", "1.35A", "1.40A", "1.45A", "1.50A", "1.55A", "1.60A", "1.65A",
 524        "1.70A", "1.75A", "1.80A", "1.85A", "1.90A", "1.95A", "2.00A", "2.05A",
 525        "2.10A", "2.15A", "2.20A", "2.25A", "2.30A", "2.35A", "2.40A", "2.45A",
 526        "2.50A", "2.55A", "2.60A", "2.65A", "2.70A", "2.75A", "2.80A", "2.85A",
 527        "2.90A", "2.95A", "3.00A", "3.05A", "3.10A", "3.15A", "3.20A", "3.25A",
 528        "3.30A", "3.35A", "3.40A", "3.45A", "3.50A", "3.55A", "3.60A", "3.65A",
 529        "3.70A", "3.75A", "3.80A", "3.85A", "3.90A", "3.95A", "4.00A", "4.05A",
 530        "4.10A"
 531};
 532
 533static SOC_ENUM_SINGLE_DECL(max98390_current_limit,
 534                MAX98390_BOOST_CTRL1, 0,
 535                max98390_current_limit_text);
 536
 537static int max98390_ref_rdc_put(struct snd_kcontrol *kcontrol,
 538                struct snd_ctl_elem_value *ucontrol)
 539{
 540        struct snd_soc_component *component =
 541                snd_soc_kcontrol_component(kcontrol);
 542        struct max98390_priv *max98390 =
 543                snd_soc_component_get_drvdata(component);
 544
 545        max98390->ref_rdc_value = ucontrol->value.integer.value[0];
 546
 547        regmap_write(max98390->regmap, DSM_TPROT_RECIP_RDC_ROOM_BYTE0,
 548                max98390->ref_rdc_value & 0x000000ff);
 549        regmap_write(max98390->regmap, DSM_TPROT_RECIP_RDC_ROOM_BYTE1,
 550                (max98390->ref_rdc_value >> 8) & 0x000000ff);
 551        regmap_write(max98390->regmap, DSM_TPROT_RECIP_RDC_ROOM_BYTE2,
 552                (max98390->ref_rdc_value >> 16) & 0x000000ff);
 553
 554        return 0;
 555}
 556
 557static int max98390_ref_rdc_get(struct snd_kcontrol *kcontrol,
 558                struct snd_ctl_elem_value *ucontrol)
 559{
 560        struct snd_soc_component *component =
 561                snd_soc_kcontrol_component(kcontrol);
 562        struct max98390_priv *max98390 =
 563                snd_soc_component_get_drvdata(component);
 564
 565        ucontrol->value.integer.value[0] = max98390->ref_rdc_value;
 566
 567        return 0;
 568}
 569
 570static int max98390_ambient_temp_put(struct snd_kcontrol *kcontrol,
 571                struct snd_ctl_elem_value *ucontrol)
 572{
 573        struct snd_soc_component *component =
 574                snd_soc_kcontrol_component(kcontrol);
 575        struct max98390_priv *max98390 =
 576                snd_soc_component_get_drvdata(component);
 577
 578        max98390->ambient_temp_value = ucontrol->value.integer.value[0];
 579
 580        regmap_write(max98390->regmap, DSM_TPROT_ROOM_TEMPERATURE_BYTE1,
 581                (max98390->ambient_temp_value >> 8) & 0x000000ff);
 582        regmap_write(max98390->regmap, DSM_TPROT_ROOM_TEMPERATURE_BYTE0,
 583                (max98390->ambient_temp_value) & 0x000000ff);
 584
 585        return 0;
 586}
 587
 588static int max98390_ambient_temp_get(struct snd_kcontrol *kcontrol,
 589                struct snd_ctl_elem_value *ucontrol)
 590{
 591        struct snd_soc_component *component =
 592                snd_soc_kcontrol_component(kcontrol);
 593        struct max98390_priv *max98390 =
 594                snd_soc_component_get_drvdata(component);
 595
 596        ucontrol->value.integer.value[0] = max98390->ambient_temp_value;
 597
 598        return 0;
 599}
 600
 601static int max98390_adaptive_rdc_put(struct snd_kcontrol *kcontrol,
 602                struct snd_ctl_elem_value *ucontrol)
 603{
 604        struct snd_soc_component *component =
 605                snd_soc_kcontrol_component(kcontrol);
 606
 607        dev_warn(component->dev, "Put adaptive rdc not supported\n");
 608
 609        return 0;
 610}
 611
 612static int max98390_adaptive_rdc_get(struct snd_kcontrol *kcontrol,
 613                struct snd_ctl_elem_value *ucontrol)
 614{
 615        int rdc, rdc0;
 616        struct snd_soc_component *component =
 617                snd_soc_kcontrol_component(kcontrol);
 618        struct max98390_priv *max98390 =
 619                snd_soc_component_get_drvdata(component);
 620
 621        regmap_read(max98390->regmap, THERMAL_RDC_RD_BACK_BYTE1, &rdc);
 622        regmap_read(max98390->regmap, THERMAL_RDC_RD_BACK_BYTE0, &rdc0);
 623        ucontrol->value.integer.value[0] = rdc0 | rdc << 8;
 624
 625        return 0;
 626}
 627
 628static int max98390_dsm_calib_get(struct snd_kcontrol *kcontrol,
 629                struct snd_ctl_elem_value *ucontrol)
 630{
 631        /* Do nothing */
 632        return 0;
 633}
 634
 635static int max98390_dsm_calib_put(struct snd_kcontrol *kcontrol,
 636                struct snd_ctl_elem_value *ucontrol)
 637{
 638        struct snd_soc_component *component =
 639                snd_soc_kcontrol_component(kcontrol);
 640
 641        max98390_dsm_calibrate(component);
 642
 643        return 0;
 644}
 645
 646static const struct snd_kcontrol_new max98390_snd_controls[] = {
 647        SOC_SINGLE_TLV("Digital Volume", DSM_VOL_CTRL,
 648                0, 184, 0,
 649                max98390_digital_tlv),
 650        SOC_SINGLE_TLV("Speaker Volume", MAX98390_R203D_SPK_GAIN,
 651                0, 6, 0,
 652                max98390_spk_tlv),
 653        SOC_SINGLE("Ramp Up Bypass Switch", MAX98390_R2039_AMP_DSP_CFG,
 654                MAX98390_AMP_DSP_CFG_RMP_UP_SHIFT, 1, 0),
 655        SOC_SINGLE("Ramp Down Bypass Switch", MAX98390_R2039_AMP_DSP_CFG,
 656                MAX98390_AMP_DSP_CFG_RMP_DN_SHIFT, 1, 0),
 657        SOC_SINGLE("Boost Clock Phase", MAX98390_BOOST_CTRL3,
 658                MAX98390_BOOST_CLK_PHASE_CFG_SHIFT, 3, 0),
 659        SOC_ENUM("Boost Output Voltage", max98390_boost_voltage),
 660        SOC_ENUM("Current Limit", max98390_current_limit),
 661        SOC_SINGLE_EXT("DSM Rdc", SND_SOC_NOPM, 0, 0xffffff, 0,
 662                max98390_ref_rdc_get, max98390_ref_rdc_put),
 663        SOC_SINGLE_EXT("DSM Ambient Temp", SND_SOC_NOPM, 0, 0xffff, 0,
 664                max98390_ambient_temp_get, max98390_ambient_temp_put),
 665        SOC_SINGLE_EXT("DSM Adaptive Rdc", SND_SOC_NOPM, 0, 0xffff, 0,
 666                max98390_adaptive_rdc_get, max98390_adaptive_rdc_put),
 667        SOC_SINGLE_EXT("DSM Calibration", SND_SOC_NOPM, 0, 1, 0,
 668                max98390_dsm_calib_get, max98390_dsm_calib_put),
 669};
 670
 671static const struct soc_enum dai_sel_enum =
 672        SOC_ENUM_SINGLE(MAX98390_PCM_CH_SRC_1,
 673                MAX98390_PCM_RX_CH_SRC_SHIFT,
 674                3, max98390_switch_text);
 675
 676static const struct snd_kcontrol_new max98390_dai_controls =
 677        SOC_DAPM_ENUM("DAI Sel", dai_sel_enum);
 678
 679static const struct snd_soc_dapm_widget max98390_dapm_widgets[] = {
 680        SND_SOC_DAPM_DAC_E("Amp Enable", "HiFi Playback",
 681                SND_SOC_NOPM, 0, 0, max98390_dac_event,
 682                SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 683        SND_SOC_DAPM_MUX("DAI Sel Mux", SND_SOC_NOPM, 0, 0,
 684                &max98390_dai_controls),
 685        SND_SOC_DAPM_OUTPUT("BE_OUT"),
 686};
 687
 688static const struct snd_soc_dapm_route max98390_audio_map[] = {
 689        /* Plabyack */
 690        {"DAI Sel Mux", "Left", "Amp Enable"},
 691        {"DAI Sel Mux", "Right", "Amp Enable"},
 692        {"DAI Sel Mux", "LeftRight", "Amp Enable"},
 693        {"BE_OUT", NULL, "DAI Sel Mux"},
 694};
 695
 696static bool max98390_readable_register(struct device *dev, unsigned int reg)
 697{
 698        switch (reg) {
 699        case MAX98390_SOFTWARE_RESET ... MAX98390_INT_EN3:
 700        case MAX98390_IRQ_CTRL ... MAX98390_WDOG_CTRL:
 701        case MAX98390_MEAS_ADC_THERM_WARN_THRESH
 702                ... MAX98390_BROWNOUT_INFINITE_HOLD:
 703        case MAX98390_BROWNOUT_LVL_HOLD ... DSMIG_DEBUZZER_THRESHOLD:
 704        case DSM_VOL_ENA ... MAX98390_R24FF_REV_ID:
 705                return true;
 706        default:
 707                return false;
 708        }
 709};
 710
 711static bool max98390_volatile_reg(struct device *dev, unsigned int reg)
 712{
 713        switch (reg) {
 714        case MAX98390_SOFTWARE_RESET ... MAX98390_INT_EN3:
 715        case MAX98390_MEAS_ADC_CH0_READ ... MAX98390_MEAS_ADC_CH2_READ:
 716        case MAX98390_PWR_GATE_STATUS ... MAX98390_BROWNOUT_STATUS:
 717        case MAX98390_BROWNOUT_LOWEST_STATUS:
 718        case MAX98390_ENV_TRACK_BOOST_VOUT_READ:
 719        case DSM_STBASS_HPF_B0_BYTE0 ... DSM_DEBUZZER_ATTACK_TIME_BYTE2:
 720        case THERMAL_RDC_RD_BACK_BYTE1 ... DSMIG_DEBUZZER_THRESHOLD:
 721        case DSM_THERMAL_GAIN ... DSM_WBDRC_GAIN:
 722                return true;
 723        default:
 724                return false;
 725        }
 726}
 727
 728#define MAX98390_RATES SNDRV_PCM_RATE_8000_48000
 729
 730#define MAX98390_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
 731        SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
 732
 733static struct snd_soc_dai_driver max98390_dai[] = {
 734        {
 735                .name = "max98390-aif1",
 736                .playback = {
 737                        .stream_name = "HiFi Playback",
 738                        .channels_min = 1,
 739                        .channels_max = 2,
 740                        .rates = MAX98390_RATES,
 741                        .formats = MAX98390_FORMATS,
 742                },
 743                .capture = {
 744                        .stream_name = "HiFi Capture",
 745                        .channels_min = 1,
 746                        .channels_max = 2,
 747                        .rates = MAX98390_RATES,
 748                        .formats = MAX98390_FORMATS,
 749                },
 750                .ops = &max98390_dai_ops,
 751        }
 752};
 753
 754static int max98390_dsm_init(struct snd_soc_component *component)
 755{
 756        int ret;
 757        int param_size, param_start_addr;
 758        char filename[128];
 759        const char *vendor, *product;
 760        struct max98390_priv *max98390 =
 761                snd_soc_component_get_drvdata(component);
 762        const struct firmware *fw;
 763        char *dsm_param;
 764
 765        vendor = dmi_get_system_info(DMI_SYS_VENDOR);
 766        product = dmi_get_system_info(DMI_PRODUCT_NAME);
 767
 768        if (vendor && product) {
 769                snprintf(filename, sizeof(filename), "dsm_param_%s_%s.bin",
 770                        vendor, product);
 771        } else {
 772                sprintf(filename, "dsm_param.bin");
 773        }
 774        ret = request_firmware(&fw, filename, component->dev);
 775        if (ret) {
 776                ret = request_firmware(&fw, "dsm_param.bin", component->dev);
 777                if (ret)
 778                        goto err;
 779        }
 780
 781        dev_dbg(component->dev,
 782                "max98390: param fw size %zd\n",
 783                fw->size);
 784        if (fw->size < MAX98390_DSM_PARAM_MIN_SIZE) {
 785                dev_err(component->dev,
 786                        "param fw is invalid.\n");
 787                ret = -EINVAL;
 788                goto err_alloc;
 789        }
 790        dsm_param = (char *)fw->data;
 791        param_start_addr = (dsm_param[0] & 0xff) | (dsm_param[1] & 0xff) << 8;
 792        param_size = (dsm_param[2] & 0xff) | (dsm_param[3] & 0xff) << 8;
 793        if (param_size > MAX98390_DSM_PARAM_MAX_SIZE ||
 794                param_start_addr < MAX98390_IRQ_CTRL ||
 795                fw->size < param_size + MAX98390_DSM_PAYLOAD_OFFSET) {
 796                dev_err(component->dev,
 797                        "param fw is invalid.\n");
 798                ret = -EINVAL;
 799                goto err_alloc;
 800        }
 801        regmap_write(max98390->regmap, MAX98390_R203A_AMP_EN, 0x80);
 802        dsm_param += MAX98390_DSM_PAYLOAD_OFFSET;
 803        regmap_bulk_write(max98390->regmap, param_start_addr,
 804                dsm_param, param_size);
 805        regmap_write(max98390->regmap, MAX98390_R23E1_DSP_GLOBAL_EN, 0x01);
 806
 807err_alloc:
 808        release_firmware(fw);
 809err:
 810        return ret;
 811}
 812
 813static int max98390_dsm_calibrate(struct snd_soc_component *component)
 814{
 815        unsigned int rdc, rdc_cal_result, temp;
 816        unsigned int rdc_integer, rdc_factor;
 817        struct max98390_priv *max98390 =
 818                snd_soc_component_get_drvdata(component);
 819
 820        regmap_write(max98390->regmap, MAX98390_R203A_AMP_EN, 0x81);
 821        regmap_write(max98390->regmap, MAX98390_R23FF_GLOBAL_EN, 0x01);
 822
 823        regmap_read(max98390->regmap,
 824                THERMAL_RDC_RD_BACK_BYTE1, &rdc);
 825        regmap_read(max98390->regmap,
 826                THERMAL_RDC_RD_BACK_BYTE0, &rdc_cal_result);
 827        rdc_cal_result |= (rdc << 8) & 0x0000FFFF;
 828        if (rdc_cal_result)
 829                max98390->ref_rdc_value = 268435456U / rdc_cal_result;
 830
 831        regmap_read(max98390->regmap, MAX98390_MEAS_ADC_CH2_READ, &temp);
 832        max98390->ambient_temp_value = temp * 52 - 1188;
 833
 834        rdc_integer =  rdc_cal_result * 937  / 65536;
 835        rdc_factor = ((rdc_cal_result * 937 * 100) / 65536)
 836                                        - (rdc_integer * 100);
 837
 838        dev_info(component->dev, "rdc resistance about %d.%02d ohm, reg=0x%X temp reg=0x%X\n",
 839                 rdc_integer, rdc_factor, rdc_cal_result, temp);
 840
 841        regmap_write(max98390->regmap, MAX98390_R23FF_GLOBAL_EN, 0x00);
 842        regmap_write(max98390->regmap, MAX98390_R203A_AMP_EN, 0x80);
 843
 844        return 0;
 845}
 846
 847static void max98390_init_regs(struct snd_soc_component *component)
 848{
 849        struct max98390_priv *max98390 =
 850                snd_soc_component_get_drvdata(component);
 851
 852        regmap_write(max98390->regmap, MAX98390_CLK_MON, 0x6f);
 853        regmap_write(max98390->regmap, MAX98390_DAT_MON, 0x00);
 854        regmap_write(max98390->regmap, MAX98390_PWR_GATE_CTL, 0x00);
 855        regmap_write(max98390->regmap, MAX98390_PCM_RX_EN_A, 0x03);
 856        regmap_write(max98390->regmap, MAX98390_ENV_TRACK_VOUT_HEADROOM, 0x0e);
 857        regmap_write(max98390->regmap, MAX98390_BOOST_BYPASS1, 0x46);
 858        regmap_write(max98390->regmap, MAX98390_FET_SCALING3, 0x03);
 859}
 860
 861static int max98390_probe(struct snd_soc_component *component)
 862{
 863        struct max98390_priv *max98390 =
 864                snd_soc_component_get_drvdata(component);
 865
 866        regmap_write(max98390->regmap, MAX98390_SOFTWARE_RESET, 0x01);
 867        /* Sleep reset settle time */
 868        msleep(20);
 869
 870        /* Amp init setting */
 871        max98390_init_regs(component);
 872        /* Update dsm bin param */
 873        max98390_dsm_init(component);
 874
 875        /* Dsm Setting */
 876        if (max98390->ref_rdc_value) {
 877                regmap_write(max98390->regmap, DSM_TPROT_RECIP_RDC_ROOM_BYTE0,
 878                        max98390->ref_rdc_value & 0x000000ff);
 879                regmap_write(max98390->regmap, DSM_TPROT_RECIP_RDC_ROOM_BYTE1,
 880                        (max98390->ref_rdc_value >> 8) & 0x000000ff);
 881                regmap_write(max98390->regmap, DSM_TPROT_RECIP_RDC_ROOM_BYTE2,
 882                        (max98390->ref_rdc_value >> 16) & 0x000000ff);
 883        }
 884        if (max98390->ambient_temp_value) {
 885                regmap_write(max98390->regmap, DSM_TPROT_ROOM_TEMPERATURE_BYTE1,
 886                        (max98390->ambient_temp_value >> 8) & 0x000000ff);
 887                regmap_write(max98390->regmap, DSM_TPROT_ROOM_TEMPERATURE_BYTE0,
 888                        (max98390->ambient_temp_value) & 0x000000ff);
 889        }
 890
 891        return 0;
 892}
 893
 894#ifdef CONFIG_PM_SLEEP
 895static int max98390_suspend(struct device *dev)
 896{
 897        struct max98390_priv *max98390 = dev_get_drvdata(dev);
 898
 899        dev_dbg(dev, "%s:Enter\n", __func__);
 900
 901        regcache_cache_only(max98390->regmap, true);
 902        regcache_mark_dirty(max98390->regmap);
 903
 904        return 0;
 905}
 906
 907static int max98390_resume(struct device *dev)
 908{
 909        struct max98390_priv *max98390 = dev_get_drvdata(dev);
 910
 911        dev_dbg(dev, "%s:Enter\n", __func__);
 912
 913        regcache_cache_only(max98390->regmap, false);
 914        regcache_sync(max98390->regmap);
 915
 916        return 0;
 917}
 918#endif
 919
 920static const struct dev_pm_ops max98390_pm = {
 921        SET_SYSTEM_SLEEP_PM_OPS(max98390_suspend, max98390_resume)
 922};
 923
 924static const struct snd_soc_component_driver soc_codec_dev_max98390 = {
 925        .probe                  = max98390_probe,
 926        .controls               = max98390_snd_controls,
 927        .num_controls           = ARRAY_SIZE(max98390_snd_controls),
 928        .dapm_widgets           = max98390_dapm_widgets,
 929        .num_dapm_widgets       = ARRAY_SIZE(max98390_dapm_widgets),
 930        .dapm_routes            = max98390_audio_map,
 931        .num_dapm_routes        = ARRAY_SIZE(max98390_audio_map),
 932        .idle_bias_on           = 1,
 933        .use_pmdown_time        = 1,
 934        .endianness             = 1,
 935        .non_legacy_dai_naming  = 1,
 936};
 937
 938static const struct regmap_config max98390_regmap = {
 939        .reg_bits         = 16,
 940        .val_bits         = 8,
 941        .max_register     = MAX98390_R24FF_REV_ID,
 942        .reg_defaults     = max98390_reg_defaults,
 943        .num_reg_defaults = ARRAY_SIZE(max98390_reg_defaults),
 944        .readable_reg     = max98390_readable_register,
 945        .volatile_reg     = max98390_volatile_reg,
 946        .cache_type       = REGCACHE_RBTREE,
 947};
 948
 949static int max98390_i2c_probe(struct i2c_client *i2c,
 950                const struct i2c_device_id *id)
 951{
 952        int ret = 0;
 953        int reg = 0;
 954
 955        struct max98390_priv *max98390 = NULL;
 956        struct i2c_adapter *adapter = to_i2c_adapter(i2c->dev.parent);
 957
 958        ret = i2c_check_functionality(adapter,
 959                I2C_FUNC_SMBUS_BYTE
 960                | I2C_FUNC_SMBUS_BYTE_DATA);
 961        if (!ret) {
 962                dev_err(&i2c->dev, "I2C check functionality failed\n");
 963                return -ENXIO;
 964        }
 965
 966        max98390 = devm_kzalloc(&i2c->dev, sizeof(*max98390), GFP_KERNEL);
 967        if (!max98390) {
 968                ret = -ENOMEM;
 969                return ret;
 970        }
 971        i2c_set_clientdata(i2c, max98390);
 972
 973        ret = device_property_read_u32(&i2c->dev, "maxim,temperature_calib",
 974                                       &max98390->ambient_temp_value);
 975        if (ret) {
 976                dev_info(&i2c->dev,
 977                         "no optional property 'temperature_calib' found, default:\n");
 978        }
 979        ret = device_property_read_u32(&i2c->dev, "maxim,r0_calib",
 980                                       &max98390->ref_rdc_value);
 981        if (ret) {
 982                dev_info(&i2c->dev,
 983                         "no optional property 'r0_calib' found, default:\n");
 984        }
 985
 986        dev_info(&i2c->dev,
 987                "%s: r0_calib: 0x%x,temperature_calib: 0x%x",
 988                __func__, max98390->ref_rdc_value,
 989                max98390->ambient_temp_value);
 990
 991        /* regmap initialization */
 992        max98390->regmap = devm_regmap_init_i2c(i2c, &max98390_regmap);
 993        if (IS_ERR(max98390->regmap)) {
 994                ret = PTR_ERR(max98390->regmap);
 995                dev_err(&i2c->dev,
 996                        "Failed to allocate regmap: %d\n", ret);
 997                return ret;
 998        }
 999
1000        /* Check Revision ID */
1001        ret = regmap_read(max98390->regmap,
1002                MAX98390_R24FF_REV_ID, &reg);
1003        if (ret) {
1004                dev_err(&i2c->dev,
1005                        "ret=%d, Failed to read: 0x%02X\n",
1006                        ret, MAX98390_R24FF_REV_ID);
1007                return ret;
1008        }
1009        dev_info(&i2c->dev, "MAX98390 revisionID: 0x%02X\n", reg);
1010
1011        ret = devm_snd_soc_register_component(&i2c->dev,
1012                        &soc_codec_dev_max98390,
1013                        max98390_dai, ARRAY_SIZE(max98390_dai));
1014
1015        return ret;
1016}
1017
1018static const struct i2c_device_id max98390_i2c_id[] = {
1019        { "max98390", 0},
1020        {},
1021};
1022
1023MODULE_DEVICE_TABLE(i2c, max98390_i2c_id);
1024
1025#if defined(CONFIG_OF)
1026static const struct of_device_id max98390_of_match[] = {
1027        { .compatible = "maxim,max98390", },
1028        {}
1029};
1030MODULE_DEVICE_TABLE(of, max98390_of_match);
1031#endif
1032
1033#ifdef CONFIG_ACPI
1034static const struct acpi_device_id max98390_acpi_match[] = {
1035        { "MX98390", 0 },
1036        {},
1037};
1038MODULE_DEVICE_TABLE(acpi, max98390_acpi_match);
1039#endif
1040
1041static struct i2c_driver max98390_i2c_driver = {
1042        .driver = {
1043                .name = "max98390",
1044                .of_match_table = of_match_ptr(max98390_of_match),
1045                .acpi_match_table = ACPI_PTR(max98390_acpi_match),
1046                .pm = &max98390_pm,
1047        },
1048        .probe = max98390_i2c_probe,
1049        .id_table = max98390_i2c_id,
1050};
1051
1052module_i2c_driver(max98390_i2c_driver)
1053
1054MODULE_DESCRIPTION("ALSA SoC MAX98390 driver");
1055MODULE_AUTHOR("Steve Lee <steves.lee@maximintegrated.com>");
1056MODULE_LICENSE("GPL");
1057