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11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/delay.h>
15#include <linux/i2c.h>
16#include <linux/pm_runtime.h>
17#include <linux/pm.h>
18#include <linux/soundwire/sdw.h>
19#include <linux/gpio.h>
20#include <linux/regmap.h>
21#include <linux/slab.h>
22#include <linux/platform_device.h>
23#include <linux/regulator/consumer.h>
24#include <linux/gpio/consumer.h>
25#include <linux/of.h>
26#include <linux/of_gpio.h>
27#include <linux/of_device.h>
28#include <sound/core.h>
29#include <sound/pcm.h>
30#include <sound/pcm_params.h>
31#include <sound/soc.h>
32#include <sound/soc-dapm.h>
33#include <sound/initval.h>
34#include <sound/tlv.h>
35#include <sound/hda_verbs.h>
36
37#include "rt715.h"
38
39static int rt715_index_write(struct regmap *regmap, unsigned int reg,
40 unsigned int value)
41{
42 int ret;
43 unsigned int addr = ((RT715_PRIV_INDEX_W_H) << 8) | reg;
44
45 ret = regmap_write(regmap, addr, value);
46 if (ret < 0) {
47 pr_err("Failed to set private value: %08x <= %04x %d\n", ret,
48 addr, value);
49 }
50
51 return ret;
52}
53
54static void rt715_get_gain(struct rt715_priv *rt715, unsigned int addr_h,
55 unsigned int addr_l, unsigned int val_h,
56 unsigned int *r_val, unsigned int *l_val)
57{
58 int ret;
59
60 *r_val = (val_h << 8);
61 ret = regmap_read(rt715->regmap, addr_l, r_val);
62 if (ret < 0)
63 pr_err("Failed to get R channel gain.\n");
64
65
66 val_h |= 0x20;
67 *l_val = (val_h << 8);
68 ret = regmap_read(rt715->regmap, addr_h, l_val);
69 if (ret < 0)
70 pr_err("Failed to get L channel gain.\n");
71}
72
73
74static int rt715_set_amp_gain_put(struct snd_kcontrol *kcontrol,
75 struct snd_ctl_elem_value *ucontrol)
76{
77 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
78 struct snd_soc_dapm_context *dapm =
79 snd_soc_component_get_dapm(component);
80 struct soc_mixer_control *mc =
81 (struct soc_mixer_control *)kcontrol->private_value;
82 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
83 unsigned int addr_h, addr_l, val_h, val_ll, val_lr;
84 unsigned int read_ll, read_rl;
85 int i;
86
87
88 addr_h = mc->reg;
89 addr_l = mc->rreg;
90 if (mc->shift == RT715_DIR_OUT_SFT)
91 val_h = 0x80;
92 else
93 val_h = 0x0;
94
95 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
96
97
98 if (mc->invert) {
99
100 val_ll = (mc->max - ucontrol->value.integer.value[0]) << 7;
101
102 read_ll = read_ll & 0x7f;
103 val_ll |= read_ll;
104 } else {
105
106 val_ll = ((ucontrol->value.integer.value[0]) & 0x7f);
107 if (val_ll > mc->max)
108 val_ll = mc->max;
109
110 read_ll = read_ll & 0x80;
111 val_ll |= read_ll;
112 }
113
114
115 if (mc->invert) {
116 regmap_write(rt715->regmap,
117 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
118
119 val_lr = (mc->max - ucontrol->value.integer.value[1]) << 7;
120
121 read_rl = read_rl & 0x7f;
122 val_lr |= read_rl;
123 } else {
124
125 val_lr = ((ucontrol->value.integer.value[1]) & 0x7f);
126 if (val_lr > mc->max)
127 val_lr = mc->max;
128
129 read_rl = read_rl & 0x80;
130 val_lr |= read_rl;
131 }
132
133 for (i = 0; i < 3; i++) {
134
135 if (val_ll == val_lr) {
136
137 val_h = (1 << mc->shift) | (3 << 4);
138 regmap_write(rt715->regmap, addr_h,
139 (val_h << 8 | val_ll));
140 regmap_write(rt715->regmap, addr_l,
141 (val_h << 8 | val_ll));
142 } else {
143
144 val_h = (1 << mc->shift) | (1 << 5);
145 regmap_write(rt715->regmap, addr_h,
146 (val_h << 8 | val_ll));
147
148 val_h = (1 << mc->shift) | (1 << 4);
149 regmap_write(rt715->regmap, addr_l,
150 (val_h << 8 | val_lr));
151 }
152
153 if (mc->shift == RT715_DIR_OUT_SFT)
154 val_h = 0x80;
155 else
156 val_h = 0x0;
157
158 rt715_get_gain(rt715, addr_h, addr_l, val_h,
159 &read_rl, &read_ll);
160 if (read_rl == val_lr && read_ll == val_ll)
161 break;
162 }
163
164 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
165 regmap_write(rt715->regmap,
166 RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
167 return 0;
168}
169
170static int rt715_set_amp_gain_get(struct snd_kcontrol *kcontrol,
171 struct snd_ctl_elem_value *ucontrol)
172{
173 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
174 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
175 struct soc_mixer_control *mc =
176 (struct soc_mixer_control *)kcontrol->private_value;
177 unsigned int addr_h, addr_l, val_h;
178 unsigned int read_ll, read_rl;
179
180 addr_h = mc->reg;
181 addr_l = mc->rreg;
182 if (mc->shift == RT715_DIR_OUT_SFT)
183 val_h = 0x80;
184 else
185 val_h = 0x0;
186
187 rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
188
189 if (mc->invert) {
190
191 read_ll = !((read_ll & 0x80) >> RT715_MUTE_SFT);
192 read_rl = !((read_rl & 0x80) >> RT715_MUTE_SFT);
193 } else {
194
195 read_ll = read_ll & 0x7f;
196 read_rl = read_rl & 0x7f;
197 }
198 ucontrol->value.integer.value[0] = read_ll;
199 ucontrol->value.integer.value[1] = read_rl;
200
201 return 0;
202}
203
204static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
205static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
206
207#define SOC_DOUBLE_R_EXT(xname, reg_left, reg_right, xshift, xmax, xinvert,\
208 xhandler_get, xhandler_put) \
209{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
210 .info = snd_soc_info_volsw, \
211 .get = xhandler_get, .put = xhandler_put, \
212 .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
213 xmax, xinvert) }
214
215static const struct snd_kcontrol_new rt715_snd_controls[] = {
216
217 SOC_DOUBLE_R_EXT("ADC 07 Capture Switch", RT715_SET_GAIN_MIC_ADC_H,
218 RT715_SET_GAIN_MIC_ADC_L, RT715_DIR_IN_SFT, 1, 1,
219 rt715_set_amp_gain_get, rt715_set_amp_gain_put),
220 SOC_DOUBLE_R_EXT("ADC 08 Capture Switch", RT715_SET_GAIN_LINE_ADC_H,
221 RT715_SET_GAIN_LINE_ADC_L, RT715_DIR_IN_SFT, 1, 1,
222 rt715_set_amp_gain_get, rt715_set_amp_gain_put),
223 SOC_DOUBLE_R_EXT("ADC 09 Capture Switch", RT715_SET_GAIN_MIX_ADC_H,
224 RT715_SET_GAIN_MIX_ADC_L, RT715_DIR_IN_SFT, 1, 1,
225 rt715_set_amp_gain_get, rt715_set_amp_gain_put),
226 SOC_DOUBLE_R_EXT("ADC 27 Capture Switch", RT715_SET_GAIN_MIX_ADC2_H,
227 RT715_SET_GAIN_MIX_ADC2_L, RT715_DIR_IN_SFT, 1, 1,
228 rt715_set_amp_gain_get, rt715_set_amp_gain_put),
229
230 SOC_DOUBLE_R_EXT_TLV("ADC 07 Capture Volume", RT715_SET_GAIN_MIC_ADC_H,
231 RT715_SET_GAIN_MIC_ADC_L, RT715_DIR_IN_SFT, 0x3f, 0,
232 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
233 in_vol_tlv),
234 SOC_DOUBLE_R_EXT_TLV("ADC 08 Capture Volume", RT715_SET_GAIN_LINE_ADC_H,
235 RT715_SET_GAIN_LINE_ADC_L, RT715_DIR_IN_SFT, 0x3f, 0,
236 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
237 in_vol_tlv),
238 SOC_DOUBLE_R_EXT_TLV("ADC 09 Capture Volume", RT715_SET_GAIN_MIX_ADC_H,
239 RT715_SET_GAIN_MIX_ADC_L, RT715_DIR_IN_SFT, 0x3f, 0,
240 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
241 in_vol_tlv),
242 SOC_DOUBLE_R_EXT_TLV("ADC 27 Capture Volume", RT715_SET_GAIN_MIX_ADC2_H,
243 RT715_SET_GAIN_MIX_ADC2_L, RT715_DIR_IN_SFT, 0x3f, 0,
244 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
245 in_vol_tlv),
246
247 SOC_DOUBLE_R_EXT_TLV("DMIC1 Boost", RT715_SET_GAIN_DMIC1_H,
248 RT715_SET_GAIN_DMIC1_L, RT715_DIR_IN_SFT, 3, 0,
249 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
250 mic_vol_tlv),
251 SOC_DOUBLE_R_EXT_TLV("DMIC2 Boost", RT715_SET_GAIN_DMIC2_H,
252 RT715_SET_GAIN_DMIC2_L, RT715_DIR_IN_SFT, 3, 0,
253 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
254 mic_vol_tlv),
255 SOC_DOUBLE_R_EXT_TLV("DMIC3 Boost", RT715_SET_GAIN_DMIC3_H,
256 RT715_SET_GAIN_DMIC3_L, RT715_DIR_IN_SFT, 3, 0,
257 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
258 mic_vol_tlv),
259 SOC_DOUBLE_R_EXT_TLV("DMIC4 Boost", RT715_SET_GAIN_DMIC4_H,
260 RT715_SET_GAIN_DMIC4_L, RT715_DIR_IN_SFT, 3, 0,
261 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
262 mic_vol_tlv),
263 SOC_DOUBLE_R_EXT_TLV("MIC1 Boost", RT715_SET_GAIN_MIC1_H,
264 RT715_SET_GAIN_MIC1_L, RT715_DIR_IN_SFT, 3, 0,
265 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
266 mic_vol_tlv),
267 SOC_DOUBLE_R_EXT_TLV("MIC2 Boost", RT715_SET_GAIN_MIC2_H,
268 RT715_SET_GAIN_MIC2_L, RT715_DIR_IN_SFT, 3, 0,
269 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
270 mic_vol_tlv),
271 SOC_DOUBLE_R_EXT_TLV("LINE1 Boost", RT715_SET_GAIN_LINE1_H,
272 RT715_SET_GAIN_LINE1_L, RT715_DIR_IN_SFT, 3, 0,
273 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
274 mic_vol_tlv),
275 SOC_DOUBLE_R_EXT_TLV("LINE2 Boost", RT715_SET_GAIN_LINE2_H,
276 RT715_SET_GAIN_LINE2_L, RT715_DIR_IN_SFT, 3, 0,
277 rt715_set_amp_gain_get, rt715_set_amp_gain_put,
278 mic_vol_tlv),
279};
280
281static int rt715_mux_get(struct snd_kcontrol *kcontrol,
282 struct snd_ctl_elem_value *ucontrol)
283{
284 struct snd_soc_component *component =
285 snd_soc_dapm_kcontrol_component(kcontrol);
286 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
287 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
288 unsigned int reg, val;
289 int ret;
290
291
292 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
293 ret = regmap_read(rt715->regmap, reg, &val);
294 if (ret < 0) {
295 dev_err(component->dev, "%s: sdw read failed: %d\n",
296 __func__, ret);
297 return ret;
298 }
299
300
301
302
303
304
305 if ((e->reg == RT715_MUX_IN3 || e->reg == RT715_MUX_IN4) && (val > 0))
306 val -= 1;
307 ucontrol->value.enumerated.item[0] = val;
308
309 return 0;
310}
311
312static int rt715_mux_put(struct snd_kcontrol *kcontrol,
313 struct snd_ctl_elem_value *ucontrol)
314{
315 struct snd_soc_component *component =
316 snd_soc_dapm_kcontrol_component(kcontrol);
317 struct snd_soc_dapm_context *dapm =
318 snd_soc_dapm_kcontrol_dapm(kcontrol);
319 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
320 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
321 unsigned int *item = ucontrol->value.enumerated.item;
322 unsigned int val, val2 = 0, change, reg;
323 int ret;
324
325 if (item[0] >= e->items)
326 return -EINVAL;
327
328
329 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
330
331 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
332 ret = regmap_read(rt715->regmap, reg, &val2);
333 if (ret < 0) {
334 dev_err(component->dev, "%s: sdw read failed: %d\n",
335 __func__, ret);
336 return ret;
337 }
338
339 if (val == val2)
340 change = 0;
341 else
342 change = 1;
343
344 if (change) {
345 reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
346 regmap_write(rt715->regmap, reg, val);
347 }
348
349 snd_soc_dapm_mux_update_power(dapm, kcontrol,
350 item[0], e, NULL);
351
352 return change;
353}
354
355static const char * const adc_22_23_mux_text[] = {
356 "MIC1",
357 "MIC2",
358 "LINE1",
359 "LINE2",
360 "DMIC1",
361 "DMIC2",
362 "DMIC3",
363 "DMIC4",
364};
365
366
367
368
369
370
371static const unsigned int rt715_adc_24_25_values[] = {
372 0,
373 2,
374 3,
375 4,
376 5,
377};
378
379static const char * const adc_24_mux_text[] = {
380 "MIC2",
381 "DMIC1",
382 "DMIC2",
383 "DMIC3",
384 "DMIC4",
385};
386
387static const char * const adc_25_mux_text[] = {
388 "MIC1",
389 "DMIC1",
390 "DMIC2",
391 "DMIC3",
392 "DMIC4",
393};
394
395static SOC_ENUM_SINGLE_DECL(
396 rt715_adc22_enum, RT715_MUX_IN1, 0, adc_22_23_mux_text);
397
398static SOC_ENUM_SINGLE_DECL(
399 rt715_adc23_enum, RT715_MUX_IN2, 0, adc_22_23_mux_text);
400
401static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc24_enum,
402 RT715_MUX_IN3, 0, 0xf,
403 adc_24_mux_text, rt715_adc_24_25_values);
404
405static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc25_enum,
406 RT715_MUX_IN4, 0, 0xf,
407 adc_25_mux_text, rt715_adc_24_25_values);
408
409static const struct snd_kcontrol_new rt715_adc22_mux =
410 SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum,
411 rt715_mux_get, rt715_mux_put);
412
413static const struct snd_kcontrol_new rt715_adc23_mux =
414 SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum,
415 rt715_mux_get, rt715_mux_put);
416
417static const struct snd_kcontrol_new rt715_adc24_mux =
418 SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum,
419 rt715_mux_get, rt715_mux_put);
420
421static const struct snd_kcontrol_new rt715_adc25_mux =
422 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum,
423 rt715_mux_get, rt715_mux_put);
424
425static const struct snd_soc_dapm_widget rt715_dapm_widgets[] = {
426 SND_SOC_DAPM_INPUT("DMIC1"),
427 SND_SOC_DAPM_INPUT("DMIC2"),
428 SND_SOC_DAPM_INPUT("DMIC3"),
429 SND_SOC_DAPM_INPUT("DMIC4"),
430 SND_SOC_DAPM_INPUT("MIC1"),
431 SND_SOC_DAPM_INPUT("MIC2"),
432 SND_SOC_DAPM_INPUT("LINE1"),
433 SND_SOC_DAPM_INPUT("LINE2"),
434 SND_SOC_DAPM_ADC("ADC 07", NULL, RT715_SET_STREAMID_MIC_ADC, 4, 0),
435 SND_SOC_DAPM_ADC("ADC 08", NULL, RT715_SET_STREAMID_LINE_ADC, 4, 0),
436 SND_SOC_DAPM_ADC("ADC 09", NULL, RT715_SET_STREAMID_MIX_ADC, 4, 0),
437 SND_SOC_DAPM_ADC("ADC 27", NULL, RT715_SET_STREAMID_MIX_ADC2, 4, 0),
438 SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
439 &rt715_adc22_mux),
440 SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0,
441 &rt715_adc23_mux),
442 SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
443 &rt715_adc24_mux),
444 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
445 &rt715_adc25_mux),
446 SND_SOC_DAPM_AIF_OUT("DP4TX", "DP4 Capture", 0, SND_SOC_NOPM, 0, 0),
447 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 Capture", 0, SND_SOC_NOPM, 0, 0),
448};
449
450static const struct snd_soc_dapm_route rt715_audio_map[] = {
451 {"DP6TX", NULL, "ADC 09"},
452 {"DP6TX", NULL, "ADC 08"},
453 {"DP4TX", NULL, "ADC 07"},
454 {"DP4TX", NULL, "ADC 27"},
455 {"ADC 09", NULL, "ADC 22 Mux"},
456 {"ADC 08", NULL, "ADC 23 Mux"},
457 {"ADC 07", NULL, "ADC 24 Mux"},
458 {"ADC 27", NULL, "ADC 25 Mux"},
459 {"ADC 22 Mux", "MIC1", "MIC1"},
460 {"ADC 22 Mux", "MIC2", "MIC2"},
461 {"ADC 22 Mux", "LINE1", "LINE1"},
462 {"ADC 22 Mux", "LINE2", "LINE2"},
463 {"ADC 22 Mux", "DMIC1", "DMIC1"},
464 {"ADC 22 Mux", "DMIC2", "DMIC2"},
465 {"ADC 22 Mux", "DMIC3", "DMIC3"},
466 {"ADC 22 Mux", "DMIC4", "DMIC4"},
467 {"ADC 23 Mux", "MIC1", "MIC1"},
468 {"ADC 23 Mux", "MIC2", "MIC2"},
469 {"ADC 23 Mux", "LINE1", "LINE1"},
470 {"ADC 23 Mux", "LINE2", "LINE2"},
471 {"ADC 23 Mux", "DMIC1", "DMIC1"},
472 {"ADC 23 Mux", "DMIC2", "DMIC2"},
473 {"ADC 23 Mux", "DMIC3", "DMIC3"},
474 {"ADC 23 Mux", "DMIC4", "DMIC4"},
475 {"ADC 24 Mux", "MIC2", "MIC2"},
476 {"ADC 24 Mux", "DMIC1", "DMIC1"},
477 {"ADC 24 Mux", "DMIC2", "DMIC2"},
478 {"ADC 24 Mux", "DMIC3", "DMIC3"},
479 {"ADC 24 Mux", "DMIC4", "DMIC4"},
480 {"ADC 25 Mux", "MIC1", "MIC1"},
481 {"ADC 25 Mux", "DMIC1", "DMIC1"},
482 {"ADC 25 Mux", "DMIC2", "DMIC2"},
483 {"ADC 25 Mux", "DMIC3", "DMIC3"},
484 {"ADC 25 Mux", "DMIC4", "DMIC4"},
485};
486
487static int rt715_set_bias_level(struct snd_soc_component *component,
488 enum snd_soc_bias_level level)
489{
490 struct snd_soc_dapm_context *dapm =
491 snd_soc_component_get_dapm(component);
492 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
493
494 switch (level) {
495 case SND_SOC_BIAS_PREPARE:
496 if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
497 regmap_write(rt715->regmap,
498 RT715_SET_AUDIO_POWER_STATE,
499 AC_PWRST_D0);
500 msleep(RT715_POWER_UP_DELAY_MS);
501 }
502 break;
503
504 case SND_SOC_BIAS_STANDBY:
505 regmap_write(rt715->regmap,
506 RT715_SET_AUDIO_POWER_STATE,
507 AC_PWRST_D3);
508 break;
509
510 default:
511 break;
512 }
513 dapm->bias_level = level;
514 return 0;
515}
516
517static const struct snd_soc_component_driver soc_codec_dev_rt715 = {
518 .set_bias_level = rt715_set_bias_level,
519 .controls = rt715_snd_controls,
520 .num_controls = ARRAY_SIZE(rt715_snd_controls),
521 .dapm_widgets = rt715_dapm_widgets,
522 .num_dapm_widgets = ARRAY_SIZE(rt715_dapm_widgets),
523 .dapm_routes = rt715_audio_map,
524 .num_dapm_routes = ARRAY_SIZE(rt715_audio_map),
525};
526
527static int rt715_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
528 int direction)
529{
530
531 struct sdw_stream_data *stream;
532
533 if (!sdw_stream)
534 return 0;
535
536 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
537 if (!stream)
538 return -ENOMEM;
539
540 stream->sdw_stream = sdw_stream;
541
542
543 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
544 dai->playback_dma_data = stream;
545 else
546 dai->capture_dma_data = stream;
547
548 return 0;
549}
550
551static void rt715_shutdown(struct snd_pcm_substream *substream,
552 struct snd_soc_dai *dai)
553
554{
555 struct sdw_stream_data *stream;
556
557 stream = snd_soc_dai_get_dma_data(dai, substream);
558 snd_soc_dai_set_dma_data(dai, substream, NULL);
559 kfree(stream);
560}
561
562static int rt715_pcm_hw_params(struct snd_pcm_substream *substream,
563 struct snd_pcm_hw_params *params,
564 struct snd_soc_dai *dai)
565{
566 struct snd_soc_component *component = dai->component;
567 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
568 struct sdw_stream_config stream_config;
569 struct sdw_port_config port_config;
570 enum sdw_data_direction direction;
571 struct sdw_stream_data *stream;
572 int retval, port, num_channels;
573 unsigned int val = 0;
574
575 stream = snd_soc_dai_get_dma_data(dai, substream);
576
577 if (!stream)
578 return -EINVAL;
579
580 if (!rt715->slave)
581 return -EINVAL;
582
583 switch (dai->id) {
584 case RT715_AIF1:
585 direction = SDW_DATA_DIR_TX;
586 port = 6;
587 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa500);
588 break;
589 case RT715_AIF2:
590 direction = SDW_DATA_DIR_TX;
591 port = 4;
592 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa000);
593 break;
594 default:
595 dev_err(component->dev, "Invalid DAI id %d\n", dai->id);
596 return -EINVAL;
597 }
598
599 stream_config.frame_rate = params_rate(params);
600 stream_config.ch_count = params_channels(params);
601 stream_config.bps = snd_pcm_format_width(params_format(params));
602 stream_config.direction = direction;
603
604 num_channels = params_channels(params);
605 port_config.ch_mask = (1 << (num_channels)) - 1;
606 port_config.num = port;
607
608 retval = sdw_stream_add_slave(rt715->slave, &stream_config,
609 &port_config, 1, stream->sdw_stream);
610 if (retval) {
611 dev_err(dai->dev, "Unable to configure port\n");
612 return retval;
613 }
614
615 switch (params_rate(params)) {
616
617
618 case 44100:
619 val |= 0x40 << 8;
620 break;
621 case 48000:
622 val |= 0x0 << 8;
623 break;
624 default:
625 dev_err(component->dev, "Unsupported sample rate %d\n",
626 params_rate(params));
627 return -EINVAL;
628 }
629
630 if (params_channels(params) <= 16) {
631
632 val |= (params_channels(params) - 1);
633 } else {
634 dev_err(component->dev, "Unsupported channels %d\n",
635 params_channels(params));
636 return -EINVAL;
637 }
638
639 switch (params_width(params)) {
640
641 case 8:
642 break;
643 case 16:
644 val |= (0x1 << 4);
645 break;
646 case 20:
647 val |= (0x2 << 4);
648 break;
649 case 24:
650 val |= (0x3 << 4);
651 break;
652 case 32:
653 val |= (0x4 << 4);
654 break;
655 default:
656 return -EINVAL;
657 }
658
659 regmap_write(rt715->regmap, RT715_MIC_ADC_FORMAT_H, val);
660 regmap_write(rt715->regmap, RT715_MIC_LINE_FORMAT_H, val);
661 regmap_write(rt715->regmap, RT715_MIX_ADC_FORMAT_H, val);
662 regmap_write(rt715->regmap, RT715_MIX_ADC2_FORMAT_H, val);
663
664 return retval;
665}
666
667static int rt715_pcm_hw_free(struct snd_pcm_substream *substream,
668 struct snd_soc_dai *dai)
669{
670 struct snd_soc_component *component = dai->component;
671 struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
672 struct sdw_stream_data *stream =
673 snd_soc_dai_get_dma_data(dai, substream);
674
675 if (!rt715->slave)
676 return -EINVAL;
677
678 sdw_stream_remove_slave(rt715->slave, stream->sdw_stream);
679 return 0;
680}
681
682#define RT715_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
683#define RT715_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
684 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
685
686static struct snd_soc_dai_ops rt715_ops = {
687 .hw_params = rt715_pcm_hw_params,
688 .hw_free = rt715_pcm_hw_free,
689 .set_sdw_stream = rt715_set_sdw_stream,
690 .shutdown = rt715_shutdown,
691};
692
693static struct snd_soc_dai_driver rt715_dai[] = {
694 {
695 .name = "rt715-aif1",
696 .id = RT715_AIF1,
697 .capture = {
698 .stream_name = "DP6 Capture",
699 .channels_min = 1,
700 .channels_max = 2,
701 .rates = RT715_STEREO_RATES,
702 .formats = RT715_FORMATS,
703 },
704 .ops = &rt715_ops,
705 },
706 {
707 .name = "rt715-aif2",
708 .id = RT715_AIF2,
709 .capture = {
710 .stream_name = "DP4 Capture",
711 .channels_min = 1,
712 .channels_max = 2,
713 .rates = RT715_STEREO_RATES,
714 .formats = RT715_FORMATS,
715 },
716 .ops = &rt715_ops,
717 },
718};
719
720
721#define RT715_CLK_FREQ_9600000HZ 9600000
722#define RT715_CLK_FREQ_12000000HZ 12000000
723#define RT715_CLK_FREQ_6000000HZ 6000000
724#define RT715_CLK_FREQ_4800000HZ 4800000
725#define RT715_CLK_FREQ_2400000HZ 2400000
726#define RT715_CLK_FREQ_12288000HZ 12288000
727
728int rt715_clock_config(struct device *dev)
729{
730 struct rt715_priv *rt715 = dev_get_drvdata(dev);
731 unsigned int clk_freq, value;
732
733 clk_freq = (rt715->params.curr_dr_freq >> 1);
734
735 switch (clk_freq) {
736 case RT715_CLK_FREQ_12000000HZ:
737 value = 0x0;
738 break;
739 case RT715_CLK_FREQ_6000000HZ:
740 value = 0x1;
741 break;
742 case RT715_CLK_FREQ_9600000HZ:
743 value = 0x2;
744 break;
745 case RT715_CLK_FREQ_4800000HZ:
746 value = 0x3;
747 break;
748 case RT715_CLK_FREQ_2400000HZ:
749 value = 0x4;
750 break;
751 case RT715_CLK_FREQ_12288000HZ:
752 value = 0x5;
753 break;
754 default:
755 return -EINVAL;
756 }
757
758 regmap_write(rt715->regmap, 0xe0, value);
759 regmap_write(rt715->regmap, 0xf0, value);
760
761 return 0;
762}
763
764int rt715_init(struct device *dev, struct regmap *sdw_regmap,
765 struct regmap *regmap, struct sdw_slave *slave)
766{
767 struct rt715_priv *rt715;
768 int ret;
769
770 rt715 = devm_kzalloc(dev, sizeof(*rt715), GFP_KERNEL);
771 if (!rt715)
772 return -ENOMEM;
773
774 dev_set_drvdata(dev, rt715);
775 rt715->slave = slave;
776 rt715->regmap = regmap;
777 rt715->sdw_regmap = sdw_regmap;
778
779
780
781
782
783 rt715->hw_init = false;
784 rt715->first_hw_init = false;
785
786 ret = devm_snd_soc_register_component(dev,
787 &soc_codec_dev_rt715,
788 rt715_dai,
789 ARRAY_SIZE(rt715_dai));
790
791 return ret;
792}
793
794int rt715_io_init(struct device *dev, struct sdw_slave *slave)
795{
796 struct rt715_priv *rt715 = dev_get_drvdata(dev);
797
798 if (rt715->hw_init)
799 return 0;
800
801
802
803
804 if (!rt715->first_hw_init) {
805
806 pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
807 pm_runtime_use_autosuspend(&slave->dev);
808
809
810 pm_runtime_set_active(&slave->dev);
811
812
813 pm_runtime_mark_last_busy(&slave->dev);
814
815 pm_runtime_enable(&slave->dev);
816 }
817
818 pm_runtime_get_noresume(&slave->dev);
819
820
821 regmap_write(rt715->regmap, RT715_SET_GAIN_LINE_ADC_H, 0xb080);
822 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC_H, 0xb080);
823
824 regmap_write(rt715->regmap, RT715_SET_GAIN_MIC_ADC_H, 0xb080);
825 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC2_H, 0xb080);
826
827
828 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC1, 0x20);
829 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC2, 0x20);
830 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC3, 0x20);
831 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC4, 0x20);
832
833 regmap_write(rt715->regmap, RT715_SET_STREAMID_LINE_ADC, 0x10);
834 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC, 0x10);
835 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIC_ADC, 0x10);
836 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC2, 0x10);
837
838 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT1, 0xd0);
839 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT2, 0x11);
840 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT3, 0xa1);
841 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT4, 0x81);
842 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT1, 0xd1);
843 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT2, 0x11);
844 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT3, 0xa1);
845 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT4, 0x81);
846 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT1, 0xd0);
847 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT2, 0x11);
848 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT3, 0xa1);
849 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT4, 0x81);
850 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT1, 0xd1);
851 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT2, 0x11);
852 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT3, 0xa1);
853 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT4, 0x81);
854
855
856 regmap_write(rt715->regmap, RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
857
858 if (rt715->first_hw_init)
859 regcache_mark_dirty(rt715->regmap);
860 else
861 rt715->first_hw_init = true;
862
863
864 rt715->hw_init = true;
865
866 pm_runtime_mark_last_busy(&slave->dev);
867 pm_runtime_put_autosuspend(&slave->dev);
868
869 return 0;
870}
871
872MODULE_DESCRIPTION("ASoC rt715 driver");
873MODULE_DESCRIPTION("ASoC rt715 driver SDW");
874MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
875MODULE_LICENSE("GPL v2");
876
