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10#include <linux/clk.h>
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/of.h>
15#include <linux/platform_device.h>
16#include <linux/pm_runtime.h>
17#include <linux/reset.h>
18
19#include <sound/core.h>
20#include <sound/dmaengine_pcm.h>
21#include <sound/initval.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
25
26#define IMG_PRL_OUT_TX_FIFO 0
27
28#define IMG_PRL_OUT_CTL 0x4
29#define IMG_PRL_OUT_CTL_CH_MASK BIT(4)
30#define IMG_PRL_OUT_CTL_PACKH_MASK BIT(3)
31#define IMG_PRL_OUT_CTL_EDGE_MASK BIT(2)
32#define IMG_PRL_OUT_CTL_ME_MASK BIT(1)
33#define IMG_PRL_OUT_CTL_SRST_MASK BIT(0)
34
35struct img_prl_out {
36 void __iomem *base;
37 struct clk *clk_sys;
38 struct clk *clk_ref;
39 struct snd_dmaengine_dai_dma_data dma_data;
40 struct device *dev;
41 struct reset_control *rst;
42};
43
44static int img_prl_out_suspend(struct device *dev)
45{
46 struct img_prl_out *prl = dev_get_drvdata(dev);
47
48 clk_disable_unprepare(prl->clk_ref);
49
50 return 0;
51}
52
53static int img_prl_out_resume(struct device *dev)
54{
55 struct img_prl_out *prl = dev_get_drvdata(dev);
56 int ret;
57
58 ret = clk_prepare_enable(prl->clk_ref);
59 if (ret) {
60 dev_err(dev, "clk_enable failed: %d\n", ret);
61 return ret;
62 }
63
64 return 0;
65}
66
67static inline void img_prl_out_writel(struct img_prl_out *prl,
68 u32 val, u32 reg)
69{
70 writel(val, prl->base + reg);
71}
72
73static inline u32 img_prl_out_readl(struct img_prl_out *prl, u32 reg)
74{
75 return readl(prl->base + reg);
76}
77
78static void img_prl_out_reset(struct img_prl_out *prl)
79{
80 u32 ctl;
81
82 ctl = img_prl_out_readl(prl, IMG_PRL_OUT_CTL) &
83 ~IMG_PRL_OUT_CTL_ME_MASK;
84
85 reset_control_assert(prl->rst);
86 reset_control_deassert(prl->rst);
87
88 img_prl_out_writel(prl, ctl, IMG_PRL_OUT_CTL);
89}
90
91static int img_prl_out_trigger(struct snd_pcm_substream *substream, int cmd,
92 struct snd_soc_dai *dai)
93{
94 struct img_prl_out *prl = snd_soc_dai_get_drvdata(dai);
95 u32 reg;
96
97 switch (cmd) {
98 case SNDRV_PCM_TRIGGER_START:
99 case SNDRV_PCM_TRIGGER_RESUME:
100 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
101 reg = img_prl_out_readl(prl, IMG_PRL_OUT_CTL);
102 reg |= IMG_PRL_OUT_CTL_ME_MASK;
103 img_prl_out_writel(prl, reg, IMG_PRL_OUT_CTL);
104 break;
105 case SNDRV_PCM_TRIGGER_STOP:
106 case SNDRV_PCM_TRIGGER_SUSPEND:
107 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
108 img_prl_out_reset(prl);
109 break;
110 default:
111 return -EINVAL;
112 }
113
114 return 0;
115}
116
117static int img_prl_out_hw_params(struct snd_pcm_substream *substream,
118 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
119{
120 struct img_prl_out *prl = snd_soc_dai_get_drvdata(dai);
121 unsigned int rate, channels;
122 u32 reg, control_set = 0;
123
124 rate = params_rate(params);
125 channels = params_channels(params);
126
127 switch (params_format(params)) {
128 case SNDRV_PCM_FORMAT_S32_LE:
129 control_set |= IMG_PRL_OUT_CTL_PACKH_MASK;
130 break;
131 case SNDRV_PCM_FORMAT_S24_LE:
132 break;
133 default:
134 return -EINVAL;
135 }
136
137 if (channels != 2)
138 return -EINVAL;
139
140 clk_set_rate(prl->clk_ref, rate * 256);
141
142 reg = img_prl_out_readl(prl, IMG_PRL_OUT_CTL);
143 reg = (reg & ~IMG_PRL_OUT_CTL_PACKH_MASK) | control_set;
144 img_prl_out_writel(prl, reg, IMG_PRL_OUT_CTL);
145
146 return 0;
147}
148
149static int img_prl_out_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
150{
151 struct img_prl_out *prl = snd_soc_dai_get_drvdata(dai);
152 u32 reg, control_set = 0;
153 int ret;
154
155 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
156 case SND_SOC_DAIFMT_NB_NF:
157 break;
158 case SND_SOC_DAIFMT_NB_IF:
159 control_set |= IMG_PRL_OUT_CTL_EDGE_MASK;
160 break;
161 default:
162 return -EINVAL;
163 }
164
165 ret = pm_runtime_get_sync(prl->dev);
166 if (ret < 0) {
167 pm_runtime_put_noidle(prl->dev);
168 return ret;
169 }
170
171 reg = img_prl_out_readl(prl, IMG_PRL_OUT_CTL);
172 reg = (reg & ~IMG_PRL_OUT_CTL_EDGE_MASK) | control_set;
173 img_prl_out_writel(prl, reg, IMG_PRL_OUT_CTL);
174 pm_runtime_put(prl->dev);
175
176 return 0;
177}
178
179static const struct snd_soc_dai_ops img_prl_out_dai_ops = {
180 .trigger = img_prl_out_trigger,
181 .hw_params = img_prl_out_hw_params,
182 .set_fmt = img_prl_out_set_fmt
183};
184
185static int img_prl_out_dai_probe(struct snd_soc_dai *dai)
186{
187 struct img_prl_out *prl = snd_soc_dai_get_drvdata(dai);
188
189 snd_soc_dai_init_dma_data(dai, &prl->dma_data, NULL);
190
191 return 0;
192}
193
194static struct snd_soc_dai_driver img_prl_out_dai = {
195 .probe = img_prl_out_dai_probe,
196 .playback = {
197 .channels_min = 2,
198 .channels_max = 2,
199 .rates = SNDRV_PCM_RATE_8000_192000,
200 .formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S24_LE
201 },
202 .ops = &img_prl_out_dai_ops
203};
204
205static const struct snd_soc_component_driver img_prl_out_component = {
206 .name = "img-prl-out"
207};
208
209static int img_prl_out_probe(struct platform_device *pdev)
210{
211 struct img_prl_out *prl;
212 struct resource *res;
213 void __iomem *base;
214 int ret;
215 struct device *dev = &pdev->dev;
216
217 prl = devm_kzalloc(&pdev->dev, sizeof(*prl), GFP_KERNEL);
218 if (!prl)
219 return -ENOMEM;
220
221 platform_set_drvdata(pdev, prl);
222
223 prl->dev = &pdev->dev;
224
225 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
226 base = devm_ioremap_resource(&pdev->dev, res);
227 if (IS_ERR(base))
228 return PTR_ERR(base);
229
230 prl->base = base;
231
232 prl->rst = devm_reset_control_get_exclusive(&pdev->dev, "rst");
233 if (IS_ERR(prl->rst)) {
234 if (PTR_ERR(prl->rst) != -EPROBE_DEFER)
235 dev_err(&pdev->dev, "No top level reset found\n");
236 return PTR_ERR(prl->rst);
237 }
238
239 prl->clk_sys = devm_clk_get(&pdev->dev, "sys");
240 if (IS_ERR(prl->clk_sys)) {
241 if (PTR_ERR(prl->clk_sys) != -EPROBE_DEFER)
242 dev_err(dev, "Failed to acquire clock 'sys'\n");
243 return PTR_ERR(prl->clk_sys);
244 }
245
246 prl->clk_ref = devm_clk_get(&pdev->dev, "ref");
247 if (IS_ERR(prl->clk_ref)) {
248 if (PTR_ERR(prl->clk_ref) != -EPROBE_DEFER)
249 dev_err(dev, "Failed to acquire clock 'ref'\n");
250 return PTR_ERR(prl->clk_ref);
251 }
252
253 ret = clk_prepare_enable(prl->clk_sys);
254 if (ret)
255 return ret;
256
257 img_prl_out_writel(prl, IMG_PRL_OUT_CTL_EDGE_MASK, IMG_PRL_OUT_CTL);
258 img_prl_out_reset(prl);
259
260 pm_runtime_enable(&pdev->dev);
261 if (!pm_runtime_enabled(&pdev->dev)) {
262 ret = img_prl_out_resume(&pdev->dev);
263 if (ret)
264 goto err_pm_disable;
265 }
266
267 prl->dma_data.addr = res->start + IMG_PRL_OUT_TX_FIFO;
268 prl->dma_data.addr_width = 4;
269 prl->dma_data.maxburst = 4;
270
271 ret = devm_snd_soc_register_component(&pdev->dev,
272 &img_prl_out_component,
273 &img_prl_out_dai, 1);
274 if (ret)
275 goto err_suspend;
276
277 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
278 if (ret)
279 goto err_suspend;
280
281 return 0;
282
283err_suspend:
284 if (!pm_runtime_status_suspended(&pdev->dev))
285 img_prl_out_suspend(&pdev->dev);
286err_pm_disable:
287 pm_runtime_disable(&pdev->dev);
288 clk_disable_unprepare(prl->clk_sys);
289
290 return ret;
291}
292
293static int img_prl_out_dev_remove(struct platform_device *pdev)
294{
295 struct img_prl_out *prl = platform_get_drvdata(pdev);
296
297 pm_runtime_disable(&pdev->dev);
298 if (!pm_runtime_status_suspended(&pdev->dev))
299 img_prl_out_suspend(&pdev->dev);
300
301 clk_disable_unprepare(prl->clk_sys);
302
303 return 0;
304}
305
306static const struct of_device_id img_prl_out_of_match[] = {
307 { .compatible = "img,parallel-out" },
308 {}
309};
310MODULE_DEVICE_TABLE(of, img_prl_out_of_match);
311
312static const struct dev_pm_ops img_prl_out_pm_ops = {
313 SET_RUNTIME_PM_OPS(img_prl_out_suspend,
314 img_prl_out_resume, NULL)
315};
316
317static struct platform_driver img_prl_out_driver = {
318 .driver = {
319 .name = "img-parallel-out",
320 .of_match_table = img_prl_out_of_match,
321 .pm = &img_prl_out_pm_ops
322 },
323 .probe = img_prl_out_probe,
324 .remove = img_prl_out_dev_remove
325};
326module_platform_driver(img_prl_out_driver);
327
328MODULE_AUTHOR("Damien Horsley <Damien.Horsley@imgtec.com>");
329MODULE_DESCRIPTION("IMG Parallel Output Driver");
330MODULE_LICENSE("GPL v2");
331
