LXR linux/arch/arm/mach-s3c/pm-core-s3c24xx.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * Copyright 2008 Simtec Electronics
   4 *      Ben Dooks <ben@simtec.co.uk>
   5 *      http://armlinux.simtec.co.uk/
   6 *
   7 * S3C24xx - PM core support for arch/arm/plat-s3c/pm.c
   8 */
   9
  10#include <linux/delay.h>
  11#include <linux/io.h>
  12
  13#include "regs-clock.h"
  14#include "regs-irq-s3c24xx.h"
  15#include <mach/irqs.h>
  16
  17static inline void s3c_pm_debug_init_uart(void)
  18{
  19#ifdef CONFIG_SAMSUNG_PM_DEBUG
  20        unsigned long tmp = __raw_readl(S3C2410_CLKCON);
  21
  22        /* re-start uart clocks */
  23        tmp |= S3C2410_CLKCON_UART0;
  24        tmp |= S3C2410_CLKCON_UART1;
  25        tmp |= S3C2410_CLKCON_UART2;
  26
  27        __raw_writel(tmp, S3C2410_CLKCON);
  28        udelay(10);
  29#endif
  30}
  31
  32static inline void s3c_pm_arch_prepare_irqs(void)
  33{
  34        __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK);
  35        __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK);
  36
  37        /* ack any outstanding external interrupts before we go to sleep */
  38
  39        __raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND);
  40        __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND);
  41        __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND);
  42
  43}
  44
  45static inline void s3c_pm_arch_stop_clocks(void)
  46{
  47        __raw_writel(0x00, S3C2410_CLKCON);  /* turn off clocks over sleep */
  48}
  49
  50/* s3c2410_pm_show_resume_irqs
  51 *
  52 * print any IRQs asserted at resume time (ie, we woke from)
  53*/
  54static inline void s3c_pm_show_resume_irqs(int start, unsigned long which,
  55                                           unsigned long mask)
  56{
  57        int i;
  58
  59        which &= ~mask;
  60
  61        for (i = 0; i <= 31; i++) {
  62                if (which & (1L<<i)) {
  63                        S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
  64                }
  65        }
  66}
  67
  68static inline void s3c_pm_arch_show_resume_irqs(void)
  69{
  70        S3C_PMDBG("post sleep: IRQs 0x%08x, 0x%08x\n",
  71                  __raw_readl(S3C2410_SRCPND),
  72                  __raw_readl(S3C2410_EINTPEND));
  73
  74        s3c_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND),
  75                                s3c_irqwake_intmask);
  76
  77        s3c_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND),
  78                                s3c_irqwake_eintmask);
  79}
  80
  81static inline void s3c_pm_restored_gpios(void) { }
  82static inline void samsung_pm_saved_gpios(void) { }
  83
  84/* state for IRQs over sleep */
  85
  86/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources
  87 *
  88 * set bit to 1 in allow bitfield to enable the wakeup settings on it
  89*/
  90#ifdef CONFIG_PM_SLEEP
  91#define s3c_irqwake_intallow    (1L << 30 | 0xfL)
  92#define s3c_irqwake_eintallow   (0x0000fff0L)
  93#else
  94#define s3c_irqwake_eintallow 0
  95#define s3c_irqwake_intallow  0
  96#endif
  97