linux/arch/arm64/kvm/hyp/nvhe/hyp-init.S
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   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright (C) 2012,2013 - ARM Ltd
   4 * Author: Marc Zyngier <marc.zyngier@arm.com>
   5 */
   6
   7#include <linux/arm-smccc.h>
   8#include <linux/linkage.h>
   9
  10#include <asm/alternative.h>
  11#include <asm/assembler.h>
  12#include <asm/el2_setup.h>
  13#include <asm/kvm_arm.h>
  14#include <asm/kvm_asm.h>
  15#include <asm/kvm_mmu.h>
  16#include <asm/pgtable-hwdef.h>
  17#include <asm/sysreg.h>
  18#include <asm/virt.h>
  19
  20        .text
  21        .pushsection    .idmap.text, "ax"
  22
  23        .align  11
  24
  25SYM_CODE_START(__kvm_hyp_init)
  26        ventry  __invalid               // Synchronous EL2t
  27        ventry  __invalid               // IRQ EL2t
  28        ventry  __invalid               // FIQ EL2t
  29        ventry  __invalid               // Error EL2t
  30
  31        ventry  __invalid               // Synchronous EL2h
  32        ventry  __invalid               // IRQ EL2h
  33        ventry  __invalid               // FIQ EL2h
  34        ventry  __invalid               // Error EL2h
  35
  36        ventry  __do_hyp_init           // Synchronous 64-bit EL1
  37        ventry  __invalid               // IRQ 64-bit EL1
  38        ventry  __invalid               // FIQ 64-bit EL1
  39        ventry  __invalid               // Error 64-bit EL1
  40
  41        ventry  __invalid               // Synchronous 32-bit EL1
  42        ventry  __invalid               // IRQ 32-bit EL1
  43        ventry  __invalid               // FIQ 32-bit EL1
  44        ventry  __invalid               // Error 32-bit EL1
  45
  46__invalid:
  47        b       .
  48
  49        /*
  50         * Only uses x0..x3 so as to not clobber callee-saved SMCCC registers.
  51         *
  52         * x0: SMCCC function ID
  53         * x1: struct kvm_nvhe_init_params PA
  54         */
  55__do_hyp_init:
  56        /* Check for a stub HVC call */
  57        cmp     x0, #HVC_STUB_HCALL_NR
  58        b.lo    __kvm_handle_stub_hvc
  59
  60        mov     x3, #KVM_HOST_SMCCC_FUNC(__kvm_hyp_init)
  61        cmp     x0, x3
  62        b.eq    1f
  63
  64        mov     x0, #SMCCC_RET_NOT_SUPPORTED
  65        eret
  66
  671:      mov     x0, x1
  68        mov     x3, lr
  69        bl      ___kvm_hyp_init                 // Clobbers x0..x2
  70        mov     lr, x3
  71
  72        /* Hello, World! */
  73        mov     x0, #SMCCC_RET_SUCCESS
  74        eret
  75SYM_CODE_END(__kvm_hyp_init)
  76
  77/*
  78 * Initialize the hypervisor in EL2.
  79 *
  80 * Only uses x0..x2 so as to not clobber callee-saved SMCCC registers
  81 * and leave x3 for the caller.
  82 *
  83 * x0: struct kvm_nvhe_init_params PA
  84 */
  85SYM_CODE_START_LOCAL(___kvm_hyp_init)
  86alternative_if ARM64_KVM_PROTECTED_MODE
  87        mov_q   x1, HCR_HOST_NVHE_PROTECTED_FLAGS
  88        msr     hcr_el2, x1
  89alternative_else_nop_endif
  90
  91        ldr     x1, [x0, #NVHE_INIT_TPIDR_EL2]
  92        msr     tpidr_el2, x1
  93
  94        ldr     x1, [x0, #NVHE_INIT_STACK_HYP_VA]
  95        mov     sp, x1
  96
  97        ldr     x1, [x0, #NVHE_INIT_MAIR_EL2]
  98        msr     mair_el2, x1
  99
 100        ldr     x1, [x0, #NVHE_INIT_PGD_PA]
 101        phys_to_ttbr x2, x1
 102alternative_if ARM64_HAS_CNP
 103        orr     x2, x2, #TTBR_CNP_BIT
 104alternative_else_nop_endif
 105        msr     ttbr0_el2, x2
 106
 107        /*
 108         * Set the PS bits in TCR_EL2.
 109         */
 110        ldr     x0, [x0, #NVHE_INIT_TCR_EL2]
 111        tcr_compute_pa_size x0, #TCR_EL2_PS_SHIFT, x1, x2
 112        msr     tcr_el2, x0
 113
 114        isb
 115
 116        /* Invalidate the stale TLBs from Bootloader */
 117        tlbi    alle2
 118        dsb     sy
 119
 120        /*
 121         * Preserve all the RES1 bits while setting the default flags,
 122         * as well as the EE bit on BE. Drop the A flag since the compiler
 123         * is allowed to generate unaligned accesses.
 124         */
 125        mov_q   x0, (SCTLR_EL2_RES1 | (SCTLR_ELx_FLAGS & ~SCTLR_ELx_A))
 126CPU_BE( orr     x0, x0, #SCTLR_ELx_EE)
 127alternative_if ARM64_HAS_ADDRESS_AUTH
 128        mov_q   x1, (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | \
 129                     SCTLR_ELx_ENDA | SCTLR_ELx_ENDB)
 130        orr     x0, x0, x1
 131alternative_else_nop_endif
 132        msr     sctlr_el2, x0
 133        isb
 134
 135        /* Set the host vector */
 136        ldr     x0, =__kvm_hyp_host_vector
 137        msr     vbar_el2, x0
 138
 139        ret
 140SYM_CODE_END(___kvm_hyp_init)
 141
 142/*
 143 * PSCI CPU_ON entry point
 144 *
 145 * x0: struct kvm_nvhe_init_params PA
 146 */
 147SYM_CODE_START(kvm_hyp_cpu_entry)
 148        mov     x1, #1                          // is_cpu_on = true
 149        b       __kvm_hyp_init_cpu
 150SYM_CODE_END(kvm_hyp_cpu_entry)
 151
 152/*
 153 * PSCI CPU_SUSPEND / SYSTEM_SUSPEND entry point
 154 *
 155 * x0: struct kvm_nvhe_init_params PA
 156 */
 157SYM_CODE_START(kvm_hyp_cpu_resume)
 158        mov     x1, #0                          // is_cpu_on = false
 159        b       __kvm_hyp_init_cpu
 160SYM_CODE_END(kvm_hyp_cpu_resume)
 161
 162/*
 163 * Common code for CPU entry points. Initializes EL2 state and
 164 * installs the hypervisor before handing over to a C handler.
 165 *
 166 * x0: struct kvm_nvhe_init_params PA
 167 * x1: bool is_cpu_on
 168 */
 169SYM_CODE_START_LOCAL(__kvm_hyp_init_cpu)
 170        mov     x28, x0                         // Stash arguments
 171        mov     x29, x1
 172
 173        /* Check that the core was booted in EL2. */
 174        mrs     x0, CurrentEL
 175        cmp     x0, #CurrentEL_EL2
 176        b.eq    2f
 177
 178        /* The core booted in EL1. KVM cannot be initialized on it. */
 1791:      wfe
 180        wfi
 181        b       1b
 182
 1832:      msr     SPsel, #1                       // We want to use SP_EL{1,2}
 184
 185        /* Initialize EL2 CPU state to sane values. */
 186        init_el2_state                          // Clobbers x0..x2
 187
 188        /* Enable MMU, set vectors and stack. */
 189        mov     x0, x28
 190        bl      ___kvm_hyp_init                 // Clobbers x0..x2
 191
 192        /* Leave idmap. */
 193        mov     x0, x29
 194        ldr     x1, =kvm_host_psci_cpu_entry
 195        br      x1
 196SYM_CODE_END(__kvm_hyp_init_cpu)
 197
 198SYM_CODE_START(__kvm_handle_stub_hvc)
 199        cmp     x0, #HVC_SOFT_RESTART
 200        b.ne    1f
 201
 202        /* This is where we're about to jump, staying at EL2 */
 203        msr     elr_el2, x1
 204        mov     x0, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT | PSR_MODE_EL2h)
 205        msr     spsr_el2, x0
 206
 207        /* Shuffle the arguments, and don't come back */
 208        mov     x0, x2
 209        mov     x1, x3
 210        mov     x2, x4
 211        b       reset
 212
 2131:      cmp     x0, #HVC_RESET_VECTORS
 214        b.ne    1f
 215
 216        /*
 217         * Set the HVC_RESET_VECTORS return code before entering the common
 218         * path so that we do not clobber x0-x2 in case we are coming via
 219         * HVC_SOFT_RESTART.
 220         */
 221        mov     x0, xzr
 222reset:
 223        /* Reset kvm back to the hyp stub. */
 224        mrs     x5, sctlr_el2
 225        mov_q   x6, SCTLR_ELx_FLAGS
 226        bic     x5, x5, x6              // Clear SCTL_M and etc
 227        pre_disable_mmu_workaround
 228        msr     sctlr_el2, x5
 229        isb
 230
 231alternative_if ARM64_KVM_PROTECTED_MODE
 232        mov_q   x5, HCR_HOST_NVHE_FLAGS
 233        msr     hcr_el2, x5
 234alternative_else_nop_endif
 235
 236        /* Install stub vectors */
 237        adr_l   x5, __hyp_stub_vectors
 238        msr     vbar_el2, x5
 239        eret
 240
 2411:      /* Bad stub call */
 242        mov_q   x0, HVC_STUB_ERR
 243        eret
 244
 245SYM_CODE_END(__kvm_handle_stub_hvc)
 246
 247        .popsection
 248