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43#include <linux/sched/mm.h>
44#include <linux/highmem.h>
45#include <linux/debugfs.h>
46#include <linux/bug.h>
47#include <linux/vmalloc.h>
48#include <linux/export.h>
49#include <linux/init.h>
50#include <linux/gfp.h>
51#include <linux/memblock.h>
52#include <linux/seq_file.h>
53#include <linux/crash_dump.h>
54#include <linux/pgtable.h>
55#ifdef CONFIG_KEXEC_CORE
56#include <linux/kexec.h>
57#endif
58
59#include <trace/events/xen.h>
60
61#include <asm/tlbflush.h>
62#include <asm/fixmap.h>
63#include <asm/mmu_context.h>
64#include <asm/setup.h>
65#include <asm/paravirt.h>
66#include <asm/e820/api.h>
67#include <asm/linkage.h>
68#include <asm/page.h>
69#include <asm/init.h>
70#include <asm/memtype.h>
71#include <asm/smp.h>
72#include <asm/tlb.h>
73
74#include <asm/xen/hypercall.h>
75#include <asm/xen/hypervisor.h>
76
77#include <xen/xen.h>
78#include <xen/page.h>
79#include <xen/interface/xen.h>
80#include <xen/interface/hvm/hvm_op.h>
81#include <xen/interface/version.h>
82#include <xen/interface/memory.h>
83#include <xen/hvc-console.h>
84
85#include "multicalls.h"
86#include "mmu.h"
87#include "debugfs.h"
88
89
90static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
91
92
93
94
95
96static DEFINE_SPINLOCK(xen_reservation_lock);
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112DEFINE_PER_CPU(unsigned long, xen_cr3);
113DEFINE_PER_CPU(unsigned long, xen_current_cr3);
114
115static phys_addr_t xen_pt_base, xen_pt_size __initdata;
116
117static DEFINE_STATIC_KEY_FALSE(xen_struct_pages_ready);
118
119
120
121
122
123#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
124
125void make_lowmem_page_readonly(void *vaddr)
126{
127 pte_t *pte, ptev;
128 unsigned long address = (unsigned long)vaddr;
129 unsigned int level;
130
131 pte = lookup_address(address, &level);
132 if (pte == NULL)
133 return;
134
135 ptev = pte_wrprotect(*pte);
136
137 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
138 BUG();
139}
140
141void make_lowmem_page_readwrite(void *vaddr)
142{
143 pte_t *pte, ptev;
144 unsigned long address = (unsigned long)vaddr;
145 unsigned int level;
146
147 pte = lookup_address(address, &level);
148 if (pte == NULL)
149 return;
150
151 ptev = pte_mkwrite(*pte);
152
153 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
154 BUG();
155}
156
157
158
159
160
161
162static bool xen_page_pinned(void *ptr)
163{
164 if (static_branch_likely(&xen_struct_pages_ready)) {
165 struct page *page = virt_to_page(ptr);
166
167 return PagePinned(page);
168 }
169 return true;
170}
171
172static void xen_extend_mmu_update(const struct mmu_update *update)
173{
174 struct multicall_space mcs;
175 struct mmu_update *u;
176
177 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
178
179 if (mcs.mc != NULL) {
180 mcs.mc->args[1]++;
181 } else {
182 mcs = __xen_mc_entry(sizeof(*u));
183 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
184 }
185
186 u = mcs.args;
187 *u = *update;
188}
189
190static void xen_extend_mmuext_op(const struct mmuext_op *op)
191{
192 struct multicall_space mcs;
193 struct mmuext_op *u;
194
195 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
196
197 if (mcs.mc != NULL) {
198 mcs.mc->args[1]++;
199 } else {
200 mcs = __xen_mc_entry(sizeof(*u));
201 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
202 }
203
204 u = mcs.args;
205 *u = *op;
206}
207
208static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
209{
210 struct mmu_update u;
211
212 preempt_disable();
213
214 xen_mc_batch();
215
216
217 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
218 u.val = pmd_val_ma(val);
219 xen_extend_mmu_update(&u);
220
221 xen_mc_issue(PARAVIRT_LAZY_MMU);
222
223 preempt_enable();
224}
225
226static void xen_set_pmd(pmd_t *ptr, pmd_t val)
227{
228 trace_xen_mmu_set_pmd(ptr, val);
229
230
231
232 if (!xen_page_pinned(ptr)) {
233 *ptr = val;
234 return;
235 }
236
237 xen_set_pmd_hyper(ptr, val);
238}
239
240
241
242
243
244void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
245{
246 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
247}
248
249static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
250{
251 struct mmu_update u;
252
253 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
254 return false;
255
256 xen_mc_batch();
257
258 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
259 u.val = pte_val_ma(pteval);
260 xen_extend_mmu_update(&u);
261
262 xen_mc_issue(PARAVIRT_LAZY_MMU);
263
264 return true;
265}
266
267static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
268{
269 if (!xen_batched_set_pte(ptep, pteval)) {
270
271
272
273
274 struct mmu_update u;
275
276 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
277 u.val = pte_val_ma(pteval);
278 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
279 }
280}
281
282static void xen_set_pte(pte_t *ptep, pte_t pteval)
283{
284 trace_xen_mmu_set_pte(ptep, pteval);
285 __xen_set_pte(ptep, pteval);
286}
287
288pte_t xen_ptep_modify_prot_start(struct vm_area_struct *vma,
289 unsigned long addr, pte_t *ptep)
290{
291
292 trace_xen_mmu_ptep_modify_prot_start(vma->vm_mm, addr, ptep, *ptep);
293 return *ptep;
294}
295
296void xen_ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr,
297 pte_t *ptep, pte_t pte)
298{
299 struct mmu_update u;
300
301 trace_xen_mmu_ptep_modify_prot_commit(vma->vm_mm, addr, ptep, pte);
302 xen_mc_batch();
303
304 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
305 u.val = pte_val_ma(pte);
306 xen_extend_mmu_update(&u);
307
308 xen_mc_issue(PARAVIRT_LAZY_MMU);
309}
310
311
312static pteval_t pte_mfn_to_pfn(pteval_t val)
313{
314 if (val & _PAGE_PRESENT) {
315 unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT;
316 unsigned long pfn = mfn_to_pfn(mfn);
317
318 pteval_t flags = val & PTE_FLAGS_MASK;
319 if (unlikely(pfn == ~0))
320 val = flags & ~_PAGE_PRESENT;
321 else
322 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
323 }
324
325 return val;
326}
327
328static pteval_t pte_pfn_to_mfn(pteval_t val)
329{
330 if (val & _PAGE_PRESENT) {
331 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
332 pteval_t flags = val & PTE_FLAGS_MASK;
333 unsigned long mfn;
334
335 mfn = __pfn_to_mfn(pfn);
336
337
338
339
340
341
342
343 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
344 mfn = 0;
345 flags = 0;
346 } else
347 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
348 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
349 }
350
351 return val;
352}
353
354__visible pteval_t xen_pte_val(pte_t pte)
355{
356 pteval_t pteval = pte.pte;
357
358 return pte_mfn_to_pfn(pteval);
359}
360PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
361
362__visible pgdval_t xen_pgd_val(pgd_t pgd)
363{
364 return pte_mfn_to_pfn(pgd.pgd);
365}
366PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
367
368__visible pte_t xen_make_pte(pteval_t pte)
369{
370 pte = pte_pfn_to_mfn(pte);
371
372 return native_make_pte(pte);
373}
374PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
375
376__visible pgd_t xen_make_pgd(pgdval_t pgd)
377{
378 pgd = pte_pfn_to_mfn(pgd);
379 return native_make_pgd(pgd);
380}
381PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
382
383__visible pmdval_t xen_pmd_val(pmd_t pmd)
384{
385 return pte_mfn_to_pfn(pmd.pmd);
386}
387PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
388
389static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
390{
391 struct mmu_update u;
392
393 preempt_disable();
394
395 xen_mc_batch();
396
397
398 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
399 u.val = pud_val_ma(val);
400 xen_extend_mmu_update(&u);
401
402 xen_mc_issue(PARAVIRT_LAZY_MMU);
403
404 preempt_enable();
405}
406
407static void xen_set_pud(pud_t *ptr, pud_t val)
408{
409 trace_xen_mmu_set_pud(ptr, val);
410
411
412
413 if (!xen_page_pinned(ptr)) {
414 *ptr = val;
415 return;
416 }
417
418 xen_set_pud_hyper(ptr, val);
419}
420
421__visible pmd_t xen_make_pmd(pmdval_t pmd)
422{
423 pmd = pte_pfn_to_mfn(pmd);
424 return native_make_pmd(pmd);
425}
426PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
427
428__visible pudval_t xen_pud_val(pud_t pud)
429{
430 return pte_mfn_to_pfn(pud.pud);
431}
432PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
433
434__visible pud_t xen_make_pud(pudval_t pud)
435{
436 pud = pte_pfn_to_mfn(pud);
437
438 return native_make_pud(pud);
439}
440PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
441
442static pgd_t *xen_get_user_pgd(pgd_t *pgd)
443{
444 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
445 unsigned offset = pgd - pgd_page;
446 pgd_t *user_ptr = NULL;
447
448 if (offset < pgd_index(USER_LIMIT)) {
449 struct page *page = virt_to_page(pgd_page);
450 user_ptr = (pgd_t *)page->private;
451 if (user_ptr)
452 user_ptr += offset;
453 }
454
455 return user_ptr;
456}
457
458static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
459{
460 struct mmu_update u;
461
462 u.ptr = virt_to_machine(ptr).maddr;
463 u.val = p4d_val_ma(val);
464 xen_extend_mmu_update(&u);
465}
466
467
468
469
470
471
472
473
474static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
475{
476 preempt_disable();
477
478 xen_mc_batch();
479
480 __xen_set_p4d_hyper(ptr, val);
481
482 xen_mc_issue(PARAVIRT_LAZY_MMU);
483
484 preempt_enable();
485}
486
487static void xen_set_p4d(p4d_t *ptr, p4d_t val)
488{
489 pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr);
490 pgd_t pgd_val;
491
492 trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val);
493
494
495
496 if (!xen_page_pinned(ptr)) {
497 *ptr = val;
498 if (user_ptr) {
499 WARN_ON(xen_page_pinned(user_ptr));
500 pgd_val.pgd = p4d_val_ma(val);
501 *user_ptr = pgd_val;
502 }
503 return;
504 }
505
506
507
508 xen_mc_batch();
509
510 __xen_set_p4d_hyper(ptr, val);
511 if (user_ptr)
512 __xen_set_p4d_hyper((p4d_t *)user_ptr, val);
513
514 xen_mc_issue(PARAVIRT_LAZY_MMU);
515}
516
517#if CONFIG_PGTABLE_LEVELS >= 5
518__visible p4dval_t xen_p4d_val(p4d_t p4d)
519{
520 return pte_mfn_to_pfn(p4d.p4d);
521}
522PV_CALLEE_SAVE_REGS_THUNK(xen_p4d_val);
523
524__visible p4d_t xen_make_p4d(p4dval_t p4d)
525{
526 p4d = pte_pfn_to_mfn(p4d);
527
528 return native_make_p4d(p4d);
529}
530PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d);
531#endif
532
533static void xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd,
534 void (*func)(struct mm_struct *mm, struct page *,
535 enum pt_level),
536 bool last, unsigned long limit)
537{
538 int i, nr;
539
540 nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD;
541 for (i = 0; i < nr; i++) {
542 if (!pmd_none(pmd[i]))
543 (*func)(mm, pmd_page(pmd[i]), PT_PTE);
544 }
545}
546
547static void xen_pud_walk(struct mm_struct *mm, pud_t *pud,
548 void (*func)(struct mm_struct *mm, struct page *,
549 enum pt_level),
550 bool last, unsigned long limit)
551{
552 int i, nr;
553
554 nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD;
555 for (i = 0; i < nr; i++) {
556 pmd_t *pmd;
557
558 if (pud_none(pud[i]))
559 continue;
560
561 pmd = pmd_offset(&pud[i], 0);
562 if (PTRS_PER_PMD > 1)
563 (*func)(mm, virt_to_page(pmd), PT_PMD);
564 xen_pmd_walk(mm, pmd, func, last && i == nr - 1, limit);
565 }
566}
567
568static void xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d,
569 void (*func)(struct mm_struct *mm, struct page *,
570 enum pt_level),
571 bool last, unsigned long limit)
572{
573 pud_t *pud;
574
575
576 if (p4d_none(*p4d))
577 return;
578
579 pud = pud_offset(p4d, 0);
580 if (PTRS_PER_PUD > 1)
581 (*func)(mm, virt_to_page(pud), PT_PUD);
582 xen_pud_walk(mm, pud, func, last, limit);
583}
584
585
586
587
588
589
590
591
592
593
594
595
596
597static void __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
598 void (*func)(struct mm_struct *mm, struct page *,
599 enum pt_level),
600 unsigned long limit)
601{
602 int i, nr;
603 unsigned hole_low = 0, hole_high = 0;
604
605
606 limit--;
607 BUG_ON(limit >= FIXADDR_TOP);
608
609
610
611
612
613 hole_low = pgd_index(GUARD_HOLE_BASE_ADDR);
614 hole_high = pgd_index(GUARD_HOLE_END_ADDR);
615
616 nr = pgd_index(limit) + 1;
617 for (i = 0; i < nr; i++) {
618 p4d_t *p4d;
619
620 if (i >= hole_low && i < hole_high)
621 continue;
622
623 if (pgd_none(pgd[i]))
624 continue;
625
626 p4d = p4d_offset(&pgd[i], 0);
627 xen_p4d_walk(mm, p4d, func, i == nr - 1, limit);
628 }
629
630
631
632 (*func)(mm, virt_to_page(pgd), PT_PGD);
633}
634
635static void xen_pgd_walk(struct mm_struct *mm,
636 void (*func)(struct mm_struct *mm, struct page *,
637 enum pt_level),
638 unsigned long limit)
639{
640 __xen_pgd_walk(mm, mm->pgd, func, limit);
641}
642
643
644
645static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
646{
647 spinlock_t *ptl = NULL;
648
649#if USE_SPLIT_PTE_PTLOCKS
650 ptl = ptlock_ptr(page);
651 spin_lock_nest_lock(ptl, &mm->page_table_lock);
652#endif
653
654 return ptl;
655}
656
657static void xen_pte_unlock(void *v)
658{
659 spinlock_t *ptl = v;
660 spin_unlock(ptl);
661}
662
663static void xen_do_pin(unsigned level, unsigned long pfn)
664{
665 struct mmuext_op op;
666
667 op.cmd = level;
668 op.arg1.mfn = pfn_to_mfn(pfn);
669
670 xen_extend_mmuext_op(&op);
671}
672
673static void xen_pin_page(struct mm_struct *mm, struct page *page,
674 enum pt_level level)
675{
676 unsigned pgfl = TestSetPagePinned(page);
677
678 if (!pgfl) {
679 void *pt = lowmem_page_address(page);
680 unsigned long pfn = page_to_pfn(page);
681 struct multicall_space mcs = __xen_mc_entry(0);
682 spinlock_t *ptl;
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704 ptl = NULL;
705 if (level == PT_PTE)
706 ptl = xen_pte_lock(page, mm);
707
708 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
709 pfn_pte(pfn, PAGE_KERNEL_RO),
710 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
711
712 if (ptl) {
713 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
714
715
716
717 xen_mc_callback(xen_pte_unlock, ptl);
718 }
719 }
720}
721
722
723
724
725static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
726{
727 pgd_t *user_pgd = xen_get_user_pgd(pgd);
728
729 trace_xen_mmu_pgd_pin(mm, pgd);
730
731 xen_mc_batch();
732
733 __xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT);
734
735 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
736
737 if (user_pgd) {
738 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
739 xen_do_pin(MMUEXT_PIN_L4_TABLE,
740 PFN_DOWN(__pa(user_pgd)));
741 }
742
743 xen_mc_issue(0);
744}
745
746static void xen_pgd_pin(struct mm_struct *mm)
747{
748 __xen_pgd_pin(mm, mm->pgd);
749}
750
751
752
753
754
755
756
757
758
759
760
761void xen_mm_pin_all(void)
762{
763 struct page *page;
764
765 spin_lock(&pgd_lock);
766
767 list_for_each_entry(page, &pgd_list, lru) {
768 if (!PagePinned(page)) {
769 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
770 SetPageSavePinned(page);
771 }
772 }
773
774 spin_unlock(&pgd_lock);
775}
776
777static void __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
778 enum pt_level level)
779{
780 SetPagePinned(page);
781}
782
783
784
785
786
787
788
789static void __init xen_after_bootmem(void)
790{
791 static_branch_enable(&xen_struct_pages_ready);
792 SetPagePinned(virt_to_page(level3_user_vsyscall));
793 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
794}
795
796static void xen_unpin_page(struct mm_struct *mm, struct page *page,
797 enum pt_level level)
798{
799 unsigned pgfl = TestClearPagePinned(page);
800
801 if (pgfl) {
802 void *pt = lowmem_page_address(page);
803 unsigned long pfn = page_to_pfn(page);
804 spinlock_t *ptl = NULL;
805 struct multicall_space mcs;
806
807
808
809
810
811
812
813
814 if (level == PT_PTE) {
815 ptl = xen_pte_lock(page, mm);
816
817 if (ptl)
818 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
819 }
820
821 mcs = __xen_mc_entry(0);
822
823 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
824 pfn_pte(pfn, PAGE_KERNEL),
825 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
826
827 if (ptl) {
828
829 xen_mc_callback(xen_pte_unlock, ptl);
830 }
831 }
832}
833
834
835static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
836{
837 pgd_t *user_pgd = xen_get_user_pgd(pgd);
838
839 trace_xen_mmu_pgd_unpin(mm, pgd);
840
841 xen_mc_batch();
842
843 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
844
845 if (user_pgd) {
846 xen_do_pin(MMUEXT_UNPIN_TABLE,
847 PFN_DOWN(__pa(user_pgd)));
848 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
849 }
850
851 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
852
853 xen_mc_issue(0);
854}
855
856static void xen_pgd_unpin(struct mm_struct *mm)
857{
858 __xen_pgd_unpin(mm, mm->pgd);
859}
860
861
862
863
864
865void xen_mm_unpin_all(void)
866{
867 struct page *page;
868
869 spin_lock(&pgd_lock);
870
871 list_for_each_entry(page, &pgd_list, lru) {
872 if (PageSavePinned(page)) {
873 BUG_ON(!PagePinned(page));
874 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
875 ClearPageSavePinned(page);
876 }
877 }
878
879 spin_unlock(&pgd_lock);
880}
881
882static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
883{
884 spin_lock(&next->page_table_lock);
885 xen_pgd_pin(next);
886 spin_unlock(&next->page_table_lock);
887}
888
889static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
890{
891 spin_lock(&mm->page_table_lock);
892 xen_pgd_pin(mm);
893 spin_unlock(&mm->page_table_lock);
894}
895
896static void drop_mm_ref_this_cpu(void *info)
897{
898 struct mm_struct *mm = info;
899
900 if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm)
901 leave_mm(smp_processor_id());
902
903
904
905
906
907 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
908 xen_mc_flush();
909}
910
911#ifdef CONFIG_SMP
912
913
914
915
916static void xen_drop_mm_ref(struct mm_struct *mm)
917{
918 cpumask_var_t mask;
919 unsigned cpu;
920
921 drop_mm_ref_this_cpu(mm);
922
923
924 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
925 for_each_online_cpu(cpu) {
926 if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
927 continue;
928 smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1);
929 }
930 return;
931 }
932
933
934
935
936
937
938
939
940 cpumask_clear(mask);
941 for_each_online_cpu(cpu) {
942 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
943 cpumask_set_cpu(cpu, mask);
944 }
945
946 smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1);
947 free_cpumask_var(mask);
948}
949#else
950static void xen_drop_mm_ref(struct mm_struct *mm)
951{
952 drop_mm_ref_this_cpu(mm);
953}
954#endif
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970static void xen_exit_mmap(struct mm_struct *mm)
971{
972 get_cpu();
973 xen_drop_mm_ref(mm);
974 put_cpu();
975
976 spin_lock(&mm->page_table_lock);
977
978
979 if (xen_page_pinned(mm->pgd))
980 xen_pgd_unpin(mm);
981
982 spin_unlock(&mm->page_table_lock);
983}
984
985static void xen_post_allocator_init(void);
986
987static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
988{
989 struct mmuext_op op;
990
991 op.cmd = cmd;
992 op.arg1.mfn = pfn_to_mfn(pfn);
993 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
994 BUG();
995}
996
997static void __init xen_cleanhighmap(unsigned long vaddr,
998 unsigned long vaddr_end)
999{
1000 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
1001 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
1002
1003
1004
1005 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD));
1006 pmd++, vaddr += PMD_SIZE) {
1007 if (pmd_none(*pmd))
1008 continue;
1009 if (vaddr < (unsigned long) _text || vaddr > kernel_end)
1010 set_pmd(pmd, __pmd(0));
1011 }
1012
1013
1014 xen_mc_flush();
1015}
1016
1017
1018
1019
1020static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size)
1021{
1022 void *vaddr = __va(paddr);
1023 void *vaddr_end = vaddr + size;
1024
1025 for (; vaddr < vaddr_end; vaddr += PAGE_SIZE)
1026 make_lowmem_page_readwrite(vaddr);
1027
1028 memblock_free(paddr, size);
1029}
1030
1031static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin)
1032{
1033 unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK;
1034
1035 if (unpin)
1036 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa));
1037 ClearPagePinned(virt_to_page(__va(pa)));
1038 xen_free_ro_pages(pa, PAGE_SIZE);
1039}
1040
1041static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin)
1042{
1043 unsigned long pa;
1044 pte_t *pte_tbl;
1045 int i;
1046
1047 if (pmd_large(*pmd)) {
1048 pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK;
1049 xen_free_ro_pages(pa, PMD_SIZE);
1050 return;
1051 }
1052
1053 pte_tbl = pte_offset_kernel(pmd, 0);
1054 for (i = 0; i < PTRS_PER_PTE; i++) {
1055 if (pte_none(pte_tbl[i]))
1056 continue;
1057 pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT;
1058 xen_free_ro_pages(pa, PAGE_SIZE);
1059 }
1060 set_pmd(pmd, __pmd(0));
1061 xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin);
1062}
1063
1064static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin)
1065{
1066 unsigned long pa;
1067 pmd_t *pmd_tbl;
1068 int i;
1069
1070 if (pud_large(*pud)) {
1071 pa = pud_val(*pud) & PHYSICAL_PAGE_MASK;
1072 xen_free_ro_pages(pa, PUD_SIZE);
1073 return;
1074 }
1075
1076 pmd_tbl = pmd_offset(pud, 0);
1077 for (i = 0; i < PTRS_PER_PMD; i++) {
1078 if (pmd_none(pmd_tbl[i]))
1079 continue;
1080 xen_cleanmfnmap_pmd(pmd_tbl + i, unpin);
1081 }
1082 set_pud(pud, __pud(0));
1083 xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin);
1084}
1085
1086static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin)
1087{
1088 unsigned long pa;
1089 pud_t *pud_tbl;
1090 int i;
1091
1092 if (p4d_large(*p4d)) {
1093 pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK;
1094 xen_free_ro_pages(pa, P4D_SIZE);
1095 return;
1096 }
1097
1098 pud_tbl = pud_offset(p4d, 0);
1099 for (i = 0; i < PTRS_PER_PUD; i++) {
1100 if (pud_none(pud_tbl[i]))
1101 continue;
1102 xen_cleanmfnmap_pud(pud_tbl + i, unpin);
1103 }
1104 set_p4d(p4d, __p4d(0));
1105 xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin);
1106}
1107
1108
1109
1110
1111
1112static void __init xen_cleanmfnmap(unsigned long vaddr)
1113{
1114 pgd_t *pgd;
1115 p4d_t *p4d;
1116 bool unpin;
1117
1118 unpin = (vaddr == 2 * PGDIR_SIZE);
1119 vaddr &= PMD_MASK;
1120 pgd = pgd_offset_k(vaddr);
1121 p4d = p4d_offset(pgd, 0);
1122 if (!p4d_none(*p4d))
1123 xen_cleanmfnmap_p4d(p4d, unpin);
1124}
1125
1126static void __init xen_pagetable_p2m_free(void)
1127{
1128 unsigned long size;
1129 unsigned long addr;
1130
1131 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1132
1133
1134 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
1135 return;
1136
1137
1138 memset((void *)xen_start_info->mfn_list, 0xff, size);
1139
1140 addr = xen_start_info->mfn_list;
1141
1142
1143
1144
1145
1146
1147
1148 size = roundup(size, PMD_SIZE);
1149
1150 if (addr >= __START_KERNEL_map) {
1151 xen_cleanhighmap(addr, addr + size);
1152 size = PAGE_ALIGN(xen_start_info->nr_pages *
1153 sizeof(unsigned long));
1154 memblock_free(__pa(addr), size);
1155 } else {
1156 xen_cleanmfnmap(addr);
1157 }
1158}
1159
1160static void __init xen_pagetable_cleanhighmap(void)
1161{
1162 unsigned long size;
1163 unsigned long addr;
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174 addr = xen_start_info->pt_base;
1175 size = xen_start_info->nr_pt_frames * PAGE_SIZE;
1176
1177 xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2));
1178 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
1179}
1180
1181static void __init xen_pagetable_p2m_setup(void)
1182{
1183 xen_vmalloc_p2m_tree();
1184
1185 xen_pagetable_p2m_free();
1186
1187 xen_pagetable_cleanhighmap();
1188
1189
1190 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
1191}
1192
1193static void __init xen_pagetable_init(void)
1194{
1195 paging_init();
1196 xen_post_allocator_init();
1197
1198 xen_pagetable_p2m_setup();
1199
1200
1201 xen_build_mfn_list_list();
1202
1203
1204 xen_remap_memory();
1205 xen_setup_mfn_list_list();
1206}
1207static void xen_write_cr2(unsigned long cr2)
1208{
1209 this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
1210}
1211
1212static noinline void xen_flush_tlb(void)
1213{
1214 struct mmuext_op *op;
1215 struct multicall_space mcs;
1216
1217 preempt_disable();
1218
1219 mcs = xen_mc_entry(sizeof(*op));
1220
1221 op = mcs.args;
1222 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1223 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1224
1225 xen_mc_issue(PARAVIRT_LAZY_MMU);
1226
1227 preempt_enable();
1228}
1229
1230static void xen_flush_tlb_one_user(unsigned long addr)
1231{
1232 struct mmuext_op *op;
1233 struct multicall_space mcs;
1234
1235 trace_xen_mmu_flush_tlb_one_user(addr);
1236
1237 preempt_disable();
1238
1239 mcs = xen_mc_entry(sizeof(*op));
1240 op = mcs.args;
1241 op->cmd = MMUEXT_INVLPG_LOCAL;
1242 op->arg1.linear_addr = addr & PAGE_MASK;
1243 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1244
1245 xen_mc_issue(PARAVIRT_LAZY_MMU);
1246
1247 preempt_enable();
1248}
1249
1250static void xen_flush_tlb_others(const struct cpumask *cpus,
1251 const struct flush_tlb_info *info)
1252{
1253 struct {
1254 struct mmuext_op op;
1255 DECLARE_BITMAP(mask, NR_CPUS);
1256 } *args;
1257 struct multicall_space mcs;
1258 const size_t mc_entry_size = sizeof(args->op) +
1259 sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus());
1260
1261 trace_xen_mmu_flush_tlb_others(cpus, info->mm, info->start, info->end);
1262
1263 if (cpumask_empty(cpus))
1264 return;
1265
1266 mcs = xen_mc_entry(mc_entry_size);
1267 args = mcs.args;
1268 args->op.arg2.vcpumask = to_cpumask(args->mask);
1269
1270
1271 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1272 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1273
1274 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1275 if (info->end != TLB_FLUSH_ALL &&
1276 (info->end - info->start) <= PAGE_SIZE) {
1277 args->op.cmd = MMUEXT_INVLPG_MULTI;
1278 args->op.arg1.linear_addr = info->start;
1279 }
1280
1281 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1282
1283 xen_mc_issue(PARAVIRT_LAZY_MMU);
1284}
1285
1286static unsigned long xen_read_cr3(void)
1287{
1288 return this_cpu_read(xen_cr3);
1289}
1290
1291static void set_current_cr3(void *v)
1292{
1293 this_cpu_write(xen_current_cr3, (unsigned long)v);
1294}
1295
1296static void __xen_write_cr3(bool kernel, unsigned long cr3)
1297{
1298 struct mmuext_op op;
1299 unsigned long mfn;
1300
1301 trace_xen_mmu_write_cr3(kernel, cr3);
1302
1303 if (cr3)
1304 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1305 else
1306 mfn = 0;
1307
1308 WARN_ON(mfn == 0 && kernel);
1309
1310 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1311 op.arg1.mfn = mfn;
1312
1313 xen_extend_mmuext_op(&op);
1314
1315 if (kernel) {
1316 this_cpu_write(xen_cr3, cr3);
1317
1318
1319
1320 xen_mc_callback(set_current_cr3, (void *)cr3);
1321 }
1322}
1323static void xen_write_cr3(unsigned long cr3)
1324{
1325 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1326
1327 BUG_ON(preemptible());
1328
1329 xen_mc_batch();
1330
1331
1332
1333 this_cpu_write(xen_cr3, cr3);
1334
1335 __xen_write_cr3(true, cr3);
1336
1337 if (user_pgd)
1338 __xen_write_cr3(false, __pa(user_pgd));
1339 else
1340 __xen_write_cr3(false, 0);
1341
1342 xen_mc_issue(PARAVIRT_LAZY_CPU);
1343}
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365static void __init xen_write_cr3_init(unsigned long cr3)
1366{
1367 BUG_ON(preemptible());
1368
1369 xen_mc_batch();
1370
1371
1372
1373 this_cpu_write(xen_cr3, cr3);
1374
1375 __xen_write_cr3(true, cr3);
1376
1377 xen_mc_issue(PARAVIRT_LAZY_CPU);
1378}
1379
1380static int xen_pgd_alloc(struct mm_struct *mm)
1381{
1382 pgd_t *pgd = mm->pgd;
1383 struct page *page = virt_to_page(pgd);
1384 pgd_t *user_pgd;
1385 int ret = -ENOMEM;
1386
1387 BUG_ON(PagePinned(virt_to_page(pgd)));
1388 BUG_ON(page->private != 0);
1389
1390 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1391 page->private = (unsigned long)user_pgd;
1392
1393 if (user_pgd != NULL) {
1394#ifdef CONFIG_X86_VSYSCALL_EMULATION
1395 user_pgd[pgd_index(VSYSCALL_ADDR)] =
1396 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1397#endif
1398 ret = 0;
1399 }
1400
1401 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1402
1403 return ret;
1404}
1405
1406static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1407{
1408 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1409
1410 if (user_pgd)
1411 free_page((unsigned long)user_pgd);
1412}
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428__visible pte_t xen_make_pte_init(pteval_t pte)
1429{
1430 unsigned long pfn;
1431
1432
1433
1434
1435
1436
1437
1438 pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT;
1439 if (xen_start_info->mfn_list < __START_KERNEL_map &&
1440 pfn >= xen_start_info->first_p2m_pfn &&
1441 pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames)
1442 pte &= ~_PAGE_RW;
1443
1444 pte = pte_pfn_to_mfn(pte);
1445 return native_make_pte(pte);
1446}
1447PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init);
1448
1449static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1450{
1451 __xen_set_pte(ptep, pte);
1452}
1453
1454
1455
1456static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1457{
1458#ifdef CONFIG_FLATMEM
1459 BUG_ON(mem_map);
1460#endif
1461 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1462 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1463}
1464
1465
1466static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1467{
1468#ifdef CONFIG_FLATMEM
1469 BUG_ON(mem_map);
1470#endif
1471 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1472}
1473
1474
1475
1476static void __init xen_release_pte_init(unsigned long pfn)
1477{
1478 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1479 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1480}
1481
1482static void __init xen_release_pmd_init(unsigned long pfn)
1483{
1484 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1485}
1486
1487static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1488{
1489 struct multicall_space mcs;
1490 struct mmuext_op *op;
1491
1492 mcs = __xen_mc_entry(sizeof(*op));
1493 op = mcs.args;
1494 op->cmd = cmd;
1495 op->arg1.mfn = pfn_to_mfn(pfn);
1496
1497 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1498}
1499
1500static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1501{
1502 struct multicall_space mcs;
1503 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1504
1505 mcs = __xen_mc_entry(0);
1506 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1507 pfn_pte(pfn, prot), 0);
1508}
1509
1510
1511
1512static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1513 unsigned level)
1514{
1515 bool pinned = xen_page_pinned(mm->pgd);
1516
1517 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
1518
1519 if (pinned) {
1520 struct page *page = pfn_to_page(pfn);
1521
1522 if (static_branch_likely(&xen_struct_pages_ready))
1523 SetPagePinned(page);
1524
1525 xen_mc_batch();
1526
1527 __set_pfn_prot(pfn, PAGE_KERNEL_RO);
1528
1529 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
1530 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1531
1532 xen_mc_issue(PARAVIRT_LAZY_MMU);
1533 }
1534}
1535
1536static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1537{
1538 xen_alloc_ptpage(mm, pfn, PT_PTE);
1539}
1540
1541static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1542{
1543 xen_alloc_ptpage(mm, pfn, PT_PMD);
1544}
1545
1546
1547static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
1548{
1549 struct page *page = pfn_to_page(pfn);
1550 bool pinned = PagePinned(page);
1551
1552 trace_xen_mmu_release_ptpage(pfn, level, pinned);
1553
1554 if (pinned) {
1555 xen_mc_batch();
1556
1557 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
1558 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1559
1560 __set_pfn_prot(pfn, PAGE_KERNEL);
1561
1562 xen_mc_issue(PARAVIRT_LAZY_MMU);
1563
1564 ClearPagePinned(page);
1565 }
1566}
1567
1568static void xen_release_pte(unsigned long pfn)
1569{
1570 xen_release_ptpage(pfn, PT_PTE);
1571}
1572
1573static void xen_release_pmd(unsigned long pfn)
1574{
1575 xen_release_ptpage(pfn, PT_PMD);
1576}
1577
1578static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1579{
1580 xen_alloc_ptpage(mm, pfn, PT_PUD);
1581}
1582
1583static void xen_release_pud(unsigned long pfn)
1584{
1585 xen_release_ptpage(pfn, PT_PUD);
1586}
1587
1588
1589
1590
1591
1592static void * __init __ka(phys_addr_t paddr)
1593{
1594 return (void *)(paddr + __START_KERNEL_map);
1595}
1596
1597
1598static unsigned long __init m2p(phys_addr_t maddr)
1599{
1600 phys_addr_t paddr;
1601
1602 maddr &= XEN_PTE_MFN_MASK;
1603 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1604
1605 return paddr;
1606}
1607
1608
1609static void * __init m2v(phys_addr_t maddr)
1610{
1611 return __ka(m2p(maddr));
1612}
1613
1614
1615static void __init set_page_prot_flags(void *addr, pgprot_t prot,
1616 unsigned long flags)
1617{
1618 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1619 pte_t pte = pfn_pte(pfn, prot);
1620
1621 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
1622 BUG();
1623}
1624static void __init set_page_prot(void *addr, pgprot_t prot)
1625{
1626 return set_page_prot_flags(addr, prot, UVMF_NONE);
1627}
1628
1629void __init xen_setup_machphys_mapping(void)
1630{
1631 struct xen_machphys_mapping mapping;
1632
1633 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1634 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1635 machine_to_phys_nr = mapping.max_mfn + 1;
1636 } else {
1637 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
1638 }
1639}
1640
1641static void __init convert_pfn_mfn(void *v)
1642{
1643 pte_t *pte = v;
1644 int i;
1645
1646
1647
1648 for (i = 0; i < PTRS_PER_PTE; i++)
1649 pte[i] = xen_make_pte(pte[i].pte);
1650}
1651static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1652 unsigned long addr)
1653{
1654 if (*pt_base == PFN_DOWN(__pa(addr))) {
1655 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1656 clear_page((void *)addr);
1657 (*pt_base)++;
1658 }
1659 if (*pt_end == PFN_DOWN(__pa(addr))) {
1660 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1661 clear_page((void *)addr);
1662 (*pt_end)--;
1663 }
1664}
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
1676{
1677 pud_t *l3;
1678 pmd_t *l2;
1679 unsigned long addr[3];
1680 unsigned long pt_base, pt_end;
1681 unsigned i;
1682
1683
1684
1685
1686
1687 if (xen_start_info->mfn_list < __START_KERNEL_map)
1688 max_pfn_mapped = xen_start_info->first_p2m_pfn;
1689 else
1690 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1691
1692 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
1693 pt_end = pt_base + xen_start_info->nr_pt_frames;
1694
1695
1696 init_top_pgt[0] = __pgd(0);
1697
1698
1699
1700
1701 convert_pfn_mfn(init_top_pgt);
1702
1703
1704 convert_pfn_mfn(level3_ident_pgt);
1705
1706
1707 convert_pfn_mfn(level3_kernel_pgt);
1708
1709
1710 convert_pfn_mfn(level2_fixmap_pgt);
1711
1712
1713 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1714 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1715
1716 addr[0] = (unsigned long)pgd;
1717 addr[1] = (unsigned long)l3;
1718 addr[2] = (unsigned long)l2;
1719
1720
1721
1722
1723
1724
1725 copy_page(level2_ident_pgt, l2);
1726
1727 copy_page(level2_kernel_pgt, l2);
1728
1729
1730
1731
1732
1733 if (__supported_pte_mask & _PAGE_NX) {
1734 for (i = 0; i < PTRS_PER_PMD; ++i) {
1735 if (pmd_none(level2_ident_pgt[i]))
1736 continue;
1737 level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX);
1738 }
1739 }
1740
1741
1742 i = pgd_index(xen_start_info->mfn_list);
1743 if (i && i < pgd_index(__START_KERNEL_map))
1744 init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i];
1745
1746
1747 set_page_prot(init_top_pgt, PAGE_KERNEL_RO);
1748 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1749 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1750 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1751 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1752 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1753 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1754
1755 for (i = 0; i < FIXMAP_PMD_NUM; i++) {
1756 set_page_prot(level1_fixmap_pgt + i * PTRS_PER_PTE,
1757 PAGE_KERNEL_RO);
1758 }
1759
1760
1761 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1762 PFN_DOWN(__pa_symbol(init_top_pgt)));
1763
1764
1765 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1766
1767
1768
1769
1770
1771 xen_mc_batch();
1772 __xen_write_cr3(true, __pa(init_top_pgt));
1773 xen_mc_issue(PARAVIRT_LAZY_CPU);
1774
1775
1776
1777
1778
1779
1780
1781 for (i = 0; i < ARRAY_SIZE(addr); i++)
1782 check_pt_base(&pt_base, &pt_end, addr[i]);
1783
1784
1785 xen_pt_base = PFN_PHYS(pt_base);
1786 xen_pt_size = (pt_end - pt_base) * PAGE_SIZE;
1787 memblock_reserve(xen_pt_base, xen_pt_size);
1788
1789
1790 xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
1791}
1792
1793
1794
1795
1796static unsigned long __init xen_read_phys_ulong(phys_addr_t addr)
1797{
1798 unsigned long *vaddr;
1799 unsigned long val;
1800
1801 vaddr = early_memremap_ro(addr, sizeof(val));
1802 val = *vaddr;
1803 early_memunmap(vaddr, sizeof(val));
1804 return val;
1805}
1806
1807
1808
1809
1810
1811
1812static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
1813{
1814 phys_addr_t pa;
1815 pgd_t pgd;
1816 pud_t pud;
1817 pmd_t pmd;
1818 pte_t pte;
1819
1820 pa = read_cr3_pa();
1821 pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
1822 sizeof(pgd)));
1823 if (!pgd_present(pgd))
1824 return 0;
1825
1826 pa = pgd_val(pgd) & PTE_PFN_MASK;
1827 pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) *
1828 sizeof(pud)));
1829 if (!pud_present(pud))
1830 return 0;
1831 pa = pud_val(pud) & PTE_PFN_MASK;
1832 if (pud_large(pud))
1833 return pa + (vaddr & ~PUD_MASK);
1834
1835 pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) *
1836 sizeof(pmd)));
1837 if (!pmd_present(pmd))
1838 return 0;
1839 pa = pmd_val(pmd) & PTE_PFN_MASK;
1840 if (pmd_large(pmd))
1841 return pa + (vaddr & ~PMD_MASK);
1842
1843 pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) *
1844 sizeof(pte)));
1845 if (!pte_present(pte))
1846 return 0;
1847 pa = pte_pfn(pte) << PAGE_SHIFT;
1848
1849 return pa | (vaddr & ~PAGE_MASK);
1850}
1851
1852
1853
1854
1855
1856void __init xen_relocate_p2m(void)
1857{
1858 phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys;
1859 unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end;
1860 int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud;
1861 pte_t *pt;
1862 pmd_t *pmd;
1863 pud_t *pud;
1864 pgd_t *pgd;
1865 unsigned long *new_p2m;
1866
1867 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1868 n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT;
1869 n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT;
1870 n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;
1871 n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT;
1872 n_frames = n_pte + n_pt + n_pmd + n_pud;
1873
1874 new_area = xen_find_free_area(PFN_PHYS(n_frames));
1875 if (!new_area) {
1876 xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n");
1877 BUG();
1878 }
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888 pud_phys = new_area;
1889 pmd_phys = pud_phys + PFN_PHYS(n_pud);
1890 pt_phys = pmd_phys + PFN_PHYS(n_pmd);
1891 p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
1892
1893 pgd = __va(read_cr3_pa());
1894 new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
1895 for (idx_pud = 0; idx_pud < n_pud; idx_pud++) {
1896 pud = early_memremap(pud_phys, PAGE_SIZE);
1897 clear_page(pud);
1898 for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD);
1899 idx_pmd++) {
1900 pmd = early_memremap(pmd_phys, PAGE_SIZE);
1901 clear_page(pmd);
1902 for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD);
1903 idx_pt++) {
1904 pt = early_memremap(pt_phys, PAGE_SIZE);
1905 clear_page(pt);
1906 for (idx_pte = 0;
1907 idx_pte < min(n_pte, PTRS_PER_PTE);
1908 idx_pte++) {
1909 pt[idx_pte] = pfn_pte(p2m_pfn,
1910 PAGE_KERNEL);
1911 p2m_pfn++;
1912 }
1913 n_pte -= PTRS_PER_PTE;
1914 early_memunmap(pt, PAGE_SIZE);
1915 make_lowmem_page_readonly(__va(pt_phys));
1916 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE,
1917 PFN_DOWN(pt_phys));
1918 pmd[idx_pt] = __pmd(_PAGE_TABLE | pt_phys);
1919 pt_phys += PAGE_SIZE;
1920 }
1921 n_pt -= PTRS_PER_PMD;
1922 early_memunmap(pmd, PAGE_SIZE);
1923 make_lowmem_page_readonly(__va(pmd_phys));
1924 pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE,
1925 PFN_DOWN(pmd_phys));
1926 pud[idx_pmd] = __pud(_PAGE_TABLE | pmd_phys);
1927 pmd_phys += PAGE_SIZE;
1928 }
1929 n_pmd -= PTRS_PER_PUD;
1930 early_memunmap(pud, PAGE_SIZE);
1931 make_lowmem_page_readonly(__va(pud_phys));
1932 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys));
1933 set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys));
1934 pud_phys += PAGE_SIZE;
1935 }
1936
1937
1938 memcpy(new_p2m, xen_p2m_addr, size);
1939 xen_p2m_addr = new_p2m;
1940
1941
1942 p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list));
1943 BUG_ON(!p2m_pfn);
1944 p2m_pfn_end = p2m_pfn + PFN_DOWN(size);
1945
1946 if (xen_start_info->mfn_list < __START_KERNEL_map) {
1947 pfn = xen_start_info->first_p2m_pfn;
1948 pfn_end = xen_start_info->first_p2m_pfn +
1949 xen_start_info->nr_p2m_frames;
1950 set_pgd(pgd + 1, __pgd(0));
1951 } else {
1952 pfn = p2m_pfn;
1953 pfn_end = p2m_pfn_end;
1954 }
1955
1956 memblock_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn));
1957 while (pfn < pfn_end) {
1958 if (pfn == p2m_pfn) {
1959 pfn = p2m_pfn_end;
1960 continue;
1961 }
1962 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1963 pfn++;
1964 }
1965
1966 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
1967 xen_start_info->first_p2m_pfn = PFN_DOWN(new_area);
1968 xen_start_info->nr_p2m_frames = n_frames;
1969}
1970
1971void __init xen_reserve_special_pages(void)
1972{
1973 phys_addr_t paddr;
1974
1975 memblock_reserve(__pa(xen_start_info), PAGE_SIZE);
1976 if (xen_start_info->store_mfn) {
1977 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn));
1978 memblock_reserve(paddr, PAGE_SIZE);
1979 }
1980 if (!xen_initial_domain()) {
1981 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn));
1982 memblock_reserve(paddr, PAGE_SIZE);
1983 }
1984}
1985
1986void __init xen_pt_check_e820(void)
1987{
1988 if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) {
1989 xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n");
1990 BUG();
1991 }
1992}
1993
1994static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
1995
1996static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
1997{
1998 pte_t pte;
1999
2000 phys >>= PAGE_SHIFT;
2001
2002 switch (idx) {
2003 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
2004#ifdef CONFIG_X86_VSYSCALL_EMULATION
2005 case VSYSCALL_PAGE:
2006#endif
2007
2008 pte = pfn_pte(phys, prot);
2009 break;
2010
2011#ifdef CONFIG_X86_LOCAL_APIC
2012 case FIX_APIC_BASE:
2013 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2014 break;
2015#endif
2016
2017#ifdef CONFIG_X86_IO_APIC
2018 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
2019
2020
2021
2022
2023 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2024 break;
2025#endif
2026
2027 case FIX_PARAVIRT_BOOTMAP:
2028
2029
2030 pte = mfn_pte(phys, prot);
2031 break;
2032
2033 default:
2034
2035 pte = mfn_pte(phys, prot);
2036 break;
2037 }
2038
2039 __native_set_fixmap(idx, pte);
2040
2041#ifdef CONFIG_X86_VSYSCALL_EMULATION
2042
2043
2044 if (idx == VSYSCALL_PAGE) {
2045 unsigned long vaddr = __fix_to_virt(idx);
2046 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
2047 }
2048#endif
2049}
2050
2051static void __init xen_post_allocator_init(void)
2052{
2053 pv_ops.mmu.set_pte = xen_set_pte;
2054 pv_ops.mmu.set_pmd = xen_set_pmd;
2055 pv_ops.mmu.set_pud = xen_set_pud;
2056 pv_ops.mmu.set_p4d = xen_set_p4d;
2057
2058
2059
2060 pv_ops.mmu.alloc_pte = xen_alloc_pte;
2061 pv_ops.mmu.alloc_pmd = xen_alloc_pmd;
2062 pv_ops.mmu.release_pte = xen_release_pte;
2063 pv_ops.mmu.release_pmd = xen_release_pmd;
2064 pv_ops.mmu.alloc_pud = xen_alloc_pud;
2065 pv_ops.mmu.release_pud = xen_release_pud;
2066 pv_ops.mmu.make_pte = PV_CALLEE_SAVE(xen_make_pte);
2067
2068 pv_ops.mmu.write_cr3 = &xen_write_cr3;
2069}
2070
2071static void xen_leave_lazy_mmu(void)
2072{
2073 preempt_disable();
2074 xen_mc_flush();
2075 paravirt_leave_lazy_mmu();
2076 preempt_enable();
2077}
2078
2079static const struct pv_mmu_ops xen_mmu_ops __initconst = {
2080 .read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2),
2081 .write_cr2 = xen_write_cr2,
2082
2083 .read_cr3 = xen_read_cr3,
2084 .write_cr3 = xen_write_cr3_init,
2085
2086 .flush_tlb_user = xen_flush_tlb,
2087 .flush_tlb_kernel = xen_flush_tlb,
2088 .flush_tlb_one_user = xen_flush_tlb_one_user,
2089 .flush_tlb_others = xen_flush_tlb_others,
2090 .tlb_remove_table = tlb_remove_table,
2091
2092 .pgd_alloc = xen_pgd_alloc,
2093 .pgd_free = xen_pgd_free,
2094
2095 .alloc_pte = xen_alloc_pte_init,
2096 .release_pte = xen_release_pte_init,
2097 .alloc_pmd = xen_alloc_pmd_init,
2098 .release_pmd = xen_release_pmd_init,
2099
2100 .set_pte = xen_set_pte_init,
2101 .set_pmd = xen_set_pmd_hyper,
2102
2103 .ptep_modify_prot_start = __ptep_modify_prot_start,
2104 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2105
2106 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2107 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
2108
2109 .make_pte = PV_CALLEE_SAVE(xen_make_pte_init),
2110 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
2111
2112 .set_pud = xen_set_pud_hyper,
2113
2114 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2115 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
2116
2117 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2118 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
2119 .set_p4d = xen_set_p4d_hyper,
2120
2121 .alloc_pud = xen_alloc_pmd_init,
2122 .release_pud = xen_release_pmd_init,
2123
2124#if CONFIG_PGTABLE_LEVELS >= 5
2125 .p4d_val = PV_CALLEE_SAVE(xen_p4d_val),
2126 .make_p4d = PV_CALLEE_SAVE(xen_make_p4d),
2127#endif
2128
2129 .activate_mm = xen_activate_mm,
2130 .dup_mmap = xen_dup_mmap,
2131 .exit_mmap = xen_exit_mmap,
2132
2133 .lazy_mode = {
2134 .enter = paravirt_enter_lazy_mmu,
2135 .leave = xen_leave_lazy_mmu,
2136 .flush = paravirt_flush_lazy_mmu,
2137 },
2138
2139 .set_fixmap = xen_set_fixmap,
2140};
2141
2142void __init xen_init_mmu_ops(void)
2143{
2144 x86_init.paging.pagetable_init = xen_pagetable_init;
2145 x86_init.hyper.init_after_bootmem = xen_after_bootmem;
2146
2147 pv_ops.mmu = xen_mmu_ops;
2148
2149 memset(dummy_mapping, 0xff, PAGE_SIZE);
2150}
2151
2152
2153#define MAX_CONTIG_ORDER 9
2154static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2155
2156#define VOID_PTE (mfn_pte(0, __pgprot(0)))
2157static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2158 unsigned long *in_frames,
2159 unsigned long *out_frames)
2160{
2161 int i;
2162 struct multicall_space mcs;
2163
2164 xen_mc_batch();
2165 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2166 mcs = __xen_mc_entry(0);
2167
2168 if (in_frames)
2169 in_frames[i] = virt_to_mfn(vaddr);
2170
2171 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2172 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
2173
2174 if (out_frames)
2175 out_frames[i] = virt_to_pfn(vaddr);
2176 }
2177 xen_mc_issue(0);
2178}
2179
2180
2181
2182
2183
2184
2185static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2186 unsigned long *mfns,
2187 unsigned long first_mfn)
2188{
2189 unsigned i, limit;
2190 unsigned long mfn;
2191
2192 xen_mc_batch();
2193
2194 limit = 1u << order;
2195 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2196 struct multicall_space mcs;
2197 unsigned flags;
2198
2199 mcs = __xen_mc_entry(0);
2200 if (mfns)
2201 mfn = mfns[i];
2202 else
2203 mfn = first_mfn + i;
2204
2205 if (i < (limit - 1))
2206 flags = 0;
2207 else {
2208 if (order == 0)
2209 flags = UVMF_INVLPG | UVMF_ALL;
2210 else
2211 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2212 }
2213
2214 MULTI_update_va_mapping(mcs.mc, vaddr,
2215 mfn_pte(mfn, PAGE_KERNEL), flags);
2216
2217 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2218 }
2219
2220 xen_mc_issue(0);
2221}
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2232 unsigned long *pfns_in,
2233 unsigned long extents_out,
2234 unsigned int order_out,
2235 unsigned long *mfns_out,
2236 unsigned int address_bits)
2237{
2238 long rc;
2239 int success;
2240
2241 struct xen_memory_exchange exchange = {
2242 .in = {
2243 .nr_extents = extents_in,
2244 .extent_order = order_in,
2245 .extent_start = pfns_in,
2246 .domid = DOMID_SELF
2247 },
2248 .out = {
2249 .nr_extents = extents_out,
2250 .extent_order = order_out,
2251 .extent_start = mfns_out,
2252 .address_bits = address_bits,
2253 .domid = DOMID_SELF
2254 }
2255 };
2256
2257 BUG_ON(extents_in << order_in != extents_out << order_out);
2258
2259 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2260 success = (exchange.nr_exchanged == extents_in);
2261
2262 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2263 BUG_ON(success && (rc != 0));
2264
2265 return success;
2266}
2267
2268int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
2269 unsigned int address_bits,
2270 dma_addr_t *dma_handle)
2271{
2272 unsigned long *in_frames = discontig_frames, out_frame;
2273 unsigned long flags;
2274 int success;
2275 unsigned long vstart = (unsigned long)phys_to_virt(pstart);
2276
2277
2278
2279
2280
2281
2282
2283 if (unlikely(order > MAX_CONTIG_ORDER))
2284 return -ENOMEM;
2285
2286 memset((void *) vstart, 0, PAGE_SIZE << order);
2287
2288 spin_lock_irqsave(&xen_reservation_lock, flags);
2289
2290
2291 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2292
2293
2294 out_frame = virt_to_pfn(vstart);
2295 success = xen_exchange_memory(1UL << order, 0, in_frames,
2296 1, order, &out_frame,
2297 address_bits);
2298
2299
2300 if (success)
2301 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2302 else
2303 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2304
2305 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2306
2307 *dma_handle = virt_to_machine(vstart).maddr;
2308 return success ? 0 : -ENOMEM;
2309}
2310
2311void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
2312{
2313 unsigned long *out_frames = discontig_frames, in_frame;
2314 unsigned long flags;
2315 int success;
2316 unsigned long vstart;
2317
2318 if (unlikely(order > MAX_CONTIG_ORDER))
2319 return;
2320
2321 vstart = (unsigned long)phys_to_virt(pstart);
2322 memset((void *) vstart, 0, PAGE_SIZE << order);
2323
2324 spin_lock_irqsave(&xen_reservation_lock, flags);
2325
2326
2327 in_frame = virt_to_mfn(vstart);
2328
2329
2330 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2331
2332
2333 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2334 0, out_frames, 0);
2335
2336
2337 if (success)
2338 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2339 else
2340 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2341
2342 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2343}
2344
2345static noinline void xen_flush_tlb_all(void)
2346{
2347 struct mmuext_op *op;
2348 struct multicall_space mcs;
2349
2350 preempt_disable();
2351
2352 mcs = xen_mc_entry(sizeof(*op));
2353
2354 op = mcs.args;
2355 op->cmd = MMUEXT_TLB_FLUSH_ALL;
2356 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
2357
2358 xen_mc_issue(PARAVIRT_LAZY_MMU);
2359
2360 preempt_enable();
2361}
2362
2363#define REMAP_BATCH_SIZE 16
2364
2365struct remap_data {
2366 xen_pfn_t *pfn;
2367 bool contiguous;
2368 bool no_translate;
2369 pgprot_t prot;
2370 struct mmu_update *mmu_update;
2371};
2372
2373static int remap_area_pfn_pte_fn(pte_t *ptep, unsigned long addr, void *data)
2374{
2375 struct remap_data *rmd = data;
2376 pte_t pte = pte_mkspecial(mfn_pte(*rmd->pfn, rmd->prot));
2377
2378
2379
2380
2381
2382 if (rmd->contiguous)
2383 (*rmd->pfn)++;
2384 else
2385 rmd->pfn++;
2386
2387 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
2388 rmd->mmu_update->ptr |= rmd->no_translate ?
2389 MMU_PT_UPDATE_NO_TRANSLATE :
2390 MMU_NORMAL_PT_UPDATE;
2391 rmd->mmu_update->val = pte_val_ma(pte);
2392 rmd->mmu_update++;
2393
2394 return 0;
2395}
2396
2397int xen_remap_pfn(struct vm_area_struct *vma, unsigned long addr,
2398 xen_pfn_t *pfn, int nr, int *err_ptr, pgprot_t prot,
2399 unsigned int domid, bool no_translate, struct page **pages)
2400{
2401 int err = 0;
2402 struct remap_data rmd;
2403 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2404 unsigned long range;
2405 int mapped = 0;
2406
2407 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO)));
2408
2409 rmd.pfn = pfn;
2410 rmd.prot = prot;
2411
2412
2413
2414
2415 rmd.contiguous = !err_ptr;
2416 rmd.no_translate = no_translate;
2417
2418 while (nr) {
2419 int index = 0;
2420 int done = 0;
2421 int batch = min(REMAP_BATCH_SIZE, nr);
2422 int batch_left = batch;
2423
2424 range = (unsigned long)batch << PAGE_SHIFT;
2425
2426 rmd.mmu_update = mmu_update;
2427 err = apply_to_page_range(vma->vm_mm, addr, range,
2428 remap_area_pfn_pte_fn, &rmd);
2429 if (err)
2430 goto out;
2431
2432
2433
2434
2435
2436 do {
2437 int i;
2438
2439 err = HYPERVISOR_mmu_update(&mmu_update[index],
2440 batch_left, &done, domid);
2441
2442
2443
2444
2445
2446
2447 if (err_ptr) {
2448 for (i = index; i < index + done; i++)
2449 err_ptr[i] = 0;
2450 }
2451 if (err < 0) {
2452 if (!err_ptr)
2453 goto out;
2454 err_ptr[i] = err;
2455 done++;
2456 } else
2457 mapped += done;
2458 batch_left -= done;
2459 index += done;
2460 } while (batch_left);
2461
2462 nr -= batch;
2463 addr += range;
2464 if (err_ptr)
2465 err_ptr += batch;
2466 cond_resched();
2467 }
2468out:
2469
2470 xen_flush_tlb_all();
2471
2472 return err < 0 ? err : mapped;
2473}
2474EXPORT_SYMBOL_GPL(xen_remap_pfn);
2475
2476#ifdef CONFIG_KEXEC_CORE
2477phys_addr_t paddr_vmcoreinfo_note(void)
2478{
2479 if (xen_pv_domain())
2480 return virt_to_machine(vmcoreinfo_note).maddr;
2481 else
2482 return __pa(vmcoreinfo_note);
2483}
2484#endif
2485