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34#include <linux/bpf.h>
35#include <linux/etherdevice.h>
36#include <linux/tcp.h>
37#include <linux/if_vlan.h>
38#include <linux/delay.h>
39#include <linux/slab.h>
40#include <linux/hash.h>
41#include <net/ip.h>
42#include <net/vxlan.h>
43#include <net/devlink.h>
44
45#include <linux/mlx4/driver.h>
46#include <linux/mlx4/device.h>
47#include <linux/mlx4/cmd.h>
48#include <linux/mlx4/cq.h>
49
50#include "mlx4_en.h"
51#include "en_port.h"
52
53#define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \
54 XDP_PACKET_HEADROOM - \
55 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))))
56
57int mlx4_en_setup_tc(struct net_device *dev, u8 up)
58{
59 struct mlx4_en_priv *priv = netdev_priv(dev);
60 int i;
61 unsigned int offset = 0;
62
63 if (up && up != MLX4_EN_NUM_UP_HIGH)
64 return -EINVAL;
65
66 netdev_set_num_tc(dev, up);
67 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
68
69 for (i = 0; i < up; i++) {
70 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
71 offset += priv->num_tx_rings_p_up;
72 }
73
74#ifdef CONFIG_MLX4_EN_DCB
75 if (!mlx4_is_slave(priv->mdev->dev)) {
76 if (up) {
77 if (priv->dcbx_cap)
78 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
79 } else {
80 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
81 priv->cee_config.pfc_state = false;
82 }
83 }
84#endif
85
86 return 0;
87}
88
89int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc)
90{
91 struct mlx4_en_priv *priv = netdev_priv(dev);
92 struct mlx4_en_dev *mdev = priv->mdev;
93 struct mlx4_en_port_profile new_prof;
94 struct mlx4_en_priv *tmp;
95 int total_count;
96 int port_up = 0;
97 int err = 0;
98
99 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
100 if (!tmp)
101 return -ENOMEM;
102
103 mutex_lock(&mdev->state_lock);
104 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
105 new_prof.num_up = (tc == 0) ? MLX4_EN_NUM_UP_LOW :
106 MLX4_EN_NUM_UP_HIGH;
107 new_prof.tx_ring_num[TX] = new_prof.num_tx_rings_p_up *
108 new_prof.num_up;
109 total_count = new_prof.tx_ring_num[TX] + new_prof.tx_ring_num[TX_XDP];
110 if (total_count > MAX_TX_RINGS) {
111 err = -EINVAL;
112 en_err(priv,
113 "Total number of TX and XDP rings (%d) exceeds the maximum supported (%d)\n",
114 total_count, MAX_TX_RINGS);
115 goto out;
116 }
117 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
118 if (err)
119 goto out;
120
121 if (priv->port_up) {
122 port_up = 1;
123 mlx4_en_stop_port(dev, 1);
124 }
125
126 mlx4_en_safe_replace_resources(priv, tmp);
127 if (port_up) {
128 err = mlx4_en_start_port(dev);
129 if (err) {
130 en_err(priv, "Failed starting port for setup TC\n");
131 goto out;
132 }
133 }
134
135 err = mlx4_en_setup_tc(dev, tc);
136out:
137 mutex_unlock(&mdev->state_lock);
138 kfree(tmp);
139 return err;
140}
141
142static int __mlx4_en_setup_tc(struct net_device *dev, enum tc_setup_type type,
143 void *type_data)
144{
145 struct tc_mqprio_qopt *mqprio = type_data;
146
147 if (type != TC_SETUP_QDISC_MQPRIO)
148 return -EOPNOTSUPP;
149
150 if (mqprio->num_tc && mqprio->num_tc != MLX4_EN_NUM_UP_HIGH)
151 return -EINVAL;
152
153 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
154
155 return mlx4_en_alloc_tx_queue_per_tc(dev, mqprio->num_tc);
156}
157
158#ifdef CONFIG_RFS_ACCEL
159
160struct mlx4_en_filter {
161 struct list_head next;
162 struct work_struct work;
163
164 u8 ip_proto;
165 __be32 src_ip;
166 __be32 dst_ip;
167 __be16 src_port;
168 __be16 dst_port;
169
170 int rxq_index;
171 struct mlx4_en_priv *priv;
172 u32 flow_id;
173 int id;
174 u64 reg_id;
175 u8 activated;
176
177
178 struct hlist_node filter_chain;
179};
180
181static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
182
183static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
184{
185 switch (ip_proto) {
186 case IPPROTO_UDP:
187 return MLX4_NET_TRANS_RULE_ID_UDP;
188 case IPPROTO_TCP:
189 return MLX4_NET_TRANS_RULE_ID_TCP;
190 default:
191 return MLX4_NET_TRANS_RULE_NUM;
192 }
193};
194
195
196
197
198static void mlx4_en_filter_work(struct work_struct *work)
199{
200 struct mlx4_en_filter *filter = container_of(work,
201 struct mlx4_en_filter,
202 work);
203 struct mlx4_en_priv *priv = filter->priv;
204 struct mlx4_spec_list spec_tcp_udp = {
205 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
206 {
207 .tcp_udp = {
208 .dst_port = filter->dst_port,
209 .dst_port_msk = (__force __be16)-1,
210 .src_port = filter->src_port,
211 .src_port_msk = (__force __be16)-1,
212 },
213 },
214 };
215 struct mlx4_spec_list spec_ip = {
216 .id = MLX4_NET_TRANS_RULE_ID_IPV4,
217 {
218 .ipv4 = {
219 .dst_ip = filter->dst_ip,
220 .dst_ip_msk = (__force __be32)-1,
221 .src_ip = filter->src_ip,
222 .src_ip_msk = (__force __be32)-1,
223 },
224 },
225 };
226 struct mlx4_spec_list spec_eth = {
227 .id = MLX4_NET_TRANS_RULE_ID_ETH,
228 };
229 struct mlx4_net_trans_rule rule = {
230 .list = LIST_HEAD_INIT(rule.list),
231 .queue_mode = MLX4_NET_TRANS_Q_LIFO,
232 .exclusive = 1,
233 .allow_loopback = 1,
234 .promisc_mode = MLX4_FS_REGULAR,
235 .port = priv->port,
236 .priority = MLX4_DOMAIN_RFS,
237 };
238 int rc;
239 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
240
241 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
242 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
243 filter->ip_proto);
244 goto ignore;
245 }
246 list_add_tail(&spec_eth.list, &rule.list);
247 list_add_tail(&spec_ip.list, &rule.list);
248 list_add_tail(&spec_tcp_udp.list, &rule.list);
249
250 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
251 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
252 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
253
254 filter->activated = 0;
255
256 if (filter->reg_id) {
257 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
258 if (rc && rc != -ENOENT)
259 en_err(priv, "Error detaching flow. rc = %d\n", rc);
260 }
261
262 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
263 if (rc)
264 en_err(priv, "Error attaching flow. err = %d\n", rc);
265
266ignore:
267 mlx4_en_filter_rfs_expire(priv);
268
269 filter->activated = 1;
270}
271
272static inline struct hlist_head *
273filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
274 __be16 src_port, __be16 dst_port)
275{
276 unsigned long l;
277 int bucket_idx;
278
279 l = (__force unsigned long)src_port |
280 ((__force unsigned long)dst_port << 2);
281 l ^= (__force unsigned long)(src_ip ^ dst_ip);
282
283 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
284
285 return &priv->filter_hash[bucket_idx];
286}
287
288static struct mlx4_en_filter *
289mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
290 __be32 dst_ip, u8 ip_proto, __be16 src_port,
291 __be16 dst_port, u32 flow_id)
292{
293 struct mlx4_en_filter *filter = NULL;
294
295 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
296 if (!filter)
297 return NULL;
298
299 filter->priv = priv;
300 filter->rxq_index = rxq_index;
301 INIT_WORK(&filter->work, mlx4_en_filter_work);
302
303 filter->src_ip = src_ip;
304 filter->dst_ip = dst_ip;
305 filter->ip_proto = ip_proto;
306 filter->src_port = src_port;
307 filter->dst_port = dst_port;
308
309 filter->flow_id = flow_id;
310
311 filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
312
313 list_add_tail(&filter->next, &priv->filters);
314 hlist_add_head(&filter->filter_chain,
315 filter_hash_bucket(priv, src_ip, dst_ip, src_port,
316 dst_port));
317
318 return filter;
319}
320
321static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
322{
323 struct mlx4_en_priv *priv = filter->priv;
324 int rc;
325
326 list_del(&filter->next);
327
328 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
329 if (rc && rc != -ENOENT)
330 en_err(priv, "Error detaching flow. rc = %d\n", rc);
331
332 kfree(filter);
333}
334
335static inline struct mlx4_en_filter *
336mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
337 u8 ip_proto, __be16 src_port, __be16 dst_port)
338{
339 struct mlx4_en_filter *filter;
340 struct mlx4_en_filter *ret = NULL;
341
342 hlist_for_each_entry(filter,
343 filter_hash_bucket(priv, src_ip, dst_ip,
344 src_port, dst_port),
345 filter_chain) {
346 if (filter->src_ip == src_ip &&
347 filter->dst_ip == dst_ip &&
348 filter->ip_proto == ip_proto &&
349 filter->src_port == src_port &&
350 filter->dst_port == dst_port) {
351 ret = filter;
352 break;
353 }
354 }
355
356 return ret;
357}
358
359static int
360mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
361 u16 rxq_index, u32 flow_id)
362{
363 struct mlx4_en_priv *priv = netdev_priv(net_dev);
364 struct mlx4_en_filter *filter;
365 const struct iphdr *ip;
366 const __be16 *ports;
367 u8 ip_proto;
368 __be32 src_ip;
369 __be32 dst_ip;
370 __be16 src_port;
371 __be16 dst_port;
372 int nhoff = skb_network_offset(skb);
373 int ret = 0;
374
375 if (skb->protocol != htons(ETH_P_IP))
376 return -EPROTONOSUPPORT;
377
378 ip = (const struct iphdr *)(skb->data + nhoff);
379 if (ip_is_fragment(ip))
380 return -EPROTONOSUPPORT;
381
382 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
383 return -EPROTONOSUPPORT;
384 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
385
386 ip_proto = ip->protocol;
387 src_ip = ip->saddr;
388 dst_ip = ip->daddr;
389 src_port = ports[0];
390 dst_port = ports[1];
391
392 spin_lock_bh(&priv->filters_lock);
393 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
394 src_port, dst_port);
395 if (filter) {
396 if (filter->rxq_index == rxq_index)
397 goto out;
398
399 filter->rxq_index = rxq_index;
400 } else {
401 filter = mlx4_en_filter_alloc(priv, rxq_index,
402 src_ip, dst_ip, ip_proto,
403 src_port, dst_port, flow_id);
404 if (!filter) {
405 ret = -ENOMEM;
406 goto err;
407 }
408 }
409
410 queue_work(priv->mdev->workqueue, &filter->work);
411
412out:
413 ret = filter->id;
414err:
415 spin_unlock_bh(&priv->filters_lock);
416
417 return ret;
418}
419
420void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
421{
422 struct mlx4_en_filter *filter, *tmp;
423 LIST_HEAD(del_list);
424
425 spin_lock_bh(&priv->filters_lock);
426 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
427 list_move(&filter->next, &del_list);
428 hlist_del(&filter->filter_chain);
429 }
430 spin_unlock_bh(&priv->filters_lock);
431
432 list_for_each_entry_safe(filter, tmp, &del_list, next) {
433 cancel_work_sync(&filter->work);
434 mlx4_en_filter_free(filter);
435 }
436}
437
438static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
439{
440 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
441 LIST_HEAD(del_list);
442 int i = 0;
443
444 spin_lock_bh(&priv->filters_lock);
445 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
446 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
447 break;
448
449 if (filter->activated &&
450 !work_pending(&filter->work) &&
451 rps_may_expire_flow(priv->dev,
452 filter->rxq_index, filter->flow_id,
453 filter->id)) {
454 list_move(&filter->next, &del_list);
455 hlist_del(&filter->filter_chain);
456 } else
457 last_filter = filter;
458
459 i++;
460 }
461
462 if (last_filter && (&last_filter->next != priv->filters.next))
463 list_move(&priv->filters, &last_filter->next);
464
465 spin_unlock_bh(&priv->filters_lock);
466
467 list_for_each_entry_safe(filter, tmp, &del_list, next)
468 mlx4_en_filter_free(filter);
469}
470#endif
471
472static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
473 __be16 proto, u16 vid)
474{
475 struct mlx4_en_priv *priv = netdev_priv(dev);
476 struct mlx4_en_dev *mdev = priv->mdev;
477 int err;
478 int idx;
479
480 en_dbg(HW, priv, "adding VLAN:%d\n", vid);
481
482 set_bit(vid, priv->active_vlans);
483
484
485 mutex_lock(&mdev->state_lock);
486 if (mdev->device_up && priv->port_up) {
487 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
488 if (err) {
489 en_err(priv, "Failed configuring VLAN filter\n");
490 goto out;
491 }
492 }
493 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx);
494 if (err)
495 en_dbg(HW, priv, "Failed adding vlan %d\n", vid);
496
497out:
498 mutex_unlock(&mdev->state_lock);
499 return err;
500}
501
502static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
503 __be16 proto, u16 vid)
504{
505 struct mlx4_en_priv *priv = netdev_priv(dev);
506 struct mlx4_en_dev *mdev = priv->mdev;
507 int err = 0;
508
509 en_dbg(HW, priv, "Killing VID:%d\n", vid);
510
511 clear_bit(vid, priv->active_vlans);
512
513
514 mutex_lock(&mdev->state_lock);
515 mlx4_unregister_vlan(mdev->dev, priv->port, vid);
516
517 if (mdev->device_up && priv->port_up) {
518 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
519 if (err)
520 en_err(priv, "Failed configuring VLAN filter\n");
521 }
522 mutex_unlock(&mdev->state_lock);
523
524 return err;
525}
526
527static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
528{
529 int i;
530 for (i = ETH_ALEN - 1; i >= 0; --i) {
531 dst_mac[i] = src_mac & 0xff;
532 src_mac >>= 8;
533 }
534 memset(&dst_mac[ETH_ALEN], 0, 2);
535}
536
537
538static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
539 int qpn, u64 *reg_id)
540{
541 int err;
542
543 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
544 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
545 return 0;
546
547 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
548 MLX4_DOMAIN_NIC, reg_id);
549 if (err) {
550 en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
551 return err;
552 }
553 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
554 return 0;
555}
556
557
558static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
559 unsigned char *mac, int *qpn, u64 *reg_id)
560{
561 struct mlx4_en_dev *mdev = priv->mdev;
562 struct mlx4_dev *dev = mdev->dev;
563 int err;
564
565 switch (dev->caps.steering_mode) {
566 case MLX4_STEERING_MODE_B0: {
567 struct mlx4_qp qp;
568 u8 gid[16] = {0};
569
570 qp.qpn = *qpn;
571 memcpy(&gid[10], mac, ETH_ALEN);
572 gid[5] = priv->port;
573
574 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
575 break;
576 }
577 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
578 struct mlx4_spec_list spec_eth = { {NULL} };
579 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
580
581 struct mlx4_net_trans_rule rule = {
582 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
583 .exclusive = 0,
584 .allow_loopback = 1,
585 .promisc_mode = MLX4_FS_REGULAR,
586 .priority = MLX4_DOMAIN_NIC,
587 };
588
589 rule.port = priv->port;
590 rule.qpn = *qpn;
591 INIT_LIST_HEAD(&rule.list);
592
593 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
594 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
595 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
596 list_add_tail(&spec_eth.list, &rule.list);
597
598 err = mlx4_flow_attach(dev, &rule, reg_id);
599 break;
600 }
601 default:
602 return -EINVAL;
603 }
604 if (err)
605 en_warn(priv, "Failed Attaching Unicast\n");
606
607 return err;
608}
609
610static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
611 unsigned char *mac, int qpn, u64 reg_id)
612{
613 struct mlx4_en_dev *mdev = priv->mdev;
614 struct mlx4_dev *dev = mdev->dev;
615
616 switch (dev->caps.steering_mode) {
617 case MLX4_STEERING_MODE_B0: {
618 struct mlx4_qp qp;
619 u8 gid[16] = {0};
620
621 qp.qpn = qpn;
622 memcpy(&gid[10], mac, ETH_ALEN);
623 gid[5] = priv->port;
624
625 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
626 break;
627 }
628 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
629 mlx4_flow_detach(dev, reg_id);
630 break;
631 }
632 default:
633 en_err(priv, "Invalid steering mode.\n");
634 }
635}
636
637static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
638{
639 struct mlx4_en_dev *mdev = priv->mdev;
640 struct mlx4_dev *dev = mdev->dev;
641 int index = 0;
642 int err = 0;
643 int *qpn = &priv->base_qpn;
644 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
645
646 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
647 priv->dev->dev_addr);
648 index = mlx4_register_mac(dev, priv->port, mac);
649 if (index < 0) {
650 err = index;
651 en_err(priv, "Failed adding MAC: %pM\n",
652 priv->dev->dev_addr);
653 return err;
654 }
655
656 en_info(priv, "Steering Mode %d\n", dev->caps.steering_mode);
657
658 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
659 int base_qpn = mlx4_get_base_qpn(dev, priv->port);
660 *qpn = base_qpn + index;
661 return 0;
662 }
663
664 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP,
665 MLX4_RES_USAGE_DRIVER);
666 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
667 if (err) {
668 en_err(priv, "Failed to reserve qp for mac registration\n");
669 mlx4_unregister_mac(dev, priv->port, mac);
670 return err;
671 }
672
673 return 0;
674}
675
676static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
677{
678 struct mlx4_en_dev *mdev = priv->mdev;
679 struct mlx4_dev *dev = mdev->dev;
680 int qpn = priv->base_qpn;
681
682 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
683 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
684 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
685 priv->dev->dev_addr);
686 mlx4_unregister_mac(dev, priv->port, mac);
687 } else {
688 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
689 priv->port, qpn);
690 mlx4_qp_release_range(dev, qpn, 1);
691 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
692 }
693}
694
695static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
696 unsigned char *new_mac, unsigned char *prev_mac)
697{
698 struct mlx4_en_dev *mdev = priv->mdev;
699 struct mlx4_dev *dev = mdev->dev;
700 int err = 0;
701 u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
702
703 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
704 struct hlist_head *bucket;
705 unsigned int mac_hash;
706 struct mlx4_mac_entry *entry;
707 struct hlist_node *tmp;
708 u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
709
710 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
711 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
712 if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
713 mlx4_en_uc_steer_release(priv, entry->mac,
714 qpn, entry->reg_id);
715 mlx4_unregister_mac(dev, priv->port,
716 prev_mac_u64);
717 hlist_del_rcu(&entry->hlist);
718 synchronize_rcu();
719 memcpy(entry->mac, new_mac, ETH_ALEN);
720 entry->reg_id = 0;
721 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
722 hlist_add_head_rcu(&entry->hlist,
723 &priv->mac_hash[mac_hash]);
724 mlx4_register_mac(dev, priv->port, new_mac_u64);
725 err = mlx4_en_uc_steer_add(priv, new_mac,
726 &qpn,
727 &entry->reg_id);
728 if (err)
729 return err;
730 if (priv->tunnel_reg_id) {
731 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
732 priv->tunnel_reg_id = 0;
733 }
734 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
735 &priv->tunnel_reg_id);
736 return err;
737 }
738 }
739 return -EINVAL;
740 }
741
742 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
743}
744
745static void mlx4_en_update_user_mac(struct mlx4_en_priv *priv,
746 unsigned char new_mac[ETH_ALEN + 2])
747{
748 struct mlx4_en_dev *mdev = priv->mdev;
749 int err;
750
751 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_USER_MAC_EN))
752 return;
753
754 err = mlx4_SET_PORT_user_mac(mdev->dev, priv->port, new_mac);
755 if (err)
756 en_err(priv, "Failed to pass user MAC(%pM) to Firmware for port %d, with error %d\n",
757 new_mac, priv->port, err);
758}
759
760static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
761 unsigned char new_mac[ETH_ALEN + 2])
762{
763 int err = 0;
764
765 if (priv->port_up) {
766
767 err = mlx4_en_replace_mac(priv, priv->base_qpn,
768 new_mac, priv->current_mac);
769 if (err)
770 en_err(priv, "Failed changing HW MAC address\n");
771 } else
772 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
773
774 if (!err)
775 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
776
777 return err;
778}
779
780static int mlx4_en_set_mac(struct net_device *dev, void *addr)
781{
782 struct mlx4_en_priv *priv = netdev_priv(dev);
783 struct mlx4_en_dev *mdev = priv->mdev;
784 struct sockaddr *saddr = addr;
785 unsigned char new_mac[ETH_ALEN + 2];
786 int err;
787
788 if (!is_valid_ether_addr(saddr->sa_data))
789 return -EADDRNOTAVAIL;
790
791 mutex_lock(&mdev->state_lock);
792 memcpy(new_mac, saddr->sa_data, ETH_ALEN);
793 err = mlx4_en_do_set_mac(priv, new_mac);
794 if (err)
795 goto out;
796
797 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
798 mlx4_en_update_user_mac(priv, new_mac);
799out:
800 mutex_unlock(&mdev->state_lock);
801
802 return err;
803}
804
805static void mlx4_en_clear_list(struct net_device *dev)
806{
807 struct mlx4_en_priv *priv = netdev_priv(dev);
808 struct mlx4_en_mc_list *tmp, *mc_to_del;
809
810 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
811 list_del(&mc_to_del->list);
812 kfree(mc_to_del);
813 }
814}
815
816static void mlx4_en_cache_mclist(struct net_device *dev)
817{
818 struct mlx4_en_priv *priv = netdev_priv(dev);
819 struct netdev_hw_addr *ha;
820 struct mlx4_en_mc_list *tmp;
821
822 mlx4_en_clear_list(dev);
823 netdev_for_each_mc_addr(ha, dev) {
824 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
825 if (!tmp) {
826 mlx4_en_clear_list(dev);
827 return;
828 }
829 memcpy(tmp->addr, ha->addr, ETH_ALEN);
830 list_add_tail(&tmp->list, &priv->mc_list);
831 }
832}
833
834static void update_mclist_flags(struct mlx4_en_priv *priv,
835 struct list_head *dst,
836 struct list_head *src)
837{
838 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
839 bool found;
840
841
842
843
844 list_for_each_entry(dst_tmp, dst, list) {
845 found = false;
846 list_for_each_entry(src_tmp, src, list) {
847 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
848 found = true;
849 break;
850 }
851 }
852 if (!found)
853 dst_tmp->action = MCLIST_REM;
854 }
855
856
857
858
859 list_for_each_entry(src_tmp, src, list) {
860 found = false;
861 list_for_each_entry(dst_tmp, dst, list) {
862 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
863 dst_tmp->action = MCLIST_NONE;
864 found = true;
865 break;
866 }
867 }
868 if (!found) {
869 new_mc = kmemdup(src_tmp,
870 sizeof(struct mlx4_en_mc_list),
871 GFP_KERNEL);
872 if (!new_mc)
873 return;
874
875 new_mc->action = MCLIST_ADD;
876 list_add_tail(&new_mc->list, dst);
877 }
878 }
879}
880
881static void mlx4_en_set_rx_mode(struct net_device *dev)
882{
883 struct mlx4_en_priv *priv = netdev_priv(dev);
884
885 if (!priv->port_up)
886 return;
887
888 queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
889}
890
891static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
892 struct mlx4_en_dev *mdev)
893{
894 int err = 0;
895
896 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
897 if (netif_msg_rx_status(priv))
898 en_warn(priv, "Entering promiscuous mode\n");
899 priv->flags |= MLX4_EN_FLAG_PROMISC;
900
901
902 switch (mdev->dev->caps.steering_mode) {
903 case MLX4_STEERING_MODE_DEVICE_MANAGED:
904 err = mlx4_flow_steer_promisc_add(mdev->dev,
905 priv->port,
906 priv->base_qpn,
907 MLX4_FS_ALL_DEFAULT);
908 if (err)
909 en_err(priv, "Failed enabling promiscuous mode\n");
910 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
911 break;
912
913 case MLX4_STEERING_MODE_B0:
914 err = mlx4_unicast_promisc_add(mdev->dev,
915 priv->base_qpn,
916 priv->port);
917 if (err)
918 en_err(priv, "Failed enabling unicast promiscuous mode\n");
919
920
921
922
923 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
924 err = mlx4_multicast_promisc_add(mdev->dev,
925 priv->base_qpn,
926 priv->port);
927 if (err)
928 en_err(priv, "Failed enabling multicast promiscuous mode\n");
929 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
930 }
931 break;
932
933 case MLX4_STEERING_MODE_A0:
934 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
935 priv->port,
936 priv->base_qpn,
937 1);
938 if (err)
939 en_err(priv, "Failed enabling promiscuous mode\n");
940 break;
941 }
942
943
944 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
945 0, MLX4_MCAST_DISABLE);
946 if (err)
947 en_err(priv, "Failed disabling multicast filter\n");
948 }
949}
950
951static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
952 struct mlx4_en_dev *mdev)
953{
954 int err = 0;
955
956 if (netif_msg_rx_status(priv))
957 en_warn(priv, "Leaving promiscuous mode\n");
958 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
959
960
961 switch (mdev->dev->caps.steering_mode) {
962 case MLX4_STEERING_MODE_DEVICE_MANAGED:
963 err = mlx4_flow_steer_promisc_remove(mdev->dev,
964 priv->port,
965 MLX4_FS_ALL_DEFAULT);
966 if (err)
967 en_err(priv, "Failed disabling promiscuous mode\n");
968 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
969 break;
970
971 case MLX4_STEERING_MODE_B0:
972 err = mlx4_unicast_promisc_remove(mdev->dev,
973 priv->base_qpn,
974 priv->port);
975 if (err)
976 en_err(priv, "Failed disabling unicast promiscuous mode\n");
977
978 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
979 err = mlx4_multicast_promisc_remove(mdev->dev,
980 priv->base_qpn,
981 priv->port);
982 if (err)
983 en_err(priv, "Failed disabling multicast promiscuous mode\n");
984 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
985 }
986 break;
987
988 case MLX4_STEERING_MODE_A0:
989 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
990 priv->port,
991 priv->base_qpn, 0);
992 if (err)
993 en_err(priv, "Failed disabling promiscuous mode\n");
994 break;
995 }
996}
997
998static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
999 struct net_device *dev,
1000 struct mlx4_en_dev *mdev)
1001{
1002 struct mlx4_en_mc_list *mclist, *tmp;
1003 u64 mcast_addr = 0;
1004 u8 mc_list[16] = {0};
1005 int err = 0;
1006
1007
1008 if (dev->flags & IFF_ALLMULTI) {
1009 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1010 0, MLX4_MCAST_DISABLE);
1011 if (err)
1012 en_err(priv, "Failed disabling multicast filter\n");
1013
1014
1015 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
1016 switch (mdev->dev->caps.steering_mode) {
1017 case MLX4_STEERING_MODE_DEVICE_MANAGED:
1018 err = mlx4_flow_steer_promisc_add(mdev->dev,
1019 priv->port,
1020 priv->base_qpn,
1021 MLX4_FS_MC_DEFAULT);
1022 break;
1023
1024 case MLX4_STEERING_MODE_B0:
1025 err = mlx4_multicast_promisc_add(mdev->dev,
1026 priv->base_qpn,
1027 priv->port);
1028 break;
1029
1030 case MLX4_STEERING_MODE_A0:
1031 break;
1032 }
1033 if (err)
1034 en_err(priv, "Failed entering multicast promisc mode\n");
1035 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
1036 }
1037 } else {
1038
1039 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1040 switch (mdev->dev->caps.steering_mode) {
1041 case MLX4_STEERING_MODE_DEVICE_MANAGED:
1042 err = mlx4_flow_steer_promisc_remove(mdev->dev,
1043 priv->port,
1044 MLX4_FS_MC_DEFAULT);
1045 break;
1046
1047 case MLX4_STEERING_MODE_B0:
1048 err = mlx4_multicast_promisc_remove(mdev->dev,
1049 priv->base_qpn,
1050 priv->port);
1051 break;
1052
1053 case MLX4_STEERING_MODE_A0:
1054 break;
1055 }
1056 if (err)
1057 en_err(priv, "Failed disabling multicast promiscuous mode\n");
1058 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1059 }
1060
1061 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1062 0, MLX4_MCAST_DISABLE);
1063 if (err)
1064 en_err(priv, "Failed disabling multicast filter\n");
1065
1066
1067 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
1068 1, MLX4_MCAST_CONFIG);
1069
1070
1071
1072 netif_addr_lock_bh(dev);
1073 mlx4_en_cache_mclist(dev);
1074 netif_addr_unlock_bh(dev);
1075 list_for_each_entry(mclist, &priv->mc_list, list) {
1076 mcast_addr = mlx4_mac_to_u64(mclist->addr);
1077 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
1078 mcast_addr, 0, MLX4_MCAST_CONFIG);
1079 }
1080 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1081 0, MLX4_MCAST_ENABLE);
1082 if (err)
1083 en_err(priv, "Failed enabling multicast filter\n");
1084
1085 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
1086 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1087 if (mclist->action == MCLIST_REM) {
1088
1089 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1090 mc_list[5] = priv->port;
1091 err = mlx4_multicast_detach(mdev->dev,
1092 priv->rss_map.indir_qp,
1093 mc_list,
1094 MLX4_PROT_ETH,
1095 mclist->reg_id);
1096 if (err)
1097 en_err(priv, "Fail to detach multicast address\n");
1098
1099 if (mclist->tunnel_reg_id) {
1100 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
1101 if (err)
1102 en_err(priv, "Failed to detach multicast address\n");
1103 }
1104
1105
1106 list_del(&mclist->list);
1107 kfree(mclist);
1108 } else if (mclist->action == MCLIST_ADD) {
1109
1110 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1111
1112 mc_list[5] = priv->port;
1113 err = mlx4_multicast_attach(mdev->dev,
1114 priv->rss_map.indir_qp,
1115 mc_list,
1116 priv->port, 0,
1117 MLX4_PROT_ETH,
1118 &mclist->reg_id);
1119 if (err)
1120 en_err(priv, "Fail to attach multicast address\n");
1121
1122 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
1123 &mclist->tunnel_reg_id);
1124 if (err)
1125 en_err(priv, "Failed to attach multicast address\n");
1126 }
1127 }
1128 }
1129}
1130
1131static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
1132 struct net_device *dev,
1133 struct mlx4_en_dev *mdev)
1134{
1135 struct netdev_hw_addr *ha;
1136 struct mlx4_mac_entry *entry;
1137 struct hlist_node *tmp;
1138 bool found;
1139 u64 mac;
1140 int err = 0;
1141 struct hlist_head *bucket;
1142 unsigned int i;
1143 int removed = 0;
1144 u32 prev_flags;
1145
1146
1147
1148
1149
1150
1151 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1152 bucket = &priv->mac_hash[i];
1153 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1154 found = false;
1155 netdev_for_each_uc_addr(ha, dev) {
1156 if (ether_addr_equal_64bits(entry->mac,
1157 ha->addr)) {
1158 found = true;
1159 break;
1160 }
1161 }
1162
1163
1164 if (ether_addr_equal_64bits(entry->mac,
1165 priv->current_mac))
1166 found = true;
1167
1168 if (!found) {
1169 mac = mlx4_mac_to_u64(entry->mac);
1170 mlx4_en_uc_steer_release(priv, entry->mac,
1171 priv->base_qpn,
1172 entry->reg_id);
1173 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1174
1175 hlist_del_rcu(&entry->hlist);
1176 kfree_rcu(entry, rcu);
1177 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
1178 entry->mac, priv->port);
1179 ++removed;
1180 }
1181 }
1182 }
1183
1184
1185
1186
1187 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
1188 return;
1189
1190 prev_flags = priv->flags;
1191 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
1192
1193
1194 netdev_for_each_uc_addr(ha, dev) {
1195 found = false;
1196 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
1197 hlist_for_each_entry(entry, bucket, hlist) {
1198 if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
1199 found = true;
1200 break;
1201 }
1202 }
1203
1204 if (!found) {
1205 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1206 if (!entry) {
1207 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
1208 ha->addr, priv->port);
1209 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1210 break;
1211 }
1212 mac = mlx4_mac_to_u64(ha->addr);
1213 memcpy(entry->mac, ha->addr, ETH_ALEN);
1214 err = mlx4_register_mac(mdev->dev, priv->port, mac);
1215 if (err < 0) {
1216 en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
1217 ha->addr, priv->port, err);
1218 kfree(entry);
1219 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1220 break;
1221 }
1222 err = mlx4_en_uc_steer_add(priv, ha->addr,
1223 &priv->base_qpn,
1224 &entry->reg_id);
1225 if (err) {
1226 en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
1227 ha->addr, priv->port, err);
1228 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1229 kfree(entry);
1230 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1231 break;
1232 } else {
1233 unsigned int mac_hash;
1234 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
1235 ha->addr, priv->port);
1236 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
1237 bucket = &priv->mac_hash[mac_hash];
1238 hlist_add_head_rcu(&entry->hlist, bucket);
1239 }
1240 }
1241 }
1242
1243 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1244 en_warn(priv, "Forcing promiscuous mode on port:%d\n",
1245 priv->port);
1246 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1247 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
1248 priv->port);
1249 }
1250}
1251
1252static void mlx4_en_do_set_rx_mode(struct work_struct *work)
1253{
1254 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1255 rx_mode_task);
1256 struct mlx4_en_dev *mdev = priv->mdev;
1257 struct net_device *dev = priv->dev;
1258
1259 mutex_lock(&mdev->state_lock);
1260 if (!mdev->device_up) {
1261 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
1262 goto out;
1263 }
1264 if (!priv->port_up) {
1265 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
1266 goto out;
1267 }
1268
1269 if (!netif_carrier_ok(dev)) {
1270 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
1271 if (priv->port_state.link_state) {
1272 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
1273 netif_carrier_on(dev);
1274 en_dbg(LINK, priv, "Link Up\n");
1275 }
1276 }
1277 }
1278
1279 if (dev->priv_flags & IFF_UNICAST_FLT)
1280 mlx4_en_do_uc_filter(priv, dev, mdev);
1281
1282
1283 if ((dev->flags & IFF_PROMISC) ||
1284 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
1285 mlx4_en_set_promisc_mode(priv, mdev);
1286 goto out;
1287 }
1288
1289
1290 if (priv->flags & MLX4_EN_FLAG_PROMISC)
1291 mlx4_en_clear_promisc_mode(priv, mdev);
1292
1293 mlx4_en_do_multicast(priv, dev, mdev);
1294out:
1295 mutex_unlock(&mdev->state_lock);
1296}
1297
1298static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
1299{
1300 u64 reg_id;
1301 int err = 0;
1302 int *qpn = &priv->base_qpn;
1303 struct mlx4_mac_entry *entry;
1304
1305 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id);
1306 if (err)
1307 return err;
1308
1309 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
1310 &priv->tunnel_reg_id);
1311 if (err)
1312 goto tunnel_err;
1313
1314 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1315 if (!entry) {
1316 err = -ENOMEM;
1317 goto alloc_err;
1318 }
1319
1320 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
1321 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
1322 entry->reg_id = reg_id;
1323 hlist_add_head_rcu(&entry->hlist,
1324 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
1325
1326 return 0;
1327
1328alloc_err:
1329 if (priv->tunnel_reg_id)
1330 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1331
1332tunnel_err:
1333 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
1334 return err;
1335}
1336
1337static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)
1338{
1339 u64 mac;
1340 unsigned int i;
1341 int qpn = priv->base_qpn;
1342 struct hlist_head *bucket;
1343 struct hlist_node *tmp;
1344 struct mlx4_mac_entry *entry;
1345
1346 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1347 bucket = &priv->mac_hash[i];
1348 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1349 mac = mlx4_mac_to_u64(entry->mac);
1350 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",
1351 entry->mac);
1352 mlx4_en_uc_steer_release(priv, entry->mac,
1353 qpn, entry->reg_id);
1354
1355 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);
1356 hlist_del_rcu(&entry->hlist);
1357 kfree_rcu(entry, rcu);
1358 }
1359 }
1360
1361 if (priv->tunnel_reg_id) {
1362 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1363 priv->tunnel_reg_id = 0;
1364 }
1365}
1366
1367static void mlx4_en_tx_timeout(struct net_device *dev, unsigned int txqueue)
1368{
1369 struct mlx4_en_priv *priv = netdev_priv(dev);
1370 struct mlx4_en_dev *mdev = priv->mdev;
1371 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][txqueue];
1372
1373 if (netif_msg_timer(priv))
1374 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
1375
1376 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
1377 txqueue, tx_ring->qpn, tx_ring->sp_cqn,
1378 tx_ring->cons, tx_ring->prod);
1379
1380 priv->port_stats.tx_timeout++;
1381 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state)) {
1382 en_dbg(DRV, priv, "Scheduling port restart\n");
1383 queue_work(mdev->workqueue, &priv->restart_task);
1384 }
1385}
1386
1387
1388static void
1389mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
1390{
1391 struct mlx4_en_priv *priv = netdev_priv(dev);
1392
1393 spin_lock_bh(&priv->stats_lock);
1394 mlx4_en_fold_software_stats(dev);
1395 netdev_stats_to_stats64(stats, &dev->stats);
1396 spin_unlock_bh(&priv->stats_lock);
1397}
1398
1399static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
1400{
1401 struct mlx4_en_cq *cq;
1402 int i, t;
1403
1404
1405
1406
1407
1408
1409
1410 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
1411 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
1412 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
1413 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
1414 en_dbg(INTR, priv, "Default coalescing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
1415 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
1416
1417
1418 for (i = 0; i < priv->rx_ring_num; i++) {
1419 cq = priv->rx_cq[i];
1420 cq->moder_cnt = priv->rx_frames;
1421 cq->moder_time = priv->rx_usecs;
1422 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
1423 priv->last_moder_packets[i] = 0;
1424 priv->last_moder_bytes[i] = 0;
1425 }
1426
1427 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
1428 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1429 cq = priv->tx_cq[t][i];
1430 cq->moder_cnt = priv->tx_frames;
1431 cq->moder_time = priv->tx_usecs;
1432 }
1433 }
1434
1435
1436 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
1437 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
1438 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
1439 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
1440 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
1441 priv->adaptive_rx_coal = 1;
1442 priv->last_moder_jiffies = 0;
1443 priv->last_moder_tx_packets = 0;
1444}
1445
1446static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
1447{
1448 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
1449 u32 pkt_rate_high, pkt_rate_low;
1450 struct mlx4_en_cq *cq;
1451 unsigned long packets;
1452 unsigned long rate;
1453 unsigned long avg_pkt_size;
1454 unsigned long rx_packets;
1455 unsigned long rx_bytes;
1456 unsigned long rx_pkt_diff;
1457 int moder_time;
1458 int ring, err;
1459
1460 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
1461 return;
1462
1463 pkt_rate_low = READ_ONCE(priv->pkt_rate_low);
1464 pkt_rate_high = READ_ONCE(priv->pkt_rate_high);
1465
1466 for (ring = 0; ring < priv->rx_ring_num; ring++) {
1467 rx_packets = READ_ONCE(priv->rx_ring[ring]->packets);
1468 rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes);
1469
1470 rx_pkt_diff = rx_packets - priv->last_moder_packets[ring];
1471 packets = rx_pkt_diff;
1472 rate = packets * HZ / period;
1473 avg_pkt_size = packets ? (rx_bytes -
1474 priv->last_moder_bytes[ring]) / packets : 0;
1475
1476
1477
1478 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
1479 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
1480 if (rate <= pkt_rate_low)
1481 moder_time = priv->rx_usecs_low;
1482 else if (rate >= pkt_rate_high)
1483 moder_time = priv->rx_usecs_high;
1484 else
1485 moder_time = (rate - pkt_rate_low) *
1486 (priv->rx_usecs_high - priv->rx_usecs_low) /
1487 (pkt_rate_high - pkt_rate_low) +
1488 priv->rx_usecs_low;
1489 } else {
1490 moder_time = priv->rx_usecs_low;
1491 }
1492
1493 cq = priv->rx_cq[ring];
1494 if (moder_time != priv->last_moder_time[ring] ||
1495 cq->moder_cnt != priv->rx_frames) {
1496 priv->last_moder_time[ring] = moder_time;
1497 cq->moder_time = moder_time;
1498 cq->moder_cnt = priv->rx_frames;
1499 err = mlx4_en_set_cq_moder(priv, cq);
1500 if (err)
1501 en_err(priv, "Failed modifying moderation for cq:%d\n",
1502 ring);
1503 }
1504 priv->last_moder_packets[ring] = rx_packets;
1505 priv->last_moder_bytes[ring] = rx_bytes;
1506 }
1507
1508 priv->last_moder_jiffies = jiffies;
1509}
1510
1511static void mlx4_en_do_get_stats(struct work_struct *work)
1512{
1513 struct delayed_work *delay = to_delayed_work(work);
1514 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1515 stats_task);
1516 struct mlx4_en_dev *mdev = priv->mdev;
1517 int err;
1518
1519 mutex_lock(&mdev->state_lock);
1520 if (mdev->device_up) {
1521 if (priv->port_up) {
1522 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
1523 if (err)
1524 en_dbg(HW, priv, "Could not update stats\n");
1525
1526 mlx4_en_auto_moderation(priv);
1527 }
1528
1529 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1530 }
1531 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
1532 mlx4_en_do_set_mac(priv, priv->current_mac);
1533 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
1534 }
1535 mutex_unlock(&mdev->state_lock);
1536}
1537
1538
1539
1540
1541static void mlx4_en_service_task(struct work_struct *work)
1542{
1543 struct delayed_work *delay = to_delayed_work(work);
1544 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1545 service_task);
1546 struct mlx4_en_dev *mdev = priv->mdev;
1547
1548 mutex_lock(&mdev->state_lock);
1549 if (mdev->device_up) {
1550 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
1551 mlx4_en_ptp_overflow_check(mdev);
1552
1553 mlx4_en_recover_from_oom(priv);
1554 queue_delayed_work(mdev->workqueue, &priv->service_task,
1555 SERVICE_TASK_DELAY);
1556 }
1557 mutex_unlock(&mdev->state_lock);
1558}
1559
1560static void mlx4_en_linkstate(struct work_struct *work)
1561{
1562 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1563 linkstate_task);
1564 struct mlx4_en_dev *mdev = priv->mdev;
1565 int linkstate = priv->link_state;
1566
1567 mutex_lock(&mdev->state_lock);
1568
1569
1570 if (priv->last_link_state != linkstate) {
1571 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
1572 en_info(priv, "Link Down\n");
1573 netif_carrier_off(priv->dev);
1574 } else {
1575 en_info(priv, "Link Up\n");
1576 netif_carrier_on(priv->dev);
1577 }
1578 }
1579 priv->last_link_state = linkstate;
1580 mutex_unlock(&mdev->state_lock);
1581}
1582
1583static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1584{
1585 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
1586 int numa_node = priv->mdev->dev->numa_node;
1587
1588 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
1589 return -ENOMEM;
1590
1591 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
1592 ring->affinity_mask);
1593 return 0;
1594}
1595
1596static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1597{
1598 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
1599}
1600
1601static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv,
1602 int tx_ring_idx)
1603{
1604 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx];
1605 int rr_index = tx_ring_idx;
1606
1607 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc;
1608 tx_ring->recycle_ring = priv->rx_ring[rr_index];
1609 en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n",
1610 TX_XDP, tx_ring_idx, rr_index);
1611}
1612
1613int mlx4_en_start_port(struct net_device *dev)
1614{
1615 struct mlx4_en_priv *priv = netdev_priv(dev);
1616 struct mlx4_en_dev *mdev = priv->mdev;
1617 struct mlx4_en_cq *cq;
1618 struct mlx4_en_tx_ring *tx_ring;
1619 int rx_index = 0;
1620 int err = 0;
1621 int i, t;
1622 int j;
1623 u8 mc_list[16] = {0};
1624
1625 if (priv->port_up) {
1626 en_dbg(DRV, priv, "start port called while port already up\n");
1627 return 0;
1628 }
1629
1630 INIT_LIST_HEAD(&priv->mc_list);
1631 INIT_LIST_HEAD(&priv->curr_list);
1632 INIT_LIST_HEAD(&priv->ethtool_list);
1633 memset(&priv->ethtool_rules[0], 0,
1634 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
1635
1636
1637 dev->mtu = min(dev->mtu, priv->max_mtu);
1638 mlx4_en_calc_rx_buf(dev);
1639 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
1640
1641
1642 err = mlx4_en_activate_rx_rings(priv);
1643 if (err) {
1644 en_err(priv, "Failed to activate RX rings\n");
1645 return err;
1646 }
1647 for (i = 0; i < priv->rx_ring_num; i++) {
1648 cq = priv->rx_cq[i];
1649
1650 err = mlx4_en_init_affinity_hint(priv, i);
1651 if (err) {
1652 en_err(priv, "Failed preparing IRQ affinity hint\n");
1653 goto cq_err;
1654 }
1655
1656 err = mlx4_en_activate_cq(priv, cq, i);
1657 if (err) {
1658 en_err(priv, "Failed activating Rx CQ\n");
1659 mlx4_en_free_affinity_hint(priv, i);
1660 goto cq_err;
1661 }
1662
1663 for (j = 0; j < cq->size; j++) {
1664 struct mlx4_cqe *cqe = NULL;
1665
1666 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
1667 priv->cqe_factor;
1668 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
1669 }
1670
1671 err = mlx4_en_set_cq_moder(priv, cq);
1672 if (err) {
1673 en_err(priv, "Failed setting cq moderation parameters\n");
1674 mlx4_en_deactivate_cq(priv, cq);
1675 mlx4_en_free_affinity_hint(priv, i);
1676 goto cq_err;
1677 }
1678 mlx4_en_arm_cq(priv, cq);
1679 priv->rx_ring[i]->cqn = cq->mcq.cqn;
1680 ++rx_index;
1681 }
1682
1683
1684 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
1685 err = mlx4_en_get_qp(priv);
1686 if (err) {
1687 en_err(priv, "Failed getting eth qp\n");
1688 goto cq_err;
1689 }
1690 mdev->mac_removed[priv->port] = 0;
1691
1692 priv->counter_index =
1693 mlx4_get_default_counter_index(mdev->dev, priv->port);
1694
1695 err = mlx4_en_config_rss_steer(priv);
1696 if (err) {
1697 en_err(priv, "Failed configuring rss steering\n");
1698 goto mac_err;
1699 }
1700
1701 err = mlx4_en_create_drop_qp(priv);
1702 if (err)
1703 goto rss_err;
1704
1705
1706 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
1707 u8 num_tx_rings_p_up = t == TX ?
1708 priv->num_tx_rings_p_up : priv->tx_ring_num[t];
1709
1710 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1711
1712 cq = priv->tx_cq[t][i];
1713 err = mlx4_en_activate_cq(priv, cq, i);
1714 if (err) {
1715 en_err(priv, "Failed allocating Tx CQ\n");
1716 goto tx_err;
1717 }
1718 err = mlx4_en_set_cq_moder(priv, cq);
1719 if (err) {
1720 en_err(priv, "Failed setting cq moderation parameters\n");
1721 mlx4_en_deactivate_cq(priv, cq);
1722 goto tx_err;
1723 }
1724 en_dbg(DRV, priv,
1725 "Resetting index of collapsed CQ:%d to -1\n", i);
1726 cq->buf->wqe_index = cpu_to_be16(0xffff);
1727
1728
1729 tx_ring = priv->tx_ring[t][i];
1730 err = mlx4_en_activate_tx_ring(priv, tx_ring,
1731 cq->mcq.cqn,
1732 i / num_tx_rings_p_up);
1733 if (err) {
1734 en_err(priv, "Failed allocating Tx ring\n");
1735 mlx4_en_deactivate_cq(priv, cq);
1736 goto tx_err;
1737 }
1738 clear_bit(MLX4_EN_TX_RING_STATE_RECOVERING, &tx_ring->state);
1739 if (t != TX_XDP) {
1740 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
1741 tx_ring->recycle_ring = NULL;
1742
1743
1744 mlx4_en_arm_cq(priv, cq);
1745
1746 } else {
1747 mlx4_en_init_tx_xdp_ring_descs(priv, tx_ring);
1748 mlx4_en_init_recycle_ring(priv, i);
1749
1750 }
1751
1752
1753 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
1754 *((u32 *)(tx_ring->buf + j)) = 0xffffffff;
1755 }
1756 }
1757
1758
1759 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1760 priv->rx_skb_size + ETH_FCS_LEN,
1761 priv->prof->tx_pause,
1762 priv->prof->tx_ppp,
1763 priv->prof->rx_pause,
1764 priv->prof->rx_ppp);
1765 if (err) {
1766 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
1767 priv->port, err);
1768 goto tx_err;
1769 }
1770
1771 err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu);
1772 if (err) {
1773 en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n",
1774 dev->mtu, priv->port, err);
1775 goto tx_err;
1776 }
1777
1778
1779 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
1780 if (err) {
1781 en_err(priv, "Failed setting default qp numbers\n");
1782 goto tx_err;
1783 }
1784
1785 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
1786 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
1787 if (err) {
1788 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
1789 err);
1790 goto tx_err;
1791 }
1792 }
1793
1794
1795 en_dbg(HW, priv, "Initializing port\n");
1796 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1797 if (err) {
1798 en_err(priv, "Failed Initializing port\n");
1799 goto tx_err;
1800 }
1801
1802
1803 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&
1804 mlx4_en_set_rss_steer_rules(priv))
1805 mlx4_warn(mdev, "Failed setting steering rules\n");
1806
1807
1808 eth_broadcast_addr(&mc_list[10]);
1809 mc_list[5] = priv->port;
1810 if (mlx4_multicast_attach(mdev->dev, priv->rss_map.indir_qp, mc_list,
1811 priv->port, 0, MLX4_PROT_ETH,
1812 &priv->broadcast_id))
1813 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
1814
1815
1816 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
1817
1818
1819 queue_work(mdev->workqueue, &priv->rx_mode_task);
1820
1821 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
1822 udp_tunnel_nic_reset_ntf(dev);
1823
1824 priv->port_up = true;
1825
1826
1827
1828
1829 for (i = 0; i < priv->rx_ring_num; i++) {
1830 local_bh_disable();
1831 napi_schedule(&priv->rx_cq[i]->napi);
1832 local_bh_enable();
1833 }
1834
1835 clear_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state);
1836 netif_tx_start_all_queues(dev);
1837 netif_device_attach(dev);
1838
1839 return 0;
1840
1841tx_err:
1842 if (t == MLX4_EN_NUM_TX_TYPES) {
1843 t--;
1844 i = priv->tx_ring_num[t];
1845 }
1846 while (t >= 0) {
1847 while (i--) {
1848 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
1849 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
1850 }
1851 if (!t--)
1852 break;
1853 i = priv->tx_ring_num[t];
1854 }
1855 mlx4_en_destroy_drop_qp(priv);
1856rss_err:
1857 mlx4_en_release_rss_steer(priv);
1858mac_err:
1859 mlx4_en_put_qp(priv);
1860cq_err:
1861 while (rx_index--) {
1862 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
1863 mlx4_en_free_affinity_hint(priv, rx_index);
1864 }
1865 for (i = 0; i < priv->rx_ring_num; i++)
1866 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1867
1868 return err;
1869}
1870
1871
1872void mlx4_en_stop_port(struct net_device *dev, int detach)
1873{
1874 struct mlx4_en_priv *priv = netdev_priv(dev);
1875 struct mlx4_en_dev *mdev = priv->mdev;
1876 struct mlx4_en_mc_list *mclist, *tmp;
1877 struct ethtool_flow_id *flow, *tmp_flow;
1878 int i, t;
1879 u8 mc_list[16] = {0};
1880
1881 if (!priv->port_up) {
1882 en_dbg(DRV, priv, "stop port called while port already down\n");
1883 return;
1884 }
1885
1886
1887 mlx4_CLOSE_PORT(mdev->dev, priv->port);
1888
1889
1890 netif_tx_lock_bh(dev);
1891 if (detach)
1892 netif_device_detach(dev);
1893 netif_tx_stop_all_queues(dev);
1894 netif_tx_unlock_bh(dev);
1895
1896 netif_tx_disable(dev);
1897
1898 spin_lock_bh(&priv->stats_lock);
1899 mlx4_en_fold_software_stats(dev);
1900
1901 priv->port_up = false;
1902 spin_unlock_bh(&priv->stats_lock);
1903
1904 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
1905
1906
1907 if (mdev->dev->caps.steering_mode ==
1908 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1909 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
1910 MLX4_EN_FLAG_MC_PROMISC);
1911 mlx4_flow_steer_promisc_remove(mdev->dev,
1912 priv->port,
1913 MLX4_FS_ALL_DEFAULT);
1914 mlx4_flow_steer_promisc_remove(mdev->dev,
1915 priv->port,
1916 MLX4_FS_MC_DEFAULT);
1917 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
1918 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
1919
1920
1921 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
1922 priv->port);
1923
1924
1925 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1926 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
1927 priv->port);
1928 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1929 }
1930 }
1931
1932
1933 eth_broadcast_addr(&mc_list[10]);
1934 mc_list[5] = priv->port;
1935 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, mc_list,
1936 MLX4_PROT_ETH, priv->broadcast_id);
1937 list_for_each_entry(mclist, &priv->curr_list, list) {
1938 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1939 mc_list[5] = priv->port;
1940 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp,
1941 mc_list, MLX4_PROT_ETH, mclist->reg_id);
1942 if (mclist->tunnel_reg_id)
1943 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
1944 }
1945 mlx4_en_clear_list(dev);
1946 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1947 list_del(&mclist->list);
1948 kfree(mclist);
1949 }
1950
1951
1952 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
1953
1954
1955 if (mdev->dev->caps.steering_mode ==
1956 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1957 ASSERT_RTNL();
1958 list_for_each_entry_safe(flow, tmp_flow,
1959 &priv->ethtool_list, list) {
1960 mlx4_flow_detach(mdev->dev, flow->id);
1961 list_del(&flow->list);
1962 }
1963 }
1964
1965 mlx4_en_destroy_drop_qp(priv);
1966
1967
1968 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
1969 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1970 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
1971 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
1972 }
1973 }
1974 msleep(10);
1975
1976 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
1977 for (i = 0; i < priv->tx_ring_num[t]; i++)
1978 mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]);
1979
1980 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
1981 mlx4_en_delete_rss_steer_rules(priv);
1982
1983
1984 mlx4_en_release_rss_steer(priv);
1985
1986
1987 mlx4_en_put_qp(priv);
1988 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
1989 mdev->mac_removed[priv->port] = 1;
1990
1991
1992 for (i = 0; i < priv->rx_ring_num; i++) {
1993 struct mlx4_en_cq *cq = priv->rx_cq[i];
1994
1995 napi_synchronize(&cq->napi);
1996 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1997 mlx4_en_deactivate_cq(priv, cq);
1998
1999 mlx4_en_free_affinity_hint(priv, i);
2000 }
2001}
2002
2003static void mlx4_en_restart(struct work_struct *work)
2004{
2005 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2006 restart_task);
2007 struct mlx4_en_dev *mdev = priv->mdev;
2008 struct net_device *dev = priv->dev;
2009
2010 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
2011
2012 rtnl_lock();
2013 mutex_lock(&mdev->state_lock);
2014 if (priv->port_up) {
2015 mlx4_en_stop_port(dev, 1);
2016 if (mlx4_en_start_port(dev))
2017 en_err(priv, "Failed restarting port %d\n", priv->port);
2018 }
2019 mutex_unlock(&mdev->state_lock);
2020 rtnl_unlock();
2021}
2022
2023static void mlx4_en_clear_stats(struct net_device *dev)
2024{
2025 struct mlx4_en_priv *priv = netdev_priv(dev);
2026 struct mlx4_en_dev *mdev = priv->mdev;
2027 struct mlx4_en_tx_ring **tx_ring;
2028 int i;
2029
2030 if (!mlx4_is_slave(mdev->dev))
2031 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
2032 en_dbg(HW, priv, "Failed dumping statistics\n");
2033
2034 memset(&priv->pkstats, 0, sizeof(priv->pkstats));
2035 memset(&priv->port_stats, 0, sizeof(priv->port_stats));
2036 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
2037 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
2038 memset(&priv->rx_priority_flowstats, 0,
2039 sizeof(priv->rx_priority_flowstats));
2040 memset(&priv->tx_priority_flowstats, 0,
2041 sizeof(priv->tx_priority_flowstats));
2042 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));
2043
2044 tx_ring = priv->tx_ring[TX];
2045 for (i = 0; i < priv->tx_ring_num[TX]; i++) {
2046 tx_ring[i]->bytes = 0;
2047 tx_ring[i]->packets = 0;
2048 tx_ring[i]->tx_csum = 0;
2049 tx_ring[i]->tx_dropped = 0;
2050 tx_ring[i]->queue_stopped = 0;
2051 tx_ring[i]->wake_queue = 0;
2052 tx_ring[i]->tso_packets = 0;
2053 tx_ring[i]->xmit_more = 0;
2054 }
2055 for (i = 0; i < priv->rx_ring_num; i++) {
2056 priv->rx_ring[i]->bytes = 0;
2057 priv->rx_ring[i]->packets = 0;
2058 priv->rx_ring[i]->csum_ok = 0;
2059 priv->rx_ring[i]->csum_none = 0;
2060 priv->rx_ring[i]->csum_complete = 0;
2061 }
2062}
2063
2064static int mlx4_en_open(struct net_device *dev)
2065{
2066 struct mlx4_en_priv *priv = netdev_priv(dev);
2067 struct mlx4_en_dev *mdev = priv->mdev;
2068 int err = 0;
2069
2070 mutex_lock(&mdev->state_lock);
2071
2072 if (!mdev->device_up) {
2073 en_err(priv, "Cannot open - device down/disabled\n");
2074 err = -EBUSY;
2075 goto out;
2076 }
2077
2078
2079 mlx4_en_clear_stats(dev);
2080
2081 err = mlx4_en_start_port(dev);
2082 if (err)
2083 en_err(priv, "Failed starting port:%d\n", priv->port);
2084
2085out:
2086 mutex_unlock(&mdev->state_lock);
2087 return err;
2088}
2089
2090
2091static int mlx4_en_close(struct net_device *dev)
2092{
2093 struct mlx4_en_priv *priv = netdev_priv(dev);
2094 struct mlx4_en_dev *mdev = priv->mdev;
2095
2096 en_dbg(IFDOWN, priv, "Close port called\n");
2097
2098 mutex_lock(&mdev->state_lock);
2099
2100 mlx4_en_stop_port(dev, 0);
2101 netif_carrier_off(dev);
2102
2103 mutex_unlock(&mdev->state_lock);
2104 return 0;
2105}
2106
2107static void mlx4_en_free_resources(struct mlx4_en_priv *priv)
2108{
2109 int i, t;
2110
2111#ifdef CONFIG_RFS_ACCEL
2112 priv->dev->rx_cpu_rmap = NULL;
2113#endif
2114
2115 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2116 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2117 if (priv->tx_ring[t] && priv->tx_ring[t][i])
2118 mlx4_en_destroy_tx_ring(priv,
2119 &priv->tx_ring[t][i]);
2120 if (priv->tx_cq[t] && priv->tx_cq[t][i])
2121 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
2122 }
2123 kfree(priv->tx_ring[t]);
2124 kfree(priv->tx_cq[t]);
2125 }
2126
2127 for (i = 0; i < priv->rx_ring_num; i++) {
2128 if (priv->rx_ring[i])
2129 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2130 priv->prof->rx_ring_size, priv->stride);
2131 if (priv->rx_cq[i])
2132 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2133 }
2134
2135}
2136
2137static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
2138{
2139 struct mlx4_en_port_profile *prof = priv->prof;
2140 int i, t;
2141 int node;
2142
2143
2144 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2145 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2146 node = cpu_to_node(i % num_online_cpus());
2147 if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i],
2148 prof->tx_ring_size, i, t, node))
2149 goto err;
2150
2151 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i],
2152 prof->tx_ring_size,
2153 TXBB_SIZE, node, i))
2154 goto err;
2155 }
2156 }
2157
2158
2159 for (i = 0; i < priv->rx_ring_num; i++) {
2160 node = cpu_to_node(i % num_online_cpus());
2161 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
2162 prof->rx_ring_size, i, RX, node))
2163 goto err;
2164
2165 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
2166 prof->rx_ring_size, priv->stride,
2167 node, i))
2168 goto err;
2169
2170 }
2171
2172#ifdef CONFIG_RFS_ACCEL
2173 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);
2174#endif
2175
2176 return 0;
2177
2178err:
2179 en_err(priv, "Failed to allocate NIC resources\n");
2180 for (i = 0; i < priv->rx_ring_num; i++) {
2181 if (priv->rx_ring[i])
2182 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2183 prof->rx_ring_size,
2184 priv->stride);
2185 if (priv->rx_cq[i])
2186 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2187 }
2188 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2189 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2190 if (priv->tx_ring[t][i])
2191 mlx4_en_destroy_tx_ring(priv,
2192 &priv->tx_ring[t][i]);
2193 if (priv->tx_cq[t][i])
2194 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
2195 }
2196 }
2197 return -ENOMEM;
2198}
2199
2200
2201static int mlx4_en_copy_priv(struct mlx4_en_priv *dst,
2202 struct mlx4_en_priv *src,
2203 struct mlx4_en_port_profile *prof)
2204{
2205 int t;
2206
2207 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config,
2208 sizeof(dst->hwtstamp_config));
2209 dst->num_tx_rings_p_up = prof->num_tx_rings_p_up;
2210 dst->rx_ring_num = prof->rx_ring_num;
2211 dst->flags = prof->flags;
2212 dst->mdev = src->mdev;
2213 dst->port = src->port;
2214 dst->dev = src->dev;
2215 dst->prof = prof;
2216 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
2217 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
2218
2219 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2220 dst->tx_ring_num[t] = prof->tx_ring_num[t];
2221 if (!dst->tx_ring_num[t])
2222 continue;
2223
2224 dst->tx_ring[t] = kcalloc(MAX_TX_RINGS,
2225 sizeof(struct mlx4_en_tx_ring *),
2226 GFP_KERNEL);
2227 if (!dst->tx_ring[t])
2228 goto err_free_tx;
2229
2230 dst->tx_cq[t] = kcalloc(MAX_TX_RINGS,
2231 sizeof(struct mlx4_en_cq *),
2232 GFP_KERNEL);
2233 if (!dst->tx_cq[t]) {
2234 kfree(dst->tx_ring[t]);
2235 goto err_free_tx;
2236 }
2237 }
2238
2239 return 0;
2240
2241err_free_tx:
2242 while (t--) {
2243 kfree(dst->tx_ring[t]);
2244 kfree(dst->tx_cq[t]);
2245 }
2246 return -ENOMEM;
2247}
2248
2249static void mlx4_en_update_priv(struct mlx4_en_priv *dst,
2250 struct mlx4_en_priv *src)
2251{
2252 int t;
2253 memcpy(dst->rx_ring, src->rx_ring,
2254 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num);
2255 memcpy(dst->rx_cq, src->rx_cq,
2256 sizeof(struct mlx4_en_cq *) * src->rx_ring_num);
2257 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config,
2258 sizeof(dst->hwtstamp_config));
2259 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2260 dst->tx_ring_num[t] = src->tx_ring_num[t];
2261 dst->tx_ring[t] = src->tx_ring[t];
2262 dst->tx_cq[t] = src->tx_cq[t];
2263 }
2264 dst->num_tx_rings_p_up = src->num_tx_rings_p_up;
2265 dst->rx_ring_num = src->rx_ring_num;
2266 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile));
2267}
2268
2269int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,
2270 struct mlx4_en_priv *tmp,
2271 struct mlx4_en_port_profile *prof,
2272 bool carry_xdp_prog)
2273{
2274 struct bpf_prog *xdp_prog;
2275 int i, t;
2276
2277 mlx4_en_copy_priv(tmp, priv, prof);
2278
2279 if (mlx4_en_alloc_resources(tmp)) {
2280 en_warn(priv,
2281 "%s: Resource allocation failed, using previous configuration\n",
2282 __func__);
2283 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2284 kfree(tmp->tx_ring[t]);
2285 kfree(tmp->tx_cq[t]);
2286 }
2287 return -ENOMEM;
2288 }
2289
2290
2291 xdp_prog = rcu_dereference_protected(
2292 priv->rx_ring[0]->xdp_prog,
2293 lockdep_is_held(&priv->mdev->state_lock));
2294
2295 if (xdp_prog && carry_xdp_prog) {
2296 bpf_prog_add(xdp_prog, tmp->rx_ring_num);
2297 for (i = 0; i < tmp->rx_ring_num; i++)
2298 rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog,
2299 xdp_prog);
2300 }
2301
2302 return 0;
2303}
2304
2305void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,
2306 struct mlx4_en_priv *tmp)
2307{
2308 mlx4_en_free_resources(priv);
2309 mlx4_en_update_priv(priv, tmp);
2310}
2311
2312void mlx4_en_destroy_netdev(struct net_device *dev)
2313{
2314 struct mlx4_en_priv *priv = netdev_priv(dev);
2315 struct mlx4_en_dev *mdev = priv->mdev;
2316
2317 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
2318
2319
2320 if (priv->registered) {
2321 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev,
2322 priv->port));
2323 unregister_netdev(dev);
2324 }
2325
2326 if (priv->allocated)
2327 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
2328
2329 cancel_delayed_work(&priv->stats_task);
2330 cancel_delayed_work(&priv->service_task);
2331
2332 flush_workqueue(mdev->workqueue);
2333
2334 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
2335 mlx4_en_remove_timestamp(mdev);
2336
2337
2338 mutex_lock(&mdev->state_lock);
2339 mdev->pndev[priv->port] = NULL;
2340 mdev->upper[priv->port] = NULL;
2341
2342#ifdef CONFIG_RFS_ACCEL
2343 mlx4_en_cleanup_filters(priv);
2344#endif
2345
2346 mlx4_en_free_resources(priv);
2347 mutex_unlock(&mdev->state_lock);
2348
2349 free_netdev(dev);
2350}
2351
2352static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu)
2353{
2354 struct mlx4_en_priv *priv = netdev_priv(dev);
2355
2356 if (mtu > MLX4_EN_MAX_XDP_MTU) {
2357 en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n",
2358 mtu, MLX4_EN_MAX_XDP_MTU);
2359 return false;
2360 }
2361
2362 return true;
2363}
2364
2365static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
2366{
2367 struct mlx4_en_priv *priv = netdev_priv(dev);
2368 struct mlx4_en_dev *mdev = priv->mdev;
2369 int err = 0;
2370
2371 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
2372 dev->mtu, new_mtu);
2373
2374 if (priv->tx_ring_num[TX_XDP] &&
2375 !mlx4_en_check_xdp_mtu(dev, new_mtu))
2376 return -EOPNOTSUPP;
2377
2378 dev->mtu = new_mtu;
2379
2380 if (netif_running(dev)) {
2381 mutex_lock(&mdev->state_lock);
2382 if (!mdev->device_up) {
2383
2384
2385 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
2386 } else {
2387 mlx4_en_stop_port(dev, 1);
2388 err = mlx4_en_start_port(dev);
2389 if (err) {
2390 en_err(priv, "Failed restarting port:%d\n",
2391 priv->port);
2392 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING,
2393 &priv->state))
2394 queue_work(mdev->workqueue, &priv->restart_task);
2395 }
2396 }
2397 mutex_unlock(&mdev->state_lock);
2398 }
2399 return 0;
2400}
2401
2402static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
2403{
2404 struct mlx4_en_priv *priv = netdev_priv(dev);
2405 struct mlx4_en_dev *mdev = priv->mdev;
2406 struct hwtstamp_config config;
2407
2408 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
2409 return -EFAULT;
2410
2411
2412 if (config.flags)
2413 return -EINVAL;
2414
2415
2416 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
2417 return -EINVAL;
2418
2419
2420 switch (config.tx_type) {
2421 case HWTSTAMP_TX_OFF:
2422 case HWTSTAMP_TX_ON:
2423 break;
2424 default:
2425 return -ERANGE;
2426 }
2427
2428
2429 switch (config.rx_filter) {
2430 case HWTSTAMP_FILTER_NONE:
2431 break;
2432 case HWTSTAMP_FILTER_ALL:
2433 case HWTSTAMP_FILTER_SOME:
2434 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
2435 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
2436 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
2437 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
2438 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
2439 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
2440 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
2441 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
2442 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
2443 case HWTSTAMP_FILTER_PTP_V2_EVENT:
2444 case HWTSTAMP_FILTER_PTP_V2_SYNC:
2445 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
2446 case HWTSTAMP_FILTER_NTP_ALL:
2447 config.rx_filter = HWTSTAMP_FILTER_ALL;
2448 break;
2449 default:
2450 return -ERANGE;
2451 }
2452
2453 if (mlx4_en_reset_config(dev, config, dev->features)) {
2454 config.tx_type = HWTSTAMP_TX_OFF;
2455 config.rx_filter = HWTSTAMP_FILTER_NONE;
2456 }
2457
2458 return copy_to_user(ifr->ifr_data, &config,
2459 sizeof(config)) ? -EFAULT : 0;
2460}
2461
2462static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
2463{
2464 struct mlx4_en_priv *priv = netdev_priv(dev);
2465
2466 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
2467 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
2468}
2469
2470static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2471{
2472 switch (cmd) {
2473 case SIOCSHWTSTAMP:
2474 return mlx4_en_hwtstamp_set(dev, ifr);
2475 case SIOCGHWTSTAMP:
2476 return mlx4_en_hwtstamp_get(dev, ifr);
2477 default:
2478 return -EOPNOTSUPP;
2479 }
2480}
2481
2482static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,
2483 netdev_features_t features)
2484{
2485 struct mlx4_en_priv *en_priv = netdev_priv(netdev);
2486 struct mlx4_en_dev *mdev = en_priv->mdev;
2487
2488
2489
2490
2491
2492 if (features & NETIF_F_HW_VLAN_CTAG_RX &&
2493 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
2494 features |= NETIF_F_HW_VLAN_STAG_RX;
2495 else
2496 features &= ~NETIF_F_HW_VLAN_STAG_RX;
2497
2498 return features;
2499}
2500
2501static int mlx4_en_set_features(struct net_device *netdev,
2502 netdev_features_t features)
2503{
2504 struct mlx4_en_priv *priv = netdev_priv(netdev);
2505 bool reset = false;
2506 int ret = 0;
2507
2508 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
2509 en_info(priv, "Turn %s RX-FCS\n",
2510 (features & NETIF_F_RXFCS) ? "ON" : "OFF");
2511 reset = true;
2512 }
2513
2514 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
2515 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
2516
2517 en_info(priv, "Turn %s RX-ALL\n",
2518 ignore_fcs_value ? "ON" : "OFF");
2519 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
2520 priv->port, ignore_fcs_value);
2521 if (ret)
2522 return ret;
2523 }
2524
2525 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
2526 en_info(priv, "Turn %s RX vlan strip offload\n",
2527 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
2528 reset = true;
2529 }
2530
2531 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
2532 en_info(priv, "Turn %s TX vlan strip offload\n",
2533 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
2534
2535 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))
2536 en_info(priv, "Turn %s TX S-VLAN strip offload\n",
2537 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");
2538
2539 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
2540 en_info(priv, "Turn %s loopback\n",
2541 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
2542 mlx4_en_update_loopback_state(netdev, features);
2543 }
2544
2545 if (reset) {
2546 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
2547 features);
2548 if (ret)
2549 return ret;
2550 }
2551
2552 return 0;
2553}
2554
2555static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
2556{
2557 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2558 struct mlx4_en_dev *mdev = en_priv->mdev;
2559
2560 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac);
2561}
2562
2563static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos,
2564 __be16 vlan_proto)
2565{
2566 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2567 struct mlx4_en_dev *mdev = en_priv->mdev;
2568
2569 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos,
2570 vlan_proto);
2571}
2572
2573static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,
2574 int max_tx_rate)
2575{
2576 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2577 struct mlx4_en_dev *mdev = en_priv->mdev;
2578
2579 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
2580 max_tx_rate);
2581}
2582
2583static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
2584{
2585 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2586 struct mlx4_en_dev *mdev = en_priv->mdev;
2587
2588 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
2589}
2590
2591static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
2592{
2593 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2594 struct mlx4_en_dev *mdev = en_priv->mdev;
2595
2596 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
2597}
2598
2599static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
2600{
2601 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2602 struct mlx4_en_dev *mdev = en_priv->mdev;
2603
2604 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
2605}
2606
2607static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,
2608 struct ifla_vf_stats *vf_stats)
2609{
2610 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2611 struct mlx4_en_dev *mdev = en_priv->mdev;
2612
2613 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);
2614}
2615
2616#define PORT_ID_BYTE_LEN 8
2617static int mlx4_en_get_phys_port_id(struct net_device *dev,
2618 struct netdev_phys_item_id *ppid)
2619{
2620 struct mlx4_en_priv *priv = netdev_priv(dev);
2621 struct mlx4_dev *mdev = priv->mdev->dev;
2622 int i;
2623 u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
2624
2625 if (!phys_port_id)
2626 return -EOPNOTSUPP;
2627
2628 ppid->id_len = sizeof(phys_port_id);
2629 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
2630 ppid->id[i] = phys_port_id & 0xff;
2631 phys_port_id >>= 8;
2632 }
2633 return 0;
2634}
2635
2636static int mlx4_udp_tunnel_sync(struct net_device *dev, unsigned int table)
2637{
2638 struct mlx4_en_priv *priv = netdev_priv(dev);
2639 struct udp_tunnel_info ti;
2640 int ret;
2641
2642 udp_tunnel_nic_get_port(dev, table, 0, &ti);
2643 priv->vxlan_port = ti.port;
2644
2645 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
2646 if (ret)
2647 return ret;
2648
2649 return mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
2650 VXLAN_STEER_BY_OUTER_MAC,
2651 !!priv->vxlan_port);
2652}
2653
2654static const struct udp_tunnel_nic_info mlx4_udp_tunnels = {
2655 .sync_table = mlx4_udp_tunnel_sync,
2656 .flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP |
2657 UDP_TUNNEL_NIC_INFO_IPV4_ONLY,
2658 .tables = {
2659 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },
2660 },
2661};
2662
2663static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
2664 struct net_device *dev,
2665 netdev_features_t features)
2666{
2667 features = vlan_features_check(skb, features);
2668 features = vxlan_features_check(skb, features);
2669
2670
2671
2672
2673
2674 if (skb->encapsulation &&
2675 (skb->ip_summed == CHECKSUM_PARTIAL)) {
2676 struct mlx4_en_priv *priv = netdev_priv(dev);
2677
2678 if (!priv->vxlan_port ||
2679 (ip_hdr(skb)->version != 4) ||
2680 (udp_hdr(skb)->dest != priv->vxlan_port))
2681 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2682 }
2683
2684 return features;
2685}
2686
2687static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
2688{
2689 struct mlx4_en_priv *priv = netdev_priv(dev);
2690 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index];
2691 struct mlx4_update_qp_params params;
2692 int err;
2693
2694 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
2695 return -EOPNOTSUPP;
2696
2697
2698 if (maxrate >> 12) {
2699 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
2700 params.rate_val = maxrate / 1000;
2701 } else if (maxrate) {
2702 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
2703 params.rate_val = maxrate;
2704 } else {
2705 params.rate_unit = 0;
2706 params.rate_val = 0;
2707 }
2708
2709 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
2710 ¶ms);
2711 return err;
2712}
2713
2714static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog)
2715{
2716 struct mlx4_en_priv *priv = netdev_priv(dev);
2717 struct mlx4_en_dev *mdev = priv->mdev;
2718 struct mlx4_en_port_profile new_prof;
2719 struct bpf_prog *old_prog;
2720 struct mlx4_en_priv *tmp;
2721 int tx_changed = 0;
2722 int xdp_ring_num;
2723 int port_up = 0;
2724 int err;
2725 int i;
2726
2727 xdp_ring_num = prog ? priv->rx_ring_num : 0;
2728
2729
2730
2731
2732 if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) {
2733 if (prog)
2734 bpf_prog_add(prog, priv->rx_ring_num - 1);
2735
2736 mutex_lock(&mdev->state_lock);
2737 for (i = 0; i < priv->rx_ring_num; i++) {
2738 old_prog = rcu_dereference_protected(
2739 priv->rx_ring[i]->xdp_prog,
2740 lockdep_is_held(&mdev->state_lock));
2741 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
2742 if (old_prog)
2743 bpf_prog_put(old_prog);
2744 }
2745 mutex_unlock(&mdev->state_lock);
2746 return 0;
2747 }
2748
2749 if (!mlx4_en_check_xdp_mtu(dev, dev->mtu))
2750 return -EOPNOTSUPP;
2751
2752 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
2753 if (!tmp)
2754 return -ENOMEM;
2755
2756 if (prog)
2757 bpf_prog_add(prog, priv->rx_ring_num - 1);
2758
2759 mutex_lock(&mdev->state_lock);
2760 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
2761 new_prof.tx_ring_num[TX_XDP] = xdp_ring_num;
2762
2763 if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) {
2764 tx_changed = 1;
2765 new_prof.tx_ring_num[TX] =
2766 MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up);
2767 en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n");
2768 }
2769
2770 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false);
2771 if (err) {
2772 if (prog)
2773 bpf_prog_sub(prog, priv->rx_ring_num - 1);
2774 goto unlock_out;
2775 }
2776
2777 if (priv->port_up) {
2778 port_up = 1;
2779 mlx4_en_stop_port(dev, 1);
2780 }
2781
2782 mlx4_en_safe_replace_resources(priv, tmp);
2783 if (tx_changed)
2784 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
2785
2786 for (i = 0; i < priv->rx_ring_num; i++) {
2787 old_prog = rcu_dereference_protected(
2788 priv->rx_ring[i]->xdp_prog,
2789 lockdep_is_held(&mdev->state_lock));
2790 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
2791 if (old_prog)
2792 bpf_prog_put(old_prog);
2793 }
2794
2795 if (port_up) {
2796 err = mlx4_en_start_port(dev);
2797 if (err) {
2798 en_err(priv, "Failed starting port %d for XDP change\n",
2799 priv->port);
2800 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state))
2801 queue_work(mdev->workqueue, &priv->restart_task);
2802 }
2803 }
2804
2805unlock_out:
2806 mutex_unlock(&mdev->state_lock);
2807 kfree(tmp);
2808 return err;
2809}
2810
2811static int mlx4_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2812{
2813 switch (xdp->command) {
2814 case XDP_SETUP_PROG:
2815 return mlx4_xdp_set(dev, xdp->prog);
2816 default:
2817 return -EINVAL;
2818 }
2819}
2820
2821static const struct net_device_ops mlx4_netdev_ops = {
2822 .ndo_open = mlx4_en_open,
2823 .ndo_stop = mlx4_en_close,
2824 .ndo_start_xmit = mlx4_en_xmit,
2825 .ndo_select_queue = mlx4_en_select_queue,
2826 .ndo_get_stats64 = mlx4_en_get_stats64,
2827 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2828 .ndo_set_mac_address = mlx4_en_set_mac,
2829 .ndo_validate_addr = eth_validate_addr,
2830 .ndo_change_mtu = mlx4_en_change_mtu,
2831 .ndo_do_ioctl = mlx4_en_ioctl,
2832 .ndo_tx_timeout = mlx4_en_tx_timeout,
2833 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2834 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2835 .ndo_set_features = mlx4_en_set_features,
2836 .ndo_fix_features = mlx4_en_fix_features,
2837 .ndo_setup_tc = __mlx4_en_setup_tc,
2838#ifdef CONFIG_RFS_ACCEL
2839 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2840#endif
2841 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2842 .ndo_features_check = mlx4_en_features_check,
2843 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2844 .ndo_bpf = mlx4_xdp,
2845};
2846
2847static const struct net_device_ops mlx4_netdev_ops_master = {
2848 .ndo_open = mlx4_en_open,
2849 .ndo_stop = mlx4_en_close,
2850 .ndo_start_xmit = mlx4_en_xmit,
2851 .ndo_select_queue = mlx4_en_select_queue,
2852 .ndo_get_stats64 = mlx4_en_get_stats64,
2853 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2854 .ndo_set_mac_address = mlx4_en_set_mac,
2855 .ndo_validate_addr = eth_validate_addr,
2856 .ndo_change_mtu = mlx4_en_change_mtu,
2857 .ndo_tx_timeout = mlx4_en_tx_timeout,
2858 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2859 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2860 .ndo_set_vf_mac = mlx4_en_set_vf_mac,
2861 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
2862 .ndo_set_vf_rate = mlx4_en_set_vf_rate,
2863 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
2864 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
2865 .ndo_get_vf_stats = mlx4_en_get_vf_stats,
2866 .ndo_get_vf_config = mlx4_en_get_vf_config,
2867 .ndo_set_features = mlx4_en_set_features,
2868 .ndo_fix_features = mlx4_en_fix_features,
2869 .ndo_setup_tc = __mlx4_en_setup_tc,
2870#ifdef CONFIG_RFS_ACCEL
2871 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2872#endif
2873 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2874 .ndo_features_check = mlx4_en_features_check,
2875 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2876 .ndo_bpf = mlx4_xdp,
2877};
2878
2879struct mlx4_en_bond {
2880 struct work_struct work;
2881 struct mlx4_en_priv *priv;
2882 int is_bonded;
2883 struct mlx4_port_map port_map;
2884};
2885
2886static void mlx4_en_bond_work(struct work_struct *work)
2887{
2888 struct mlx4_en_bond *bond = container_of(work,
2889 struct mlx4_en_bond,
2890 work);
2891 int err = 0;
2892 struct mlx4_dev *dev = bond->priv->mdev->dev;
2893
2894 if (bond->is_bonded) {
2895 if (!mlx4_is_bonded(dev)) {
2896 err = mlx4_bond(dev);
2897 if (err)
2898 en_err(bond->priv, "Fail to bond device\n");
2899 }
2900 if (!err) {
2901 err = mlx4_port_map_set(dev, &bond->port_map);
2902 if (err)
2903 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
2904 bond->port_map.port1,
2905 bond->port_map.port2,
2906 err);
2907 }
2908 } else if (mlx4_is_bonded(dev)) {
2909 err = mlx4_unbond(dev);
2910 if (err)
2911 en_err(bond->priv, "Fail to unbond device\n");
2912 }
2913 dev_put(bond->priv->dev);
2914 kfree(bond);
2915}
2916
2917static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
2918 u8 v2p_p1, u8 v2p_p2)
2919{
2920 struct mlx4_en_bond *bond = NULL;
2921
2922 bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
2923 if (!bond)
2924 return -ENOMEM;
2925
2926 INIT_WORK(&bond->work, mlx4_en_bond_work);
2927 bond->priv = priv;
2928 bond->is_bonded = is_bonded;
2929 bond->port_map.port1 = v2p_p1;
2930 bond->port_map.port2 = v2p_p2;
2931 dev_hold(priv->dev);
2932 queue_work(priv->mdev->workqueue, &bond->work);
2933 return 0;
2934}
2935
2936int mlx4_en_netdev_event(struct notifier_block *this,
2937 unsigned long event, void *ptr)
2938{
2939 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
2940 u8 port = 0;
2941 struct mlx4_en_dev *mdev;
2942 struct mlx4_dev *dev;
2943 int i, num_eth_ports = 0;
2944 bool do_bond = true;
2945 struct mlx4_en_priv *priv;
2946 u8 v2p_port1 = 0;
2947 u8 v2p_port2 = 0;
2948
2949 if (!net_eq(dev_net(ndev), &init_net))
2950 return NOTIFY_DONE;
2951
2952 mdev = container_of(this, struct mlx4_en_dev, nb);
2953 dev = mdev->dev;
2954
2955
2956
2957
2958 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
2959 ++num_eth_ports;
2960 if (!port && (mdev->pndev[i] == ndev))
2961 port = i;
2962 mdev->upper[i] = mdev->pndev[i] ?
2963 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
2964
2965 if (!mdev->upper[i])
2966 do_bond = false;
2967 if (num_eth_ports < 2)
2968 continue;
2969
2970 if (mdev->upper[i] != mdev->upper[i-1])
2971 do_bond = false;
2972 }
2973
2974 do_bond = (num_eth_ports == 2) ? do_bond : false;
2975
2976
2977 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
2978 return NOTIFY_DONE;
2979
2980 priv = netdev_priv(ndev);
2981 if (do_bond) {
2982 struct netdev_notifier_bonding_info *notifier_info = ptr;
2983 struct netdev_bonding_info *bonding_info =
2984 ¬ifier_info->bonding_info;
2985
2986
2987 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
2988 (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
2989 (bonding_info->master.bond_mode != BOND_MODE_8023AD))
2990 do_bond = false;
2991
2992
2993 if (bonding_info->master.num_slaves != 2)
2994 do_bond = false;
2995
2996
2997 if (do_bond) {
2998 if (bonding_info->master.bond_mode ==
2999 BOND_MODE_ACTIVEBACKUP) {
3000
3001
3002
3003 if (bonding_info->slave.state ==
3004 BOND_STATE_BACKUP) {
3005 if (port == 1) {
3006 v2p_port1 = 2;
3007 v2p_port2 = 2;
3008 } else {
3009 v2p_port1 = 1;
3010 v2p_port2 = 1;
3011 }
3012 } else {
3013 if (port == 1) {
3014 v2p_port1 = 1;
3015 v2p_port2 = 1;
3016 } else {
3017 v2p_port1 = 2;
3018 v2p_port2 = 2;
3019 }
3020 }
3021 } else {
3022
3023
3024
3025 __s8 link = bonding_info->slave.link;
3026
3027 if (port == 1)
3028 v2p_port2 = 2;
3029 else
3030 v2p_port1 = 1;
3031 if ((link == BOND_LINK_UP) ||
3032 (link == BOND_LINK_FAIL)) {
3033 if (port == 1)
3034 v2p_port1 = 1;
3035 else
3036 v2p_port2 = 2;
3037 } else {
3038 if (port == 1)
3039 v2p_port1 = 2;
3040 else
3041 v2p_port2 = 1;
3042 }
3043 }
3044 }
3045 }
3046
3047 mlx4_en_queue_bond_work(priv, do_bond,
3048 v2p_port1, v2p_port2);
3049
3050 return NOTIFY_DONE;
3051}
3052
3053void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
3054 struct mlx4_en_stats_bitmap *stats_bitmap,
3055 u8 rx_ppp, u8 rx_pause,
3056 u8 tx_ppp, u8 tx_pause)
3057{
3058 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;
3059
3060 if (!mlx4_is_slave(dev) &&
3061 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
3062 mutex_lock(&stats_bitmap->mutex);
3063 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
3064
3065 if (rx_ppp)
3066 bitmap_set(stats_bitmap->bitmap, last_i,
3067 NUM_FLOW_PRIORITY_STATS_RX);
3068 last_i += NUM_FLOW_PRIORITY_STATS_RX;
3069
3070 if (rx_pause && !(rx_ppp))
3071 bitmap_set(stats_bitmap->bitmap, last_i,
3072 NUM_FLOW_STATS_RX);
3073 last_i += NUM_FLOW_STATS_RX;
3074
3075 if (tx_ppp)
3076 bitmap_set(stats_bitmap->bitmap, last_i,
3077 NUM_FLOW_PRIORITY_STATS_TX);
3078 last_i += NUM_FLOW_PRIORITY_STATS_TX;
3079
3080 if (tx_pause && !(tx_ppp))
3081 bitmap_set(stats_bitmap->bitmap, last_i,
3082 NUM_FLOW_STATS_TX);
3083 last_i += NUM_FLOW_STATS_TX;
3084
3085 mutex_unlock(&stats_bitmap->mutex);
3086 }
3087}
3088
3089void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
3090 struct mlx4_en_stats_bitmap *stats_bitmap,
3091 u8 rx_ppp, u8 rx_pause,
3092 u8 tx_ppp, u8 tx_pause)
3093{
3094 int last_i = 0;
3095
3096 mutex_init(&stats_bitmap->mutex);
3097 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
3098
3099 if (mlx4_is_slave(dev)) {
3100 bitmap_set(stats_bitmap->bitmap, last_i +
3101 MLX4_FIND_NETDEV_STAT(rx_packets), 1);
3102 bitmap_set(stats_bitmap->bitmap, last_i +
3103 MLX4_FIND_NETDEV_STAT(tx_packets), 1);
3104 bitmap_set(stats_bitmap->bitmap, last_i +
3105 MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
3106 bitmap_set(stats_bitmap->bitmap, last_i +
3107 MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
3108 bitmap_set(stats_bitmap->bitmap, last_i +
3109 MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
3110 bitmap_set(stats_bitmap->bitmap, last_i +
3111 MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
3112 } else {
3113 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
3114 }
3115 last_i += NUM_MAIN_STATS;
3116
3117 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
3118 last_i += NUM_PORT_STATS;
3119
3120 if (mlx4_is_master(dev))
3121 bitmap_set(stats_bitmap->bitmap, last_i,
3122 NUM_PF_STATS);
3123 last_i += NUM_PF_STATS;
3124
3125 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
3126 rx_ppp, rx_pause,
3127 tx_ppp, tx_pause);
3128 last_i += NUM_FLOW_STATS;
3129
3130 if (!mlx4_is_slave(dev))
3131 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
3132 last_i += NUM_PKT_STATS;
3133
3134 bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS);
3135 last_i += NUM_XDP_STATS;
3136
3137 if (!mlx4_is_slave(dev))
3138 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PHY_STATS);
3139 last_i += NUM_PHY_STATS;
3140}
3141
3142int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
3143 struct mlx4_en_port_profile *prof)
3144{
3145 struct net_device *dev;
3146 struct mlx4_en_priv *priv;
3147 int i, t;
3148 int err;
3149
3150 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
3151 MAX_TX_RINGS, MAX_RX_RINGS);
3152 if (dev == NULL)
3153 return -ENOMEM;
3154
3155 netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]);
3156 netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
3157
3158 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
3159 dev->dev_port = port - 1;
3160
3161
3162
3163
3164
3165 priv = netdev_priv(dev);
3166 memset(priv, 0, sizeof(struct mlx4_en_priv));
3167 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
3168 spin_lock_init(&priv->stats_lock);
3169 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
3170 INIT_WORK(&priv->restart_task, mlx4_en_restart);
3171 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
3172 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
3173 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
3174#ifdef CONFIG_RFS_ACCEL
3175 INIT_LIST_HEAD(&priv->filters);
3176 spin_lock_init(&priv->filters_lock);
3177#endif
3178
3179 priv->dev = dev;
3180 priv->mdev = mdev;
3181 priv->ddev = &mdev->pdev->dev;
3182 priv->prof = prof;
3183 priv->port = port;
3184 priv->port_up = false;
3185 priv->flags = prof->flags;
3186 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
3187 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
3188 MLX4_WQE_CTRL_SOLICITED);
3189 priv->num_tx_rings_p_up = mdev->profile.max_num_tx_rings_p_up;
3190 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
3191 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
3192
3193 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
3194 priv->tx_ring_num[t] = prof->tx_ring_num[t];
3195 if (!priv->tx_ring_num[t])
3196 continue;
3197
3198 priv->tx_ring[t] = kcalloc(MAX_TX_RINGS,
3199 sizeof(struct mlx4_en_tx_ring *),
3200 GFP_KERNEL);
3201 if (!priv->tx_ring[t]) {
3202 err = -ENOMEM;
3203 goto out;
3204 }
3205 priv->tx_cq[t] = kcalloc(MAX_TX_RINGS,
3206 sizeof(struct mlx4_en_cq *),
3207 GFP_KERNEL);
3208 if (!priv->tx_cq[t]) {
3209 err = -ENOMEM;
3210 goto out;
3211 }
3212 }
3213 priv->rx_ring_num = prof->rx_ring_num;
3214 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
3215 priv->cqe_size = mdev->dev->caps.cqe_size;
3216 priv->mac_index = -1;
3217 priv->msg_enable = MLX4_EN_MSG_LEVEL;
3218#ifdef CONFIG_MLX4_EN_DCB
3219 if (!mlx4_is_slave(priv->mdev->dev)) {
3220 u8 prio;
3221
3222 for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) {
3223 priv->ets.prio_tc[prio] = prio;
3224 priv->ets.tc_tsa[prio] = IEEE_8021QAZ_TSA_VENDOR;
3225 }
3226
3227 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
3228 DCB_CAP_DCBX_VER_IEEE;
3229 priv->flags |= MLX4_EN_DCB_ENABLED;
3230 priv->cee_config.pfc_state = false;
3231
3232 for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++)
3233 priv->cee_config.dcb_pfc[i] = pfc_disabled;
3234
3235 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
3236 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
3237 } else {
3238 en_info(priv, "enabling only PFC DCB ops\n");
3239 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
3240 }
3241 }
3242#endif
3243
3244 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
3245 INIT_HLIST_HEAD(&priv->mac_hash[i]);
3246
3247
3248 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
3249
3250 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
3251 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
3252 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
3253
3254
3255 dev->addr_len = ETH_ALEN;
3256 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
3257 if (!is_valid_ether_addr(dev->dev_addr)) {
3258 en_err(priv, "Port: %d, invalid mac burned: %pM, quitting\n",
3259 priv->port, dev->dev_addr);
3260 err = -EINVAL;
3261 goto out;
3262 } else if (mlx4_is_slave(priv->mdev->dev) &&
3263 (priv->mdev->dev->port_random_macs & 1 << priv->port)) {
3264
3265
3266
3267 dev->addr_assign_type |= NET_ADDR_RANDOM;
3268 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
3269 }
3270
3271 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
3272
3273 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
3274 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
3275 err = mlx4_en_alloc_resources(priv);
3276 if (err)
3277 goto out;
3278
3279
3280 priv->hwtstamp_config.flags = 0;
3281 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
3282 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
3283
3284
3285 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
3286 MLX4_EN_PAGE_SIZE);
3287 if (err) {
3288 en_err(priv, "Failed to allocate page for rx qps\n");
3289 goto out;
3290 }
3291 priv->allocated = 1;
3292
3293
3294
3295
3296 if (mlx4_is_master(priv->mdev->dev))
3297 dev->netdev_ops = &mlx4_netdev_ops_master;
3298 else
3299 dev->netdev_ops = &mlx4_netdev_ops;
3300 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
3301 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
3302 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
3303
3304 dev->ethtool_ops = &mlx4_en_ethtool_ops;
3305
3306
3307
3308
3309 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
3310 if (mdev->LSO_support)
3311 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
3312
3313 if (mdev->dev->caps.tunnel_offload_mode ==
3314 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3315 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |
3316 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3317 NETIF_F_GSO_PARTIAL;
3318 dev->features |= NETIF_F_GSO_UDP_TUNNEL |
3319 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3320 NETIF_F_GSO_PARTIAL;
3321 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM;
3322 dev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3323 NETIF_F_RXCSUM |
3324 NETIF_F_TSO | NETIF_F_TSO6 |
3325 NETIF_F_GSO_UDP_TUNNEL |
3326 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3327 NETIF_F_GSO_PARTIAL;
3328
3329 dev->udp_tunnel_nic_info = &mlx4_udp_tunnels;
3330 }
3331
3332 dev->vlan_features = dev->hw_features;
3333
3334 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
3335 dev->features = dev->hw_features | NETIF_F_HIGHDMA |
3336 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
3337 NETIF_F_HW_VLAN_CTAG_FILTER;
3338 dev->hw_features |= NETIF_F_LOOPBACK |
3339 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
3340
3341 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {
3342 dev->features |= NETIF_F_HW_VLAN_STAG_RX |
3343 NETIF_F_HW_VLAN_STAG_FILTER;
3344 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;
3345 }
3346
3347 if (mlx4_is_slave(mdev->dev)) {
3348 bool vlan_offload_disabled;
3349 int phv;
3350
3351 err = get_phv_bit(mdev->dev, port, &phv);
3352 if (!err && phv) {
3353 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
3354 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
3355 }
3356 err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port,
3357 &vlan_offload_disabled);
3358 if (!err && vlan_offload_disabled) {
3359 dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
3360 NETIF_F_HW_VLAN_CTAG_RX |
3361 NETIF_F_HW_VLAN_STAG_TX |
3362 NETIF_F_HW_VLAN_STAG_RX);
3363 dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
3364 NETIF_F_HW_VLAN_CTAG_RX |
3365 NETIF_F_HW_VLAN_STAG_TX |
3366 NETIF_F_HW_VLAN_STAG_RX);
3367 }
3368 } else {
3369 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&
3370 !(mdev->dev->caps.flags2 &
3371 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
3372 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
3373 }
3374
3375 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
3376 dev->hw_features |= NETIF_F_RXFCS;
3377
3378 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
3379 dev->hw_features |= NETIF_F_RXALL;
3380
3381 if (mdev->dev->caps.steering_mode ==
3382 MLX4_STEERING_MODE_DEVICE_MANAGED &&
3383 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
3384 dev->hw_features |= NETIF_F_NTUPLE;
3385
3386 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
3387 dev->priv_flags |= IFF_UNICAST_FLT;
3388
3389
3390 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
3391 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3392 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
3393 priv->rss_hash_fn = ETH_RSS_HASH_XOR;
3394 } else {
3395 en_warn(priv,
3396 "No RSS hash capabilities exposed, using Toeplitz\n");
3397 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3398 }
3399
3400
3401 dev->min_mtu = ETH_MIN_MTU;
3402 dev->max_mtu = priv->max_mtu;
3403
3404 mdev->pndev[port] = dev;
3405 mdev->upper[port] = NULL;
3406
3407 netif_carrier_off(dev);
3408 mlx4_en_set_default_moderation(priv);
3409
3410 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]);
3411 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
3412
3413 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
3414
3415
3416 mlx4_en_calc_rx_buf(dev);
3417 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
3418 priv->rx_skb_size + ETH_FCS_LEN,
3419 prof->tx_pause, prof->tx_ppp,
3420 prof->rx_pause, prof->rx_ppp);
3421 if (err) {
3422 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
3423 priv->port, err);
3424 goto out;
3425 }
3426
3427 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3428 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
3429 if (err) {
3430 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
3431 err);
3432 goto out;
3433 }
3434 }
3435
3436
3437 en_warn(priv, "Initializing port\n");
3438 err = mlx4_INIT_PORT(mdev->dev, priv->port);
3439 if (err) {
3440 en_err(priv, "Failed Initializing port\n");
3441 goto out;
3442 }
3443 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
3444
3445
3446 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
3447 mlx4_en_init_timestamp(mdev);
3448
3449 queue_delayed_work(mdev->workqueue, &priv->service_task,
3450 SERVICE_TASK_DELAY);
3451
3452 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
3453 mdev->profile.prof[priv->port].rx_ppp,
3454 mdev->profile.prof[priv->port].rx_pause,
3455 mdev->profile.prof[priv->port].tx_ppp,
3456 mdev->profile.prof[priv->port].tx_pause);
3457
3458 err = register_netdev(dev);
3459 if (err) {
3460 en_err(priv, "Netdev registration failed for port %d\n", port);
3461 goto out;
3462 }
3463
3464 priv->registered = 1;
3465 devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port),
3466 dev);
3467
3468 return 0;
3469
3470out:
3471 mlx4_en_destroy_netdev(dev);
3472 return err;
3473}
3474
3475int mlx4_en_reset_config(struct net_device *dev,
3476 struct hwtstamp_config ts_config,
3477 netdev_features_t features)
3478{
3479 struct mlx4_en_priv *priv = netdev_priv(dev);
3480 struct mlx4_en_dev *mdev = priv->mdev;
3481 struct mlx4_en_port_profile new_prof;
3482 struct mlx4_en_priv *tmp;
3483 int port_up = 0;
3484 int err = 0;
3485
3486 if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
3487 priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
3488 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3489 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))
3490 return 0;
3491
3492 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3493 (features & NETIF_F_HW_VLAN_CTAG_RX) &&
3494 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
3495 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
3496 return -EINVAL;
3497 }
3498
3499 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
3500 if (!tmp)
3501 return -ENOMEM;
3502
3503 mutex_lock(&mdev->state_lock);
3504
3505 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
3506 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config));
3507
3508 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
3509 if (err)
3510 goto out;
3511
3512 if (priv->port_up) {
3513 port_up = 1;
3514 mlx4_en_stop_port(dev, 1);
3515 }
3516
3517 mlx4_en_safe_replace_resources(priv, tmp);
3518
3519 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
3520 if (features & NETIF_F_HW_VLAN_CTAG_RX)
3521 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3522 else
3523 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3524 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
3525
3526
3527
3528 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
3529 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3530 else
3531 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3532 }
3533
3534 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {
3535 if (features & NETIF_F_RXFCS)
3536 dev->features |= NETIF_F_RXFCS;
3537 else
3538 dev->features &= ~NETIF_F_RXFCS;
3539 }
3540
3541
3542
3543
3544
3545 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
3546 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
3547 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
3548 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3549 }
3550
3551 if (port_up) {
3552 err = mlx4_en_start_port(dev);
3553 if (err)
3554 en_err(priv, "Failed starting port\n");
3555 }
3556
3557 if (!err)
3558 err = mlx4_en_moderation_update(priv);
3559out:
3560 mutex_unlock(&mdev->state_lock);
3561 kfree(tmp);
3562 if (!err)
3563 netdev_features_change(dev);
3564 return err;
3565}
3566