1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33#include <linux/netdevice.h>
34#include <linux/mlx5/driver.h>
35#include <linux/mlx5/vport.h>
36#include "mlx5_core.h"
37#include "eswitch.h"
38#include "lag.h"
39#include "lag_mp.h"
40
41
42
43
44
45static DEFINE_SPINLOCK(lag_lock);
46
47static int mlx5_cmd_create_lag(struct mlx5_core_dev *dev, u8 remap_port1,
48 u8 remap_port2)
49{
50 u32 in[MLX5_ST_SZ_DW(create_lag_in)] = {};
51 void *lag_ctx = MLX5_ADDR_OF(create_lag_in, in, ctx);
52
53 MLX5_SET(create_lag_in, in, opcode, MLX5_CMD_OP_CREATE_LAG);
54
55 MLX5_SET(lagc, lag_ctx, tx_remap_affinity_1, remap_port1);
56 MLX5_SET(lagc, lag_ctx, tx_remap_affinity_2, remap_port2);
57
58 return mlx5_cmd_exec_in(dev, create_lag, in);
59}
60
61static int mlx5_cmd_modify_lag(struct mlx5_core_dev *dev, u8 remap_port1,
62 u8 remap_port2)
63{
64 u32 in[MLX5_ST_SZ_DW(modify_lag_in)] = {};
65 void *lag_ctx = MLX5_ADDR_OF(modify_lag_in, in, ctx);
66
67 MLX5_SET(modify_lag_in, in, opcode, MLX5_CMD_OP_MODIFY_LAG);
68 MLX5_SET(modify_lag_in, in, field_select, 0x1);
69
70 MLX5_SET(lagc, lag_ctx, tx_remap_affinity_1, remap_port1);
71 MLX5_SET(lagc, lag_ctx, tx_remap_affinity_2, remap_port2);
72
73 return mlx5_cmd_exec_in(dev, modify_lag, in);
74}
75
76int mlx5_cmd_create_vport_lag(struct mlx5_core_dev *dev)
77{
78 u32 in[MLX5_ST_SZ_DW(create_vport_lag_in)] = {};
79
80 MLX5_SET(create_vport_lag_in, in, opcode, MLX5_CMD_OP_CREATE_VPORT_LAG);
81
82 return mlx5_cmd_exec_in(dev, create_vport_lag, in);
83}
84EXPORT_SYMBOL(mlx5_cmd_create_vport_lag);
85
86int mlx5_cmd_destroy_vport_lag(struct mlx5_core_dev *dev)
87{
88 u32 in[MLX5_ST_SZ_DW(destroy_vport_lag_in)] = {};
89
90 MLX5_SET(destroy_vport_lag_in, in, opcode, MLX5_CMD_OP_DESTROY_VPORT_LAG);
91
92 return mlx5_cmd_exec_in(dev, destroy_vport_lag, in);
93}
94EXPORT_SYMBOL(mlx5_cmd_destroy_vport_lag);
95
96int mlx5_lag_dev_get_netdev_idx(struct mlx5_lag *ldev,
97 struct net_device *ndev)
98{
99 int i;
100
101 for (i = 0; i < MLX5_MAX_PORTS; i++)
102 if (ldev->pf[i].netdev == ndev)
103 return i;
104
105 return -ENOENT;
106}
107
108static bool __mlx5_lag_is_roce(struct mlx5_lag *ldev)
109{
110 return !!(ldev->flags & MLX5_LAG_FLAG_ROCE);
111}
112
113static bool __mlx5_lag_is_sriov(struct mlx5_lag *ldev)
114{
115 return !!(ldev->flags & MLX5_LAG_FLAG_SRIOV);
116}
117
118static void mlx5_infer_tx_affinity_mapping(struct lag_tracker *tracker,
119 u8 *port1, u8 *port2)
120{
121 *port1 = 1;
122 *port2 = 2;
123 if (!tracker->netdev_state[MLX5_LAG_P1].tx_enabled ||
124 !tracker->netdev_state[MLX5_LAG_P1].link_up) {
125 *port1 = 2;
126 return;
127 }
128
129 if (!tracker->netdev_state[MLX5_LAG_P2].tx_enabled ||
130 !tracker->netdev_state[MLX5_LAG_P2].link_up)
131 *port2 = 1;
132}
133
134void mlx5_modify_lag(struct mlx5_lag *ldev,
135 struct lag_tracker *tracker)
136{
137 struct mlx5_core_dev *dev0 = ldev->pf[MLX5_LAG_P1].dev;
138 u8 v2p_port1, v2p_port2;
139 int err;
140
141 mlx5_infer_tx_affinity_mapping(tracker, &v2p_port1,
142 &v2p_port2);
143
144 if (v2p_port1 != ldev->v2p_map[MLX5_LAG_P1] ||
145 v2p_port2 != ldev->v2p_map[MLX5_LAG_P2]) {
146 ldev->v2p_map[MLX5_LAG_P1] = v2p_port1;
147 ldev->v2p_map[MLX5_LAG_P2] = v2p_port2;
148
149 mlx5_core_info(dev0, "modify lag map port 1:%d port 2:%d",
150 ldev->v2p_map[MLX5_LAG_P1],
151 ldev->v2p_map[MLX5_LAG_P2]);
152
153 err = mlx5_cmd_modify_lag(dev0, v2p_port1, v2p_port2);
154 if (err)
155 mlx5_core_err(dev0,
156 "Failed to modify LAG (%d)\n",
157 err);
158 }
159}
160
161static int mlx5_create_lag(struct mlx5_lag *ldev,
162 struct lag_tracker *tracker)
163{
164 struct mlx5_core_dev *dev0 = ldev->pf[MLX5_LAG_P1].dev;
165 int err;
166
167 mlx5_infer_tx_affinity_mapping(tracker, &ldev->v2p_map[MLX5_LAG_P1],
168 &ldev->v2p_map[MLX5_LAG_P2]);
169
170 mlx5_core_info(dev0, "lag map port 1:%d port 2:%d",
171 ldev->v2p_map[MLX5_LAG_P1], ldev->v2p_map[MLX5_LAG_P2]);
172
173 err = mlx5_cmd_create_lag(dev0, ldev->v2p_map[MLX5_LAG_P1],
174 ldev->v2p_map[MLX5_LAG_P2]);
175 if (err)
176 mlx5_core_err(dev0,
177 "Failed to create LAG (%d)\n",
178 err);
179 return err;
180}
181
182int mlx5_activate_lag(struct mlx5_lag *ldev,
183 struct lag_tracker *tracker,
184 u8 flags)
185{
186 bool roce_lag = !!(flags & MLX5_LAG_FLAG_ROCE);
187 struct mlx5_core_dev *dev0 = ldev->pf[MLX5_LAG_P1].dev;
188 int err;
189
190 err = mlx5_create_lag(ldev, tracker);
191 if (err) {
192 if (roce_lag) {
193 mlx5_core_err(dev0,
194 "Failed to activate RoCE LAG\n");
195 } else {
196 mlx5_core_err(dev0,
197 "Failed to activate VF LAG\n"
198 "Make sure all VFs are unbound prior to VF LAG activation or deactivation\n");
199 }
200 return err;
201 }
202
203 ldev->flags |= flags;
204 return 0;
205}
206
207static int mlx5_deactivate_lag(struct mlx5_lag *ldev)
208{
209 struct mlx5_core_dev *dev0 = ldev->pf[MLX5_LAG_P1].dev;
210 u32 in[MLX5_ST_SZ_DW(destroy_lag_in)] = {};
211 bool roce_lag = __mlx5_lag_is_roce(ldev);
212 int err;
213
214 ldev->flags &= ~MLX5_LAG_MODE_FLAGS;
215
216 MLX5_SET(destroy_lag_in, in, opcode, MLX5_CMD_OP_DESTROY_LAG);
217 err = mlx5_cmd_exec_in(dev0, destroy_lag, in);
218 if (err) {
219 if (roce_lag) {
220 mlx5_core_err(dev0,
221 "Failed to deactivate RoCE LAG; driver restart required\n");
222 } else {
223 mlx5_core_err(dev0,
224 "Failed to deactivate VF LAG; driver restart required\n"
225 "Make sure all VFs are unbound prior to VF LAG activation or deactivation\n");
226 }
227 }
228
229 return err;
230}
231
232static bool mlx5_lag_check_prereq(struct mlx5_lag *ldev)
233{
234 if (!ldev->pf[MLX5_LAG_P1].dev || !ldev->pf[MLX5_LAG_P2].dev)
235 return false;
236
237#ifdef CONFIG_MLX5_ESWITCH
238 return mlx5_esw_lag_prereq(ldev->pf[MLX5_LAG_P1].dev,
239 ldev->pf[MLX5_LAG_P2].dev);
240#else
241 return (!mlx5_sriov_is_enabled(ldev->pf[MLX5_LAG_P1].dev) &&
242 !mlx5_sriov_is_enabled(ldev->pf[MLX5_LAG_P2].dev));
243#endif
244}
245
246static void mlx5_lag_add_devices(struct mlx5_lag *ldev)
247{
248 int i;
249
250 for (i = 0; i < MLX5_MAX_PORTS; i++) {
251 if (!ldev->pf[i].dev)
252 continue;
253
254 ldev->pf[i].dev->priv.flags &= ~MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;
255 mlx5_rescan_drivers_locked(ldev->pf[i].dev);
256 }
257}
258
259static void mlx5_lag_remove_devices(struct mlx5_lag *ldev)
260{
261 int i;
262
263 for (i = 0; i < MLX5_MAX_PORTS; i++) {
264 if (!ldev->pf[i].dev)
265 continue;
266
267 ldev->pf[i].dev->priv.flags |= MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;
268 mlx5_rescan_drivers_locked(ldev->pf[i].dev);
269 }
270}
271
272static void mlx5_do_bond(struct mlx5_lag *ldev)
273{
274 struct mlx5_core_dev *dev0 = ldev->pf[MLX5_LAG_P1].dev;
275 struct mlx5_core_dev *dev1 = ldev->pf[MLX5_LAG_P2].dev;
276 struct lag_tracker tracker;
277 bool do_bond, roce_lag;
278 int err;
279
280 if (!mlx5_lag_is_ready(ldev))
281 return;
282
283 spin_lock(&lag_lock);
284 tracker = ldev->tracker;
285 spin_unlock(&lag_lock);
286
287 do_bond = tracker.is_bonded && mlx5_lag_check_prereq(ldev);
288
289 if (do_bond && !__mlx5_lag_is_active(ldev)) {
290 roce_lag = !mlx5_sriov_is_enabled(dev0) &&
291 !mlx5_sriov_is_enabled(dev1);
292
293#ifdef CONFIG_MLX5_ESWITCH
294 roce_lag &= dev0->priv.eswitch->mode == MLX5_ESWITCH_NONE &&
295 dev1->priv.eswitch->mode == MLX5_ESWITCH_NONE;
296#endif
297
298 if (roce_lag)
299 mlx5_lag_remove_devices(ldev);
300
301 err = mlx5_activate_lag(ldev, &tracker,
302 roce_lag ? MLX5_LAG_FLAG_ROCE :
303 MLX5_LAG_FLAG_SRIOV);
304 if (err) {
305 if (roce_lag)
306 mlx5_lag_add_devices(ldev);
307
308 return;
309 }
310
311 if (roce_lag) {
312 dev0->priv.flags &= ~MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;
313 mlx5_rescan_drivers_locked(dev0);
314 mlx5_nic_vport_enable_roce(dev1);
315 }
316 } else if (do_bond && __mlx5_lag_is_active(ldev)) {
317 mlx5_modify_lag(ldev, &tracker);
318 } else if (!do_bond && __mlx5_lag_is_active(ldev)) {
319 roce_lag = __mlx5_lag_is_roce(ldev);
320
321 if (roce_lag) {
322 dev0->priv.flags |= MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;
323 mlx5_rescan_drivers_locked(dev0);
324 mlx5_nic_vport_disable_roce(dev1);
325 }
326
327 err = mlx5_deactivate_lag(ldev);
328 if (err)
329 return;
330
331 if (roce_lag)
332 mlx5_lag_add_devices(ldev);
333 }
334}
335
336static void mlx5_queue_bond_work(struct mlx5_lag *ldev, unsigned long delay)
337{
338 queue_delayed_work(ldev->wq, &ldev->bond_work, delay);
339}
340
341static void mlx5_do_bond_work(struct work_struct *work)
342{
343 struct delayed_work *delayed_work = to_delayed_work(work);
344 struct mlx5_lag *ldev = container_of(delayed_work, struct mlx5_lag,
345 bond_work);
346 int status;
347
348 status = mlx5_dev_list_trylock();
349 if (!status) {
350
351 mlx5_queue_bond_work(ldev, HZ);
352 return;
353 }
354
355 mlx5_do_bond(ldev);
356 mlx5_dev_list_unlock();
357}
358
359static int mlx5_handle_changeupper_event(struct mlx5_lag *ldev,
360 struct lag_tracker *tracker,
361 struct net_device *ndev,
362 struct netdev_notifier_changeupper_info *info)
363{
364 struct net_device *upper = info->upper_dev, *ndev_tmp;
365 struct netdev_lag_upper_info *lag_upper_info = NULL;
366 bool is_bonded, is_in_lag, mode_supported;
367 int bond_status = 0;
368 int num_slaves = 0;
369 int idx;
370
371 if (!netif_is_lag_master(upper))
372 return 0;
373
374 if (info->linking)
375 lag_upper_info = info->upper_info;
376
377
378
379
380
381
382 rcu_read_lock();
383 for_each_netdev_in_bond_rcu(upper, ndev_tmp) {
384 idx = mlx5_lag_dev_get_netdev_idx(ldev, ndev_tmp);
385 if (idx >= 0)
386 bond_status |= (1 << idx);
387
388 num_slaves++;
389 }
390 rcu_read_unlock();
391
392
393 if (!(bond_status & 0x3))
394 return 0;
395
396 if (lag_upper_info)
397 tracker->tx_type = lag_upper_info->tx_type;
398
399
400
401
402
403 is_in_lag = num_slaves == MLX5_MAX_PORTS && bond_status == 0x3;
404
405 if (!mlx5_lag_is_ready(ldev) && is_in_lag) {
406 NL_SET_ERR_MSG_MOD(info->info.extack,
407 "Can't activate LAG offload, PF is configured with more than 64 VFs");
408 return 0;
409 }
410
411
412 mode_supported = tracker->tx_type == NETDEV_LAG_TX_TYPE_ACTIVEBACKUP ||
413 tracker->tx_type == NETDEV_LAG_TX_TYPE_HASH;
414
415 if (is_in_lag && !mode_supported)
416 NL_SET_ERR_MSG_MOD(info->info.extack,
417 "Can't activate LAG offload, TX type isn't supported");
418
419 is_bonded = is_in_lag && mode_supported;
420 if (tracker->is_bonded != is_bonded) {
421 tracker->is_bonded = is_bonded;
422 return 1;
423 }
424
425 return 0;
426}
427
428static int mlx5_handle_changelowerstate_event(struct mlx5_lag *ldev,
429 struct lag_tracker *tracker,
430 struct net_device *ndev,
431 struct netdev_notifier_changelowerstate_info *info)
432{
433 struct netdev_lag_lower_state_info *lag_lower_info;
434 int idx;
435
436 if (!netif_is_lag_port(ndev))
437 return 0;
438
439 idx = mlx5_lag_dev_get_netdev_idx(ldev, ndev);
440 if (idx < 0)
441 return 0;
442
443
444
445
446 lag_lower_info = info->lower_state_info;
447 if (!lag_lower_info)
448 return 0;
449
450 tracker->netdev_state[idx] = *lag_lower_info;
451
452 return 1;
453}
454
455static int mlx5_lag_netdev_event(struct notifier_block *this,
456 unsigned long event, void *ptr)
457{
458 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
459 struct lag_tracker tracker;
460 struct mlx5_lag *ldev;
461 int changed = 0;
462
463 if ((event != NETDEV_CHANGEUPPER) && (event != NETDEV_CHANGELOWERSTATE))
464 return NOTIFY_DONE;
465
466 ldev = container_of(this, struct mlx5_lag, nb);
467
468 if (!mlx5_lag_is_ready(ldev) && event == NETDEV_CHANGELOWERSTATE)
469 return NOTIFY_DONE;
470
471 tracker = ldev->tracker;
472
473 switch (event) {
474 case NETDEV_CHANGEUPPER:
475 changed = mlx5_handle_changeupper_event(ldev, &tracker, ndev,
476 ptr);
477 break;
478 case NETDEV_CHANGELOWERSTATE:
479 changed = mlx5_handle_changelowerstate_event(ldev, &tracker,
480 ndev, ptr);
481 break;
482 }
483
484 spin_lock(&lag_lock);
485 ldev->tracker = tracker;
486 spin_unlock(&lag_lock);
487
488 if (changed)
489 mlx5_queue_bond_work(ldev, 0);
490
491 return NOTIFY_DONE;
492}
493
494static struct mlx5_lag *mlx5_lag_dev_alloc(void)
495{
496 struct mlx5_lag *ldev;
497
498 ldev = kzalloc(sizeof(*ldev), GFP_KERNEL);
499 if (!ldev)
500 return NULL;
501
502 ldev->wq = create_singlethread_workqueue("mlx5_lag");
503 if (!ldev->wq) {
504 kfree(ldev);
505 return NULL;
506 }
507
508 INIT_DELAYED_WORK(&ldev->bond_work, mlx5_do_bond_work);
509
510 return ldev;
511}
512
513static void mlx5_lag_dev_free(struct mlx5_lag *ldev)
514{
515 destroy_workqueue(ldev->wq);
516 kfree(ldev);
517}
518
519static int mlx5_lag_dev_add_pf(struct mlx5_lag *ldev,
520 struct mlx5_core_dev *dev,
521 struct net_device *netdev)
522{
523 unsigned int fn = PCI_FUNC(dev->pdev->devfn);
524
525 if (fn >= MLX5_MAX_PORTS)
526 return -EPERM;
527
528 spin_lock(&lag_lock);
529 ldev->pf[fn].dev = dev;
530 ldev->pf[fn].netdev = netdev;
531 ldev->tracker.netdev_state[fn].link_up = 0;
532 ldev->tracker.netdev_state[fn].tx_enabled = 0;
533
534 dev->priv.lag = ldev;
535
536 spin_unlock(&lag_lock);
537
538 return fn;
539}
540
541static void mlx5_lag_dev_remove_pf(struct mlx5_lag *ldev,
542 struct mlx5_core_dev *dev)
543{
544 int i;
545
546 for (i = 0; i < MLX5_MAX_PORTS; i++)
547 if (ldev->pf[i].dev == dev)
548 break;
549
550 if (i == MLX5_MAX_PORTS)
551 return;
552
553 spin_lock(&lag_lock);
554 memset(&ldev->pf[i], 0, sizeof(*ldev->pf));
555
556 dev->priv.lag = NULL;
557 spin_unlock(&lag_lock);
558}
559
560
561void mlx5_lag_add(struct mlx5_core_dev *dev, struct net_device *netdev)
562{
563 struct mlx5_lag *ldev = NULL;
564 struct mlx5_core_dev *tmp_dev;
565 int i, err;
566
567 if (!MLX5_CAP_GEN(dev, vport_group_manager) ||
568 !MLX5_CAP_GEN(dev, lag_master) ||
569 MLX5_CAP_GEN(dev, num_lag_ports) != MLX5_MAX_PORTS)
570 return;
571
572 tmp_dev = mlx5_get_next_phys_dev(dev);
573 if (tmp_dev)
574 ldev = tmp_dev->priv.lag;
575
576 if (!ldev) {
577 ldev = mlx5_lag_dev_alloc();
578 if (!ldev) {
579 mlx5_core_err(dev, "Failed to alloc lag dev\n");
580 return;
581 }
582 }
583
584 if (mlx5_lag_dev_add_pf(ldev, dev, netdev) < 0)
585 return;
586
587 for (i = 0; i < MLX5_MAX_PORTS; i++)
588 if (!ldev->pf[i].dev)
589 break;
590
591 if (i >= MLX5_MAX_PORTS)
592 ldev->flags |= MLX5_LAG_FLAG_READY;
593
594 if (!ldev->nb.notifier_call) {
595 ldev->nb.notifier_call = mlx5_lag_netdev_event;
596 if (register_netdevice_notifier_net(&init_net, &ldev->nb)) {
597 ldev->nb.notifier_call = NULL;
598 mlx5_core_err(dev, "Failed to register LAG netdev notifier\n");
599 }
600 }
601
602 err = mlx5_lag_mp_init(ldev);
603 if (err)
604 mlx5_core_err(dev, "Failed to init multipath lag err=%d\n",
605 err);
606
607 return;
608}
609
610
611void mlx5_lag_remove(struct mlx5_core_dev *dev)
612{
613 struct mlx5_lag *ldev;
614 int i;
615
616 ldev = mlx5_lag_dev_get(dev);
617 if (!ldev)
618 return;
619
620 if (__mlx5_lag_is_active(ldev))
621 mlx5_deactivate_lag(ldev);
622
623 mlx5_lag_dev_remove_pf(ldev, dev);
624
625 ldev->flags &= ~MLX5_LAG_FLAG_READY;
626
627 for (i = 0; i < MLX5_MAX_PORTS; i++)
628 if (ldev->pf[i].dev)
629 break;
630
631 if (i == MLX5_MAX_PORTS) {
632 if (ldev->nb.notifier_call) {
633 unregister_netdevice_notifier_net(&init_net, &ldev->nb);
634 ldev->nb.notifier_call = NULL;
635 }
636 mlx5_lag_mp_cleanup(ldev);
637 cancel_delayed_work_sync(&ldev->bond_work);
638 mlx5_lag_dev_free(ldev);
639 }
640}
641
642bool mlx5_lag_is_roce(struct mlx5_core_dev *dev)
643{
644 struct mlx5_lag *ldev;
645 bool res;
646
647 spin_lock(&lag_lock);
648 ldev = mlx5_lag_dev_get(dev);
649 res = ldev && __mlx5_lag_is_roce(ldev);
650 spin_unlock(&lag_lock);
651
652 return res;
653}
654EXPORT_SYMBOL(mlx5_lag_is_roce);
655
656bool mlx5_lag_is_active(struct mlx5_core_dev *dev)
657{
658 struct mlx5_lag *ldev;
659 bool res;
660
661 spin_lock(&lag_lock);
662 ldev = mlx5_lag_dev_get(dev);
663 res = ldev && __mlx5_lag_is_active(ldev);
664 spin_unlock(&lag_lock);
665
666 return res;
667}
668EXPORT_SYMBOL(mlx5_lag_is_active);
669
670bool mlx5_lag_is_sriov(struct mlx5_core_dev *dev)
671{
672 struct mlx5_lag *ldev;
673 bool res;
674
675 spin_lock(&lag_lock);
676 ldev = mlx5_lag_dev_get(dev);
677 res = ldev && __mlx5_lag_is_sriov(ldev);
678 spin_unlock(&lag_lock);
679
680 return res;
681}
682EXPORT_SYMBOL(mlx5_lag_is_sriov);
683
684void mlx5_lag_update(struct mlx5_core_dev *dev)
685{
686 struct mlx5_lag *ldev;
687
688 mlx5_dev_list_lock();
689 ldev = mlx5_lag_dev_get(dev);
690 if (!ldev)
691 goto unlock;
692
693 mlx5_do_bond(ldev);
694
695unlock:
696 mlx5_dev_list_unlock();
697}
698
699struct net_device *mlx5_lag_get_roce_netdev(struct mlx5_core_dev *dev)
700{
701 struct net_device *ndev = NULL;
702 struct mlx5_lag *ldev;
703
704 spin_lock(&lag_lock);
705 ldev = mlx5_lag_dev_get(dev);
706
707 if (!(ldev && __mlx5_lag_is_roce(ldev)))
708 goto unlock;
709
710 if (ldev->tracker.tx_type == NETDEV_LAG_TX_TYPE_ACTIVEBACKUP) {
711 ndev = ldev->tracker.netdev_state[MLX5_LAG_P1].tx_enabled ?
712 ldev->pf[MLX5_LAG_P1].netdev :
713 ldev->pf[MLX5_LAG_P2].netdev;
714 } else {
715 ndev = ldev->pf[MLX5_LAG_P1].netdev;
716 }
717 if (ndev)
718 dev_hold(ndev);
719
720unlock:
721 spin_unlock(&lag_lock);
722
723 return ndev;
724}
725EXPORT_SYMBOL(mlx5_lag_get_roce_netdev);
726
727u8 mlx5_lag_get_slave_port(struct mlx5_core_dev *dev,
728 struct net_device *slave)
729{
730 struct mlx5_lag *ldev;
731 u8 port = 0;
732
733 spin_lock(&lag_lock);
734 ldev = mlx5_lag_dev_get(dev);
735 if (!(ldev && __mlx5_lag_is_roce(ldev)))
736 goto unlock;
737
738 if (ldev->pf[MLX5_LAG_P1].netdev == slave)
739 port = MLX5_LAG_P1;
740 else
741 port = MLX5_LAG_P2;
742
743 port = ldev->v2p_map[port];
744
745unlock:
746 spin_unlock(&lag_lock);
747 return port;
748}
749EXPORT_SYMBOL(mlx5_lag_get_slave_port);
750
751int mlx5_lag_query_cong_counters(struct mlx5_core_dev *dev,
752 u64 *values,
753 int num_counters,
754 size_t *offsets)
755{
756 int outlen = MLX5_ST_SZ_BYTES(query_cong_statistics_out);
757 struct mlx5_core_dev *mdev[MLX5_MAX_PORTS];
758 struct mlx5_lag *ldev;
759 int num_ports;
760 int ret, i, j;
761 void *out;
762
763 out = kvzalloc(outlen, GFP_KERNEL);
764 if (!out)
765 return -ENOMEM;
766
767 memset(values, 0, sizeof(*values) * num_counters);
768
769 spin_lock(&lag_lock);
770 ldev = mlx5_lag_dev_get(dev);
771 if (ldev && __mlx5_lag_is_roce(ldev)) {
772 num_ports = MLX5_MAX_PORTS;
773 mdev[MLX5_LAG_P1] = ldev->pf[MLX5_LAG_P1].dev;
774 mdev[MLX5_LAG_P2] = ldev->pf[MLX5_LAG_P2].dev;
775 } else {
776 num_ports = 1;
777 mdev[MLX5_LAG_P1] = dev;
778 }
779 spin_unlock(&lag_lock);
780
781 for (i = 0; i < num_ports; ++i) {
782 u32 in[MLX5_ST_SZ_DW(query_cong_statistics_in)] = {};
783
784 MLX5_SET(query_cong_statistics_in, in, opcode,
785 MLX5_CMD_OP_QUERY_CONG_STATISTICS);
786 ret = mlx5_cmd_exec_inout(mdev[i], query_cong_statistics, in,
787 out);
788 if (ret)
789 goto free;
790
791 for (j = 0; j < num_counters; ++j)
792 values[j] += be64_to_cpup((__be64 *)(out + offsets[j]));
793 }
794
795free:
796 kvfree(out);
797 return ret;
798}
799EXPORT_SYMBOL(mlx5_lag_query_cong_counters);
800
