1
2
3
4#ifndef __MT7615_H
5#define __MT7615_H
6
7#include <linux/completion.h>
8#include <linux/interrupt.h>
9#include <linux/ktime.h>
10#include <linux/regmap.h>
11#include "../mt76_connac_mcu.h"
12#include "regs.h"
13
14#define MT7615_MAX_INTERFACES 16
15#define MT7615_MAX_WMM_SETS 4
16#define MT7663_WTBL_SIZE 32
17#define MT7615_WTBL_SIZE 128
18#define MT7615_WTBL_RESERVED (mt7615_wtbl_size(dev) - 1)
19#define MT7615_WTBL_STA (MT7615_WTBL_RESERVED - \
20 MT7615_MAX_INTERFACES)
21
22#define MT7615_PM_TIMEOUT (HZ / 12)
23#define MT7615_WATCHDOG_TIME (HZ / 10)
24#define MT7615_HW_SCAN_TIMEOUT (HZ / 10)
25#define MT7615_RESET_TIMEOUT (30 * HZ)
26#define MT7615_RATE_RETRY 2
27
28#define MT7615_TX_RING_SIZE 1024
29#define MT7615_TX_MGMT_RING_SIZE 128
30#define MT7615_TX_MCU_RING_SIZE 128
31#define MT7615_TX_FWDL_RING_SIZE 128
32
33#define MT7615_RX_RING_SIZE 1024
34#define MT7615_RX_MCU_RING_SIZE 512
35
36#define MT7615_DRV_OWN_RETRY_COUNT 10
37
38#define MT7615_FIRMWARE_CR4 "mediatek/mt7615_cr4.bin"
39#define MT7615_FIRMWARE_N9 "mediatek/mt7615_n9.bin"
40#define MT7615_ROM_PATCH "mediatek/mt7615_rom_patch.bin"
41
42#define MT7622_FIRMWARE_N9 "mediatek/mt7622_n9.bin"
43#define MT7622_ROM_PATCH "mediatek/mt7622_rom_patch.bin"
44
45#define MT7615_FIRMWARE_V1 1
46#define MT7615_FIRMWARE_V2 2
47#define MT7615_FIRMWARE_V3 3
48
49#define MT7663_OFFLOAD_ROM_PATCH "mediatek/mt7663pr2h.bin"
50#define MT7663_OFFLOAD_FIRMWARE_N9 "mediatek/mt7663_n9_v3.bin"
51#define MT7663_ROM_PATCH "mediatek/mt7663pr2h_rebb.bin"
52#define MT7663_FIRMWARE_N9 "mediatek/mt7663_n9_rebb.bin"
53
54#define MT7615_EEPROM_SIZE 1024
55#define MT7615_TOKEN_SIZE 4096
56
57#define MT_FRAC_SCALE 12
58#define MT_FRAC(val, div) (((val) << MT_FRAC_SCALE) / (div))
59
60#define MT_CHFREQ_VALID BIT(7)
61#define MT_CHFREQ_DBDC_IDX BIT(6)
62#define MT_CHFREQ_SEQ GENMASK(5, 0)
63
64#define MT7615_BAR_RATE_DEFAULT 0x4b
65#define MT7615_CFEND_RATE_DEFAULT 0x49
66#define MT7615_CFEND_RATE_11B 0x03
67
68struct mt7615_vif;
69struct mt7615_sta;
70struct mt7615_dfs_pulse;
71struct mt7615_dfs_pattern;
72enum mt7615_cipher_type;
73
74enum mt7615_hw_txq_id {
75 MT7615_TXQ_MAIN,
76 MT7615_TXQ_EXT,
77 MT7615_TXQ_MCU,
78 MT7615_TXQ_FWDL,
79};
80
81enum mt7622_hw_txq_id {
82 MT7622_TXQ_AC0,
83 MT7622_TXQ_AC1,
84 MT7622_TXQ_AC2,
85 MT7622_TXQ_FWDL = MT7615_TXQ_FWDL,
86 MT7622_TXQ_AC3,
87 MT7622_TXQ_MGMT,
88 MT7622_TXQ_MCU = 15,
89};
90
91struct mt7615_rate_set {
92 struct ieee80211_tx_rate probe_rate;
93 struct ieee80211_tx_rate rates[4];
94};
95
96struct mt7615_rate_desc {
97 bool rateset;
98 u16 probe_val;
99 u16 val[4];
100 u8 bw_idx;
101 u8 bw;
102};
103
104struct mt7615_wtbl_rate_desc {
105 struct list_head node;
106
107 struct mt7615_rate_desc rate;
108 struct mt7615_sta *sta;
109};
110
111struct mt7615_sta {
112 struct mt76_wcid wcid;
113
114 struct mt7615_vif *vif;
115
116 struct list_head poll_list;
117 u32 airtime_ac[8];
118
119 struct ieee80211_tx_rate rates[4];
120
121 struct mt7615_rate_set rateset[2];
122 u32 rate_set_tsf;
123
124 u8 rate_count;
125 u8 n_rates;
126
127 u8 rate_probe;
128};
129
130struct mt7615_vif {
131 struct mt76_vif mt76;
132 struct mt7615_sta sta;
133};
134
135struct mib_stats {
136 u16 ack_fail_cnt;
137 u16 fcs_err_cnt;
138 u16 rts_cnt;
139 u16 rts_retries_cnt;
140 u16 ba_miss_cnt;
141 unsigned long aggr_per;
142};
143
144struct mt7615_phy {
145 struct mt76_phy *mt76;
146 struct mt7615_dev *dev;
147
148 struct ieee80211_vif *monitor_vif;
149
150 u8 n_beacon_vif;
151
152 u32 rxfilter;
153 u64 omac_mask;
154
155 u16 noise;
156
157 bool scs_en;
158
159 unsigned long last_cca_adj;
160 int false_cca_ofdm, false_cca_cck;
161 s8 ofdm_sensitivity;
162 s8 cck_sensitivity;
163
164 s16 coverage_class;
165 u8 slottime;
166
167 u8 chfreq;
168 u8 rdd_state;
169 int dfs_state;
170
171 __le32 rx_ampdu_ts;
172 u32 ampdu_ref;
173
174 struct mib_stats mib;
175
176 struct sk_buff_head scan_event_list;
177 struct delayed_work scan_work;
178
179 struct work_struct roc_work;
180 struct timer_list roc_timer;
181 wait_queue_head_t roc_wait;
182 bool roc_grant;
183
184#ifdef CONFIG_NL80211_TESTMODE
185 struct {
186 u32 *reg_backup;
187
188 s16 last_freq_offset;
189 u8 last_rcpi[4];
190 s8 last_ib_rssi[4];
191 s8 last_wb_rssi[4];
192 } test;
193#endif
194};
195
196#define mt7615_mcu_add_tx_ba(dev, ...) (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__)
197#define mt7615_mcu_add_rx_ba(dev, ...) (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__)
198#define mt7615_mcu_sta_add(phy, ...) ((phy)->dev)->mcu_ops->sta_add((phy), __VA_ARGS__)
199#define mt7615_mcu_add_dev_info(phy, ...) ((phy)->dev)->mcu_ops->add_dev_info((phy), __VA_ARGS__)
200#define mt7615_mcu_add_bss_info(phy, ...) ((phy)->dev)->mcu_ops->add_bss_info((phy), __VA_ARGS__)
201#define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev), __VA_ARGS__)
202#define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev), __VA_ARGS__)
203#define mt7615_mcu_set_drv_ctrl(dev) (dev)->mcu_ops->set_drv_ctrl((dev))
204#define mt7615_mcu_set_fw_ctrl(dev) (dev)->mcu_ops->set_fw_ctrl((dev))
205struct mt7615_mcu_ops {
206 int (*add_tx_ba)(struct mt7615_dev *dev,
207 struct ieee80211_ampdu_params *params,
208 bool enable);
209 int (*add_rx_ba)(struct mt7615_dev *dev,
210 struct ieee80211_ampdu_params *params,
211 bool enable);
212 int (*sta_add)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
213 struct ieee80211_sta *sta, bool enable);
214 int (*add_dev_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
215 bool enable);
216 int (*add_bss_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
217 struct ieee80211_sta *sta, bool enable);
218 int (*add_beacon_offload)(struct mt7615_dev *dev,
219 struct ieee80211_hw *hw,
220 struct ieee80211_vif *vif, bool enable);
221 int (*set_pm_state)(struct mt7615_dev *dev, int band, int state);
222 int (*set_drv_ctrl)(struct mt7615_dev *dev);
223 int (*set_fw_ctrl)(struct mt7615_dev *dev);
224};
225
226struct mt7615_dev {
227 union {
228 struct mt76_dev mt76;
229 struct mt76_phy mphy;
230 };
231
232 const struct mt76_bus_ops *bus_ops;
233 struct tasklet_struct irq_tasklet;
234
235 struct mt7615_phy phy;
236 u64 omac_mask;
237
238 u16 chainmask;
239
240 struct ieee80211_ops *ops;
241 const struct mt7615_mcu_ops *mcu_ops;
242 struct regmap *infracfg;
243 const u32 *reg_map;
244
245 struct work_struct mcu_work;
246
247 struct work_struct reset_work;
248 wait_queue_head_t reset_wait;
249 u32 reset_state;
250
251 struct list_head sta_poll_list;
252 spinlock_t sta_poll_lock;
253
254 struct {
255 u8 n_pulses;
256 u32 period;
257 u16 width;
258 s16 power;
259 } radar_pattern;
260 u32 hw_pattern;
261
262 bool fw_debug;
263 bool flash_eeprom;
264 bool dbdc_support;
265
266 spinlock_t token_lock;
267 struct idr token;
268
269 u8 fw_ver;
270
271 struct work_struct rate_work;
272 struct list_head wrd_head;
273
274 u32 debugfs_rf_wf;
275 u32 debugfs_rf_reg;
276
277 u32 muar_mask;
278
279 struct mt76_connac_pm pm;
280 struct mt76_connac_coredump coredump;
281};
282
283enum tx_pkt_queue_idx {
284 MT_LMAC_AC00,
285 MT_LMAC_AC01,
286 MT_LMAC_AC02,
287 MT_LMAC_AC03,
288 MT_LMAC_ALTX0 = 0x10,
289 MT_LMAC_BMC0,
290 MT_LMAC_BCN0,
291 MT_LMAC_PSMP0,
292 MT_LMAC_ALTX1,
293 MT_LMAC_BMC1,
294 MT_LMAC_BCN1,
295 MT_LMAC_PSMP1,
296};
297
298enum {
299 MT_RX_SEL0,
300 MT_RX_SEL1,
301};
302
303enum mt7615_rdd_cmd {
304 RDD_STOP,
305 RDD_START,
306 RDD_DET_MODE,
307 RDD_DET_STOP,
308 RDD_CAC_START,
309 RDD_CAC_END,
310 RDD_NORMAL_START,
311 RDD_DISABLE_DFS_CAL,
312 RDD_PULSE_DBG,
313 RDD_READ_PULSE,
314 RDD_RESUME_BF,
315};
316
317static inline struct mt7615_phy *
318mt7615_hw_phy(struct ieee80211_hw *hw)
319{
320 struct mt76_phy *phy = hw->priv;
321
322 return phy->priv;
323}
324
325static inline struct mt7615_dev *
326mt7615_hw_dev(struct ieee80211_hw *hw)
327{
328 struct mt76_phy *phy = hw->priv;
329
330 return container_of(phy->dev, struct mt7615_dev, mt76);
331}
332
333static inline struct mt7615_phy *
334mt7615_ext_phy(struct mt7615_dev *dev)
335{
336 struct mt76_phy *phy = dev->mt76.phy2;
337
338 if (!phy)
339 return NULL;
340
341 return phy->priv;
342}
343
344extern struct ieee80211_rate mt7615_rates[12];
345extern const struct ieee80211_ops mt7615_ops;
346extern const u32 mt7615e_reg_map[__MT_BASE_MAX];
347extern const u32 mt7663e_reg_map[__MT_BASE_MAX];
348extern const u32 mt7663_usb_sdio_reg_map[__MT_BASE_MAX];
349extern struct pci_driver mt7615_pci_driver;
350extern struct platform_driver mt7622_wmac_driver;
351extern const struct mt76_testmode_ops mt7615_testmode_ops;
352
353#ifdef CONFIG_MT7622_WMAC
354int mt7622_wmac_init(struct mt7615_dev *dev);
355#else
356static inline int mt7622_wmac_init(struct mt7615_dev *dev)
357{
358 return 0;
359}
360#endif
361
362int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base,
363 int irq, const u32 *map);
364u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);
365
366void mt7615_init_device(struct mt7615_dev *dev);
367int mt7615_register_device(struct mt7615_dev *dev);
368void mt7615_unregister_device(struct mt7615_dev *dev);
369int mt7615_register_ext_phy(struct mt7615_dev *dev);
370void mt7615_unregister_ext_phy(struct mt7615_dev *dev);
371int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr);
372int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev,
373 struct ieee80211_channel *chan,
374 u8 chain_idx);
375int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev,
376 enum nl80211_band band);
377int mt7615_wait_pdma_busy(struct mt7615_dev *dev);
378int mt7615_dma_init(struct mt7615_dev *dev);
379void mt7615_dma_cleanup(struct mt7615_dev *dev);
380int mt7615_mcu_init(struct mt7615_dev *dev);
381bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev);
382void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
383 struct ieee80211_tx_rate *probe_rate,
384 struct ieee80211_tx_rate *rates);
385void mt7615_pm_wake_work(struct work_struct *work);
386void mt7615_pm_power_save_work(struct work_struct *work);
387int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev);
388int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd);
389int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue,
390 const struct ieee80211_tx_queue_params *params);
391void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb);
392int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev,
393 enum mt7615_rdd_cmd cmd, u8 index,
394 u8 rx_sel, u8 val);
395int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev);
396int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl);
397
398static inline bool is_mt7622(struct mt76_dev *dev)
399{
400 if (!IS_ENABLED(CONFIG_MT7622_WMAC))
401 return false;
402
403 return mt76_chip(dev) == 0x7622;
404}
405
406static inline bool is_mt7615(struct mt76_dev *dev)
407{
408 return mt76_chip(dev) == 0x7615 || mt76_chip(dev) == 0x7611;
409}
410
411static inline bool is_mt7663(struct mt76_dev *dev)
412{
413 return mt76_chip(dev) == 0x7663;
414}
415
416static inline bool is_mt7611(struct mt76_dev *dev)
417{
418 return mt76_chip(dev) == 0x7611;
419}
420
421static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask)
422{
423 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
424
425 tasklet_schedule(&dev->irq_tasklet);
426}
427
428static inline bool mt7615_firmware_offload(struct mt7615_dev *dev)
429{
430 return dev->fw_ver > MT7615_FIRMWARE_V2;
431}
432
433static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev)
434{
435 if (is_mt7663(&dev->mt76) && mt7615_firmware_offload(dev))
436 return MT7663_WTBL_SIZE;
437 else
438 return MT7615_WTBL_SIZE;
439}
440
441#define mt7615_mutex_acquire(dev) \
442 mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm)
443#define mt7615_mutex_release(dev) \
444 mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm)
445
446static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac)
447{
448 static const u8 lmac_queue_map[] = {
449 [IEEE80211_AC_BK] = MT_LMAC_AC00,
450 [IEEE80211_AC_BE] = MT_LMAC_AC01,
451 [IEEE80211_AC_VI] = MT_LMAC_AC02,
452 [IEEE80211_AC_VO] = MT_LMAC_AC03,
453 };
454
455 if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map)))
456 return MT_LMAC_AC01;
457
458 return lmac_queue_map[ac];
459}
460
461static inline u32 mt7615_tx_mcu_int_mask(struct mt7615_dev *dev)
462{
463 return MT_INT_TX_DONE(dev->mt76.q_mcu[MT_MCUQ_WM]->hw_idx);
464}
465
466void mt7615_dma_reset(struct mt7615_dev *dev);
467void mt7615_scan_work(struct work_struct *work);
468void mt7615_roc_work(struct work_struct *work);
469void mt7615_roc_timer(struct timer_list *timer);
470void mt7615_init_txpower(struct mt7615_dev *dev,
471 struct ieee80211_supported_band *sband);
472int mt7615_set_channel(struct mt7615_phy *phy);
473void mt7615_init_work(struct mt7615_dev *dev);
474
475int mt7615_mcu_restart(struct mt76_dev *dev);
476void mt7615_update_channel(struct mt76_dev *mdev);
477bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask);
478void mt7615_mac_reset_counters(struct mt7615_dev *dev);
479void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy);
480void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable);
481void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy);
482void mt7615_mac_sta_poll(struct mt7615_dev *dev);
483int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
484 struct sk_buff *skb, struct mt76_wcid *wcid,
485 struct ieee80211_sta *sta, int pid,
486 struct ieee80211_key_conf *key, bool beacon);
487void mt7615_mac_set_timing(struct mt7615_phy *phy);
488int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev,
489 struct mt76_wcid *wcid,
490 struct ieee80211_key_conf *key,
491 enum set_key_cmd cmd);
492int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
493 struct ieee80211_key_conf *key,
494 enum set_key_cmd cmd);
495void mt7615_mac_reset_work(struct work_struct *work);
496u32 mt7615_mac_get_sta_tid_sn(struct mt7615_dev *dev, int wcid, u8 tid);
497
498int mt7615_mcu_parse_response(struct mt76_dev *mdev, int cmd,
499 struct sk_buff *skb, int seq);
500u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg);
501int mt7615_rf_wr(struct mt7615_dev *dev, u32 wf, u32 reg, u32 val);
502int mt7615_mcu_set_dbdc(struct mt7615_dev *dev);
503int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);
504int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index);
505int mt7615_mcu_set_tx_power(struct mt7615_phy *phy);
506void mt7615_mcu_exit(struct mt7615_dev *dev);
507void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb,
508 int cmd, int *wait_seq);
509
510int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
511 enum mt76_txq_id qid, struct mt76_wcid *wcid,
512 struct ieee80211_sta *sta,
513 struct mt76_tx_info *tx_info);
514
515void mt7615_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
516void mt7615_tx_token_put(struct mt7615_dev *dev);
517void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
518 struct sk_buff *skb);
519void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
520int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
521 struct ieee80211_sta *sta);
522void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
523 struct ieee80211_sta *sta);
524void mt7615_mac_work(struct work_struct *work);
525void mt7615_txp_skb_unmap(struct mt76_dev *dev,
526 struct mt76_txwi_cache *txwi);
527int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val);
528int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev,
529 const struct mt7615_dfs_pulse *pulse);
530int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index,
531 const struct mt7615_dfs_pattern *pattern);
532int mt7615_mcu_set_test_param(struct mt7615_dev *dev, u8 param, bool test_mode,
533 u32 val);
534int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable);
535int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy);
536int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy);
537int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy);
538
539int mt7615_mcu_set_p2p_oppps(struct ieee80211_hw *hw,
540 struct ieee80211_vif *vif);
541int mt7615_mcu_set_roc(struct mt7615_phy *phy, struct ieee80211_vif *vif,
542 struct ieee80211_channel *chan, int duration);
543
544int mt7615_init_debugfs(struct mt7615_dev *dev);
545int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq);
546
547int mt7615_mac_set_beacon_filter(struct mt7615_phy *phy,
548 struct ieee80211_vif *vif,
549 bool enable);
550int mt7615_mcu_set_bss_pm(struct mt7615_dev *dev, struct ieee80211_vif *vif,
551 bool enable);
552int mt7615_mcu_update_arp_filter(struct ieee80211_hw *hw,
553 struct ieee80211_vif *vif,
554 struct ieee80211_bss_conf *info);
555int __mt7663_load_firmware(struct mt7615_dev *dev);
556u32 mt7615_mcu_reg_rr(struct mt76_dev *dev, u32 offset);
557void mt7615_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val);
558void mt7615_coredump_work(struct work_struct *work);
559
560
561int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
562 enum mt76_txq_id qid, struct mt76_wcid *wcid,
563 struct ieee80211_sta *sta,
564 struct mt76_tx_info *tx_info);
565bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update);
566void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
567 struct mt76_queue_entry *e);
568int mt7663_usb_sdio_register_device(struct mt7615_dev *dev);
569int mt7663u_mcu_init(struct mt7615_dev *dev);
570
571
572u32 mt7663s_read_pcr(struct mt7615_dev *dev);
573int mt7663s_mcu_init(struct mt7615_dev *dev);
574void mt7663s_txrx_worker(struct mt76_worker *w);
575void mt7663s_rx_work(struct work_struct *work);
576void mt7663s_sdio_irq(struct sdio_func *func);
577
578#endif
579
