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7#include <linux/module.h>
8#include "mt76x02.h"
9
10#define CCK_RATE(_idx, _rate) { \
11 .bitrate = _rate, \
12 .flags = IEEE80211_RATE_SHORT_PREAMBLE, \
13 .hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \
14 .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (8 + (_idx)), \
15}
16
17#define OFDM_RATE(_idx, _rate) { \
18 .bitrate = _rate, \
19 .hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
20 .hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
21}
22
23struct ieee80211_rate mt76x02_rates[] = {
24 CCK_RATE(0, 10),
25 CCK_RATE(1, 20),
26 CCK_RATE(2, 55),
27 CCK_RATE(3, 110),
28 OFDM_RATE(0, 60),
29 OFDM_RATE(1, 90),
30 OFDM_RATE(2, 120),
31 OFDM_RATE(3, 180),
32 OFDM_RATE(4, 240),
33 OFDM_RATE(5, 360),
34 OFDM_RATE(6, 480),
35 OFDM_RATE(7, 540),
36};
37EXPORT_SYMBOL_GPL(mt76x02_rates);
38
39static const struct ieee80211_iface_limit mt76x02_if_limits[] = {
40 {
41 .max = 1,
42 .types = BIT(NL80211_IFTYPE_ADHOC)
43 }, {
44 .max = 8,
45 .types = BIT(NL80211_IFTYPE_STATION) |
46#ifdef CONFIG_MAC80211_MESH
47 BIT(NL80211_IFTYPE_MESH_POINT) |
48#endif
49 BIT(NL80211_IFTYPE_P2P_CLIENT) |
50 BIT(NL80211_IFTYPE_P2P_GO) |
51 BIT(NL80211_IFTYPE_AP)
52 },
53};
54
55static const struct ieee80211_iface_limit mt76x02u_if_limits[] = {
56 {
57 .max = 1,
58 .types = BIT(NL80211_IFTYPE_ADHOC)
59 }, {
60 .max = 2,
61 .types = BIT(NL80211_IFTYPE_STATION) |
62#ifdef CONFIG_MAC80211_MESH
63 BIT(NL80211_IFTYPE_MESH_POINT) |
64#endif
65 BIT(NL80211_IFTYPE_P2P_CLIENT) |
66 BIT(NL80211_IFTYPE_P2P_GO) |
67 BIT(NL80211_IFTYPE_AP)
68 },
69};
70
71static const struct ieee80211_iface_combination mt76x02_if_comb[] = {
72 {
73 .limits = mt76x02_if_limits,
74 .n_limits = ARRAY_SIZE(mt76x02_if_limits),
75 .max_interfaces = 8,
76 .num_different_channels = 1,
77 .beacon_int_infra_match = true,
78 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
79 BIT(NL80211_CHAN_WIDTH_20) |
80 BIT(NL80211_CHAN_WIDTH_40) |
81 BIT(NL80211_CHAN_WIDTH_80),
82 }
83};
84
85static const struct ieee80211_iface_combination mt76x02u_if_comb[] = {
86 {
87 .limits = mt76x02u_if_limits,
88 .n_limits = ARRAY_SIZE(mt76x02u_if_limits),
89 .max_interfaces = 2,
90 .num_different_channels = 1,
91 .beacon_int_infra_match = true,
92 }
93};
94
95static void
96mt76x02_led_set_config(struct mt76_dev *mdev, u8 delay_on,
97 u8 delay_off)
98{
99 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev,
100 mt76);
101 u32 val;
102
103 val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xff) |
104 FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |
105 FIELD_PREP(MT_LED_STATUS_ON, delay_on);
106
107 mt76_wr(dev, MT_LED_S0(mdev->led_pin), val);
108 mt76_wr(dev, MT_LED_S1(mdev->led_pin), val);
109
110 val = MT_LED_CTRL_REPLAY(mdev->led_pin) |
111 MT_LED_CTRL_KICK(mdev->led_pin);
112 if (mdev->led_al)
113 val |= MT_LED_CTRL_POLARITY(mdev->led_pin);
114 mt76_wr(dev, MT_LED_CTRL, val);
115}
116
117static int
118mt76x02_led_set_blink(struct led_classdev *led_cdev,
119 unsigned long *delay_on,
120 unsigned long *delay_off)
121{
122 struct mt76_dev *mdev = container_of(led_cdev, struct mt76_dev,
123 led_cdev);
124 u8 delta_on, delta_off;
125
126 delta_off = max_t(u8, *delay_off / 10, 1);
127 delta_on = max_t(u8, *delay_on / 10, 1);
128
129 mt76x02_led_set_config(mdev, delta_on, delta_off);
130
131 return 0;
132}
133
134static void
135mt76x02_led_set_brightness(struct led_classdev *led_cdev,
136 enum led_brightness brightness)
137{
138 struct mt76_dev *mdev = container_of(led_cdev, struct mt76_dev,
139 led_cdev);
140
141 if (!brightness)
142 mt76x02_led_set_config(mdev, 0, 0xff);
143 else
144 mt76x02_led_set_config(mdev, 0xff, 0);
145}
146
147void mt76x02_init_device(struct mt76x02_dev *dev)
148{
149 struct ieee80211_hw *hw = mt76_hw(dev);
150 struct wiphy *wiphy = hw->wiphy;
151
152 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt76x02_mac_work);
153
154 hw->queues = 4;
155 hw->max_rates = 1;
156 hw->max_report_rates = 7;
157 hw->max_rate_tries = 1;
158 hw->extra_tx_headroom = 2;
159
160 if (mt76_is_usb(&dev->mt76)) {
161 hw->extra_tx_headroom += sizeof(struct mt76x02_txwi) +
162 MT_DMA_HDR_LEN;
163 wiphy->iface_combinations = mt76x02u_if_comb;
164 wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02u_if_comb);
165 } else {
166 INIT_DELAYED_WORK(&dev->wdt_work, mt76x02_wdt_work);
167
168 mt76x02_dfs_init_detector(dev);
169
170 wiphy->reg_notifier = mt76x02_regd_notifier;
171 wiphy->iface_combinations = mt76x02_if_comb;
172 wiphy->n_iface_combinations = ARRAY_SIZE(mt76x02_if_comb);
173
174
175 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
176 dev->mt76.led_cdev.brightness_set =
177 mt76x02_led_set_brightness;
178 dev->mt76.led_cdev.blink_set = mt76x02_led_set_blink;
179 }
180 }
181
182 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
183
184 hw->sta_data_size = sizeof(struct mt76x02_sta);
185 hw->vif_data_size = sizeof(struct mt76x02_vif);
186
187 ieee80211_hw_set(hw, SUPPORTS_HT_CCK_RATES);
188 ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
189 ieee80211_hw_set(hw, NEEDS_UNIQUE_STA_ADDR);
190
191 dev->mt76.global_wcid.idx = 255;
192 dev->mt76.global_wcid.hw_key_idx = -1;
193 dev->slottime = 9;
194
195 if (is_mt76x2(dev)) {
196 dev->mphy.sband_2g.sband.ht_cap.cap |=
197 IEEE80211_HT_CAP_LDPC_CODING;
198 dev->mphy.sband_5g.sband.ht_cap.cap |=
199 IEEE80211_HT_CAP_LDPC_CODING;
200 dev->mphy.chainmask = 0x202;
201 dev->mphy.antenna_mask = 3;
202 } else {
203 dev->mphy.chainmask = 0x101;
204 dev->mphy.antenna_mask = 1;
205 }
206}
207EXPORT_SYMBOL_GPL(mt76x02_init_device);
208
209void mt76x02_configure_filter(struct ieee80211_hw *hw,
210 unsigned int changed_flags,
211 unsigned int *total_flags, u64 multicast)
212{
213 struct mt76x02_dev *dev = hw->priv;
214 u32 flags = 0;
215
216#define MT76_FILTER(_flag, _hw) do { \
217 flags |= *total_flags & FIF_##_flag; \
218 dev->mt76.rxfilter &= ~(_hw); \
219 dev->mt76.rxfilter |= !(flags & FIF_##_flag) * (_hw); \
220 } while (0)
221
222 mutex_lock(&dev->mt76.mutex);
223
224 dev->mt76.rxfilter &= ~MT_RX_FILTR_CFG_OTHER_BSS;
225
226 MT76_FILTER(FCSFAIL, MT_RX_FILTR_CFG_CRC_ERR);
227 MT76_FILTER(PLCPFAIL, MT_RX_FILTR_CFG_PHY_ERR);
228 MT76_FILTER(CONTROL, MT_RX_FILTR_CFG_ACK |
229 MT_RX_FILTR_CFG_CTS |
230 MT_RX_FILTR_CFG_CFEND |
231 MT_RX_FILTR_CFG_CFACK |
232 MT_RX_FILTR_CFG_BA |
233 MT_RX_FILTR_CFG_CTRL_RSV);
234 MT76_FILTER(PSPOLL, MT_RX_FILTR_CFG_PSPOLL);
235
236 *total_flags = flags;
237 mt76_wr(dev, MT_RX_FILTR_CFG, dev->mt76.rxfilter);
238
239 mutex_unlock(&dev->mt76.mutex);
240}
241EXPORT_SYMBOL_GPL(mt76x02_configure_filter);
242
243int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
244 struct ieee80211_sta *sta)
245{
246 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
247 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
248 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
249 int idx = 0;
250
251 memset(msta, 0, sizeof(*msta));
252
253 idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT76x02_N_WCIDS);
254 if (idx < 0)
255 return -ENOSPC;
256
257 msta->vif = mvif;
258 msta->wcid.sta = 1;
259 msta->wcid.idx = idx;
260 msta->wcid.hw_key_idx = -1;
261 mt76x02_mac_wcid_setup(dev, idx, mvif->idx, sta->addr);
262 mt76x02_mac_wcid_set_drop(dev, idx, false);
263 ewma_pktlen_init(&msta->pktlen);
264
265 if (vif->type == NL80211_IFTYPE_AP)
266 set_bit(MT_WCID_FLAG_CHECK_PS, &msta->wcid.flags);
267
268 return 0;
269}
270EXPORT_SYMBOL_GPL(mt76x02_sta_add);
271
272void mt76x02_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
273 struct ieee80211_sta *sta)
274{
275 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
276 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;
277 int idx = wcid->idx;
278
279 mt76x02_mac_wcid_set_drop(dev, idx, true);
280 mt76x02_mac_wcid_setup(dev, idx, 0, NULL);
281}
282EXPORT_SYMBOL_GPL(mt76x02_sta_remove);
283
284static void
285mt76x02_vif_init(struct mt76x02_dev *dev, struct ieee80211_vif *vif,
286 unsigned int idx)
287{
288 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
289 struct mt76_txq *mtxq;
290
291 memset(mvif, 0, sizeof(*mvif));
292
293 mvif->idx = idx;
294 mvif->group_wcid.idx = MT_VIF_WCID(idx);
295 mvif->group_wcid.hw_key_idx = -1;
296 mtxq = (struct mt76_txq *)vif->txq->drv_priv;
297 mtxq->wcid = &mvif->group_wcid;
298}
299
300int
301mt76x02_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
302{
303 struct mt76x02_dev *dev = hw->priv;
304 unsigned int idx = 0;
305
306
307 if (!dev->mt76.vif_mask &&
308 (((vif->addr[0] ^ dev->mphy.macaddr[0]) & ~GENMASK(4, 1)) ||
309 memcmp(vif->addr + 1, dev->mphy.macaddr + 1, ETH_ALEN - 1)))
310 mt76x02_mac_setaddr(dev, vif->addr);
311
312 if (vif->addr[0] & BIT(1))
313 idx = 1 + (((dev->mphy.macaddr[0] ^ vif->addr[0]) >> 2) & 7);
314
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323
324
325
326
327
328 if (vif->type == NL80211_IFTYPE_STATION)
329 idx += 8;
330
331
332 if (dev->mt76.vif_mask & BIT(idx) ||
333 (vif->type != NL80211_IFTYPE_STATION && idx > 7))
334 return -EBUSY;
335
336 dev->mt76.vif_mask |= BIT(idx);
337
338 mt76x02_vif_init(dev, vif, idx);
339 return 0;
340}
341EXPORT_SYMBOL_GPL(mt76x02_add_interface);
342
343void mt76x02_remove_interface(struct ieee80211_hw *hw,
344 struct ieee80211_vif *vif)
345{
346 struct mt76x02_dev *dev = hw->priv;
347 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
348
349 dev->mt76.vif_mask &= ~BIT(mvif->idx);
350}
351EXPORT_SYMBOL_GPL(mt76x02_remove_interface);
352
353int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
354 struct ieee80211_ampdu_params *params)
355{
356 enum ieee80211_ampdu_mlme_action action = params->action;
357 struct ieee80211_sta *sta = params->sta;
358 struct mt76x02_dev *dev = hw->priv;
359 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
360 struct ieee80211_txq *txq = sta->txq[params->tid];
361 u16 tid = params->tid;
362 u16 ssn = params->ssn;
363 struct mt76_txq *mtxq;
364 int ret = 0;
365
366 if (!txq)
367 return -EINVAL;
368
369 mtxq = (struct mt76_txq *)txq->drv_priv;
370
371 mutex_lock(&dev->mt76.mutex);
372 switch (action) {
373 case IEEE80211_AMPDU_RX_START:
374 mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid,
375 ssn, params->buf_size);
376 mt76_set(dev, MT_WCID_ADDR(msta->wcid.idx) + 4, BIT(16 + tid));
377 break;
378 case IEEE80211_AMPDU_RX_STOP:
379 mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
380 mt76_clear(dev, MT_WCID_ADDR(msta->wcid.idx) + 4,
381 BIT(16 + tid));
382 break;
383 case IEEE80211_AMPDU_TX_OPERATIONAL:
384 mtxq->aggr = true;
385 mtxq->send_bar = false;
386 ieee80211_send_bar(vif, sta->addr, tid, mtxq->agg_ssn);
387 break;
388 case IEEE80211_AMPDU_TX_STOP_FLUSH:
389 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
390 mtxq->aggr = false;
391 break;
392 case IEEE80211_AMPDU_TX_START:
393 mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn);
394 ret = IEEE80211_AMPDU_TX_START_IMMEDIATE;
395 break;
396 case IEEE80211_AMPDU_TX_STOP_CONT:
397 mtxq->aggr = false;
398 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
399 break;
400 }
401 mutex_unlock(&dev->mt76.mutex);
402
403 return ret;
404}
405EXPORT_SYMBOL_GPL(mt76x02_ampdu_action);
406
407int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
408 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
409 struct ieee80211_key_conf *key)
410{
411 struct mt76x02_dev *dev = hw->priv;
412 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
413 struct mt76x02_sta *msta;
414 struct mt76_wcid *wcid;
415 int idx = key->keyidx;
416 int ret;
417
418
419 switch (key->cipher) {
420 case WLAN_CIPHER_SUITE_WEP40:
421 case WLAN_CIPHER_SUITE_WEP104:
422 case WLAN_CIPHER_SUITE_TKIP:
423 case WLAN_CIPHER_SUITE_CCMP:
424 break;
425 default:
426 return -EOPNOTSUPP;
427 }
428
429
430
431
432
433 if ((vif->type == NL80211_IFTYPE_ADHOC ||
434 vif->type == NL80211_IFTYPE_MESH_POINT) &&
435 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
436 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
437 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
438 return -EOPNOTSUPP;
439
440
441
442
443
444
445 if (mt76_is_usb(&dev->mt76) &&
446 vif->type == NL80211_IFTYPE_AP &&
447 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
448 return -EOPNOTSUPP;
449
450 msta = sta ? (struct mt76x02_sta *)sta->drv_priv : NULL;
451 wcid = msta ? &msta->wcid : &mvif->group_wcid;
452
453 if (cmd == SET_KEY) {
454 key->hw_key_idx = wcid->idx;
455 wcid->hw_key_idx = idx;
456 if (key->flags & IEEE80211_KEY_FLAG_RX_MGMT) {
457 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
458 wcid->sw_iv = true;
459 }
460 } else {
461 if (idx == wcid->hw_key_idx) {
462 wcid->hw_key_idx = -1;
463 wcid->sw_iv = false;
464 }
465
466 key = NULL;
467 }
468 mt76_wcid_key_setup(&dev->mt76, wcid, key);
469
470 if (!msta) {
471 if (key || wcid->hw_key_idx == idx) {
472 ret = mt76x02_mac_wcid_set_key(dev, wcid->idx, key);
473 if (ret)
474 return ret;
475 }
476
477 return mt76x02_mac_shared_key_setup(dev, mvif->idx, idx, key);
478 }
479
480 return mt76x02_mac_wcid_set_key(dev, msta->wcid.idx, key);
481}
482EXPORT_SYMBOL_GPL(mt76x02_set_key);
483
484int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
485 u16 queue, const struct ieee80211_tx_queue_params *params)
486{
487 struct mt76x02_dev *dev = hw->priv;
488 u8 cw_min = 5, cw_max = 10, qid;
489 u32 val;
490
491 qid = dev->mphy.q_tx[queue]->hw_idx;
492
493 if (params->cw_min)
494 cw_min = fls(params->cw_min);
495 if (params->cw_max)
496 cw_max = fls(params->cw_max);
497
498 val = FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop) |
499 FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) |
500 FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) |
501 FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max);
502 mt76_wr(dev, MT_EDCA_CFG_AC(qid), val);
503
504 val = mt76_rr(dev, MT_WMM_TXOP(qid));
505 val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(qid));
506 val |= params->txop << MT_WMM_TXOP_SHIFT(qid);
507 mt76_wr(dev, MT_WMM_TXOP(qid), val);
508
509 val = mt76_rr(dev, MT_WMM_AIFSN);
510 val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(qid));
511 val |= params->aifs << MT_WMM_AIFSN_SHIFT(qid);
512 mt76_wr(dev, MT_WMM_AIFSN, val);
513
514 val = mt76_rr(dev, MT_WMM_CWMIN);
515 val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(qid));
516 val |= cw_min << MT_WMM_CWMIN_SHIFT(qid);
517 mt76_wr(dev, MT_WMM_CWMIN, val);
518
519 val = mt76_rr(dev, MT_WMM_CWMAX);
520 val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(qid));
521 val |= cw_max << MT_WMM_CWMAX_SHIFT(qid);
522 mt76_wr(dev, MT_WMM_CWMAX, val);
523
524 return 0;
525}
526EXPORT_SYMBOL_GPL(mt76x02_conf_tx);
527
528void mt76x02_set_tx_ackto(struct mt76x02_dev *dev)
529{
530 u8 ackto, sifs, slottime = dev->slottime;
531
532
533 slottime += 3 * dev->coverage_class;
534 mt76_rmw_field(dev, MT_BKOFF_SLOT_CFG,
535 MT_BKOFF_SLOT_CFG_SLOTTIME, slottime);
536
537 sifs = mt76_get_field(dev, MT_XIFS_TIME_CFG,
538 MT_XIFS_TIME_CFG_OFDM_SIFS);
539
540 ackto = slottime + sifs;
541 mt76_rmw_field(dev, MT_TX_TIMEOUT_CFG,
542 MT_TX_TIMEOUT_CFG_ACKTO, ackto);
543}
544EXPORT_SYMBOL_GPL(mt76x02_set_tx_ackto);
545
546void mt76x02_set_coverage_class(struct ieee80211_hw *hw,
547 s16 coverage_class)
548{
549 struct mt76x02_dev *dev = hw->priv;
550
551 mutex_lock(&dev->mt76.mutex);
552 dev->coverage_class = max_t(s16, coverage_class, 0);
553 mt76x02_set_tx_ackto(dev);
554 mutex_unlock(&dev->mt76.mutex);
555}
556EXPORT_SYMBOL_GPL(mt76x02_set_coverage_class);
557
558int mt76x02_set_rts_threshold(struct ieee80211_hw *hw, u32 val)
559{
560 struct mt76x02_dev *dev = hw->priv;
561
562 if (val != ~0 && val > 0xffff)
563 return -EINVAL;
564
565 mutex_lock(&dev->mt76.mutex);
566 mt76x02_mac_set_rts_thresh(dev, val);
567 mutex_unlock(&dev->mt76.mutex);
568
569 return 0;
570}
571EXPORT_SYMBOL_GPL(mt76x02_set_rts_threshold);
572
573void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw,
574 struct ieee80211_vif *vif,
575 struct ieee80211_sta *sta)
576{
577 struct mt76x02_dev *dev = hw->priv;
578 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
579 struct ieee80211_sta_rates *rates = rcu_dereference(sta->rates);
580 struct ieee80211_tx_rate rate = {};
581
582 if (!rates)
583 return;
584
585 rate.idx = rates->rate[0].idx;
586 rate.flags = rates->rate[0].flags;
587 mt76x02_mac_wcid_set_rate(dev, &msta->wcid, &rate);
588}
589EXPORT_SYMBOL_GPL(mt76x02_sta_rate_tbl_update);
590
591void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len)
592{
593 int hdrlen;
594
595 if (!len)
596 return;
597
598 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
599 memmove(skb->data + len, skb->data, hdrlen);
600 skb_pull(skb, len);
601}
602EXPORT_SYMBOL_GPL(mt76x02_remove_hdr_pad);
603
604void mt76x02_sw_scan_complete(struct ieee80211_hw *hw,
605 struct ieee80211_vif *vif)
606{
607 struct mt76x02_dev *dev = hw->priv;
608
609 clear_bit(MT76_SCANNING, &dev->mphy.state);
610 if (dev->cal.gain_init_done) {
611
612 dev->cal.low_gain = -1;
613 ieee80211_queue_delayed_work(hw, &dev->cal_work, 0);
614 }
615}
616EXPORT_SYMBOL_GPL(mt76x02_sw_scan_complete);
617
618void mt76x02_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta,
619 bool ps)
620{
621 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
622 struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
623 int idx = msta->wcid.idx;
624
625 mt76_stop_tx_queues(&dev->mphy, sta, true);
626 if (mt76_is_mmio(mdev))
627 mt76x02_mac_wcid_set_drop(dev, idx, ps);
628}
629EXPORT_SYMBOL_GPL(mt76x02_sta_ps);
630
631void mt76x02_bss_info_changed(struct ieee80211_hw *hw,
632 struct ieee80211_vif *vif,
633 struct ieee80211_bss_conf *info,
634 u32 changed)
635{
636 struct mt76x02_vif *mvif = (struct mt76x02_vif *)vif->drv_priv;
637 struct mt76x02_dev *dev = hw->priv;
638
639 mutex_lock(&dev->mt76.mutex);
640
641 if (changed & BSS_CHANGED_BSSID)
642 mt76x02_mac_set_bssid(dev, mvif->idx, info->bssid);
643
644 if (changed & BSS_CHANGED_HT || changed & BSS_CHANGED_ERP_CTS_PROT)
645 mt76x02_mac_set_tx_protection(dev, info->use_cts_prot,
646 info->ht_operation_mode);
647
648 if (changed & BSS_CHANGED_BEACON_INT) {
649 mt76_rmw_field(dev, MT_BEACON_TIME_CFG,
650 MT_BEACON_TIME_CFG_INTVAL,
651 info->beacon_int << 4);
652 dev->mt76.beacon_int = info->beacon_int;
653 }
654
655 if (changed & BSS_CHANGED_BEACON_ENABLED)
656 mt76x02_mac_set_beacon_enable(dev, vif, info->enable_beacon);
657
658 if (changed & BSS_CHANGED_ERP_PREAMBLE)
659 mt76x02_mac_set_short_preamble(dev, info->use_short_preamble);
660
661 if (changed & BSS_CHANGED_ERP_SLOT) {
662 int slottime = info->use_short_slot ? 9 : 20;
663
664 dev->slottime = slottime;
665 mt76x02_set_tx_ackto(dev);
666 }
667
668 mutex_unlock(&dev->mt76.mutex);
669}
670EXPORT_SYMBOL_GPL(mt76x02_bss_info_changed);
671
672void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev)
673{
674 struct ieee80211_hw *hw = mt76_hw(dev);
675 struct wiphy *wiphy = hw->wiphy;
676 int i;
677
678 for (i = 0; i < ARRAY_SIZE(dev->macaddr_list); i++) {
679 u8 *addr = dev->macaddr_list[i].addr;
680
681 memcpy(addr, dev->mphy.macaddr, ETH_ALEN);
682
683 if (!i)
684 continue;
685
686 addr[0] |= BIT(1);
687 addr[0] ^= ((i - 1) << 2);
688 }
689 wiphy->addresses = dev->macaddr_list;
690 wiphy->n_addresses = ARRAY_SIZE(dev->macaddr_list);
691}
692EXPORT_SYMBOL_GPL(mt76x02_config_mac_addr_list);
693
694MODULE_LICENSE("Dual BSD/GPL");
695
