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9#ifndef _PINCTRL_AMD_H
10#define _PINCTRL_AMD_H
11
12#define AMD_GPIO_PINS_PER_BANK 64
13
14#define AMD_GPIO_PINS_BANK0 63
15#define AMD_GPIO_PINS_BANK1 64
16#define AMD_GPIO_PINS_BANK2 56
17#define AMD_GPIO_PINS_BANK3 32
18
19#define WAKE_INT_MASTER_REG 0xfc
20#define EOI_MASK (1 << 29)
21
22#define WAKE_INT_STATUS_REG0 0x2f8
23#define WAKE_INT_STATUS_REG1 0x2fc
24
25#define DB_TMR_OUT_OFF 0
26#define DB_TMR_OUT_UNIT_OFF 4
27#define DB_CNTRL_OFF 5
28#define DB_TMR_LARGE_OFF 7
29#define LEVEL_TRIG_OFF 8
30#define ACTIVE_LEVEL_OFF 9
31#define INTERRUPT_ENABLE_OFF 11
32#define INTERRUPT_MASK_OFF 12
33#define WAKE_CNTRL_OFF_S0I3 13
34#define WAKE_CNTRL_OFF_S3 14
35#define WAKE_CNTRL_OFF_S4 15
36#define PIN_STS_OFF 16
37#define DRV_STRENGTH_SEL_OFF 17
38#define PULL_UP_SEL_OFF 19
39#define PULL_UP_ENABLE_OFF 20
40#define PULL_DOWN_ENABLE_OFF 21
41#define OUTPUT_VALUE_OFF 22
42#define OUTPUT_ENABLE_OFF 23
43#define SW_CNTRL_IN_OFF 24
44#define SW_CNTRL_EN_OFF 25
45#define INTERRUPT_STS_OFF 28
46#define WAKE_STS_OFF 29
47
48#define DB_TMR_OUT_MASK 0xFUL
49#define DB_CNTRl_MASK 0x3UL
50#define ACTIVE_LEVEL_MASK 0x3UL
51#define DRV_STRENGTH_SEL_MASK 0x3UL
52
53#define ACTIVE_LEVEL_HIGH 0x0UL
54#define ACTIVE_LEVEL_LOW 0x1UL
55#define ACTIVE_LEVEL_BOTH 0x2UL
56
57#define DB_TYPE_NO_DEBOUNCE 0x0UL
58#define DB_TYPE_PRESERVE_LOW_GLITCH 0x1UL
59#define DB_TYPE_PRESERVE_HIGH_GLITCH 0x2UL
60#define DB_TYPE_REMOVE_GLITCH 0x3UL
61
62#define EDGE_TRAGGER 0x0UL
63#define LEVEL_TRIGGER 0x1UL
64
65#define ACTIVE_HIGH 0x0UL
66#define ACTIVE_LOW 0x1UL
67#define BOTH_EADGE 0x2UL
68
69#define ENABLE_INTERRUPT 0x1UL
70#define DISABLE_INTERRUPT 0x0UL
71
72#define ENABLE_INTERRUPT_MASK 0x0UL
73#define DISABLE_INTERRUPT_MASK 0x1UL
74
75#define CLR_INTR_STAT 0x1UL
76
77struct amd_pingroup {
78 const char *name;
79 const unsigned *pins;
80 unsigned npins;
81};
82
83struct amd_function {
84 const char *name;
85 const char * const *groups;
86 unsigned ngroups;
87};
88
89struct amd_gpio {
90 raw_spinlock_t lock;
91 void __iomem *base;
92
93 const struct amd_pingroup *groups;
94 u32 ngroups;
95 struct pinctrl_dev *pctrl;
96 struct gpio_chip gc;
97 unsigned int hwbank_num;
98 struct resource *res;
99 struct platform_device *pdev;
100 u32 *saved_regs;
101};
102
103
104static const struct pinctrl_pin_desc kerncz_pins[] = {
105 PINCTRL_PIN(0, "GPIO_0"),
106 PINCTRL_PIN(1, "GPIO_1"),
107 PINCTRL_PIN(2, "GPIO_2"),
108 PINCTRL_PIN(3, "GPIO_3"),
109 PINCTRL_PIN(4, "GPIO_4"),
110 PINCTRL_PIN(5, "GPIO_5"),
111 PINCTRL_PIN(6, "GPIO_6"),
112 PINCTRL_PIN(7, "GPIO_7"),
113 PINCTRL_PIN(8, "GPIO_8"),
114 PINCTRL_PIN(9, "GPIO_9"),
115 PINCTRL_PIN(10, "GPIO_10"),
116 PINCTRL_PIN(11, "GPIO_11"),
117 PINCTRL_PIN(12, "GPIO_12"),
118 PINCTRL_PIN(13, "GPIO_13"),
119 PINCTRL_PIN(14, "GPIO_14"),
120 PINCTRL_PIN(15, "GPIO_15"),
121 PINCTRL_PIN(16, "GPIO_16"),
122 PINCTRL_PIN(17, "GPIO_17"),
123 PINCTRL_PIN(18, "GPIO_18"),
124 PINCTRL_PIN(19, "GPIO_19"),
125 PINCTRL_PIN(20, "GPIO_20"),
126 PINCTRL_PIN(21, "GPIO_21"),
127 PINCTRL_PIN(22, "GPIO_22"),
128 PINCTRL_PIN(23, "GPIO_23"),
129 PINCTRL_PIN(24, "GPIO_24"),
130 PINCTRL_PIN(25, "GPIO_25"),
131 PINCTRL_PIN(26, "GPIO_26"),
132 PINCTRL_PIN(27, "GPIO_27"),
133 PINCTRL_PIN(28, "GPIO_28"),
134 PINCTRL_PIN(29, "GPIO_29"),
135 PINCTRL_PIN(30, "GPIO_30"),
136 PINCTRL_PIN(31, "GPIO_31"),
137 PINCTRL_PIN(32, "GPIO_32"),
138 PINCTRL_PIN(33, "GPIO_33"),
139 PINCTRL_PIN(34, "GPIO_34"),
140 PINCTRL_PIN(35, "GPIO_35"),
141 PINCTRL_PIN(36, "GPIO_36"),
142 PINCTRL_PIN(37, "GPIO_37"),
143 PINCTRL_PIN(38, "GPIO_38"),
144 PINCTRL_PIN(39, "GPIO_39"),
145 PINCTRL_PIN(40, "GPIO_40"),
146 PINCTRL_PIN(41, "GPIO_41"),
147 PINCTRL_PIN(42, "GPIO_42"),
148 PINCTRL_PIN(43, "GPIO_43"),
149 PINCTRL_PIN(44, "GPIO_44"),
150 PINCTRL_PIN(45, "GPIO_45"),
151 PINCTRL_PIN(46, "GPIO_46"),
152 PINCTRL_PIN(47, "GPIO_47"),
153 PINCTRL_PIN(48, "GPIO_48"),
154 PINCTRL_PIN(49, "GPIO_49"),
155 PINCTRL_PIN(50, "GPIO_50"),
156 PINCTRL_PIN(51, "GPIO_51"),
157 PINCTRL_PIN(52, "GPIO_52"),
158 PINCTRL_PIN(53, "GPIO_53"),
159 PINCTRL_PIN(54, "GPIO_54"),
160 PINCTRL_PIN(55, "GPIO_55"),
161 PINCTRL_PIN(56, "GPIO_56"),
162 PINCTRL_PIN(57, "GPIO_57"),
163 PINCTRL_PIN(58, "GPIO_58"),
164 PINCTRL_PIN(59, "GPIO_59"),
165 PINCTRL_PIN(60, "GPIO_60"),
166 PINCTRL_PIN(61, "GPIO_61"),
167 PINCTRL_PIN(62, "GPIO_62"),
168 PINCTRL_PIN(64, "GPIO_64"),
169 PINCTRL_PIN(65, "GPIO_65"),
170 PINCTRL_PIN(66, "GPIO_66"),
171 PINCTRL_PIN(67, "GPIO_67"),
172 PINCTRL_PIN(68, "GPIO_68"),
173 PINCTRL_PIN(69, "GPIO_69"),
174 PINCTRL_PIN(70, "GPIO_70"),
175 PINCTRL_PIN(71, "GPIO_71"),
176 PINCTRL_PIN(72, "GPIO_72"),
177 PINCTRL_PIN(73, "GPIO_73"),
178 PINCTRL_PIN(74, "GPIO_74"),
179 PINCTRL_PIN(75, "GPIO_75"),
180 PINCTRL_PIN(76, "GPIO_76"),
181 PINCTRL_PIN(77, "GPIO_77"),
182 PINCTRL_PIN(78, "GPIO_78"),
183 PINCTRL_PIN(79, "GPIO_79"),
184 PINCTRL_PIN(80, "GPIO_80"),
185 PINCTRL_PIN(81, "GPIO_81"),
186 PINCTRL_PIN(82, "GPIO_82"),
187 PINCTRL_PIN(83, "GPIO_83"),
188 PINCTRL_PIN(84, "GPIO_84"),
189 PINCTRL_PIN(85, "GPIO_85"),
190 PINCTRL_PIN(86, "GPIO_86"),
191 PINCTRL_PIN(87, "GPIO_87"),
192 PINCTRL_PIN(88, "GPIO_88"),
193 PINCTRL_PIN(89, "GPIO_89"),
194 PINCTRL_PIN(90, "GPIO_90"),
195 PINCTRL_PIN(91, "GPIO_91"),
196 PINCTRL_PIN(92, "GPIO_92"),
197 PINCTRL_PIN(93, "GPIO_93"),
198 PINCTRL_PIN(94, "GPIO_94"),
199 PINCTRL_PIN(95, "GPIO_95"),
200 PINCTRL_PIN(96, "GPIO_96"),
201 PINCTRL_PIN(97, "GPIO_97"),
202 PINCTRL_PIN(98, "GPIO_98"),
203 PINCTRL_PIN(99, "GPIO_99"),
204 PINCTRL_PIN(100, "GPIO_100"),
205 PINCTRL_PIN(101, "GPIO_101"),
206 PINCTRL_PIN(102, "GPIO_102"),
207 PINCTRL_PIN(103, "GPIO_103"),
208 PINCTRL_PIN(104, "GPIO_104"),
209 PINCTRL_PIN(105, "GPIO_105"),
210 PINCTRL_PIN(106, "GPIO_106"),
211 PINCTRL_PIN(107, "GPIO_107"),
212 PINCTRL_PIN(108, "GPIO_108"),
213 PINCTRL_PIN(109, "GPIO_109"),
214 PINCTRL_PIN(110, "GPIO_110"),
215 PINCTRL_PIN(111, "GPIO_111"),
216 PINCTRL_PIN(112, "GPIO_112"),
217 PINCTRL_PIN(113, "GPIO_113"),
218 PINCTRL_PIN(114, "GPIO_114"),
219 PINCTRL_PIN(115, "GPIO_115"),
220 PINCTRL_PIN(116, "GPIO_116"),
221 PINCTRL_PIN(117, "GPIO_117"),
222 PINCTRL_PIN(118, "GPIO_118"),
223 PINCTRL_PIN(119, "GPIO_119"),
224 PINCTRL_PIN(120, "GPIO_120"),
225 PINCTRL_PIN(121, "GPIO_121"),
226 PINCTRL_PIN(122, "GPIO_122"),
227 PINCTRL_PIN(123, "GPIO_123"),
228 PINCTRL_PIN(124, "GPIO_124"),
229 PINCTRL_PIN(125, "GPIO_125"),
230 PINCTRL_PIN(126, "GPIO_126"),
231 PINCTRL_PIN(127, "GPIO_127"),
232 PINCTRL_PIN(128, "GPIO_128"),
233 PINCTRL_PIN(129, "GPIO_129"),
234 PINCTRL_PIN(130, "GPIO_130"),
235 PINCTRL_PIN(131, "GPIO_131"),
236 PINCTRL_PIN(132, "GPIO_132"),
237 PINCTRL_PIN(133, "GPIO_133"),
238 PINCTRL_PIN(134, "GPIO_134"),
239 PINCTRL_PIN(135, "GPIO_135"),
240 PINCTRL_PIN(136, "GPIO_136"),
241 PINCTRL_PIN(137, "GPIO_137"),
242 PINCTRL_PIN(138, "GPIO_138"),
243 PINCTRL_PIN(139, "GPIO_139"),
244 PINCTRL_PIN(140, "GPIO_140"),
245 PINCTRL_PIN(141, "GPIO_141"),
246 PINCTRL_PIN(142, "GPIO_142"),
247 PINCTRL_PIN(143, "GPIO_143"),
248 PINCTRL_PIN(144, "GPIO_144"),
249 PINCTRL_PIN(145, "GPIO_145"),
250 PINCTRL_PIN(146, "GPIO_146"),
251 PINCTRL_PIN(147, "GPIO_147"),
252 PINCTRL_PIN(148, "GPIO_148"),
253 PINCTRL_PIN(149, "GPIO_149"),
254 PINCTRL_PIN(150, "GPIO_150"),
255 PINCTRL_PIN(151, "GPIO_151"),
256 PINCTRL_PIN(152, "GPIO_152"),
257 PINCTRL_PIN(153, "GPIO_153"),
258 PINCTRL_PIN(154, "GPIO_154"),
259 PINCTRL_PIN(155, "GPIO_155"),
260 PINCTRL_PIN(156, "GPIO_156"),
261 PINCTRL_PIN(157, "GPIO_157"),
262 PINCTRL_PIN(158, "GPIO_158"),
263 PINCTRL_PIN(159, "GPIO_159"),
264 PINCTRL_PIN(160, "GPIO_160"),
265 PINCTRL_PIN(161, "GPIO_161"),
266 PINCTRL_PIN(162, "GPIO_162"),
267 PINCTRL_PIN(163, "GPIO_163"),
268 PINCTRL_PIN(164, "GPIO_164"),
269 PINCTRL_PIN(165, "GPIO_165"),
270 PINCTRL_PIN(166, "GPIO_166"),
271 PINCTRL_PIN(167, "GPIO_167"),
272 PINCTRL_PIN(168, "GPIO_168"),
273 PINCTRL_PIN(169, "GPIO_169"),
274 PINCTRL_PIN(170, "GPIO_170"),
275 PINCTRL_PIN(171, "GPIO_171"),
276 PINCTRL_PIN(172, "GPIO_172"),
277 PINCTRL_PIN(173, "GPIO_173"),
278 PINCTRL_PIN(174, "GPIO_174"),
279 PINCTRL_PIN(175, "GPIO_175"),
280 PINCTRL_PIN(176, "GPIO_176"),
281 PINCTRL_PIN(177, "GPIO_177"),
282 PINCTRL_PIN(178, "GPIO_178"),
283 PINCTRL_PIN(179, "GPIO_179"),
284 PINCTRL_PIN(180, "GPIO_180"),
285 PINCTRL_PIN(181, "GPIO_181"),
286 PINCTRL_PIN(182, "GPIO_182"),
287 PINCTRL_PIN(183, "GPIO_183"),
288};
289
290static const unsigned i2c0_pins[] = {145, 146};
291static const unsigned i2c1_pins[] = {147, 148};
292static const unsigned i2c2_pins[] = {113, 114};
293static const unsigned i2c3_pins[] = {19, 20};
294
295static const unsigned uart0_pins[] = {135, 136, 137, 138, 139};
296static const unsigned uart1_pins[] = {140, 141, 142, 143, 144};
297
298static const struct amd_pingroup kerncz_groups[] = {
299 {
300 .name = "i2c0",
301 .pins = i2c0_pins,
302 .npins = 2,
303 },
304 {
305 .name = "i2c1",
306 .pins = i2c1_pins,
307 .npins = 2,
308 },
309 {
310 .name = "i2c2",
311 .pins = i2c2_pins,
312 .npins = 2,
313 },
314 {
315 .name = "i2c3",
316 .pins = i2c3_pins,
317 .npins = 2,
318 },
319 {
320 .name = "uart0",
321 .pins = uart0_pins,
322 .npins = 5,
323 },
324 {
325 .name = "uart1",
326 .pins = uart1_pins,
327 .npins = 5,
328 },
329};
330
331#endif
332
