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44#include <linux/device.h>
45#include <linux/module.h>
46#include <linux/mutex.h>
47#include <linux/param.h>
48#include <linux/jiffies.h>
49#include <linux/workqueue.h>
50#include <linux/delay.h>
51#include <linux/platform_device.h>
52#include <linux/power_supply.h>
53#include <linux/slab.h>
54#include <linux/of.h>
55
56#include <linux/power/bq27xxx_battery.h>
57
58#define BQ27XXX_MANUFACTURER "Texas Instruments"
59
60
61#define BQ27XXX_FLAG_DSC BIT(0)
62#define BQ27XXX_FLAG_SOCF BIT(1)
63#define BQ27XXX_FLAG_SOC1 BIT(2)
64#define BQ27XXX_FLAG_CFGUP BIT(4)
65#define BQ27XXX_FLAG_FC BIT(9)
66#define BQ27XXX_FLAG_OTD BIT(14)
67#define BQ27XXX_FLAG_OTC BIT(15)
68#define BQ27XXX_FLAG_UT BIT(14)
69#define BQ27XXX_FLAG_OT BIT(15)
70
71
72#define BQ27000_FLAG_EDVF BIT(0)
73#define BQ27000_FLAG_EDV1 BIT(1)
74#define BQ27000_FLAG_CI BIT(4)
75#define BQ27000_FLAG_FC BIT(5)
76#define BQ27000_FLAG_CHGS BIT(7)
77
78
79#define BQ27Z561_FLAG_FDC BIT(4)
80#define BQ27Z561_FLAG_FC BIT(5)
81#define BQ27Z561_FLAG_DIS_CH BIT(6)
82
83
84#define BQ27XXX_SEALED 0x20
85#define BQ27XXX_SET_CFGUPDATE 0x13
86#define BQ27XXX_SOFT_RESET 0x42
87#define BQ27XXX_RESET 0x41
88
89#define BQ27XXX_RS (20)
90#define BQ27XXX_POWER_CONSTANT (29200)
91#define BQ27XXX_CURRENT_CONSTANT (3570)
92
93#define INVALID_REG_ADDR 0xff
94
95
96
97
98
99
100
101enum bq27xxx_reg_index {
102 BQ27XXX_REG_CTRL = 0,
103 BQ27XXX_REG_TEMP,
104 BQ27XXX_REG_INT_TEMP,
105 BQ27XXX_REG_VOLT,
106 BQ27XXX_REG_AI,
107 BQ27XXX_REG_FLAGS,
108 BQ27XXX_REG_TTE,
109 BQ27XXX_REG_TTF,
110 BQ27XXX_REG_TTES,
111 BQ27XXX_REG_TTECP,
112 BQ27XXX_REG_NAC,
113 BQ27XXX_REG_RC,
114 BQ27XXX_REG_FCC,
115 BQ27XXX_REG_CYCT,
116 BQ27XXX_REG_AE,
117 BQ27XXX_REG_SOC,
118 BQ27XXX_REG_DCAP,
119 BQ27XXX_REG_AP,
120 BQ27XXX_DM_CTRL,
121 BQ27XXX_DM_CLASS,
122 BQ27XXX_DM_BLOCK,
123 BQ27XXX_DM_DATA,
124 BQ27XXX_DM_CKSUM,
125 BQ27XXX_REG_MAX,
126};
127
128#define BQ27XXX_DM_REG_ROWS \
129 [BQ27XXX_DM_CTRL] = 0x61, \
130 [BQ27XXX_DM_CLASS] = 0x3e, \
131 [BQ27XXX_DM_BLOCK] = 0x3f, \
132 [BQ27XXX_DM_DATA] = 0x40, \
133 [BQ27XXX_DM_CKSUM] = 0x60
134
135
136static u8
137 bq27000_regs[BQ27XXX_REG_MAX] = {
138 [BQ27XXX_REG_CTRL] = 0x00,
139 [BQ27XXX_REG_TEMP] = 0x06,
140 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
141 [BQ27XXX_REG_VOLT] = 0x08,
142 [BQ27XXX_REG_AI] = 0x14,
143 [BQ27XXX_REG_FLAGS] = 0x0a,
144 [BQ27XXX_REG_TTE] = 0x16,
145 [BQ27XXX_REG_TTF] = 0x18,
146 [BQ27XXX_REG_TTES] = 0x1c,
147 [BQ27XXX_REG_TTECP] = 0x26,
148 [BQ27XXX_REG_NAC] = 0x0c,
149 [BQ27XXX_REG_RC] = INVALID_REG_ADDR,
150 [BQ27XXX_REG_FCC] = 0x12,
151 [BQ27XXX_REG_CYCT] = 0x2a,
152 [BQ27XXX_REG_AE] = 0x22,
153 [BQ27XXX_REG_SOC] = 0x0b,
154 [BQ27XXX_REG_DCAP] = 0x76,
155 [BQ27XXX_REG_AP] = 0x24,
156 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
157 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
158 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
159 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
160 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
161 },
162 bq27010_regs[BQ27XXX_REG_MAX] = {
163 [BQ27XXX_REG_CTRL] = 0x00,
164 [BQ27XXX_REG_TEMP] = 0x06,
165 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
166 [BQ27XXX_REG_VOLT] = 0x08,
167 [BQ27XXX_REG_AI] = 0x14,
168 [BQ27XXX_REG_FLAGS] = 0x0a,
169 [BQ27XXX_REG_TTE] = 0x16,
170 [BQ27XXX_REG_TTF] = 0x18,
171 [BQ27XXX_REG_TTES] = 0x1c,
172 [BQ27XXX_REG_TTECP] = 0x26,
173 [BQ27XXX_REG_NAC] = 0x0c,
174 [BQ27XXX_REG_RC] = INVALID_REG_ADDR,
175 [BQ27XXX_REG_FCC] = 0x12,
176 [BQ27XXX_REG_CYCT] = 0x2a,
177 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
178 [BQ27XXX_REG_SOC] = 0x0b,
179 [BQ27XXX_REG_DCAP] = 0x76,
180 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
181 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
182 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
183 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
184 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
185 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
186 },
187 bq2750x_regs[BQ27XXX_REG_MAX] = {
188 [BQ27XXX_REG_CTRL] = 0x00,
189 [BQ27XXX_REG_TEMP] = 0x06,
190 [BQ27XXX_REG_INT_TEMP] = 0x28,
191 [BQ27XXX_REG_VOLT] = 0x08,
192 [BQ27XXX_REG_AI] = 0x14,
193 [BQ27XXX_REG_FLAGS] = 0x0a,
194 [BQ27XXX_REG_TTE] = 0x16,
195 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
196 [BQ27XXX_REG_TTES] = 0x1a,
197 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
198 [BQ27XXX_REG_NAC] = 0x0c,
199 [BQ27XXX_REG_RC] = 0x10,
200 [BQ27XXX_REG_FCC] = 0x12,
201 [BQ27XXX_REG_CYCT] = 0x2a,
202 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
203 [BQ27XXX_REG_SOC] = 0x2c,
204 [BQ27XXX_REG_DCAP] = 0x3c,
205 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
206 BQ27XXX_DM_REG_ROWS,
207 },
208#define bq2751x_regs bq27510g3_regs
209#define bq2752x_regs bq27510g3_regs
210 bq27500_regs[BQ27XXX_REG_MAX] = {
211 [BQ27XXX_REG_CTRL] = 0x00,
212 [BQ27XXX_REG_TEMP] = 0x06,
213 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
214 [BQ27XXX_REG_VOLT] = 0x08,
215 [BQ27XXX_REG_AI] = 0x14,
216 [BQ27XXX_REG_FLAGS] = 0x0a,
217 [BQ27XXX_REG_TTE] = 0x16,
218 [BQ27XXX_REG_TTF] = 0x18,
219 [BQ27XXX_REG_TTES] = 0x1c,
220 [BQ27XXX_REG_TTECP] = 0x26,
221 [BQ27XXX_REG_NAC] = 0x0c,
222 [BQ27XXX_REG_RC] = 0x10,
223 [BQ27XXX_REG_FCC] = 0x12,
224 [BQ27XXX_REG_CYCT] = 0x2a,
225 [BQ27XXX_REG_AE] = 0x22,
226 [BQ27XXX_REG_SOC] = 0x2c,
227 [BQ27XXX_REG_DCAP] = 0x3c,
228 [BQ27XXX_REG_AP] = 0x24,
229 BQ27XXX_DM_REG_ROWS,
230 },
231#define bq27510g1_regs bq27500_regs
232#define bq27510g2_regs bq27500_regs
233 bq27510g3_regs[BQ27XXX_REG_MAX] = {
234 [BQ27XXX_REG_CTRL] = 0x00,
235 [BQ27XXX_REG_TEMP] = 0x06,
236 [BQ27XXX_REG_INT_TEMP] = 0x28,
237 [BQ27XXX_REG_VOLT] = 0x08,
238 [BQ27XXX_REG_AI] = 0x14,
239 [BQ27XXX_REG_FLAGS] = 0x0a,
240 [BQ27XXX_REG_TTE] = 0x16,
241 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
242 [BQ27XXX_REG_TTES] = 0x1a,
243 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
244 [BQ27XXX_REG_NAC] = 0x0c,
245 [BQ27XXX_REG_RC] = 0x10,
246 [BQ27XXX_REG_FCC] = 0x12,
247 [BQ27XXX_REG_CYCT] = 0x1e,
248 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
249 [BQ27XXX_REG_SOC] = 0x20,
250 [BQ27XXX_REG_DCAP] = 0x2e,
251 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
252 BQ27XXX_DM_REG_ROWS,
253 },
254 bq27520g1_regs[BQ27XXX_REG_MAX] = {
255 [BQ27XXX_REG_CTRL] = 0x00,
256 [BQ27XXX_REG_TEMP] = 0x06,
257 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
258 [BQ27XXX_REG_VOLT] = 0x08,
259 [BQ27XXX_REG_AI] = 0x14,
260 [BQ27XXX_REG_FLAGS] = 0x0a,
261 [BQ27XXX_REG_TTE] = 0x16,
262 [BQ27XXX_REG_TTF] = 0x18,
263 [BQ27XXX_REG_TTES] = 0x1c,
264 [BQ27XXX_REG_TTECP] = 0x26,
265 [BQ27XXX_REG_NAC] = 0x0c,
266 [BQ27XXX_REG_RC] = 0x10,
267 [BQ27XXX_REG_FCC] = 0x12,
268 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
269 [BQ27XXX_REG_AE] = 0x22,
270 [BQ27XXX_REG_SOC] = 0x2c,
271 [BQ27XXX_REG_DCAP] = 0x3c,
272 [BQ27XXX_REG_AP] = 0x24,
273 BQ27XXX_DM_REG_ROWS,
274 },
275 bq27520g2_regs[BQ27XXX_REG_MAX] = {
276 [BQ27XXX_REG_CTRL] = 0x00,
277 [BQ27XXX_REG_TEMP] = 0x06,
278 [BQ27XXX_REG_INT_TEMP] = 0x36,
279 [BQ27XXX_REG_VOLT] = 0x08,
280 [BQ27XXX_REG_AI] = 0x14,
281 [BQ27XXX_REG_FLAGS] = 0x0a,
282 [BQ27XXX_REG_TTE] = 0x16,
283 [BQ27XXX_REG_TTF] = 0x18,
284 [BQ27XXX_REG_TTES] = 0x1c,
285 [BQ27XXX_REG_TTECP] = 0x26,
286 [BQ27XXX_REG_NAC] = 0x0c,
287 [BQ27XXX_REG_RC] = 0x10,
288 [BQ27XXX_REG_FCC] = 0x12,
289 [BQ27XXX_REG_CYCT] = 0x2a,
290 [BQ27XXX_REG_AE] = 0x22,
291 [BQ27XXX_REG_SOC] = 0x2c,
292 [BQ27XXX_REG_DCAP] = 0x3c,
293 [BQ27XXX_REG_AP] = 0x24,
294 BQ27XXX_DM_REG_ROWS,
295 },
296 bq27520g3_regs[BQ27XXX_REG_MAX] = {
297 [BQ27XXX_REG_CTRL] = 0x00,
298 [BQ27XXX_REG_TEMP] = 0x06,
299 [BQ27XXX_REG_INT_TEMP] = 0x36,
300 [BQ27XXX_REG_VOLT] = 0x08,
301 [BQ27XXX_REG_AI] = 0x14,
302 [BQ27XXX_REG_FLAGS] = 0x0a,
303 [BQ27XXX_REG_TTE] = 0x16,
304 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
305 [BQ27XXX_REG_TTES] = 0x1c,
306 [BQ27XXX_REG_TTECP] = 0x26,
307 [BQ27XXX_REG_NAC] = 0x0c,
308 [BQ27XXX_REG_RC] = 0x10,
309 [BQ27XXX_REG_FCC] = 0x12,
310 [BQ27XXX_REG_CYCT] = 0x2a,
311 [BQ27XXX_REG_AE] = 0x22,
312 [BQ27XXX_REG_SOC] = 0x2c,
313 [BQ27XXX_REG_DCAP] = 0x3c,
314 [BQ27XXX_REG_AP] = 0x24,
315 BQ27XXX_DM_REG_ROWS,
316 },
317 bq27520g4_regs[BQ27XXX_REG_MAX] = {
318 [BQ27XXX_REG_CTRL] = 0x00,
319 [BQ27XXX_REG_TEMP] = 0x06,
320 [BQ27XXX_REG_INT_TEMP] = 0x28,
321 [BQ27XXX_REG_VOLT] = 0x08,
322 [BQ27XXX_REG_AI] = 0x14,
323 [BQ27XXX_REG_FLAGS] = 0x0a,
324 [BQ27XXX_REG_TTE] = 0x16,
325 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
326 [BQ27XXX_REG_TTES] = 0x1c,
327 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
328 [BQ27XXX_REG_NAC] = 0x0c,
329 [BQ27XXX_REG_RC] = 0x10,
330 [BQ27XXX_REG_FCC] = 0x12,
331 [BQ27XXX_REG_CYCT] = 0x1e,
332 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
333 [BQ27XXX_REG_SOC] = 0x20,
334 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
335 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
336 BQ27XXX_DM_REG_ROWS,
337 },
338 bq27521_regs[BQ27XXX_REG_MAX] = {
339 [BQ27XXX_REG_CTRL] = 0x02,
340 [BQ27XXX_REG_TEMP] = 0x0a,
341 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
342 [BQ27XXX_REG_VOLT] = 0x0c,
343 [BQ27XXX_REG_AI] = 0x0e,
344 [BQ27XXX_REG_FLAGS] = 0x08,
345 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
346 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
347 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
348 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
349 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
350 [BQ27XXX_REG_RC] = INVALID_REG_ADDR,
351 [BQ27XXX_REG_FCC] = INVALID_REG_ADDR,
352 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
353 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
354 [BQ27XXX_REG_SOC] = INVALID_REG_ADDR,
355 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
356 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
357 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
358 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
359 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
360 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
361 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
362 },
363 bq27530_regs[BQ27XXX_REG_MAX] = {
364 [BQ27XXX_REG_CTRL] = 0x00,
365 [BQ27XXX_REG_TEMP] = 0x06,
366 [BQ27XXX_REG_INT_TEMP] = 0x32,
367 [BQ27XXX_REG_VOLT] = 0x08,
368 [BQ27XXX_REG_AI] = 0x14,
369 [BQ27XXX_REG_FLAGS] = 0x0a,
370 [BQ27XXX_REG_TTE] = 0x16,
371 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
372 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
373 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
374 [BQ27XXX_REG_NAC] = 0x0c,
375 [BQ27XXX_REG_RC] = 0x10,
376 [BQ27XXX_REG_FCC] = 0x12,
377 [BQ27XXX_REG_CYCT] = 0x2a,
378 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
379 [BQ27XXX_REG_SOC] = 0x2c,
380 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
381 [BQ27XXX_REG_AP] = 0x24,
382 BQ27XXX_DM_REG_ROWS,
383 },
384#define bq27531_regs bq27530_regs
385 bq27541_regs[BQ27XXX_REG_MAX] = {
386 [BQ27XXX_REG_CTRL] = 0x00,
387 [BQ27XXX_REG_TEMP] = 0x06,
388 [BQ27XXX_REG_INT_TEMP] = 0x28,
389 [BQ27XXX_REG_VOLT] = 0x08,
390 [BQ27XXX_REG_AI] = 0x14,
391 [BQ27XXX_REG_FLAGS] = 0x0a,
392 [BQ27XXX_REG_TTE] = 0x16,
393 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
394 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
395 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
396 [BQ27XXX_REG_NAC] = 0x0c,
397 [BQ27XXX_REG_RC] = 0x10,
398 [BQ27XXX_REG_FCC] = 0x12,
399 [BQ27XXX_REG_CYCT] = 0x2a,
400 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
401 [BQ27XXX_REG_SOC] = 0x2c,
402 [BQ27XXX_REG_DCAP] = 0x3c,
403 [BQ27XXX_REG_AP] = 0x24,
404 BQ27XXX_DM_REG_ROWS,
405 },
406#define bq27542_regs bq27541_regs
407#define bq27546_regs bq27541_regs
408#define bq27742_regs bq27541_regs
409 bq27545_regs[BQ27XXX_REG_MAX] = {
410 [BQ27XXX_REG_CTRL] = 0x00,
411 [BQ27XXX_REG_TEMP] = 0x06,
412 [BQ27XXX_REG_INT_TEMP] = 0x28,
413 [BQ27XXX_REG_VOLT] = 0x08,
414 [BQ27XXX_REG_AI] = 0x14,
415 [BQ27XXX_REG_FLAGS] = 0x0a,
416 [BQ27XXX_REG_TTE] = 0x16,
417 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
418 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
419 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
420 [BQ27XXX_REG_NAC] = 0x0c,
421 [BQ27XXX_REG_RC] = 0x10,
422 [BQ27XXX_REG_FCC] = 0x12,
423 [BQ27XXX_REG_CYCT] = 0x2a,
424 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
425 [BQ27XXX_REG_SOC] = 0x2c,
426 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
427 [BQ27XXX_REG_AP] = 0x24,
428 BQ27XXX_DM_REG_ROWS,
429 },
430 bq27421_regs[BQ27XXX_REG_MAX] = {
431 [BQ27XXX_REG_CTRL] = 0x00,
432 [BQ27XXX_REG_TEMP] = 0x02,
433 [BQ27XXX_REG_INT_TEMP] = 0x1e,
434 [BQ27XXX_REG_VOLT] = 0x04,
435 [BQ27XXX_REG_AI] = 0x10,
436 [BQ27XXX_REG_FLAGS] = 0x06,
437 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
438 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
439 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
440 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
441 [BQ27XXX_REG_NAC] = 0x08,
442 [BQ27XXX_REG_RC] = 0x0c,
443 [BQ27XXX_REG_FCC] = 0x0e,
444 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
445 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
446 [BQ27XXX_REG_SOC] = 0x1c,
447 [BQ27XXX_REG_DCAP] = 0x3c,
448 [BQ27XXX_REG_AP] = 0x18,
449 BQ27XXX_DM_REG_ROWS,
450 },
451#define bq27411_regs bq27421_regs
452#define bq27425_regs bq27421_regs
453#define bq27426_regs bq27421_regs
454#define bq27441_regs bq27421_regs
455#define bq27621_regs bq27421_regs
456 bq27z561_regs[BQ27XXX_REG_MAX] = {
457 [BQ27XXX_REG_CTRL] = 0x00,
458 [BQ27XXX_REG_TEMP] = 0x06,
459 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
460 [BQ27XXX_REG_VOLT] = 0x08,
461 [BQ27XXX_REG_AI] = 0x14,
462 [BQ27XXX_REG_FLAGS] = 0x0a,
463 [BQ27XXX_REG_TTE] = 0x16,
464 [BQ27XXX_REG_TTF] = 0x18,
465 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
466 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
467 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
468 [BQ27XXX_REG_RC] = 0x10,
469 [BQ27XXX_REG_FCC] = 0x12,
470 [BQ27XXX_REG_CYCT] = 0x2a,
471 [BQ27XXX_REG_AE] = 0x22,
472 [BQ27XXX_REG_SOC] = 0x2c,
473 [BQ27XXX_REG_DCAP] = 0x3c,
474 [BQ27XXX_REG_AP] = 0x22,
475 BQ27XXX_DM_REG_ROWS,
476 },
477 bq28z610_regs[BQ27XXX_REG_MAX] = {
478 [BQ27XXX_REG_CTRL] = 0x00,
479 [BQ27XXX_REG_TEMP] = 0x06,
480 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
481 [BQ27XXX_REG_VOLT] = 0x08,
482 [BQ27XXX_REG_AI] = 0x14,
483 [BQ27XXX_REG_FLAGS] = 0x0a,
484 [BQ27XXX_REG_TTE] = 0x16,
485 [BQ27XXX_REG_TTF] = 0x18,
486 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
487 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
488 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
489 [BQ27XXX_REG_RC] = 0x10,
490 [BQ27XXX_REG_FCC] = 0x12,
491 [BQ27XXX_REG_CYCT] = 0x2a,
492 [BQ27XXX_REG_AE] = 0x22,
493 [BQ27XXX_REG_SOC] = 0x2c,
494 [BQ27XXX_REG_DCAP] = 0x3c,
495 [BQ27XXX_REG_AP] = 0x22,
496 BQ27XXX_DM_REG_ROWS,
497 },
498 bq34z100_regs[BQ27XXX_REG_MAX] = {
499 [BQ27XXX_REG_CTRL] = 0x00,
500 [BQ27XXX_REG_TEMP] = 0x0c,
501 [BQ27XXX_REG_INT_TEMP] = 0x2a,
502 [BQ27XXX_REG_VOLT] = 0x08,
503 [BQ27XXX_REG_AI] = 0x0a,
504 [BQ27XXX_REG_FLAGS] = 0x0e,
505 [BQ27XXX_REG_TTE] = 0x18,
506 [BQ27XXX_REG_TTF] = 0x1a,
507 [BQ27XXX_REG_TTES] = 0x1e,
508 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
509 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
510 [BQ27XXX_REG_RC] = 0x04,
511 [BQ27XXX_REG_FCC] = 0x06,
512 [BQ27XXX_REG_CYCT] = 0x2c,
513 [BQ27XXX_REG_AE] = 0x24,
514 [BQ27XXX_REG_SOC] = 0x02,
515 [BQ27XXX_REG_DCAP] = 0x3c,
516 [BQ27XXX_REG_AP] = 0x22,
517 BQ27XXX_DM_REG_ROWS,
518 };
519
520static enum power_supply_property bq27000_props[] = {
521 POWER_SUPPLY_PROP_STATUS,
522 POWER_SUPPLY_PROP_PRESENT,
523 POWER_SUPPLY_PROP_VOLTAGE_NOW,
524 POWER_SUPPLY_PROP_CURRENT_NOW,
525 POWER_SUPPLY_PROP_CAPACITY,
526 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
527 POWER_SUPPLY_PROP_TEMP,
528 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
529 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
530 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
531 POWER_SUPPLY_PROP_TECHNOLOGY,
532 POWER_SUPPLY_PROP_CHARGE_FULL,
533 POWER_SUPPLY_PROP_CHARGE_NOW,
534 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
535 POWER_SUPPLY_PROP_CYCLE_COUNT,
536 POWER_SUPPLY_PROP_ENERGY_NOW,
537 POWER_SUPPLY_PROP_POWER_AVG,
538 POWER_SUPPLY_PROP_HEALTH,
539 POWER_SUPPLY_PROP_MANUFACTURER,
540};
541
542static enum power_supply_property bq27010_props[] = {
543 POWER_SUPPLY_PROP_STATUS,
544 POWER_SUPPLY_PROP_PRESENT,
545 POWER_SUPPLY_PROP_VOLTAGE_NOW,
546 POWER_SUPPLY_PROP_CURRENT_NOW,
547 POWER_SUPPLY_PROP_CAPACITY,
548 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
549 POWER_SUPPLY_PROP_TEMP,
550 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
551 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
552 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
553 POWER_SUPPLY_PROP_TECHNOLOGY,
554 POWER_SUPPLY_PROP_CHARGE_FULL,
555 POWER_SUPPLY_PROP_CHARGE_NOW,
556 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
557 POWER_SUPPLY_PROP_CYCLE_COUNT,
558 POWER_SUPPLY_PROP_HEALTH,
559 POWER_SUPPLY_PROP_MANUFACTURER,
560};
561
562#define bq2750x_props bq27510g3_props
563#define bq2751x_props bq27510g3_props
564#define bq2752x_props bq27510g3_props
565
566static enum power_supply_property bq27500_props[] = {
567 POWER_SUPPLY_PROP_STATUS,
568 POWER_SUPPLY_PROP_PRESENT,
569 POWER_SUPPLY_PROP_VOLTAGE_NOW,
570 POWER_SUPPLY_PROP_CURRENT_NOW,
571 POWER_SUPPLY_PROP_CAPACITY,
572 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
573 POWER_SUPPLY_PROP_TEMP,
574 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
575 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
576 POWER_SUPPLY_PROP_TECHNOLOGY,
577 POWER_SUPPLY_PROP_CHARGE_FULL,
578 POWER_SUPPLY_PROP_CHARGE_NOW,
579 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
580 POWER_SUPPLY_PROP_CYCLE_COUNT,
581 POWER_SUPPLY_PROP_ENERGY_NOW,
582 POWER_SUPPLY_PROP_POWER_AVG,
583 POWER_SUPPLY_PROP_HEALTH,
584 POWER_SUPPLY_PROP_MANUFACTURER,
585};
586#define bq27510g1_props bq27500_props
587#define bq27510g2_props bq27500_props
588
589static enum power_supply_property bq27510g3_props[] = {
590 POWER_SUPPLY_PROP_STATUS,
591 POWER_SUPPLY_PROP_PRESENT,
592 POWER_SUPPLY_PROP_VOLTAGE_NOW,
593 POWER_SUPPLY_PROP_CURRENT_NOW,
594 POWER_SUPPLY_PROP_CAPACITY,
595 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
596 POWER_SUPPLY_PROP_TEMP,
597 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
598 POWER_SUPPLY_PROP_TECHNOLOGY,
599 POWER_SUPPLY_PROP_CHARGE_FULL,
600 POWER_SUPPLY_PROP_CHARGE_NOW,
601 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
602 POWER_SUPPLY_PROP_CYCLE_COUNT,
603 POWER_SUPPLY_PROP_HEALTH,
604 POWER_SUPPLY_PROP_MANUFACTURER,
605};
606
607static enum power_supply_property bq27520g1_props[] = {
608 POWER_SUPPLY_PROP_STATUS,
609 POWER_SUPPLY_PROP_PRESENT,
610 POWER_SUPPLY_PROP_VOLTAGE_NOW,
611 POWER_SUPPLY_PROP_CURRENT_NOW,
612 POWER_SUPPLY_PROP_CAPACITY,
613 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
614 POWER_SUPPLY_PROP_TEMP,
615 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
616 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
617 POWER_SUPPLY_PROP_TECHNOLOGY,
618 POWER_SUPPLY_PROP_CHARGE_FULL,
619 POWER_SUPPLY_PROP_CHARGE_NOW,
620 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
621 POWER_SUPPLY_PROP_ENERGY_NOW,
622 POWER_SUPPLY_PROP_POWER_AVG,
623 POWER_SUPPLY_PROP_HEALTH,
624 POWER_SUPPLY_PROP_MANUFACTURER,
625};
626
627#define bq27520g2_props bq27500_props
628
629static enum power_supply_property bq27520g3_props[] = {
630 POWER_SUPPLY_PROP_STATUS,
631 POWER_SUPPLY_PROP_PRESENT,
632 POWER_SUPPLY_PROP_VOLTAGE_NOW,
633 POWER_SUPPLY_PROP_CURRENT_NOW,
634 POWER_SUPPLY_PROP_CAPACITY,
635 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
636 POWER_SUPPLY_PROP_TEMP,
637 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
638 POWER_SUPPLY_PROP_TECHNOLOGY,
639 POWER_SUPPLY_PROP_CHARGE_FULL,
640 POWER_SUPPLY_PROP_CHARGE_NOW,
641 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
642 POWER_SUPPLY_PROP_CYCLE_COUNT,
643 POWER_SUPPLY_PROP_ENERGY_NOW,
644 POWER_SUPPLY_PROP_POWER_AVG,
645 POWER_SUPPLY_PROP_HEALTH,
646 POWER_SUPPLY_PROP_MANUFACTURER,
647};
648
649static enum power_supply_property bq27520g4_props[] = {
650 POWER_SUPPLY_PROP_STATUS,
651 POWER_SUPPLY_PROP_PRESENT,
652 POWER_SUPPLY_PROP_VOLTAGE_NOW,
653 POWER_SUPPLY_PROP_CURRENT_NOW,
654 POWER_SUPPLY_PROP_CAPACITY,
655 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
656 POWER_SUPPLY_PROP_TEMP,
657 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
658 POWER_SUPPLY_PROP_TECHNOLOGY,
659 POWER_SUPPLY_PROP_CHARGE_FULL,
660 POWER_SUPPLY_PROP_CHARGE_NOW,
661 POWER_SUPPLY_PROP_CYCLE_COUNT,
662 POWER_SUPPLY_PROP_HEALTH,
663 POWER_SUPPLY_PROP_MANUFACTURER,
664};
665
666static enum power_supply_property bq27521_props[] = {
667 POWER_SUPPLY_PROP_STATUS,
668 POWER_SUPPLY_PROP_PRESENT,
669 POWER_SUPPLY_PROP_VOLTAGE_NOW,
670 POWER_SUPPLY_PROP_CURRENT_NOW,
671 POWER_SUPPLY_PROP_TEMP,
672 POWER_SUPPLY_PROP_TECHNOLOGY,
673};
674
675static enum power_supply_property bq27530_props[] = {
676 POWER_SUPPLY_PROP_STATUS,
677 POWER_SUPPLY_PROP_PRESENT,
678 POWER_SUPPLY_PROP_VOLTAGE_NOW,
679 POWER_SUPPLY_PROP_CURRENT_NOW,
680 POWER_SUPPLY_PROP_CAPACITY,
681 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
682 POWER_SUPPLY_PROP_TEMP,
683 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
684 POWER_SUPPLY_PROP_TECHNOLOGY,
685 POWER_SUPPLY_PROP_CHARGE_FULL,
686 POWER_SUPPLY_PROP_CHARGE_NOW,
687 POWER_SUPPLY_PROP_POWER_AVG,
688 POWER_SUPPLY_PROP_HEALTH,
689 POWER_SUPPLY_PROP_CYCLE_COUNT,
690 POWER_SUPPLY_PROP_MANUFACTURER,
691};
692#define bq27531_props bq27530_props
693
694static enum power_supply_property bq27541_props[] = {
695 POWER_SUPPLY_PROP_STATUS,
696 POWER_SUPPLY_PROP_PRESENT,
697 POWER_SUPPLY_PROP_VOLTAGE_NOW,
698 POWER_SUPPLY_PROP_CURRENT_NOW,
699 POWER_SUPPLY_PROP_CAPACITY,
700 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
701 POWER_SUPPLY_PROP_TEMP,
702 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
703 POWER_SUPPLY_PROP_TECHNOLOGY,
704 POWER_SUPPLY_PROP_CHARGE_FULL,
705 POWER_SUPPLY_PROP_CHARGE_NOW,
706 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
707 POWER_SUPPLY_PROP_CYCLE_COUNT,
708 POWER_SUPPLY_PROP_POWER_AVG,
709 POWER_SUPPLY_PROP_HEALTH,
710 POWER_SUPPLY_PROP_MANUFACTURER,
711};
712#define bq27542_props bq27541_props
713#define bq27546_props bq27541_props
714#define bq27742_props bq27541_props
715
716static enum power_supply_property bq27545_props[] = {
717 POWER_SUPPLY_PROP_STATUS,
718 POWER_SUPPLY_PROP_PRESENT,
719 POWER_SUPPLY_PROP_VOLTAGE_NOW,
720 POWER_SUPPLY_PROP_CURRENT_NOW,
721 POWER_SUPPLY_PROP_CAPACITY,
722 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
723 POWER_SUPPLY_PROP_TEMP,
724 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
725 POWER_SUPPLY_PROP_TECHNOLOGY,
726 POWER_SUPPLY_PROP_CHARGE_FULL,
727 POWER_SUPPLY_PROP_CHARGE_NOW,
728 POWER_SUPPLY_PROP_HEALTH,
729 POWER_SUPPLY_PROP_CYCLE_COUNT,
730 POWER_SUPPLY_PROP_POWER_AVG,
731 POWER_SUPPLY_PROP_MANUFACTURER,
732};
733
734static enum power_supply_property bq27421_props[] = {
735 POWER_SUPPLY_PROP_STATUS,
736 POWER_SUPPLY_PROP_PRESENT,
737 POWER_SUPPLY_PROP_VOLTAGE_NOW,
738 POWER_SUPPLY_PROP_CURRENT_NOW,
739 POWER_SUPPLY_PROP_CAPACITY,
740 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
741 POWER_SUPPLY_PROP_TEMP,
742 POWER_SUPPLY_PROP_TECHNOLOGY,
743 POWER_SUPPLY_PROP_CHARGE_FULL,
744 POWER_SUPPLY_PROP_CHARGE_NOW,
745 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
746 POWER_SUPPLY_PROP_MANUFACTURER,
747};
748#define bq27411_props bq27421_props
749#define bq27425_props bq27421_props
750#define bq27426_props bq27421_props
751#define bq27441_props bq27421_props
752#define bq27621_props bq27421_props
753
754static enum power_supply_property bq27z561_props[] = {
755 POWER_SUPPLY_PROP_STATUS,
756 POWER_SUPPLY_PROP_PRESENT,
757 POWER_SUPPLY_PROP_VOLTAGE_NOW,
758 POWER_SUPPLY_PROP_CURRENT_NOW,
759 POWER_SUPPLY_PROP_CAPACITY,
760 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
761 POWER_SUPPLY_PROP_TEMP,
762 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
763 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
764 POWER_SUPPLY_PROP_TECHNOLOGY,
765 POWER_SUPPLY_PROP_CHARGE_FULL,
766 POWER_SUPPLY_PROP_CHARGE_NOW,
767 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
768 POWER_SUPPLY_PROP_CYCLE_COUNT,
769 POWER_SUPPLY_PROP_POWER_AVG,
770 POWER_SUPPLY_PROP_HEALTH,
771 POWER_SUPPLY_PROP_MANUFACTURER,
772};
773
774static enum power_supply_property bq28z610_props[] = {
775 POWER_SUPPLY_PROP_STATUS,
776 POWER_SUPPLY_PROP_PRESENT,
777 POWER_SUPPLY_PROP_VOLTAGE_NOW,
778 POWER_SUPPLY_PROP_CURRENT_NOW,
779 POWER_SUPPLY_PROP_CAPACITY,
780 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
781 POWER_SUPPLY_PROP_TEMP,
782 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
783 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
784 POWER_SUPPLY_PROP_TECHNOLOGY,
785 POWER_SUPPLY_PROP_CHARGE_FULL,
786 POWER_SUPPLY_PROP_CHARGE_NOW,
787 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
788 POWER_SUPPLY_PROP_CYCLE_COUNT,
789 POWER_SUPPLY_PROP_POWER_AVG,
790 POWER_SUPPLY_PROP_HEALTH,
791 POWER_SUPPLY_PROP_MANUFACTURER,
792};
793
794static enum power_supply_property bq34z100_props[] = {
795 POWER_SUPPLY_PROP_STATUS,
796 POWER_SUPPLY_PROP_PRESENT,
797 POWER_SUPPLY_PROP_VOLTAGE_NOW,
798 POWER_SUPPLY_PROP_CURRENT_NOW,
799 POWER_SUPPLY_PROP_CAPACITY,
800 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
801 POWER_SUPPLY_PROP_TEMP,
802 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
803 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
804 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
805 POWER_SUPPLY_PROP_TECHNOLOGY,
806 POWER_SUPPLY_PROP_CHARGE_FULL,
807 POWER_SUPPLY_PROP_CHARGE_NOW,
808 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
809 POWER_SUPPLY_PROP_CYCLE_COUNT,
810 POWER_SUPPLY_PROP_ENERGY_NOW,
811 POWER_SUPPLY_PROP_POWER_AVG,
812 POWER_SUPPLY_PROP_HEALTH,
813 POWER_SUPPLY_PROP_MANUFACTURER,
814};
815
816struct bq27xxx_dm_reg {
817 u8 subclass_id;
818 u8 offset;
819 u8 bytes;
820 u16 min, max;
821};
822
823enum bq27xxx_dm_reg_id {
824 BQ27XXX_DM_DESIGN_CAPACITY = 0,
825 BQ27XXX_DM_DESIGN_ENERGY,
826 BQ27XXX_DM_TERMINATE_VOLTAGE,
827};
828
829#define bq27000_dm_regs 0
830#define bq27010_dm_regs 0
831#define bq2750x_dm_regs 0
832#define bq2751x_dm_regs 0
833#define bq2752x_dm_regs 0
834
835#if 0
836static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
837 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 10, 2, 0, 65535 },
838 [BQ27XXX_DM_DESIGN_ENERGY] = { },
839 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 },
840};
841#else
842#define bq27500_dm_regs 0
843#endif
844
845
846#define bq27510g1_dm_regs 0
847#define bq27510g2_dm_regs 0
848#define bq27510g3_dm_regs 0
849#define bq27520g1_dm_regs 0
850#define bq27520g2_dm_regs 0
851#define bq27520g3_dm_regs 0
852#define bq27520g4_dm_regs 0
853#define bq27521_dm_regs 0
854#define bq27530_dm_regs 0
855#define bq27531_dm_regs 0
856#define bq27541_dm_regs 0
857#define bq27542_dm_regs 0
858#define bq27546_dm_regs 0
859#define bq27742_dm_regs 0
860
861#if 0
862static struct bq27xxx_dm_reg bq27545_dm_regs[] = {
863 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 23, 2, 0, 32767 },
864 [BQ27XXX_DM_DESIGN_ENERGY] = { 48, 25, 2, 0, 32767 },
865 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800, 3700 },
866};
867#else
868#define bq27545_dm_regs 0
869#endif
870
871static struct bq27xxx_dm_reg bq27411_dm_regs[] = {
872 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 32767 },
873 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
874 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2800, 3700 },
875};
876
877static struct bq27xxx_dm_reg bq27421_dm_regs[] = {
878 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 8000 },
879 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
880 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500, 3700 },
881};
882
883static struct bq27xxx_dm_reg bq27425_dm_regs[] = {
884 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 12, 2, 0, 32767 },
885 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 14, 2, 0, 32767 },
886 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800, 3700 },
887};
888
889static struct bq27xxx_dm_reg bq27426_dm_regs[] = {
890 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 6, 2, 0, 8000 },
891 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 8, 2, 0, 32767 },
892 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500, 3700 },
893};
894
895#if 0
896#define bq27441_dm_regs bq27421_dm_regs
897#else
898#define bq27441_dm_regs 0
899#endif
900
901#if 0
902static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
903 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 3, 2, 0, 8000 },
904 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 5, 2, 0, 32767 },
905 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500, 3700 },
906};
907#else
908#define bq27621_dm_regs 0
909#endif
910
911#define bq27z561_dm_regs 0
912#define bq28z610_dm_regs 0
913#define bq34z100_dm_regs 0
914
915#define BQ27XXX_O_ZERO BIT(0)
916#define BQ27XXX_O_OTDC BIT(1)
917#define BQ27XXX_O_UTOT BIT(2)
918#define BQ27XXX_O_CFGUP BIT(3)
919#define BQ27XXX_O_RAM BIT(4)
920#define BQ27Z561_O_BITS BIT(5)
921#define BQ27XXX_O_SOC_SI BIT(6)
922#define BQ27XXX_O_HAS_CI BIT(7)
923#define BQ27XXX_O_MUL_CHEM BIT(8)
924
925#define BQ27XXX_DATA(ref, key, opt) { \
926 .opts = (opt), \
927 .unseal_key = key, \
928 .regs = ref##_regs, \
929 .dm_regs = ref##_dm_regs, \
930 .props = ref##_props, \
931 .props_size = ARRAY_SIZE(ref##_props) }
932
933static struct {
934 u32 opts;
935 u32 unseal_key;
936 u8 *regs;
937 struct bq27xxx_dm_reg *dm_regs;
938 enum power_supply_property *props;
939 size_t props_size;
940} bq27xxx_chip_data[] = {
941 [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
942 [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
943 [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC),
944 [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC),
945 [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC),
946 [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC),
947 [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC),
948 [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC),
949 [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC),
950 [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC),
951 [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC),
952 [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC),
953 [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC),
954 [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0),
955 [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT),
956 [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT),
957 [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC),
958 [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC),
959 [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC),
960 [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC),
961 [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC),
962 [BQ27411] = BQ27XXX_DATA(bq27411, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
963 [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
964 [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP),
965 [BQ27426] = BQ27XXX_DATA(bq27426, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
966 [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
967 [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
968 [BQ27Z561] = BQ27XXX_DATA(bq27z561, 0 , BQ27Z561_O_BITS),
969 [BQ28Z610] = BQ27XXX_DATA(bq28z610, 0 , BQ27Z561_O_BITS),
970 [BQ34Z100] = BQ27XXX_DATA(bq34z100, 0 , BQ27XXX_O_OTDC | BQ27XXX_O_SOC_SI | \
971 BQ27XXX_O_HAS_CI | BQ27XXX_O_MUL_CHEM),
972};
973
974static DEFINE_MUTEX(bq27xxx_list_lock);
975static LIST_HEAD(bq27xxx_battery_devices);
976
977#define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500)
978
979#define BQ27XXX_DM_SZ 32
980
981
982
983
984
985
986
987
988
989
990
991struct bq27xxx_dm_buf {
992 u8 class;
993 u8 block;
994 u8 data[BQ27XXX_DM_SZ];
995 bool has_data, dirty;
996};
997
998#define BQ27XXX_DM_BUF(di, i) { \
999 .class = (di)->dm_regs[i].subclass_id, \
1000 .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
1001}
1002
1003static inline u16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf,
1004 struct bq27xxx_dm_reg *reg)
1005{
1006 if (buf->class == reg->subclass_id &&
1007 buf->block == reg->offset / BQ27XXX_DM_SZ)
1008 return (u16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
1009
1010 return NULL;
1011}
1012
1013static const char * const bq27xxx_dm_reg_name[] = {
1014 [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
1015 [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
1016 [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
1017};
1018
1019
1020static bool bq27xxx_dt_to_nvm = true;
1021module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444);
1022MODULE_PARM_DESC(dt_monitored_battery_updates_nvm,
1023 "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
1024 "Users must set this =0 when installing a different type of battery!\n"
1025 "Default is =1."
1026#ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1027 "\nSetting this affects future kernel updates, not the current configuration."
1028#endif
1029);
1030
1031static int poll_interval_param_set(const char *val, const struct kernel_param *kp)
1032{
1033 struct bq27xxx_device_info *di;
1034 unsigned int prev_val = *(unsigned int *) kp->arg;
1035 int ret;
1036
1037 ret = param_set_uint(val, kp);
1038 if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
1039 return ret;
1040
1041 mutex_lock(&bq27xxx_list_lock);
1042 list_for_each_entry(di, &bq27xxx_battery_devices, list) {
1043 cancel_delayed_work_sync(&di->work);
1044 schedule_delayed_work(&di->work, 0);
1045 }
1046 mutex_unlock(&bq27xxx_list_lock);
1047
1048 return ret;
1049}
1050
1051static const struct kernel_param_ops param_ops_poll_interval = {
1052 .get = param_get_uint,
1053 .set = poll_interval_param_set,
1054};
1055
1056static unsigned int poll_interval = 360;
1057module_param_cb(poll_interval, ¶m_ops_poll_interval, &poll_interval, 0644);
1058MODULE_PARM_DESC(poll_interval,
1059 "battery poll interval in seconds - 0 disables polling");
1060
1061
1062
1063
1064
1065static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index,
1066 bool single)
1067{
1068 int ret;
1069
1070 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1071 return -EINVAL;
1072
1073 ret = di->bus.read(di, di->regs[reg_index], single);
1074 if (ret < 0)
1075 dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
1076 di->regs[reg_index], reg_index);
1077
1078 return ret;
1079}
1080
1081static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index,
1082 u16 value, bool single)
1083{
1084 int ret;
1085
1086 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1087 return -EINVAL;
1088
1089 if (!di->bus.write)
1090 return -EPERM;
1091
1092 ret = di->bus.write(di, di->regs[reg_index], value, single);
1093 if (ret < 0)
1094 dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
1095 di->regs[reg_index], reg_index);
1096
1097 return ret;
1098}
1099
1100static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index,
1101 u8 *data, int len)
1102{
1103 int ret;
1104
1105 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1106 return -EINVAL;
1107
1108 if (!di->bus.read_bulk)
1109 return -EPERM;
1110
1111 ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
1112 if (ret < 0)
1113 dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
1114 di->regs[reg_index], reg_index);
1115
1116 return ret;
1117}
1118
1119static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index,
1120 u8 *data, int len)
1121{
1122 int ret;
1123
1124 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1125 return -EINVAL;
1126
1127 if (!di->bus.write_bulk)
1128 return -EPERM;
1129
1130 ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
1131 if (ret < 0)
1132 dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
1133 di->regs[reg_index], reg_index);
1134
1135 return ret;
1136}
1137
1138static int bq27xxx_battery_seal(struct bq27xxx_device_info *di)
1139{
1140 int ret;
1141
1142 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false);
1143 if (ret < 0) {
1144 dev_err(di->dev, "bus error on seal: %d\n", ret);
1145 return ret;
1146 }
1147
1148 return 0;
1149}
1150
1151static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di)
1152{
1153 int ret;
1154
1155 if (di->unseal_key == 0) {
1156 dev_err(di->dev, "unseal failed due to missing key\n");
1157 return -EINVAL;
1158 }
1159
1160 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
1161 if (ret < 0)
1162 goto out;
1163
1164 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
1165 if (ret < 0)
1166 goto out;
1167
1168 return 0;
1169
1170out:
1171 dev_err(di->dev, "bus error on unseal: %d\n", ret);
1172 return ret;
1173}
1174
1175static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf)
1176{
1177 u16 sum = 0;
1178 int i;
1179
1180 for (i = 0; i < BQ27XXX_DM_SZ; i++)
1181 sum += buf->data[i];
1182 sum &= 0xff;
1183
1184 return 0xff - sum;
1185}
1186
1187static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di,
1188 struct bq27xxx_dm_buf *buf)
1189{
1190 int ret;
1191
1192 buf->has_data = false;
1193
1194 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1195 if (ret < 0)
1196 goto out;
1197
1198 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1199 if (ret < 0)
1200 goto out;
1201
1202 BQ27XXX_MSLEEP(1);
1203
1204 ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1205 if (ret < 0)
1206 goto out;
1207
1208 ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true);
1209 if (ret < 0)
1210 goto out;
1211
1212 if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) {
1213 ret = -EINVAL;
1214 goto out;
1215 }
1216
1217 buf->has_data = true;
1218 buf->dirty = false;
1219
1220 return 0;
1221
1222out:
1223 dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
1224 return ret;
1225}
1226
1227static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di,
1228 struct bq27xxx_dm_buf *buf,
1229 enum bq27xxx_dm_reg_id reg_id,
1230 unsigned int val)
1231{
1232 struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
1233 const char *str = bq27xxx_dm_reg_name[reg_id];
1234 u16 *prev = bq27xxx_dm_reg_ptr(buf, reg);
1235
1236 if (prev == NULL) {
1237 dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
1238 return;
1239 }
1240
1241 if (reg->bytes != 2) {
1242 dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
1243 return;
1244 }
1245
1246 if (!buf->has_data)
1247 return;
1248
1249 if (be16_to_cpup(prev) == val) {
1250 dev_info(di->dev, "%s has %u\n", str, val);
1251 return;
1252 }
1253
1254#ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1255 if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
1256#else
1257 if (!(di->opts & BQ27XXX_O_RAM)) {
1258#endif
1259
1260 dev_warn(di->dev, "%s has %u; update to %u disallowed "
1261#ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1262 "by dt_monitored_battery_updates_nvm=0"
1263#else
1264 "for flash/NVM data memory"
1265#endif
1266 "\n", str, be16_to_cpup(prev), val);
1267 return;
1268 }
1269
1270 dev_info(di->dev, "update %s to %u\n", str, val);
1271
1272 *prev = cpu_to_be16(val);
1273 buf->dirty = true;
1274}
1275
1276static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active)
1277{
1278 const int limit = 100;
1279 u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET;
1280 int ret, try = limit;
1281
1282 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false);
1283 if (ret < 0)
1284 return ret;
1285
1286 do {
1287 BQ27XXX_MSLEEP(25);
1288 ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false);
1289 if (ret < 0)
1290 return ret;
1291 } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
1292
1293 if (!try && di->chip != BQ27425) {
1294 dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
1295 return -EINVAL;
1296 }
1297
1298 if (limit - try > 3)
1299 dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
1300
1301 return 0;
1302}
1303
1304static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di)
1305{
1306 int ret = bq27xxx_battery_cfgupdate_priv(di, true);
1307 if (ret < 0 && ret != -EINVAL)
1308 dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
1309
1310 return ret;
1311}
1312
1313static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di)
1314{
1315 int ret = bq27xxx_battery_cfgupdate_priv(di, false);
1316 if (ret < 0 && ret != -EINVAL)
1317 dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
1318
1319 return ret;
1320}
1321
1322static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di,
1323 struct bq27xxx_dm_buf *buf)
1324{
1325 bool cfgup = di->opts & BQ27XXX_O_CFGUP;
1326 int ret;
1327
1328 if (!buf->dirty)
1329 return 0;
1330
1331 if (cfgup) {
1332 ret = bq27xxx_battery_set_cfgupdate(di);
1333 if (ret < 0)
1334 return ret;
1335 }
1336
1337 ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true);
1338 if (ret < 0)
1339 goto out;
1340
1341 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1342 if (ret < 0)
1343 goto out;
1344
1345 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1346 if (ret < 0)
1347 goto out;
1348
1349 BQ27XXX_MSLEEP(1);
1350
1351 ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1352 if (ret < 0)
1353 goto out;
1354
1355 ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM,
1356 bq27xxx_battery_checksum_dm_block(buf), true);
1357 if (ret < 0)
1358 goto out;
1359
1360
1361
1362
1363
1364
1365 if (cfgup) {
1366 BQ27XXX_MSLEEP(1);
1367 ret = bq27xxx_battery_soft_reset(di);
1368 if (ret < 0)
1369 return ret;
1370 } else {
1371 BQ27XXX_MSLEEP(100);
1372 }
1373
1374 buf->dirty = false;
1375
1376 return 0;
1377
1378out:
1379 if (cfgup)
1380 bq27xxx_battery_soft_reset(di);
1381
1382 dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
1383 return ret;
1384}
1385
1386static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di,
1387 struct power_supply_battery_info *info)
1388{
1389 struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY);
1390 struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE);
1391 bool updated;
1392
1393 if (bq27xxx_battery_unseal(di) < 0)
1394 return;
1395
1396 if (info->charge_full_design_uah != -EINVAL &&
1397 info->energy_full_design_uwh != -EINVAL) {
1398 bq27xxx_battery_read_dm_block(di, &bd);
1399
1400 bq27xxx_battery_update_dm_block(di, &bd,
1401 BQ27XXX_DM_DESIGN_CAPACITY,
1402 info->charge_full_design_uah / 1000);
1403 bq27xxx_battery_update_dm_block(di, &bd,
1404 BQ27XXX_DM_DESIGN_ENERGY,
1405 info->energy_full_design_uwh / 1000);
1406 }
1407
1408 if (info->voltage_min_design_uv != -EINVAL) {
1409 bool same = bd.class == bt.class && bd.block == bt.block;
1410 if (!same)
1411 bq27xxx_battery_read_dm_block(di, &bt);
1412 bq27xxx_battery_update_dm_block(di, same ? &bd : &bt,
1413 BQ27XXX_DM_TERMINATE_VOLTAGE,
1414 info->voltage_min_design_uv / 1000);
1415 }
1416
1417 updated = bd.dirty || bt.dirty;
1418
1419 bq27xxx_battery_write_dm_block(di, &bd);
1420 bq27xxx_battery_write_dm_block(di, &bt);
1421
1422 bq27xxx_battery_seal(di);
1423
1424 if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
1425 bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false);
1426 BQ27XXX_MSLEEP(300);
1427 }
1428
1429}
1430
1431static void bq27xxx_battery_settings(struct bq27xxx_device_info *di)
1432{
1433 struct power_supply_battery_info info = {};
1434 unsigned int min, max;
1435
1436 if (power_supply_get_battery_info(di->bat, &info) < 0)
1437 return;
1438
1439 if (!di->dm_regs) {
1440 dev_warn(di->dev, "data memory update not supported for chip\n");
1441 return;
1442 }
1443
1444 if (info.energy_full_design_uwh != info.charge_full_design_uah) {
1445 if (info.energy_full_design_uwh == -EINVAL)
1446 dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
1447 else if (info.charge_full_design_uah == -EINVAL)
1448 dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
1449 }
1450
1451
1452 max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
1453 if (info.energy_full_design_uwh > max * 1000) {
1454 dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
1455 info.energy_full_design_uwh);
1456 info.energy_full_design_uwh = -EINVAL;
1457 }
1458
1459
1460 max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
1461 if (info.charge_full_design_uah > max * 1000) {
1462 dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
1463 info.charge_full_design_uah);
1464 info.charge_full_design_uah = -EINVAL;
1465 }
1466
1467 min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
1468 max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
1469 if ((info.voltage_min_design_uv < min * 1000 ||
1470 info.voltage_min_design_uv > max * 1000) &&
1471 info.voltage_min_design_uv != -EINVAL) {
1472 dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
1473 info.voltage_min_design_uv);
1474 info.voltage_min_design_uv = -EINVAL;
1475 }
1476
1477 if ((info.energy_full_design_uwh != -EINVAL &&
1478 info.charge_full_design_uah != -EINVAL) ||
1479 info.voltage_min_design_uv != -EINVAL)
1480 bq27xxx_battery_set_config(di, &info);
1481}
1482
1483
1484
1485
1486
1487static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di)
1488{
1489 int soc;
1490
1491 if (di->opts & BQ27XXX_O_SOC_SI)
1492 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true);
1493 else
1494 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false);
1495
1496 if (soc < 0)
1497 dev_dbg(di->dev, "error reading State-of-Charge\n");
1498
1499 return soc;
1500}
1501
1502
1503
1504
1505
1506static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg)
1507{
1508 int charge;
1509
1510 charge = bq27xxx_read(di, reg, false);
1511 if (charge < 0) {
1512 dev_dbg(di->dev, "error reading charge register %02x: %d\n",
1513 reg, charge);
1514 return charge;
1515 }
1516
1517 if (di->opts & BQ27XXX_O_ZERO)
1518 charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1519 else
1520 charge *= 1000;
1521
1522 return charge;
1523}
1524
1525
1526
1527
1528
1529static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di)
1530{
1531 int flags;
1532
1533 if (di->opts & BQ27XXX_O_ZERO) {
1534 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1535 if (flags >= 0 && (flags & BQ27000_FLAG_CI))
1536 return -ENODATA;
1537 }
1538
1539 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC);
1540}
1541
1542
1543
1544
1545
1546static inline int bq27xxx_battery_read_rc(struct bq27xxx_device_info *di)
1547{
1548 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_RC);
1549}
1550
1551
1552
1553
1554
1555static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di)
1556{
1557 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC);
1558}
1559
1560
1561
1562
1563
1564static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di)
1565{
1566 int dcap;
1567
1568 if (di->opts & BQ27XXX_O_ZERO)
1569 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true);
1570 else
1571 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false);
1572
1573 if (dcap < 0) {
1574 dev_dbg(di->dev, "error reading initial last measured discharge\n");
1575 return dcap;
1576 }
1577
1578 if (di->opts & BQ27XXX_O_ZERO)
1579 dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1580 else
1581 dcap *= 1000;
1582
1583 return dcap;
1584}
1585
1586
1587
1588
1589
1590static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di)
1591{
1592 int ae;
1593
1594 ae = bq27xxx_read(di, BQ27XXX_REG_AE, false);
1595 if (ae < 0) {
1596 dev_dbg(di->dev, "error reading available energy\n");
1597 return ae;
1598 }
1599
1600 if (di->opts & BQ27XXX_O_ZERO)
1601 ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS;
1602 else
1603 ae *= 1000;
1604
1605 return ae;
1606}
1607
1608
1609
1610
1611
1612static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di)
1613{
1614 int temp;
1615
1616 temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false);
1617 if (temp < 0) {
1618 dev_err(di->dev, "error reading temperature\n");
1619 return temp;
1620 }
1621
1622 if (di->opts & BQ27XXX_O_ZERO)
1623 temp = 5 * temp / 2;
1624
1625 return temp;
1626}
1627
1628
1629
1630
1631
1632static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di)
1633{
1634 int cyct;
1635
1636 cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false);
1637 if (cyct < 0)
1638 dev_err(di->dev, "error reading cycle count total\n");
1639
1640 return cyct;
1641}
1642
1643
1644
1645
1646
1647static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg)
1648{
1649 int tval;
1650
1651 tval = bq27xxx_read(di, reg, false);
1652 if (tval < 0) {
1653 dev_dbg(di->dev, "error reading time register %02x: %d\n",
1654 reg, tval);
1655 return tval;
1656 }
1657
1658 if (tval == 65535)
1659 return -ENODATA;
1660
1661 return tval * 60;
1662}
1663
1664
1665
1666
1667
1668static int bq27xxx_battery_read_pwr_avg(struct bq27xxx_device_info *di)
1669{
1670 int tval;
1671
1672 tval = bq27xxx_read(di, BQ27XXX_REG_AP, false);
1673 if (tval < 0) {
1674 dev_err(di->dev, "error reading average power register %02x: %d\n",
1675 BQ27XXX_REG_AP, tval);
1676 return tval;
1677 }
1678
1679 if (di->opts & BQ27XXX_O_ZERO)
1680 return (tval * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
1681 else
1682 return tval;
1683}
1684
1685
1686
1687
1688static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags)
1689{
1690 if (di->opts & BQ27XXX_O_OTDC)
1691 return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD);
1692 if (di->opts & BQ27XXX_O_UTOT)
1693 return flags & BQ27XXX_FLAG_OT;
1694
1695 return false;
1696}
1697
1698
1699
1700
1701static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags)
1702{
1703 if (di->opts & BQ27XXX_O_UTOT)
1704 return flags & BQ27XXX_FLAG_UT;
1705
1706 return false;
1707}
1708
1709
1710
1711
1712static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags)
1713{
1714 if (di->opts & BQ27XXX_O_ZERO)
1715 return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF);
1716 else if (di->opts & BQ27Z561_O_BITS)
1717 return flags & BQ27Z561_FLAG_FDC;
1718 else
1719 return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF);
1720}
1721
1722static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di)
1723{
1724
1725 if (unlikely(bq27xxx_battery_overtemp(di, di->cache.flags)))
1726 return POWER_SUPPLY_HEALTH_OVERHEAT;
1727 if (unlikely(bq27xxx_battery_undertemp(di, di->cache.flags)))
1728 return POWER_SUPPLY_HEALTH_COLD;
1729 if (unlikely(bq27xxx_battery_dead(di, di->cache.flags)))
1730 return POWER_SUPPLY_HEALTH_DEAD;
1731
1732 return POWER_SUPPLY_HEALTH_GOOD;
1733}
1734
1735void bq27xxx_battery_update(struct bq27xxx_device_info *di)
1736{
1737 struct bq27xxx_reg_cache cache = {0, };
1738 bool has_ci_flag = di->opts & BQ27XXX_O_HAS_CI;
1739 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1740
1741 cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1742 if ((cache.flags & 0xff) == 0xff)
1743 cache.flags = -1;
1744 if (cache.flags >= 0) {
1745 cache.temperature = bq27xxx_battery_read_temperature(di);
1746 if (has_ci_flag && (cache.flags & BQ27000_FLAG_CI)) {
1747 dev_info_once(di->dev, "battery is not calibrated! ignoring capacity values\n");
1748 cache.capacity = -ENODATA;
1749 cache.energy = -ENODATA;
1750 cache.time_to_empty = -ENODATA;
1751 cache.time_to_empty_avg = -ENODATA;
1752 cache.time_to_full = -ENODATA;
1753 cache.charge_full = -ENODATA;
1754 cache.health = -ENODATA;
1755 } else {
1756 if (di->regs[BQ27XXX_REG_TTE] != INVALID_REG_ADDR)
1757 cache.time_to_empty = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE);
1758 if (di->regs[BQ27XXX_REG_TTECP] != INVALID_REG_ADDR)
1759 cache.time_to_empty_avg = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP);
1760 if (di->regs[BQ27XXX_REG_TTF] != INVALID_REG_ADDR)
1761 cache.time_to_full = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF);
1762
1763 cache.charge_full = bq27xxx_battery_read_fcc(di);
1764 cache.capacity = bq27xxx_battery_read_soc(di);
1765 if (di->regs[BQ27XXX_REG_AE] != INVALID_REG_ADDR)
1766 cache.energy = bq27xxx_battery_read_energy(di);
1767 di->cache.flags = cache.flags;
1768 cache.health = bq27xxx_battery_read_health(di);
1769 }
1770 if (di->regs[BQ27XXX_REG_CYCT] != INVALID_REG_ADDR)
1771 cache.cycle_count = bq27xxx_battery_read_cyct(di);
1772 if (di->regs[BQ27XXX_REG_AP] != INVALID_REG_ADDR)
1773 cache.power_avg = bq27xxx_battery_read_pwr_avg(di);
1774
1775
1776 if (di->charge_design_full <= 0)
1777 di->charge_design_full = bq27xxx_battery_read_dcap(di);
1778 }
1779
1780 if ((di->cache.capacity != cache.capacity) ||
1781 (di->cache.flags != cache.flags))
1782 power_supply_changed(di->bat);
1783
1784 if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
1785 di->cache = cache;
1786
1787 di->last_update = jiffies;
1788}
1789EXPORT_SYMBOL_GPL(bq27xxx_battery_update);
1790
1791static void bq27xxx_battery_poll(struct work_struct *work)
1792{
1793 struct bq27xxx_device_info *di =
1794 container_of(work, struct bq27xxx_device_info,
1795 work.work);
1796
1797 bq27xxx_battery_update(di);
1798
1799 if (poll_interval > 0)
1800 schedule_delayed_work(&di->work, poll_interval * HZ);
1801}
1802
1803
1804
1805
1806
1807
1808static int bq27xxx_battery_current(struct bq27xxx_device_info *di,
1809 union power_supply_propval *val)
1810{
1811 int curr;
1812 int flags;
1813
1814 curr = bq27xxx_read(di, BQ27XXX_REG_AI, false);
1815 if (curr < 0) {
1816 dev_err(di->dev, "error reading current\n");
1817 return curr;
1818 }
1819
1820 if (di->opts & BQ27XXX_O_ZERO) {
1821 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1822 if (!(flags & BQ27000_FLAG_CHGS)) {
1823 dev_dbg(di->dev, "negative current!\n");
1824 curr = -curr;
1825 }
1826
1827 val->intval = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1828 } else {
1829
1830 val->intval = -(int)((s16)curr) * 1000;
1831 }
1832
1833 return 0;
1834}
1835
1836static int bq27xxx_battery_status(struct bq27xxx_device_info *di,
1837 union power_supply_propval *val)
1838{
1839 int status;
1840
1841 if (di->opts & BQ27XXX_O_ZERO) {
1842 if (di->cache.flags & BQ27000_FLAG_FC)
1843 status = POWER_SUPPLY_STATUS_FULL;
1844 else if (di->cache.flags & BQ27000_FLAG_CHGS)
1845 status = POWER_SUPPLY_STATUS_CHARGING;
1846 else
1847 status = POWER_SUPPLY_STATUS_DISCHARGING;
1848 } else if (di->opts & BQ27Z561_O_BITS) {
1849 if (di->cache.flags & BQ27Z561_FLAG_FC)
1850 status = POWER_SUPPLY_STATUS_FULL;
1851 else if (di->cache.flags & BQ27Z561_FLAG_DIS_CH)
1852 status = POWER_SUPPLY_STATUS_DISCHARGING;
1853 else
1854 status = POWER_SUPPLY_STATUS_CHARGING;
1855 } else {
1856 if (di->cache.flags & BQ27XXX_FLAG_FC)
1857 status = POWER_SUPPLY_STATUS_FULL;
1858 else if (di->cache.flags & BQ27XXX_FLAG_DSC)
1859 status = POWER_SUPPLY_STATUS_DISCHARGING;
1860 else
1861 status = POWER_SUPPLY_STATUS_CHARGING;
1862 }
1863
1864 if ((status == POWER_SUPPLY_STATUS_DISCHARGING) &&
1865 (power_supply_am_i_supplied(di->bat) > 0))
1866 status = POWER_SUPPLY_STATUS_NOT_CHARGING;
1867
1868 val->intval = status;
1869
1870 return 0;
1871}
1872
1873static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di,
1874 union power_supply_propval *val)
1875{
1876 int level;
1877
1878 if (di->opts & BQ27XXX_O_ZERO) {
1879 if (di->cache.flags & BQ27000_FLAG_FC)
1880 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1881 else if (di->cache.flags & BQ27000_FLAG_EDV1)
1882 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1883 else if (di->cache.flags & BQ27000_FLAG_EDVF)
1884 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1885 else
1886 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1887 } else if (di->opts & BQ27Z561_O_BITS) {
1888 if (di->cache.flags & BQ27Z561_FLAG_FC)
1889 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1890 else if (di->cache.flags & BQ27Z561_FLAG_FDC)
1891 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1892 else
1893 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1894 } else {
1895 if (di->cache.flags & BQ27XXX_FLAG_FC)
1896 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1897 else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
1898 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1899 else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
1900 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1901 else
1902 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1903 }
1904
1905 val->intval = level;
1906
1907 return 0;
1908}
1909
1910
1911
1912
1913
1914static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di,
1915 union power_supply_propval *val)
1916{
1917 int volt;
1918
1919 volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
1920 if (volt < 0) {
1921 dev_err(di->dev, "error reading voltage\n");
1922 return volt;
1923 }
1924
1925 val->intval = volt * 1000;
1926
1927 return 0;
1928}
1929
1930static int bq27xxx_simple_value(int value,
1931 union power_supply_propval *val)
1932{
1933 if (value < 0)
1934 return value;
1935
1936 val->intval = value;
1937
1938 return 0;
1939}
1940
1941static int bq27xxx_battery_get_property(struct power_supply *psy,
1942 enum power_supply_property psp,
1943 union power_supply_propval *val)
1944{
1945 int ret = 0;
1946 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1947
1948 mutex_lock(&di->lock);
1949 if (time_is_before_jiffies(di->last_update + 5 * HZ)) {
1950 cancel_delayed_work_sync(&di->work);
1951 bq27xxx_battery_poll(&di->work.work);
1952 }
1953 mutex_unlock(&di->lock);
1954
1955 if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
1956 return -ENODEV;
1957
1958 switch (psp) {
1959 case POWER_SUPPLY_PROP_STATUS:
1960 ret = bq27xxx_battery_status(di, val);
1961 break;
1962 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
1963 ret = bq27xxx_battery_voltage(di, val);
1964 break;
1965 case POWER_SUPPLY_PROP_PRESENT:
1966 val->intval = di->cache.flags < 0 ? 0 : 1;
1967 break;
1968 case POWER_SUPPLY_PROP_CURRENT_NOW:
1969 ret = bq27xxx_battery_current(di, val);
1970 break;
1971 case POWER_SUPPLY_PROP_CAPACITY:
1972 ret = bq27xxx_simple_value(di->cache.capacity, val);
1973 break;
1974 case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
1975 ret = bq27xxx_battery_capacity_level(di, val);
1976 break;
1977 case POWER_SUPPLY_PROP_TEMP:
1978 ret = bq27xxx_simple_value(di->cache.temperature, val);
1979 if (ret == 0)
1980 val->intval -= 2731;
1981 break;
1982 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
1983 ret = bq27xxx_simple_value(di->cache.time_to_empty, val);
1984 break;
1985 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
1986 ret = bq27xxx_simple_value(di->cache.time_to_empty_avg, val);
1987 break;
1988 case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
1989 ret = bq27xxx_simple_value(di->cache.time_to_full, val);
1990 break;
1991 case POWER_SUPPLY_PROP_TECHNOLOGY:
1992 if (di->opts & BQ27XXX_O_MUL_CHEM)
1993 val->intval = POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
1994 else
1995 val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
1996 break;
1997 case POWER_SUPPLY_PROP_CHARGE_NOW:
1998 if (di->regs[BQ27XXX_REG_NAC] != INVALID_REG_ADDR)
1999 ret = bq27xxx_simple_value(bq27xxx_battery_read_nac(di), val);
2000 else
2001 ret = bq27xxx_simple_value(bq27xxx_battery_read_rc(di), val);
2002 break;
2003 case POWER_SUPPLY_PROP_CHARGE_FULL:
2004 ret = bq27xxx_simple_value(di->cache.charge_full, val);
2005 break;
2006 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
2007 ret = bq27xxx_simple_value(di->charge_design_full, val);
2008 break;
2009
2010
2011
2012
2013 case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
2014 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
2015 return -EINVAL;
2016 case POWER_SUPPLY_PROP_CYCLE_COUNT:
2017 ret = bq27xxx_simple_value(di->cache.cycle_count, val);
2018 break;
2019 case POWER_SUPPLY_PROP_ENERGY_NOW:
2020 ret = bq27xxx_simple_value(di->cache.energy, val);
2021 break;
2022 case POWER_SUPPLY_PROP_POWER_AVG:
2023 ret = bq27xxx_simple_value(di->cache.power_avg, val);
2024 break;
2025 case POWER_SUPPLY_PROP_HEALTH:
2026 ret = bq27xxx_simple_value(di->cache.health, val);
2027 break;
2028 case POWER_SUPPLY_PROP_MANUFACTURER:
2029 val->strval = BQ27XXX_MANUFACTURER;
2030 break;
2031 default:
2032 return -EINVAL;
2033 }
2034
2035 return ret;
2036}
2037
2038static void bq27xxx_external_power_changed(struct power_supply *psy)
2039{
2040 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
2041
2042 cancel_delayed_work_sync(&di->work);
2043 schedule_delayed_work(&di->work, 0);
2044}
2045
2046int bq27xxx_battery_setup(struct bq27xxx_device_info *di)
2047{
2048 struct power_supply_desc *psy_desc;
2049 struct power_supply_config psy_cfg = {
2050 .of_node = di->dev->of_node,
2051 .drv_data = di,
2052 };
2053
2054 INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
2055 mutex_init(&di->lock);
2056
2057 di->regs = bq27xxx_chip_data[di->chip].regs;
2058 di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
2059 di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs;
2060 di->opts = bq27xxx_chip_data[di->chip].opts;
2061
2062 psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
2063 if (!psy_desc)
2064 return -ENOMEM;
2065
2066 psy_desc->name = di->name;
2067 psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
2068 psy_desc->properties = bq27xxx_chip_data[di->chip].props;
2069 psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
2070 psy_desc->get_property = bq27xxx_battery_get_property;
2071 psy_desc->external_power_changed = bq27xxx_external_power_changed;
2072
2073 di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg);
2074 if (IS_ERR(di->bat))
2075 return dev_err_probe(di->dev, PTR_ERR(di->bat),
2076 "failed to register battery\n");
2077
2078 bq27xxx_battery_settings(di);
2079 bq27xxx_battery_update(di);
2080
2081 mutex_lock(&bq27xxx_list_lock);
2082 list_add(&di->list, &bq27xxx_battery_devices);
2083 mutex_unlock(&bq27xxx_list_lock);
2084
2085 return 0;
2086}
2087EXPORT_SYMBOL_GPL(bq27xxx_battery_setup);
2088
2089void bq27xxx_battery_teardown(struct bq27xxx_device_info *di)
2090{
2091
2092
2093
2094
2095
2096
2097 poll_interval = 0;
2098
2099 cancel_delayed_work_sync(&di->work);
2100
2101 power_supply_unregister(di->bat);
2102
2103 mutex_lock(&bq27xxx_list_lock);
2104 list_del(&di->list);
2105 mutex_unlock(&bq27xxx_list_lock);
2106
2107 mutex_destroy(&di->lock);
2108}
2109EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown);
2110
2111MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
2112MODULE_DESCRIPTION("BQ27xxx battery monitor driver");
2113MODULE_LICENSE("GPL");
2114
