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21#include <linux/kernel.h>
22#include <linux/types.h>
23#include <linux/pci.h>
24#include <linux/list.h>
25#include <linux/moduleparam.h>
26#include <linux/module.h>
27#include <linux/spinlock.h>
28#include <linux/interrupt.h>
29#include <linux/delay.h>
30#include <linux/uio.h>
31#include <linux/uaccess.h>
32#include <linux/fs.h>
33#include <linux/compat.h>
34#include <linux/blkdev.h>
35#include <linux/poll.h>
36#include <linux/irq_poll.h>
37
38#include <scsi/scsi.h>
39#include <scsi/scsi_cmnd.h>
40#include <scsi/scsi_device.h>
41#include <scsi/scsi_host.h>
42
43#include "megaraid_sas_fusion.h"
44#include "megaraid_sas.h"
45#include <asm/div64.h>
46
47#define LB_PENDING_CMDS_DEFAULT 4
48static unsigned int lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
49module_param(lb_pending_cmds, int, 0444);
50MODULE_PARM_DESC(lb_pending_cmds, "Change raid-1 load balancing outstanding "
51 "threshold. Valid Values are 1-128. Default: 4");
52
53
54#define ABS_DIFF(a, b) (((a) > (b)) ? ((a) - (b)) : ((b) - (a)))
55#define MR_LD_STATE_OPTIMAL 3
56
57#define SPAN_ROW_SIZE(map, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowSize)
58#define SPAN_ROW_DATA_SIZE(map_, ld, index_) (MR_LdSpanPtrGet(ld, index_, map)->spanRowDataSize)
59#define SPAN_INVALID 0xff
60
61
62static void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
63 PLD_SPAN_INFO ldSpanInfo);
64static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
65 u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
66 struct RAID_CONTEXT *pRAID_Context, struct MR_DRV_RAID_MAP_ALL *map);
67static u64 get_row_from_strip(struct megasas_instance *instance, u32 ld,
68 u64 strip, struct MR_DRV_RAID_MAP_ALL *map);
69
70u32 mega_mod64(u64 dividend, u32 divisor)
71{
72 u64 d;
73 u32 remainder;
74
75 if (!divisor)
76 printk(KERN_ERR "megasas : DIVISOR is zero, in div fn\n");
77 d = dividend;
78 remainder = do_div(d, divisor);
79 return remainder;
80}
81
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86
87
88
89static u64 mega_div64_32(uint64_t dividend, uint32_t divisor)
90{
91 u64 d = dividend;
92
93 if (!divisor)
94 printk(KERN_ERR "megasas : DIVISOR is zero in mod fn\n");
95
96 do_div(d, divisor);
97
98 return d;
99}
100
101struct MR_LD_RAID *MR_LdRaidGet(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
102{
103 return &map->raidMap.ldSpanMap[ld].ldRaid;
104}
105
106static struct MR_SPAN_BLOCK_INFO *MR_LdSpanInfoGet(u32 ld,
107 struct MR_DRV_RAID_MAP_ALL
108 *map)
109{
110 return &map->raidMap.ldSpanMap[ld].spanBlock[0];
111}
112
113static u8 MR_LdDataArmGet(u32 ld, u32 armIdx, struct MR_DRV_RAID_MAP_ALL *map)
114{
115 return map->raidMap.ldSpanMap[ld].dataArmMap[armIdx];
116}
117
118u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_DRV_RAID_MAP_ALL *map)
119{
120 return le16_to_cpu(map->raidMap.arMapInfo[ar].pd[arm]);
121}
122
123u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_DRV_RAID_MAP_ALL *map)
124{
125 return le16_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef);
126}
127
128__le16 MR_PdDevHandleGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
129{
130 return map->raidMap.devHndlInfo[pd].curDevHdl;
131}
132
133static u8 MR_PdInterfaceTypeGet(u32 pd, struct MR_DRV_RAID_MAP_ALL *map)
134{
135 return map->raidMap.devHndlInfo[pd].interfaceType;
136}
137
138u16 MR_GetLDTgtId(u32 ld, struct MR_DRV_RAID_MAP_ALL *map)
139{
140 return le16_to_cpu(map->raidMap.ldSpanMap[ld].ldRaid.targetId);
141}
142
143u16 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_DRV_RAID_MAP_ALL *map)
144{
145 return map->raidMap.ldTgtIdToLd[ldTgtId];
146}
147
148static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span,
149 struct MR_DRV_RAID_MAP_ALL *map)
150{
151 return &map->raidMap.ldSpanMap[ld].spanBlock[span].span;
152}
153
154
155
156
157static int MR_PopulateDrvRaidMap(struct megasas_instance *instance, u64 map_id)
158{
159 struct fusion_context *fusion = instance->ctrl_context;
160 struct MR_FW_RAID_MAP_ALL *fw_map_old = NULL;
161 struct MR_FW_RAID_MAP *pFwRaidMap = NULL;
162 int i, j;
163 u16 ld_count;
164 struct MR_FW_RAID_MAP_DYNAMIC *fw_map_dyn;
165 struct MR_FW_RAID_MAP_EXT *fw_map_ext;
166 struct MR_RAID_MAP_DESC_TABLE *desc_table;
167
168
169 struct MR_DRV_RAID_MAP_ALL *drv_map =
170 fusion->ld_drv_map[(map_id & 1)];
171 struct MR_DRV_RAID_MAP *pDrvRaidMap = &drv_map->raidMap;
172 void *raid_map_data = NULL;
173
174 memset(drv_map, 0, fusion->drv_map_sz);
175 memset(pDrvRaidMap->ldTgtIdToLd,
176 0xff, (sizeof(u16) * MAX_LOGICAL_DRIVES_DYN));
177
178 if (instance->max_raid_mapsize) {
179 fw_map_dyn = fusion->ld_map[(map_id & 1)];
180 desc_table =
181 (struct MR_RAID_MAP_DESC_TABLE *)((void *)fw_map_dyn + le32_to_cpu(fw_map_dyn->desc_table_offset));
182 if (desc_table != fw_map_dyn->raid_map_desc_table)
183 dev_dbg(&instance->pdev->dev, "offsets of desc table are not matching desc %p original %p\n",
184 desc_table, fw_map_dyn->raid_map_desc_table);
185
186 ld_count = (u16)le16_to_cpu(fw_map_dyn->ld_count);
187 pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
188 pDrvRaidMap->fpPdIoTimeoutSec =
189 fw_map_dyn->fp_pd_io_timeout_sec;
190 pDrvRaidMap->totalSize =
191 cpu_to_le32(sizeof(struct MR_DRV_RAID_MAP_ALL));
192
193 raid_map_data = (void *)fw_map_dyn +
194 le32_to_cpu(fw_map_dyn->desc_table_offset) +
195 le32_to_cpu(fw_map_dyn->desc_table_size);
196
197 for (i = 0; i < le32_to_cpu(fw_map_dyn->desc_table_num_elements); ++i) {
198 switch (le32_to_cpu(desc_table->raid_map_desc_type)) {
199 case RAID_MAP_DESC_TYPE_DEVHDL_INFO:
200 fw_map_dyn->dev_hndl_info =
201 (struct MR_DEV_HANDLE_INFO *)(raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
202 memcpy(pDrvRaidMap->devHndlInfo,
203 fw_map_dyn->dev_hndl_info,
204 sizeof(struct MR_DEV_HANDLE_INFO) *
205 le32_to_cpu(desc_table->raid_map_desc_elements));
206 break;
207 case RAID_MAP_DESC_TYPE_TGTID_INFO:
208 fw_map_dyn->ld_tgt_id_to_ld =
209 (u16 *)(raid_map_data +
210 le32_to_cpu(desc_table->raid_map_desc_offset));
211 for (j = 0; j < le32_to_cpu(desc_table->raid_map_desc_elements); j++) {
212 pDrvRaidMap->ldTgtIdToLd[j] =
213 le16_to_cpu(fw_map_dyn->ld_tgt_id_to_ld[j]);
214 }
215 break;
216 case RAID_MAP_DESC_TYPE_ARRAY_INFO:
217 fw_map_dyn->ar_map_info =
218 (struct MR_ARRAY_INFO *)
219 (raid_map_data + le32_to_cpu(desc_table->raid_map_desc_offset));
220 memcpy(pDrvRaidMap->arMapInfo,
221 fw_map_dyn->ar_map_info,
222 sizeof(struct MR_ARRAY_INFO) *
223 le32_to_cpu(desc_table->raid_map_desc_elements));
224 break;
225 case RAID_MAP_DESC_TYPE_SPAN_INFO:
226 fw_map_dyn->ld_span_map =
227 (struct MR_LD_SPAN_MAP *)
228 (raid_map_data +
229 le32_to_cpu(desc_table->raid_map_desc_offset));
230 memcpy(pDrvRaidMap->ldSpanMap,
231 fw_map_dyn->ld_span_map,
232 sizeof(struct MR_LD_SPAN_MAP) *
233 le32_to_cpu(desc_table->raid_map_desc_elements));
234 break;
235 default:
236 dev_dbg(&instance->pdev->dev, "wrong number of desctableElements %d\n",
237 fw_map_dyn->desc_table_num_elements);
238 }
239 ++desc_table;
240 }
241
242 } else if (instance->supportmax256vd) {
243 fw_map_ext =
244 (struct MR_FW_RAID_MAP_EXT *)fusion->ld_map[(map_id & 1)];
245 ld_count = (u16)le16_to_cpu(fw_map_ext->ldCount);
246 if (ld_count > MAX_LOGICAL_DRIVES_EXT) {
247 dev_dbg(&instance->pdev->dev, "megaraid_sas: LD count exposed in RAID map in not valid\n");
248 return 1;
249 }
250
251 pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
252 pDrvRaidMap->fpPdIoTimeoutSec = fw_map_ext->fpPdIoTimeoutSec;
253 for (i = 0; i < (MAX_LOGICAL_DRIVES_EXT); i++)
254 pDrvRaidMap->ldTgtIdToLd[i] =
255 (u16)fw_map_ext->ldTgtIdToLd[i];
256 memcpy(pDrvRaidMap->ldSpanMap, fw_map_ext->ldSpanMap,
257 sizeof(struct MR_LD_SPAN_MAP) * ld_count);
258 memcpy(pDrvRaidMap->arMapInfo, fw_map_ext->arMapInfo,
259 sizeof(struct MR_ARRAY_INFO) * MAX_API_ARRAYS_EXT);
260 memcpy(pDrvRaidMap->devHndlInfo, fw_map_ext->devHndlInfo,
261 sizeof(struct MR_DEV_HANDLE_INFO) *
262 MAX_RAIDMAP_PHYSICAL_DEVICES);
263
264
265
266
267 pDrvRaidMap->totalSize =
268 cpu_to_le32(sizeof(struct MR_FW_RAID_MAP_EXT));
269 } else {
270 fw_map_old = (struct MR_FW_RAID_MAP_ALL *)
271 fusion->ld_map[(map_id & 1)];
272 pFwRaidMap = &fw_map_old->raidMap;
273 ld_count = (u16)le32_to_cpu(pFwRaidMap->ldCount);
274 if (ld_count > MAX_LOGICAL_DRIVES) {
275 dev_dbg(&instance->pdev->dev,
276 "LD count exposed in RAID map in not valid\n");
277 return 1;
278 }
279
280 pDrvRaidMap->totalSize = pFwRaidMap->totalSize;
281 pDrvRaidMap->ldCount = (__le16)cpu_to_le16(ld_count);
282 pDrvRaidMap->fpPdIoTimeoutSec = pFwRaidMap->fpPdIoTimeoutSec;
283 for (i = 0; i < MAX_RAIDMAP_LOGICAL_DRIVES + MAX_RAIDMAP_VIEWS; i++)
284 pDrvRaidMap->ldTgtIdToLd[i] =
285 (u8)pFwRaidMap->ldTgtIdToLd[i];
286 for (i = 0; i < ld_count; i++) {
287 pDrvRaidMap->ldSpanMap[i] = pFwRaidMap->ldSpanMap[i];
288 }
289 memcpy(pDrvRaidMap->arMapInfo, pFwRaidMap->arMapInfo,
290 sizeof(struct MR_ARRAY_INFO) * MAX_RAIDMAP_ARRAYS);
291 memcpy(pDrvRaidMap->devHndlInfo, pFwRaidMap->devHndlInfo,
292 sizeof(struct MR_DEV_HANDLE_INFO) *
293 MAX_RAIDMAP_PHYSICAL_DEVICES);
294 }
295
296 return 0;
297}
298
299
300
301
302u8 MR_ValidateMapInfo(struct megasas_instance *instance, u64 map_id)
303{
304 struct fusion_context *fusion;
305 struct MR_DRV_RAID_MAP_ALL *drv_map;
306 struct MR_DRV_RAID_MAP *pDrvRaidMap;
307 struct LD_LOAD_BALANCE_INFO *lbInfo;
308 PLD_SPAN_INFO ldSpanInfo;
309 struct MR_LD_RAID *raid;
310 u16 num_lds, i;
311 u16 ld;
312 u32 expected_size;
313
314 if (MR_PopulateDrvRaidMap(instance, map_id))
315 return 0;
316
317 fusion = instance->ctrl_context;
318 drv_map = fusion->ld_drv_map[(map_id & 1)];
319 pDrvRaidMap = &drv_map->raidMap;
320
321 lbInfo = fusion->load_balance_info;
322 ldSpanInfo = fusion->log_to_span;
323
324 if (instance->max_raid_mapsize)
325 expected_size = sizeof(struct MR_DRV_RAID_MAP_ALL);
326 else if (instance->supportmax256vd)
327 expected_size = sizeof(struct MR_FW_RAID_MAP_EXT);
328 else
329 expected_size =
330 (sizeof(struct MR_FW_RAID_MAP) - sizeof(struct MR_LD_SPAN_MAP) +
331 (sizeof(struct MR_LD_SPAN_MAP) * le16_to_cpu(pDrvRaidMap->ldCount)));
332
333 if (le32_to_cpu(pDrvRaidMap->totalSize) != expected_size) {
334 dev_dbg(&instance->pdev->dev, "megasas: map info structure size 0x%x",
335 le32_to_cpu(pDrvRaidMap->totalSize));
336 dev_dbg(&instance->pdev->dev, "is not matching expected size 0x%x\n",
337 (unsigned int)expected_size);
338 dev_err(&instance->pdev->dev, "megasas: span map %x, pDrvRaidMap->totalSize : %x\n",
339 (unsigned int)sizeof(struct MR_LD_SPAN_MAP),
340 le32_to_cpu(pDrvRaidMap->totalSize));
341 return 0;
342 }
343
344 if (instance->UnevenSpanSupport)
345 mr_update_span_set(drv_map, ldSpanInfo);
346
347 if (lbInfo)
348 mr_update_load_balance_params(drv_map, lbInfo);
349
350 num_lds = le16_to_cpu(drv_map->raidMap.ldCount);
351
352
353 for (i = 0; (num_lds > 0) && (i < MAX_LOGICAL_DRIVES_EXT); i++) {
354 ld = MR_TargetIdToLdGet(i, drv_map);
355
356
357 if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
358 continue;
359
360 raid = MR_LdRaidGet(ld, drv_map);
361 le32_to_cpus((u32 *)&raid->capability);
362
363 num_lds--;
364 }
365
366 return 1;
367}
368
369static u32 MR_GetSpanBlock(u32 ld, u64 row, u64 *span_blk,
370 struct MR_DRV_RAID_MAP_ALL *map)
371{
372 struct MR_SPAN_BLOCK_INFO *pSpanBlock = MR_LdSpanInfoGet(ld, map);
373 struct MR_QUAD_ELEMENT *quad;
374 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
375 u32 span, j;
376
377 for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) {
378
379 for (j = 0; j < le32_to_cpu(pSpanBlock->block_span_info.noElements); j++) {
380 quad = &pSpanBlock->block_span_info.quad[j];
381
382 if (le32_to_cpu(quad->diff) == 0)
383 return SPAN_INVALID;
384 if (le64_to_cpu(quad->logStart) <= row && row <=
385 le64_to_cpu(quad->logEnd) && (mega_mod64(row - le64_to_cpu(quad->logStart),
386 le32_to_cpu(quad->diff))) == 0) {
387 if (span_blk != NULL) {
388 u64 blk;
389 blk = mega_div64_32((row-le64_to_cpu(quad->logStart)), le32_to_cpu(quad->diff));
390
391 blk = (blk + le64_to_cpu(quad->offsetInSpan)) << raid->stripeShift;
392 *span_blk = blk;
393 }
394 return span;
395 }
396 }
397 }
398 return SPAN_INVALID;
399}
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419static u32 mr_spanset_get_span_block(struct megasas_instance *instance,
420 u32 ld, u64 row, u64 *span_blk, struct MR_DRV_RAID_MAP_ALL *map)
421{
422 struct fusion_context *fusion = instance->ctrl_context;
423 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
424 LD_SPAN_SET *span_set;
425 struct MR_QUAD_ELEMENT *quad;
426 u32 span, info;
427 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
428
429 for (info = 0; info < MAX_QUAD_DEPTH; info++) {
430 span_set = &(ldSpanInfo[ld].span_set[info]);
431
432 if (span_set->span_row_data_width == 0)
433 break;
434
435 if (row > span_set->data_row_end)
436 continue;
437
438 for (span = 0; span < raid->spanDepth; span++)
439 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
440 block_span_info.noElements) >= info+1) {
441 quad = &map->raidMap.ldSpanMap[ld].
442 spanBlock[span].
443 block_span_info.quad[info];
444 if (le32_to_cpu(quad->diff) == 0)
445 return SPAN_INVALID;
446 if (le64_to_cpu(quad->logStart) <= row &&
447 row <= le64_to_cpu(quad->logEnd) &&
448 (mega_mod64(row - le64_to_cpu(quad->logStart),
449 le32_to_cpu(quad->diff))) == 0) {
450 if (span_blk != NULL) {
451 u64 blk;
452 blk = mega_div64_32
453 ((row - le64_to_cpu(quad->logStart)),
454 le32_to_cpu(quad->diff));
455 blk = (blk + le64_to_cpu(quad->offsetInSpan))
456 << raid->stripeShift;
457 *span_blk = blk;
458 }
459 return span;
460 }
461 }
462 }
463 return SPAN_INVALID;
464}
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482static u64 get_row_from_strip(struct megasas_instance *instance,
483 u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
484{
485 struct fusion_context *fusion = instance->ctrl_context;
486 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
487 LD_SPAN_SET *span_set;
488 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
489 u32 info, strip_offset, span, span_offset;
490 u64 span_set_Strip, span_set_Row, retval;
491
492 for (info = 0; info < MAX_QUAD_DEPTH; info++) {
493 span_set = &(ldSpanInfo[ld].span_set[info]);
494
495 if (span_set->span_row_data_width == 0)
496 break;
497 if (strip > span_set->data_strip_end)
498 continue;
499
500 span_set_Strip = strip - span_set->data_strip_start;
501 strip_offset = mega_mod64(span_set_Strip,
502 span_set->span_row_data_width);
503 span_set_Row = mega_div64_32(span_set_Strip,
504 span_set->span_row_data_width) * span_set->diff;
505 for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
506 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
507 block_span_info.noElements) >= info+1) {
508 if (strip_offset >=
509 span_set->strip_offset[span])
510 span_offset++;
511 else
512 break;
513 }
514
515 retval = (span_set->data_row_start + span_set_Row +
516 (span_offset - 1));
517 return retval;
518 }
519 return -1LLU;
520}
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539static u64 get_strip_from_row(struct megasas_instance *instance,
540 u32 ld, u64 row, struct MR_DRV_RAID_MAP_ALL *map)
541{
542 struct fusion_context *fusion = instance->ctrl_context;
543 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
544 LD_SPAN_SET *span_set;
545 struct MR_QUAD_ELEMENT *quad;
546 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
547 u32 span, info;
548 u64 strip;
549
550 for (info = 0; info < MAX_QUAD_DEPTH; info++) {
551 span_set = &(ldSpanInfo[ld].span_set[info]);
552
553 if (span_set->span_row_data_width == 0)
554 break;
555 if (row > span_set->data_row_end)
556 continue;
557
558 for (span = 0; span < raid->spanDepth; span++)
559 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
560 block_span_info.noElements) >= info+1) {
561 quad = &map->raidMap.ldSpanMap[ld].
562 spanBlock[span].block_span_info.quad[info];
563 if (le64_to_cpu(quad->logStart) <= row &&
564 row <= le64_to_cpu(quad->logEnd) &&
565 mega_mod64((row - le64_to_cpu(quad->logStart)),
566 le32_to_cpu(quad->diff)) == 0) {
567 strip = mega_div64_32
568 (((row - span_set->data_row_start)
569 - le64_to_cpu(quad->logStart)),
570 le32_to_cpu(quad->diff));
571 strip *= span_set->span_row_data_width;
572 strip += span_set->data_strip_start;
573 strip += span_set->strip_offset[span];
574 return strip;
575 }
576 }
577 }
578 dev_err(&instance->pdev->dev, "get_strip_from_row"
579 "returns invalid strip for ld=%x, row=%lx\n",
580 ld, (long unsigned int)row);
581 return -1;
582}
583
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600static u32 get_arm_from_strip(struct megasas_instance *instance,
601 u32 ld, u64 strip, struct MR_DRV_RAID_MAP_ALL *map)
602{
603 struct fusion_context *fusion = instance->ctrl_context;
604 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
605 LD_SPAN_SET *span_set;
606 PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
607 u32 info, strip_offset, span, span_offset, retval;
608
609 for (info = 0 ; info < MAX_QUAD_DEPTH; info++) {
610 span_set = &(ldSpanInfo[ld].span_set[info]);
611
612 if (span_set->span_row_data_width == 0)
613 break;
614 if (strip > span_set->data_strip_end)
615 continue;
616
617 strip_offset = (uint)mega_mod64
618 ((strip - span_set->data_strip_start),
619 span_set->span_row_data_width);
620
621 for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
622 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
623 block_span_info.noElements) >= info+1) {
624 if (strip_offset >=
625 span_set->strip_offset[span])
626 span_offset =
627 span_set->strip_offset[span];
628 else
629 break;
630 }
631
632 retval = (strip_offset - span_offset);
633 return retval;
634 }
635
636 dev_err(&instance->pdev->dev, "get_arm_from_strip"
637 "returns invalid arm for ld=%x strip=%lx\n",
638 ld, (long unsigned int)strip);
639
640 return -1;
641}
642
643
644static u8 get_arm(struct megasas_instance *instance, u32 ld, u8 span, u64 stripe,
645 struct MR_DRV_RAID_MAP_ALL *map)
646{
647 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
648
649 u32 arm = 0;
650
651 switch (raid->level) {
652 case 0:
653 case 5:
654 case 6:
655 arm = mega_mod64(stripe, SPAN_ROW_SIZE(map, ld, span));
656 break;
657 case 1:
658
659 arm = get_arm_from_strip(instance, ld, stripe, map);
660 if (arm != -1U)
661 arm *= 2;
662 break;
663 }
664
665 return arm;
666}
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
687 u64 stripRow, u16 stripRef, struct IO_REQUEST_INFO *io_info,
688 struct RAID_CONTEXT *pRAID_Context,
689 struct MR_DRV_RAID_MAP_ALL *map)
690{
691 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
692 u32 pd, arRef, r1_alt_pd;
693 u8 physArm, span;
694 u64 row;
695 u8 retval = true;
696 u64 *pdBlock = &io_info->pdBlock;
697 __le16 *pDevHandle = &io_info->devHandle;
698 u8 *pPdInterface = &io_info->pd_interface;
699 u32 logArm, rowMod, armQ, arm;
700
701 *pDevHandle = cpu_to_le16(MR_DEVHANDLE_INVALID);
702
703
704 row = io_info->start_row;
705 span = io_info->start_span;
706
707
708 if (raid->level == 6) {
709 logArm = get_arm_from_strip(instance, ld, stripRow, map);
710 if (logArm == -1U)
711 return false;
712 rowMod = mega_mod64(row, SPAN_ROW_SIZE(map, ld, span));
713 armQ = SPAN_ROW_SIZE(map, ld, span) - 1 - rowMod;
714 arm = armQ + 1 + logArm;
715 if (arm >= SPAN_ROW_SIZE(map, ld, span))
716 arm -= SPAN_ROW_SIZE(map, ld, span);
717 physArm = (u8)arm;
718 } else
719
720 physArm = get_arm(instance, ld, span, stripRow, map);
721 if (physArm == 0xFF)
722 return false;
723
724 arRef = MR_LdSpanArrayGet(ld, span, map);
725 pd = MR_ArPdGet(arRef, physArm, map);
726
727 if (pd != MR_PD_INVALID) {
728 *pDevHandle = MR_PdDevHandleGet(pd, map);
729 *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
730
731 if ((instance->adapter_type >= VENTURA_SERIES) &&
732 (raid->level == 1) &&
733 !io_info->isRead) {
734 r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
735 if (r1_alt_pd != MR_PD_INVALID)
736 io_info->r1_alt_dev_handle =
737 MR_PdDevHandleGet(r1_alt_pd, map);
738 }
739 } else {
740 if ((raid->level >= 5) &&
741 ((instance->adapter_type == THUNDERBOLT_SERIES) ||
742 ((instance->adapter_type == INVADER_SERIES) &&
743 (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
744 pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
745 else if (raid->level == 1) {
746 physArm = physArm + 1;
747 pd = MR_ArPdGet(arRef, physArm, map);
748 if (pd != MR_PD_INVALID) {
749 *pDevHandle = MR_PdDevHandleGet(pd, map);
750 *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
751 }
752 }
753 }
754
755 *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
756 if (instance->adapter_type >= VENTURA_SERIES) {
757 ((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
758 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
759 io_info->span_arm =
760 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
761 } else {
762 pRAID_Context->span_arm =
763 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
764 io_info->span_arm = pRAID_Context->span_arm;
765 }
766 io_info->pd_after_lb = pd;
767 return retval;
768}
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787static u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
788 u16 stripRef, struct IO_REQUEST_INFO *io_info,
789 struct RAID_CONTEXT *pRAID_Context,
790 struct MR_DRV_RAID_MAP_ALL *map)
791{
792 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
793 u32 pd, arRef, r1_alt_pd;
794 u8 physArm, span;
795 u64 row;
796 u8 retval = true;
797 u64 *pdBlock = &io_info->pdBlock;
798 __le16 *pDevHandle = &io_info->devHandle;
799 u8 *pPdInterface = &io_info->pd_interface;
800
801 *pDevHandle = cpu_to_le16(MR_DEVHANDLE_INVALID);
802
803 row = mega_div64_32(stripRow, raid->rowDataSize);
804
805 if (raid->level == 6) {
806
807 u32 logArm = mega_mod64(stripRow, raid->rowDataSize);
808 u32 rowMod, armQ, arm;
809
810 if (raid->rowSize == 0)
811 return false;
812
813 rowMod = mega_mod64(row, raid->rowSize);
814 armQ = raid->rowSize-1-rowMod;
815 arm = armQ+1+logArm;
816 if (arm >= raid->rowSize)
817 arm -= raid->rowSize;
818 physArm = (u8)arm;
819 } else {
820 if (raid->modFactor == 0)
821 return false;
822 physArm = MR_LdDataArmGet(ld, mega_mod64(stripRow,
823 raid->modFactor),
824 map);
825 }
826
827 if (raid->spanDepth == 1) {
828 span = 0;
829 *pdBlock = row << raid->stripeShift;
830 } else {
831 span = (u8)MR_GetSpanBlock(ld, row, pdBlock, map);
832 if (span == SPAN_INVALID)
833 return false;
834 }
835
836
837 arRef = MR_LdSpanArrayGet(ld, span, map);
838 pd = MR_ArPdGet(arRef, physArm, map);
839
840 if (pd != MR_PD_INVALID) {
841
842 *pDevHandle = MR_PdDevHandleGet(pd, map);
843 *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
844
845 if ((instance->adapter_type >= VENTURA_SERIES) &&
846 (raid->level == 1) &&
847 !io_info->isRead) {
848 r1_alt_pd = MR_ArPdGet(arRef, physArm + 1, map);
849 if (r1_alt_pd != MR_PD_INVALID)
850 io_info->r1_alt_dev_handle =
851 MR_PdDevHandleGet(r1_alt_pd, map);
852 }
853 } else {
854 if ((raid->level >= 5) &&
855 ((instance->adapter_type == THUNDERBOLT_SERIES) ||
856 ((instance->adapter_type == INVADER_SERIES) &&
857 (raid->regTypeReqOnRead != REGION_TYPE_UNUSED))))
858 pRAID_Context->reg_lock_flags = REGION_TYPE_EXCLUSIVE;
859 else if (raid->level == 1) {
860
861 physArm = physArm + 1;
862 pd = MR_ArPdGet(arRef, physArm, map);
863 if (pd != MR_PD_INVALID) {
864
865 *pDevHandle = MR_PdDevHandleGet(pd, map);
866 *pPdInterface = MR_PdInterfaceTypeGet(pd, map);
867 }
868 }
869 }
870
871 *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
872 if (instance->adapter_type >= VENTURA_SERIES) {
873 ((struct RAID_CONTEXT_G35 *)pRAID_Context)->span_arm =
874 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
875 io_info->span_arm =
876 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
877 } else {
878 pRAID_Context->span_arm =
879 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | physArm;
880 io_info->span_arm = pRAID_Context->span_arm;
881 }
882 io_info->pd_after_lb = pd;
883 return retval;
884}
885
886
887
888
889
890
891
892
893
894
895
896
897
898static void mr_get_phy_params_r56_rmw(struct megasas_instance *instance,
899 u32 ld, u64 stripNo,
900 struct IO_REQUEST_INFO *io_info,
901 struct RAID_CONTEXT_G35 *pRAID_Context,
902 struct MR_DRV_RAID_MAP_ALL *map)
903{
904 struct MR_LD_RAID *raid = MR_LdRaidGet(ld, map);
905 u8 span, dataArms, arms, dataArm, logArm;
906 s8 rightmostParityArm, PParityArm;
907 u64 rowNum;
908 u64 *pdBlock = &io_info->pdBlock;
909
910 dataArms = raid->rowDataSize;
911 arms = raid->rowSize;
912
913 rowNum = mega_div64_32(stripNo, dataArms);
914
915 rightmostParityArm = (arms - 1) - mega_mod64(rowNum, arms);
916
917
918 logArm = mega_mod64(stripNo, dataArms);
919
920 dataArm = mega_mod64((rightmostParityArm + 1 + logArm), arms);
921
922 if (raid->spanDepth == 1) {
923 span = 0;
924 } else {
925 span = (u8)MR_GetSpanBlock(ld, rowNum, pdBlock, map);
926 if (span == SPAN_INVALID)
927 return;
928 }
929
930 if (raid->level == 6) {
931
932 PParityArm = (arms - 2) - mega_mod64(rowNum, arms);
933
934 if (PParityArm < 0)
935 PParityArm += arms;
936
937
938 pRAID_Context->flow_specific.r56_arm_map = rightmostParityArm;
939 pRAID_Context->flow_specific.r56_arm_map |=
940 (u16)(PParityArm << RAID_CTX_R56_P_ARM_SHIFT);
941 } else {
942 pRAID_Context->flow_specific.r56_arm_map |=
943 (u16)(rightmostParityArm << RAID_CTX_R56_P_ARM_SHIFT);
944 }
945
946 pRAID_Context->reg_lock_row_lba = cpu_to_le64(rowNum);
947 pRAID_Context->flow_specific.r56_arm_map |=
948 (u16)(logArm << RAID_CTX_R56_LOG_ARM_SHIFT);
949 cpu_to_le16s(&pRAID_Context->flow_specific.r56_arm_map);
950 pRAID_Context->span_arm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | dataArm;
951 pRAID_Context->raid_flags = (MR_RAID_FLAGS_IO_SUB_TYPE_R56_DIV_OFFLOAD <<
952 MR_RAID_CTX_RAID_FLAGS_IO_SUB_TYPE_SHIFT);
953
954 return;
955}
956
957
958
959
960
961
962
963
964
965
966u8
967MR_BuildRaidContext(struct megasas_instance *instance,
968 struct IO_REQUEST_INFO *io_info,
969 struct RAID_CONTEXT *pRAID_Context,
970 struct MR_DRV_RAID_MAP_ALL *map, u8 **raidLUN)
971{
972 struct fusion_context *fusion;
973 struct MR_LD_RAID *raid;
974 u32 stripSize, stripe_mask;
975 u64 endLba, endStrip, endRow, start_row, start_strip;
976 u64 regStart;
977 u32 regSize;
978 u8 num_strips, numRows;
979 u16 ref_in_start_stripe, ref_in_end_stripe;
980 u64 ldStartBlock;
981 u32 numBlocks, ldTgtId;
982 u8 isRead;
983 u8 retval = 0;
984 u8 startlba_span = SPAN_INVALID;
985 u64 *pdBlock = &io_info->pdBlock;
986 u16 ld;
987
988 ldStartBlock = io_info->ldStartBlock;
989 numBlocks = io_info->numBlocks;
990 ldTgtId = io_info->ldTgtId;
991 isRead = io_info->isRead;
992 io_info->IoforUnevenSpan = 0;
993 io_info->start_span = SPAN_INVALID;
994 fusion = instance->ctrl_context;
995
996 ld = MR_TargetIdToLdGet(ldTgtId, map);
997 raid = MR_LdRaidGet(ld, map);
998
999 io_info->ra_capable = raid->capability.ra_capable;
1000
1001
1002
1003
1004
1005 if (raid->rowDataSize == 0) {
1006 if (MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize == 0)
1007 return false;
1008 else if (instance->UnevenSpanSupport) {
1009 io_info->IoforUnevenSpan = 1;
1010 } else {
1011 dev_info(&instance->pdev->dev,
1012 "raid->rowDataSize is 0, but has SPAN[0]"
1013 "rowDataSize = 0x%0x,"
1014 "but there is _NO_ UnevenSpanSupport\n",
1015 MR_LdSpanPtrGet(ld, 0, map)->spanRowDataSize);
1016 return false;
1017 }
1018 }
1019
1020 stripSize = 1 << raid->stripeShift;
1021 stripe_mask = stripSize-1;
1022
1023 io_info->data_arms = raid->rowDataSize;
1024
1025
1026
1027
1028 start_strip = ldStartBlock >> raid->stripeShift;
1029 ref_in_start_stripe = (u16)(ldStartBlock & stripe_mask);
1030 endLba = ldStartBlock + numBlocks - 1;
1031 ref_in_end_stripe = (u16)(endLba & stripe_mask);
1032 endStrip = endLba >> raid->stripeShift;
1033 num_strips = (u8)(endStrip - start_strip + 1);
1034
1035 if (io_info->IoforUnevenSpan) {
1036 start_row = get_row_from_strip(instance, ld, start_strip, map);
1037 endRow = get_row_from_strip(instance, ld, endStrip, map);
1038 if (start_row == -1ULL || endRow == -1ULL) {
1039 dev_info(&instance->pdev->dev, "return from %s %d."
1040 "Send IO w/o region lock.\n",
1041 __func__, __LINE__);
1042 return false;
1043 }
1044
1045 if (raid->spanDepth == 1) {
1046 startlba_span = 0;
1047 *pdBlock = start_row << raid->stripeShift;
1048 } else
1049 startlba_span = (u8)mr_spanset_get_span_block(instance,
1050 ld, start_row, pdBlock, map);
1051 if (startlba_span == SPAN_INVALID) {
1052 dev_info(&instance->pdev->dev, "return from %s %d"
1053 "for row 0x%llx,start strip %llx"
1054 "endSrip %llx\n", __func__, __LINE__,
1055 (unsigned long long)start_row,
1056 (unsigned long long)start_strip,
1057 (unsigned long long)endStrip);
1058 return false;
1059 }
1060 io_info->start_span = startlba_span;
1061 io_info->start_row = start_row;
1062 } else {
1063 start_row = mega_div64_32(start_strip, raid->rowDataSize);
1064 endRow = mega_div64_32(endStrip, raid->rowDataSize);
1065 }
1066 numRows = (u8)(endRow - start_row + 1);
1067
1068
1069
1070
1071
1072
1073 regStart = start_row << raid->stripeShift;
1074
1075 regSize = stripSize;
1076
1077 io_info->do_fp_rlbypass = raid->capability.fpBypassRegionLock;
1078
1079
1080 if (raid->capability.fpCapable) {
1081 if (isRead)
1082 io_info->fpOkForIo = (raid->capability.fpReadCapable &&
1083 ((num_strips == 1) ||
1084 raid->capability.
1085 fpReadAcrossStripe));
1086 else
1087 io_info->fpOkForIo = (raid->capability.fpWriteCapable &&
1088 ((num_strips == 1) ||
1089 raid->capability.
1090 fpWriteAcrossStripe));
1091 } else
1092 io_info->fpOkForIo = false;
1093
1094 if (numRows == 1) {
1095
1096 if (num_strips == 1) {
1097 regStart += ref_in_start_stripe;
1098 regSize = numBlocks;
1099 }
1100
1101 } else if (io_info->IoforUnevenSpan == 0) {
1102
1103
1104
1105
1106 if (start_strip == (start_row + 1) * raid->rowDataSize - 1) {
1107 regStart += ref_in_start_stripe;
1108
1109
1110 regSize = stripSize - ref_in_start_stripe;
1111 }
1112
1113
1114 if (numRows > 2)
1115 regSize += (numRows-2) << raid->stripeShift;
1116
1117
1118 if (endStrip == endRow*raid->rowDataSize)
1119 regSize += ref_in_end_stripe+1;
1120 else
1121 regSize += stripSize;
1122 } else {
1123
1124
1125
1126
1127 if (start_strip == (get_strip_from_row(instance, ld, start_row, map) +
1128 SPAN_ROW_DATA_SIZE(map, ld, startlba_span) - 1)) {
1129 regStart += ref_in_start_stripe;
1130
1131
1132
1133 regSize = stripSize - ref_in_start_stripe;
1134 }
1135
1136
1137 if (numRows > 2)
1138
1139 regSize += (numRows-2) << raid->stripeShift;
1140
1141
1142 if (endStrip == get_strip_from_row(instance, ld, endRow, map))
1143 regSize += ref_in_end_stripe + 1;
1144 else
1145 regSize += stripSize;
1146 }
1147
1148 pRAID_Context->timeout_value =
1149 cpu_to_le16(raid->fpIoTimeoutForLd ?
1150 raid->fpIoTimeoutForLd :
1151 map->raidMap.fpPdIoTimeoutSec);
1152 if (instance->adapter_type == INVADER_SERIES)
1153 pRAID_Context->reg_lock_flags = (isRead) ?
1154 raid->regTypeReqOnRead : raid->regTypeReqOnWrite;
1155 else if (instance->adapter_type == THUNDERBOLT_SERIES)
1156 pRAID_Context->reg_lock_flags = (isRead) ?
1157 REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite;
1158 pRAID_Context->virtual_disk_tgt_id = raid->targetId;
1159 pRAID_Context->reg_lock_row_lba = cpu_to_le64(regStart);
1160 pRAID_Context->reg_lock_length = cpu_to_le32(regSize);
1161 pRAID_Context->config_seq_num = raid->seqNum;
1162
1163 *raidLUN = raid->LUN;
1164
1165
1166 if (fusion->r56_div_offload && (raid->level >= 5) && !isRead) {
1167 mr_get_phy_params_r56_rmw(instance, ld, start_strip, io_info,
1168 (struct RAID_CONTEXT_G35 *)pRAID_Context,
1169 map);
1170 return true;
1171 }
1172
1173
1174
1175 if (io_info->fpOkForIo) {
1176 retval = io_info->IoforUnevenSpan ?
1177 mr_spanset_get_phy_params(instance, ld,
1178 start_strip, ref_in_start_stripe,
1179 io_info, pRAID_Context, map) :
1180 MR_GetPhyParams(instance, ld, start_strip,
1181 ref_in_start_stripe, io_info,
1182 pRAID_Context, map);
1183
1184 if (io_info->devHandle == MR_DEVHANDLE_INVALID)
1185 io_info->fpOkForIo = false;
1186 return retval;
1187 } else if (isRead) {
1188 uint stripIdx;
1189 for (stripIdx = 0; stripIdx < num_strips; stripIdx++) {
1190 retval = io_info->IoforUnevenSpan ?
1191 mr_spanset_get_phy_params(instance, ld,
1192 start_strip + stripIdx,
1193 ref_in_start_stripe, io_info,
1194 pRAID_Context, map) :
1195 MR_GetPhyParams(instance, ld,
1196 start_strip + stripIdx, ref_in_start_stripe,
1197 io_info, pRAID_Context, map);
1198 if (!retval)
1199 return true;
1200 }
1201 }
1202 return true;
1203}
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216void mr_update_span_set(struct MR_DRV_RAID_MAP_ALL *map,
1217 PLD_SPAN_INFO ldSpanInfo)
1218{
1219 u8 span, count;
1220 u32 element, span_row_width;
1221 u64 span_row;
1222 struct MR_LD_RAID *raid;
1223 LD_SPAN_SET *span_set, *span_set_prev;
1224 struct MR_QUAD_ELEMENT *quad;
1225 int ldCount;
1226 u16 ld;
1227
1228
1229 for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
1230 ld = MR_TargetIdToLdGet(ldCount, map);
1231 if (ld >= (MAX_LOGICAL_DRIVES_EXT - 1))
1232 continue;
1233 raid = MR_LdRaidGet(ld, map);
1234 for (element = 0; element < MAX_QUAD_DEPTH; element++) {
1235 for (span = 0; span < raid->spanDepth; span++) {
1236 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
1237 block_span_info.noElements) <
1238 element + 1)
1239 continue;
1240 span_set = &(ldSpanInfo[ld].span_set[element]);
1241 quad = &map->raidMap.ldSpanMap[ld].
1242 spanBlock[span].block_span_info.
1243 quad[element];
1244
1245 span_set->diff = le32_to_cpu(quad->diff);
1246
1247 for (count = 0, span_row_width = 0;
1248 count < raid->spanDepth; count++) {
1249 if (le32_to_cpu(map->raidMap.ldSpanMap[ld].
1250 spanBlock[count].
1251 block_span_info.
1252 noElements) >= element + 1) {
1253 span_set->strip_offset[count] =
1254 span_row_width;
1255 span_row_width +=
1256 MR_LdSpanPtrGet
1257 (ld, count, map)->spanRowDataSize;
1258 }
1259 }
1260
1261 span_set->span_row_data_width = span_row_width;
1262 span_row = mega_div64_32(((le64_to_cpu(quad->logEnd) -
1263 le64_to_cpu(quad->logStart)) + le32_to_cpu(quad->diff)),
1264 le32_to_cpu(quad->diff));
1265
1266 if (element == 0) {
1267 span_set->log_start_lba = 0;
1268 span_set->log_end_lba =
1269 ((span_row << raid->stripeShift)
1270 * span_row_width) - 1;
1271
1272 span_set->span_row_start = 0;
1273 span_set->span_row_end = span_row - 1;
1274
1275 span_set->data_strip_start = 0;
1276 span_set->data_strip_end =
1277 (span_row * span_row_width) - 1;
1278
1279 span_set->data_row_start = 0;
1280 span_set->data_row_end =
1281 (span_row * le32_to_cpu(quad->diff)) - 1;
1282 } else {
1283 span_set_prev = &(ldSpanInfo[ld].
1284 span_set[element - 1]);
1285 span_set->log_start_lba =
1286 span_set_prev->log_end_lba + 1;
1287 span_set->log_end_lba =
1288 span_set->log_start_lba +
1289 ((span_row << raid->stripeShift)
1290 * span_row_width) - 1;
1291
1292 span_set->span_row_start =
1293 span_set_prev->span_row_end + 1;
1294 span_set->span_row_end =
1295 span_set->span_row_start + span_row - 1;
1296
1297 span_set->data_strip_start =
1298 span_set_prev->data_strip_end + 1;
1299 span_set->data_strip_end =
1300 span_set->data_strip_start +
1301 (span_row * span_row_width) - 1;
1302
1303 span_set->data_row_start =
1304 span_set_prev->data_row_end + 1;
1305 span_set->data_row_end =
1306 span_set->data_row_start +
1307 (span_row * le32_to_cpu(quad->diff)) - 1;
1308 }
1309 break;
1310 }
1311 if (span == raid->spanDepth)
1312 break;
1313 }
1314 }
1315}
1316
1317void mr_update_load_balance_params(struct MR_DRV_RAID_MAP_ALL *drv_map,
1318 struct LD_LOAD_BALANCE_INFO *lbInfo)
1319{
1320 int ldCount;
1321 u16 ld;
1322 struct MR_LD_RAID *raid;
1323
1324 if (lb_pending_cmds > 128 || lb_pending_cmds < 1)
1325 lb_pending_cmds = LB_PENDING_CMDS_DEFAULT;
1326
1327 for (ldCount = 0; ldCount < MAX_LOGICAL_DRIVES_EXT; ldCount++) {
1328 ld = MR_TargetIdToLdGet(ldCount, drv_map);
1329 if (ld >= MAX_LOGICAL_DRIVES_EXT - 1) {
1330 lbInfo[ldCount].loadBalanceFlag = 0;
1331 continue;
1332 }
1333
1334 raid = MR_LdRaidGet(ld, drv_map);
1335 if ((raid->level != 1) ||
1336 (raid->ldState != MR_LD_STATE_OPTIMAL)) {
1337 lbInfo[ldCount].loadBalanceFlag = 0;
1338 continue;
1339 }
1340 lbInfo[ldCount].loadBalanceFlag = 1;
1341 }
1342}
1343
1344static u8 megasas_get_best_arm_pd(struct megasas_instance *instance,
1345 struct LD_LOAD_BALANCE_INFO *lbInfo,
1346 struct IO_REQUEST_INFO *io_info,
1347 struct MR_DRV_RAID_MAP_ALL *drv_map)
1348{
1349 struct MR_LD_RAID *raid;
1350 u16 pd1_dev_handle;
1351 u16 pend0, pend1, ld;
1352 u64 diff0, diff1;
1353 u8 bestArm, pd0, pd1, span, arm;
1354 u32 arRef, span_row_size;
1355
1356 u64 block = io_info->ldStartBlock;
1357 u32 count = io_info->numBlocks;
1358
1359 span = ((io_info->span_arm & RAID_CTX_SPANARM_SPAN_MASK)
1360 >> RAID_CTX_SPANARM_SPAN_SHIFT);
1361 arm = (io_info->span_arm & RAID_CTX_SPANARM_ARM_MASK);
1362
1363 ld = MR_TargetIdToLdGet(io_info->ldTgtId, drv_map);
1364 raid = MR_LdRaidGet(ld, drv_map);
1365 span_row_size = instance->UnevenSpanSupport ?
1366 SPAN_ROW_SIZE(drv_map, ld, span) : raid->rowSize;
1367
1368 arRef = MR_LdSpanArrayGet(ld, span, drv_map);
1369 pd0 = MR_ArPdGet(arRef, arm, drv_map);
1370 pd1 = MR_ArPdGet(arRef, (arm + 1) >= span_row_size ?
1371 (arm + 1 - span_row_size) : arm + 1, drv_map);
1372
1373
1374
1375 pd1_dev_handle = MR_PdDevHandleGet(pd1, drv_map);
1376
1377 if (pd1_dev_handle == MR_DEVHANDLE_INVALID) {
1378 bestArm = arm;
1379 } else {
1380
1381 pend0 = atomic_read(&lbInfo->scsi_pending_cmds[pd0]);
1382 pend1 = atomic_read(&lbInfo->scsi_pending_cmds[pd1]);
1383
1384
1385 diff0 = ABS_DIFF(block, lbInfo->last_accessed_block[pd0]);
1386 diff1 = ABS_DIFF(block, lbInfo->last_accessed_block[pd1]);
1387 bestArm = (diff0 <= diff1 ? arm : arm ^ 1);
1388
1389
1390
1391
1392 if ((bestArm == arm && pend0 > pend1 + lb_pending_cmds) ||
1393 (bestArm != arm && pend1 > pend0 + lb_pending_cmds))
1394 bestArm ^= 1;
1395
1396
1397 io_info->span_arm =
1398 (span << RAID_CTX_SPANARM_SPAN_SHIFT) | bestArm;
1399 io_info->pd_after_lb = (bestArm == arm) ? pd0 : pd1;
1400 }
1401
1402 lbInfo->last_accessed_block[io_info->pd_after_lb] = block + count - 1;
1403 return io_info->pd_after_lb;
1404}
1405
1406__le16 get_updated_dev_handle(struct megasas_instance *instance,
1407 struct LD_LOAD_BALANCE_INFO *lbInfo,
1408 struct IO_REQUEST_INFO *io_info,
1409 struct MR_DRV_RAID_MAP_ALL *drv_map)
1410{
1411 u8 arm_pd;
1412 __le16 devHandle;
1413
1414
1415 arm_pd = megasas_get_best_arm_pd(instance, lbInfo, io_info, drv_map);
1416 devHandle = MR_PdDevHandleGet(arm_pd, drv_map);
1417 io_info->pd_interface = MR_PdInterfaceTypeGet(arm_pd, drv_map);
1418 atomic_inc(&lbInfo->scsi_pending_cmds[arm_pd]);
1419
1420 return devHandle;
1421}
1422
