LXR linux/drivers/staging/rtl8723bs/include/rtw

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/******************************************************************************
   3 *
   4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   5 *
   6 ******************************************************************************/
   7#ifndef _RTW_HT_H_
   8#define _RTW_HT_H_
   9
  10
  11struct ht_priv {
  12        u8 ht_option;
  13        u8 ampdu_enable;/* for enable Tx A-MPDU */
  14        u8 tx_amsdu_enable;/* for enable Tx A-MSDU */
  15        u8 bss_coexist;/* for 20/40 Bss coexist */
  16
  17        /* u8 baddbareq_issued[16]; */
  18        u32 tx_amsdu_maxlen; /*  1: 8k, 0:4k ; default:8k, for tx */
  19        u32 rx_ampdu_maxlen; /* for rx reordering ctrl win_sz, updated when join_callback. */
  20
  21        u8 rx_ampdu_min_spacing;
  22
  23        u8 ch_offset;/* PRIME_CHNL_OFFSET */
  24        u8 sgi_20m;
  25        u8 sgi_40m;
  26
  27        /* for processing Tx A-MPDU */
  28        u8 agg_enable_bitmap;
  29        /* u8 ADDBA_retry_count; */
  30        u8 candidate_tid_bitmap;
  31
  32        u8 ldpc_cap;
  33        u8 stbc_cap;
  34        u8 beamform_cap;
  35
  36        struct ieee80211_ht_cap ht_cap;
  37
  38};
  39
  40typedef enum AGGRE_SIZE {
  41        HT_AGG_SIZE_8K = 0,
  42        HT_AGG_SIZE_16K = 1,
  43        HT_AGG_SIZE_32K = 2,
  44        HT_AGG_SIZE_64K = 3,
  45        VHT_AGG_SIZE_128K = 4,
  46        VHT_AGG_SIZE_256K = 5,
  47        VHT_AGG_SIZE_512K = 6,
  48        VHT_AGG_SIZE_1024K = 7,
  49} AGGRE_SIZE_E, *PAGGRE_SIZE_E;
  50
  51typedef enum _RT_HT_INF0_CAP {
  52        RT_HT_CAP_USE_TURBO_AGGR = 0x01,
  53        RT_HT_CAP_USE_LONG_PREAMBLE = 0x02,
  54        RT_HT_CAP_USE_AMPDU = 0x04,
  55        RT_HT_CAP_USE_WOW = 0x8,
  56        RT_HT_CAP_USE_SOFTAP = 0x10,
  57        RT_HT_CAP_USE_92SE = 0x20,
  58        RT_HT_CAP_USE_88C_92C = 0x40,
  59        RT_HT_CAP_USE_AP_CLIENT_MODE = 0x80,    /*  AP team request to reserve this bit, by Emily */
  60} RT_HT_INF0_CAPBILITY, *PRT_HT_INF0_CAPBILITY;
  61
  62typedef enum _RT_HT_INF1_CAP {
  63        RT_HT_CAP_USE_VIDEO_CLIENT = 0x01,
  64        RT_HT_CAP_USE_JAGUAR_BCUT = 0x02,
  65        RT_HT_CAP_USE_JAGUAR_CCUT = 0x04,
  66} RT_HT_INF1_CAPBILITY, *PRT_HT_INF1_CAPBILITY;
  67
  68#define LDPC_HT_ENABLE_RX                       BIT0
  69#define LDPC_HT_ENABLE_TX                       BIT1
  70#define LDPC_HT_TEST_TX_ENABLE          BIT2
  71#define LDPC_HT_CAP_TX                          BIT3
  72
  73#define STBC_HT_ENABLE_RX                       BIT0
  74#define STBC_HT_ENABLE_TX                       BIT1
  75#define STBC_HT_TEST_TX_ENABLE          BIT2
  76#define STBC_HT_CAP_TX                          BIT3
  77
  78#define BEAMFORMING_HT_BEAMFORMER_ENABLE        BIT0    /*  Declare our NIC supports beamformer */
  79#define BEAMFORMING_HT_BEAMFORMEE_ENABLE        BIT1    /*  Declare our NIC supports beamformee */
  80#define BEAMFORMING_HT_BEAMFORMER_TEST          BIT2    /*  Transmiting Beamforming no matter the target supports it or not */
  81
  82/*  */
  83/*  The HT Control field */
  84/*  */
  85#define SET_HT_CTRL_CSI_STEERING(_pEleStart, _val)                                      SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 6, 2, _val)
  86#define SET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart, _val)                  SET_BITS_TO_LE_1BYTE((_pEleStart)+3, 0, 1, _val)
  87#define GET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart)                                        LE_BITS_TO_1BYTE((_pEleStart)+3, 0, 1)
  88
  89/*  20/40 BSS Coexist */
  90#define SET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart, _val)                    SET_BITS_TO_LE_1BYTE((_pEleStart), 0, 1, _val)
  91#define GET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart)                          LE_BITS_TO_1BYTE((_pEleStart), 0, 1)
  92
  93
  94#define GET_HT_CAPABILITY_ELE_LDPC_CAP(_pEleStart)                              LE_BITS_TO_1BYTE(_pEleStart, 0, 1)
  95#define GET_HT_CAPABILITY_ELE_TX_STBC(_pEleStart)                                       LE_BITS_TO_1BYTE(_pEleStart, 7, 1)
  96
  97#define GET_HT_CAPABILITY_ELE_RX_STBC(_pEleStart)                                       LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 2)
  98
  99/* TXBF Capabilities */
 100#define SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(_pEleStart, _val)                                       SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 3, 1, ((u8)_val))
 101#define SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(_pEleStart, _val)                              SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 4, 1, ((u8)_val))
 102#define SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart, _val)            SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 10, 1, ((u8)_val))
 103#define SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart, _val)            SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 15, 2, ((u8)_val))
 104#define SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(_pEleStart, _val)    SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 23, 2, ((u8)_val))
 105
 106#define GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart)                  LE_BITS_TO_4BYTE((_pEleStart)+21, 10, 1)
 107#define GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart)                  LE_BITS_TO_4BYTE((_pEleStart)+21, 15, 2)
 108
 109#endif  /* _RTL871X_HT_H_ */
 110