LXR linux/include/linux/platform_data/mtd-nand-omap2.h

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright (C) 2006 Micron Technology Inc.
   4 */
   5
   6#ifndef _MTD_NAND_OMAP2_H
   7#define _MTD_NAND_OMAP2_H
   8
   9#include <linux/mtd/partitions.h>
  10
  11#define GPMC_BCH_NUM_REMAINDER  8
  12
  13enum nand_io {
  14        NAND_OMAP_PREFETCH_POLLED = 0,  /* prefetch polled mode, default */
  15        NAND_OMAP_POLLED,               /* polled mode, without prefetch */
  16        NAND_OMAP_PREFETCH_DMA,         /* prefetch enabled sDMA mode */
  17        NAND_OMAP_PREFETCH_IRQ          /* prefetch enabled irq mode */
  18};
  19
  20enum omap_ecc {
  21        /*
  22         * 1-bit ECC: calculation and correction by SW
  23         * ECC stored at end of spare area
  24         */
  25        OMAP_ECC_HAM1_CODE_SW = 0,
  26
  27        /*
  28         * 1-bit ECC: calculation by GPMC, Error detection by Software
  29         * ECC layout compatible with ROM code layout
  30         */
  31        OMAP_ECC_HAM1_CODE_HW,
  32        /* 4-bit  ECC calculation by GPMC, Error detection by Software */
  33        OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
  34        /* 4-bit  ECC calculation by GPMC, Error detection by ELM */
  35        OMAP_ECC_BCH4_CODE_HW,
  36        /* 8-bit  ECC calculation by GPMC, Error detection by Software */
  37        OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
  38        /* 8-bit  ECC calculation by GPMC, Error detection by ELM */
  39        OMAP_ECC_BCH8_CODE_HW,
  40        /* 16-bit ECC calculation by GPMC, Error detection by ELM */
  41        OMAP_ECC_BCH16_CODE_HW,
  42};
  43
  44struct gpmc_nand_regs {
  45        void __iomem    *gpmc_nand_command;
  46        void __iomem    *gpmc_nand_address;
  47        void __iomem    *gpmc_nand_data;
  48        void __iomem    *gpmc_prefetch_config1;
  49        void __iomem    *gpmc_prefetch_config2;
  50        void __iomem    *gpmc_prefetch_control;
  51        void __iomem    *gpmc_prefetch_status;
  52        void __iomem    *gpmc_ecc_config;
  53        void __iomem    *gpmc_ecc_control;
  54        void __iomem    *gpmc_ecc_size_config;
  55        void __iomem    *gpmc_ecc1_result;
  56        void __iomem    *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER];
  57        void __iomem    *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
  58        void __iomem    *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
  59        void __iomem    *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
  60        void __iomem    *gpmc_bch_result4[GPMC_BCH_NUM_REMAINDER];
  61        void __iomem    *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER];
  62        void __iomem    *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER];
  63};
  64#endif
  65