linux/arch/riscv/include/asm/cache.h
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   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright (C) 2017 Chen Liqin <liqin.chen@sunplusct.com>
   4 * Copyright (C) 2012 Regents of the University of California
   5 */
   6
   7#ifndef _ASM_RISCV_CACHE_H
   8#define _ASM_RISCV_CACHE_H
   9
  10#define L1_CACHE_SHIFT          6
  11
  12#define L1_CACHE_BYTES          (1 << L1_CACHE_SHIFT)
  13
  14/*
  15 * RISC-V requires the stack pointer to be 16-byte aligned, so ensure that
  16 * the flat loader aligns it accordingly.
  17 */
  18#ifndef CONFIG_MMU
  19#define ARCH_SLAB_MINALIGN      16
  20#endif
  21
  22#endif /* _ASM_RISCV_CACHE_H */
  23