1/* SPDX-License-Identifier: MIT */ 2#ifndef __NVIF_CL0080_H__ 3#define __NVIF_CL0080_H__ 4 5struct nv_device_v0 { 6 __u8 version; 7 __u8 pad01[7]; 8 __u64 device; /* device identifier, ~0 for client default */ 9}; 10 11#define NV_DEVICE_V0_INFO 0x00 12#define NV_DEVICE_V0_TIME 0x01 13 14struct nv_device_info_v0 { 15 __u8 version; 16#define NV_DEVICE_INFO_V0_IGP 0x00 17#define NV_DEVICE_INFO_V0_PCI 0x01 18#define NV_DEVICE_INFO_V0_AGP 0x02 19#define NV_DEVICE_INFO_V0_PCIE 0x03 20#define NV_DEVICE_INFO_V0_SOC 0x04 21 __u8 platform; 22 __u16 chipset; /* from NV_PMC_BOOT_0 */ 23 __u8 revision; /* from NV_PMC_BOOT_0 */ 24#define NV_DEVICE_INFO_V0_TNT 0x01 25#define NV_DEVICE_INFO_V0_CELSIUS 0x02 26#define NV_DEVICE_INFO_V0_KELVIN 0x03 27#define NV_DEVICE_INFO_V0_RANKINE 0x04 28#define NV_DEVICE_INFO_V0_CURIE 0x05 29#define NV_DEVICE_INFO_V0_TESLA 0x06 30#define NV_DEVICE_INFO_V0_FERMI 0x07 31#define NV_DEVICE_INFO_V0_KEPLER 0x08 32#define NV_DEVICE_INFO_V0_MAXWELL 0x09 33#define NV_DEVICE_INFO_V0_PASCAL 0x0a 34#define NV_DEVICE_INFO_V0_VOLTA 0x0b 35#define NV_DEVICE_INFO_V0_TURING 0x0c 36#define NV_DEVICE_INFO_V0_AMPERE 0x0d 37 __u8 family; 38 __u8 pad06[2]; 39 __u64 ram_size; 40 __u64 ram_user; 41 char chip[16]; 42 char name[64]; 43}; 44 45struct nv_device_info_v1 { 46 __u8 version; 47 __u8 count; 48 __u8 pad02[6]; 49 struct nv_device_info_v1_data { 50 __u64 mthd; /* NV_DEVICE_INFO_* (see below). */ 51 __u64 data; 52 } data[]; 53}; 54 55struct nv_device_time_v0 { 56 __u8 version; 57 __u8 pad01[7]; 58 __u64 time; 59}; 60 61#define NV_DEVICE_INFO_UNIT (0xffffffffULL << 32) 62#define NV_DEVICE_INFO(n) ((n) | (0x00000000ULL << 32)) 63#define NV_DEVICE_HOST(n) ((n) | (0x00000001ULL << 32)) 64 65/* This will be returned in the mthd field for unsupported queries. */ 66#define NV_DEVICE_INFO_INVALID ~0ULL 67 68/* Returns the number of available runlists. */ 69#define NV_DEVICE_HOST_RUNLISTS NV_DEVICE_HOST(0x00000000) 70/* Returns the number of available channels. */ 71#define NV_DEVICE_HOST_CHANNELS NV_DEVICE_HOST(0x00000001) 72 73/* Returns a mask of available engine types on runlist(data). */ 74#define NV_DEVICE_HOST_RUNLIST_ENGINES NV_DEVICE_HOST(0x00000100) 75#define NV_DEVICE_HOST_RUNLIST_ENGINES_SW 0x00000001 76#define NV_DEVICE_HOST_RUNLIST_ENGINES_GR 0x00000002 77#define NV_DEVICE_HOST_RUNLIST_ENGINES_MPEG 0x00000004 78#define NV_DEVICE_HOST_RUNLIST_ENGINES_ME 0x00000008 79#define NV_DEVICE_HOST_RUNLIST_ENGINES_CIPHER 0x00000010 80#define NV_DEVICE_HOST_RUNLIST_ENGINES_BSP 0x00000020 81#define NV_DEVICE_HOST_RUNLIST_ENGINES_VP 0x00000040 82#define NV_DEVICE_HOST_RUNLIST_ENGINES_CE 0x00000080 83#define NV_DEVICE_HOST_RUNLIST_ENGINES_SEC 0x00000100 84#define NV_DEVICE_HOST_RUNLIST_ENGINES_MSVLD 0x00000200 85#define NV_DEVICE_HOST_RUNLIST_ENGINES_MSPDEC 0x00000400 86#define NV_DEVICE_HOST_RUNLIST_ENGINES_MSPPP 0x00000800 87#define NV_DEVICE_HOST_RUNLIST_ENGINES_MSENC 0x00001000 88#define NV_DEVICE_HOST_RUNLIST_ENGINES_VIC 0x00002000 89#define NV_DEVICE_HOST_RUNLIST_ENGINES_SEC2 0x00004000 90#define NV_DEVICE_HOST_RUNLIST_ENGINES_NVDEC 0x00008000 91#define NV_DEVICE_HOST_RUNLIST_ENGINES_NVENC 0x00010000 92#endif 93