linux/drivers/media/i2c/max9286.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Maxim MAX9286 GMSL Deserializer Driver
   4 *
   5 * Copyright (C) 2017-2019 Jacopo Mondi
   6 * Copyright (C) 2017-2019 Kieran Bingham
   7 * Copyright (C) 2017-2019 Laurent Pinchart
   8 * Copyright (C) 2017-2019 Niklas Söderlund
   9 * Copyright (C) 2016 Renesas Electronics Corporation
  10 * Copyright (C) 2015 Cogent Embedded, Inc.
  11 */
  12
  13#include <linux/delay.h>
  14#include <linux/device.h>
  15#include <linux/fwnode.h>
  16#include <linux/gpio/consumer.h>
  17#include <linux/gpio/driver.h>
  18#include <linux/i2c.h>
  19#include <linux/i2c-mux.h>
  20#include <linux/module.h>
  21#include <linux/mutex.h>
  22#include <linux/of_graph.h>
  23#include <linux/regulator/consumer.h>
  24#include <linux/slab.h>
  25
  26#include <media/v4l2-async.h>
  27#include <media/v4l2-ctrls.h>
  28#include <media/v4l2-device.h>
  29#include <media/v4l2-fwnode.h>
  30#include <media/v4l2-subdev.h>
  31
  32/* Register 0x00 */
  33#define MAX9286_MSTLINKSEL_AUTO         (7 << 5)
  34#define MAX9286_MSTLINKSEL(n)           ((n) << 5)
  35#define MAX9286_EN_VS_GEN               BIT(4)
  36#define MAX9286_LINKEN(n)               (1 << (n))
  37/* Register 0x01 */
  38#define MAX9286_FSYNCMODE_ECU           (3 << 6)
  39#define MAX9286_FSYNCMODE_EXT           (2 << 6)
  40#define MAX9286_FSYNCMODE_INT_OUT       (1 << 6)
  41#define MAX9286_FSYNCMODE_INT_HIZ       (0 << 6)
  42#define MAX9286_GPIEN                   BIT(5)
  43#define MAX9286_ENLMO_RSTFSYNC          BIT(2)
  44#define MAX9286_FSYNCMETH_AUTO          (2 << 0)
  45#define MAX9286_FSYNCMETH_SEMI_AUTO     (1 << 0)
  46#define MAX9286_FSYNCMETH_MANUAL        (0 << 0)
  47#define MAX9286_REG_FSYNC_PERIOD_L      0x06
  48#define MAX9286_REG_FSYNC_PERIOD_M      0x07
  49#define MAX9286_REG_FSYNC_PERIOD_H      0x08
  50/* Register 0x0a */
  51#define MAX9286_FWDCCEN(n)              (1 << ((n) + 4))
  52#define MAX9286_REVCCEN(n)              (1 << (n))
  53/* Register 0x0c */
  54#define MAX9286_HVEN                    BIT(7)
  55#define MAX9286_EDC_6BIT_HAMMING        (2 << 5)
  56#define MAX9286_EDC_6BIT_CRC            (1 << 5)
  57#define MAX9286_EDC_1BIT_PARITY         (0 << 5)
  58#define MAX9286_DESEL                   BIT(4)
  59#define MAX9286_INVVS                   BIT(3)
  60#define MAX9286_INVHS                   BIT(2)
  61#define MAX9286_HVSRC_D0                (2 << 0)
  62#define MAX9286_HVSRC_D14               (1 << 0)
  63#define MAX9286_HVSRC_D18               (0 << 0)
  64/* Register 0x0f */
  65#define MAX9286_0X0F_RESERVED           BIT(3)
  66/* Register 0x12 */
  67#define MAX9286_CSILANECNT(n)           (((n) - 1) << 6)
  68#define MAX9286_CSIDBL                  BIT(5)
  69#define MAX9286_DBL                     BIT(4)
  70#define MAX9286_DATATYPE_USER_8BIT      (11 << 0)
  71#define MAX9286_DATATYPE_USER_YUV_12BIT (10 << 0)
  72#define MAX9286_DATATYPE_USER_24BIT     (9 << 0)
  73#define MAX9286_DATATYPE_RAW14          (8 << 0)
  74#define MAX9286_DATATYPE_RAW11          (7 << 0)
  75#define MAX9286_DATATYPE_RAW10          (6 << 0)
  76#define MAX9286_DATATYPE_RAW8           (5 << 0)
  77#define MAX9286_DATATYPE_YUV422_10BIT   (4 << 0)
  78#define MAX9286_DATATYPE_YUV422_8BIT    (3 << 0)
  79#define MAX9286_DATATYPE_RGB555         (2 << 0)
  80#define MAX9286_DATATYPE_RGB565         (1 << 0)
  81#define MAX9286_DATATYPE_RGB888         (0 << 0)
  82/* Register 0x15 */
  83#define MAX9286_VC(n)                   ((n) << 5)
  84#define MAX9286_VCTYPE                  BIT(4)
  85#define MAX9286_CSIOUTEN                BIT(3)
  86#define MAX9286_0X15_RESV               (3 << 0)
  87/* Register 0x1b */
  88#define MAX9286_SWITCHIN(n)             (1 << ((n) + 4))
  89#define MAX9286_ENEQ(n)                 (1 << (n))
  90/* Register 0x27 */
  91#define MAX9286_LOCKED                  BIT(7)
  92/* Register 0x31 */
  93#define MAX9286_FSYNC_LOCKED            BIT(6)
  94/* Register 0x34 */
  95#define MAX9286_I2CLOCACK               BIT(7)
  96#define MAX9286_I2CSLVSH_1046NS_469NS   (3 << 5)
  97#define MAX9286_I2CSLVSH_938NS_352NS    (2 << 5)
  98#define MAX9286_I2CSLVSH_469NS_234NS    (1 << 5)
  99#define MAX9286_I2CSLVSH_352NS_117NS    (0 << 5)
 100#define MAX9286_I2CMSTBT_837KBPS        (7 << 2)
 101#define MAX9286_I2CMSTBT_533KBPS        (6 << 2)
 102#define MAX9286_I2CMSTBT_339KBPS        (5 << 2)
 103#define MAX9286_I2CMSTBT_173KBPS        (4 << 2)
 104#define MAX9286_I2CMSTBT_105KBPS        (3 << 2)
 105#define MAX9286_I2CMSTBT_84KBPS         (2 << 2)
 106#define MAX9286_I2CMSTBT_28KBPS         (1 << 2)
 107#define MAX9286_I2CMSTBT_8KBPS          (0 << 2)
 108#define MAX9286_I2CSLVTO_NONE           (3 << 0)
 109#define MAX9286_I2CSLVTO_1024US         (2 << 0)
 110#define MAX9286_I2CSLVTO_256US          (1 << 0)
 111#define MAX9286_I2CSLVTO_64US           (0 << 0)
 112/* Register 0x3b */
 113#define MAX9286_REV_TRF(n)              ((n) << 4)
 114#define MAX9286_REV_AMP(n)              ((((n) - 30) / 10) << 1) /* in mV */
 115#define MAX9286_REV_AMP_X               BIT(0)
 116/* Register 0x3f */
 117#define MAX9286_EN_REV_CFG              BIT(6)
 118#define MAX9286_REV_FLEN(n)             ((n) - 20)
 119/* Register 0x49 */
 120#define MAX9286_VIDEO_DETECT_MASK       0x0f
 121/* Register 0x69 */
 122#define MAX9286_LFLTBMONMASKED          BIT(7)
 123#define MAX9286_LOCKMONMASKED           BIT(6)
 124#define MAX9286_AUTOCOMBACKEN           BIT(5)
 125#define MAX9286_AUTOMASKEN              BIT(4)
 126#define MAX9286_MASKLINK(n)             ((n) << 0)
 127
 128/*
 129 * The sink and source pads are created to match the OF graph port numbers so
 130 * that their indexes can be used interchangeably.
 131 */
 132#define MAX9286_NUM_GMSL                4
 133#define MAX9286_N_SINKS                 4
 134#define MAX9286_N_PADS                  5
 135#define MAX9286_SRC_PAD                 4
 136
 137struct max9286_source {
 138        struct v4l2_subdev *sd;
 139        struct fwnode_handle *fwnode;
 140};
 141
 142struct max9286_asd {
 143        struct v4l2_async_subdev base;
 144        struct max9286_source *source;
 145};
 146
 147static inline struct max9286_asd *to_max9286_asd(struct v4l2_async_subdev *asd)
 148{
 149        return container_of(asd, struct max9286_asd, base);
 150}
 151
 152struct max9286_priv {
 153        struct i2c_client *client;
 154        struct gpio_desc *gpiod_pwdn;
 155        struct v4l2_subdev sd;
 156        struct media_pad pads[MAX9286_N_PADS];
 157        struct regulator *regulator;
 158
 159        struct gpio_chip gpio;
 160        u8 gpio_state;
 161
 162        struct i2c_mux_core *mux;
 163        unsigned int mux_channel;
 164        bool mux_open;
 165
 166        u32 reverse_channel_mv;
 167
 168        struct v4l2_ctrl_handler ctrls;
 169        struct v4l2_ctrl *pixelrate;
 170
 171        struct v4l2_mbus_framefmt fmt[MAX9286_N_SINKS];
 172
 173        /* Protects controls and fmt structures */
 174        struct mutex mutex;
 175
 176        unsigned int nsources;
 177        unsigned int source_mask;
 178        unsigned int route_mask;
 179        unsigned int bound_sources;
 180        unsigned int csi2_data_lanes;
 181        struct max9286_source sources[MAX9286_NUM_GMSL];
 182        struct v4l2_async_notifier notifier;
 183};
 184
 185static struct max9286_source *next_source(struct max9286_priv *priv,
 186                                          struct max9286_source *source)
 187{
 188        if (!source)
 189                source = &priv->sources[0];
 190        else
 191                source++;
 192
 193        for (; source < &priv->sources[MAX9286_NUM_GMSL]; source++) {
 194                if (source->fwnode)
 195                        return source;
 196        }
 197
 198        return NULL;
 199}
 200
 201#define for_each_source(priv, source) \
 202        for ((source) = NULL; ((source) = next_source((priv), (source))); )
 203
 204#define to_index(priv, source) ((source) - &(priv)->sources[0])
 205
 206static inline struct max9286_priv *sd_to_max9286(struct v4l2_subdev *sd)
 207{
 208        return container_of(sd, struct max9286_priv, sd);
 209}
 210
 211/* -----------------------------------------------------------------------------
 212 * I2C IO
 213 */
 214
 215static int max9286_read(struct max9286_priv *priv, u8 reg)
 216{
 217        int ret;
 218
 219        ret = i2c_smbus_read_byte_data(priv->client, reg);
 220        if (ret < 0)
 221                dev_err(&priv->client->dev,
 222                        "%s: register 0x%02x read failed (%d)\n",
 223                        __func__, reg, ret);
 224
 225        return ret;
 226}
 227
 228static int max9286_write(struct max9286_priv *priv, u8 reg, u8 val)
 229{
 230        int ret;
 231
 232        ret = i2c_smbus_write_byte_data(priv->client, reg, val);
 233        if (ret < 0)
 234                dev_err(&priv->client->dev,
 235                        "%s: register 0x%02x write failed (%d)\n",
 236                        __func__, reg, ret);
 237
 238        return ret;
 239}
 240
 241/* -----------------------------------------------------------------------------
 242 * I2C Multiplexer
 243 */
 244
 245static void max9286_i2c_mux_configure(struct max9286_priv *priv, u8 conf)
 246{
 247        max9286_write(priv, 0x0a, conf);
 248
 249        /*
 250         * We must sleep after any change to the forward or reverse channel
 251         * configuration.
 252         */
 253        usleep_range(3000, 5000);
 254}
 255
 256static void max9286_i2c_mux_open(struct max9286_priv *priv)
 257{
 258        /* Open all channels on the MAX9286 */
 259        max9286_i2c_mux_configure(priv, 0xff);
 260
 261        priv->mux_open = true;
 262}
 263
 264static void max9286_i2c_mux_close(struct max9286_priv *priv)
 265{
 266        /*
 267         * Ensure that both the forward and reverse channel are disabled on the
 268         * mux, and that the channel ID is invalidated to ensure we reconfigure
 269         * on the next max9286_i2c_mux_select() call.
 270         */
 271        max9286_i2c_mux_configure(priv, 0x00);
 272
 273        priv->mux_open = false;
 274        priv->mux_channel = -1;
 275}
 276
 277static int max9286_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan)
 278{
 279        struct max9286_priv *priv = i2c_mux_priv(muxc);
 280
 281        /* Channel select is disabled when configured in the opened state. */
 282        if (priv->mux_open)
 283                return 0;
 284
 285        if (priv->mux_channel == chan)
 286                return 0;
 287
 288        priv->mux_channel = chan;
 289
 290        max9286_i2c_mux_configure(priv,
 291                                  MAX9286_FWDCCEN(chan) |
 292                                  MAX9286_REVCCEN(chan));
 293
 294        return 0;
 295}
 296
 297static int max9286_i2c_mux_init(struct max9286_priv *priv)
 298{
 299        struct max9286_source *source;
 300        int ret;
 301
 302        if (!i2c_check_functionality(priv->client->adapter,
 303                                     I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
 304                return -ENODEV;
 305
 306        priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev,
 307                                  priv->nsources, 0, I2C_MUX_LOCKED,
 308                                  max9286_i2c_mux_select, NULL);
 309        if (!priv->mux)
 310                return -ENOMEM;
 311
 312        priv->mux->priv = priv;
 313
 314        for_each_source(priv, source) {
 315                unsigned int index = to_index(priv, source);
 316
 317                ret = i2c_mux_add_adapter(priv->mux, 0, index, 0);
 318                if (ret < 0)
 319                        goto error;
 320        }
 321
 322        return 0;
 323
 324error:
 325        i2c_mux_del_adapters(priv->mux);
 326        return ret;
 327}
 328
 329static void max9286_configure_i2c(struct max9286_priv *priv, bool localack)
 330{
 331        u8 config = MAX9286_I2CSLVSH_469NS_234NS | MAX9286_I2CSLVTO_1024US |
 332                    MAX9286_I2CMSTBT_105KBPS;
 333
 334        if (localack)
 335                config |= MAX9286_I2CLOCACK;
 336
 337        max9286_write(priv, 0x34, config);
 338        usleep_range(3000, 5000);
 339}
 340
 341static void max9286_reverse_channel_setup(struct max9286_priv *priv,
 342                                          unsigned int chan_amplitude)
 343{
 344        /* Reverse channel transmission time: default to 1. */
 345        u8 chan_config = MAX9286_REV_TRF(1);
 346
 347        /*
 348         * Reverse channel setup.
 349         *
 350         * - Enable custom reverse channel configuration (through register 0x3f)
 351         *   and set the first pulse length to 35 clock cycles.
 352         * - Adjust reverse channel amplitude: values > 130 are programmed
 353         *   using the additional +100mV REV_AMP_X boost flag
 354         */
 355        max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
 356
 357        if (chan_amplitude > 100) {
 358                /* It is not possible to express values (100 < x < 130) */
 359                chan_amplitude = max(30U, chan_amplitude - 100);
 360                chan_config |= MAX9286_REV_AMP_X;
 361        }
 362        max9286_write(priv, 0x3b, chan_config | MAX9286_REV_AMP(chan_amplitude));
 363        usleep_range(2000, 2500);
 364}
 365
 366/*
 367 * max9286_check_video_links() - Make sure video links are detected and locked
 368 *
 369 * Performs safety checks on video link status. Make sure they are detected
 370 * and all enabled links are locked.
 371 *
 372 * Returns 0 for success, -EIO for errors.
 373 */
 374static int max9286_check_video_links(struct max9286_priv *priv)
 375{
 376        unsigned int i;
 377        int ret;
 378
 379        /*
 380         * Make sure valid video links are detected.
 381         * The delay is not characterized in de-serializer manual, wait up
 382         * to 5 ms.
 383         */
 384        for (i = 0; i < 10; i++) {
 385                ret = max9286_read(priv, 0x49);
 386                if (ret < 0)
 387                        return -EIO;
 388
 389                if ((ret & MAX9286_VIDEO_DETECT_MASK) == priv->source_mask)
 390                        break;
 391
 392                usleep_range(350, 500);
 393        }
 394
 395        if (i == 10) {
 396                dev_err(&priv->client->dev,
 397                        "Unable to detect video links: 0x%02x\n", ret);
 398                return -EIO;
 399        }
 400
 401        /* Make sure all enabled links are locked (4ms max). */
 402        for (i = 0; i < 10; i++) {
 403                ret = max9286_read(priv, 0x27);
 404                if (ret < 0)
 405                        return -EIO;
 406
 407                if (ret & MAX9286_LOCKED)
 408                        break;
 409
 410                usleep_range(350, 450);
 411        }
 412
 413        if (i == 10) {
 414                dev_err(&priv->client->dev, "Not all enabled links locked\n");
 415                return -EIO;
 416        }
 417
 418        return 0;
 419}
 420
 421/*
 422 * max9286_check_config_link() - Detect and wait for configuration links
 423 *
 424 * Determine if the configuration channel is up and settled for a link.
 425 *
 426 * Returns 0 for success, -EIO for errors.
 427 */
 428static int max9286_check_config_link(struct max9286_priv *priv,
 429                                     unsigned int source_mask)
 430{
 431        unsigned int conflink_mask = (source_mask & 0x0f) << 4;
 432        unsigned int i;
 433        int ret;
 434
 435        /*
 436         * Make sure requested configuration links are detected.
 437         * The delay is not characterized in the chip manual: wait up
 438         * to 5 milliseconds.
 439         */
 440        for (i = 0; i < 10; i++) {
 441                ret = max9286_read(priv, 0x49);
 442                if (ret < 0)
 443                        return -EIO;
 444
 445                ret &= 0xf0;
 446                if (ret == conflink_mask)
 447                        break;
 448
 449                usleep_range(350, 500);
 450        }
 451
 452        if (ret != conflink_mask) {
 453                dev_err(&priv->client->dev,
 454                        "Unable to detect configuration links: 0x%02x expected 0x%02x\n",
 455                        ret, conflink_mask);
 456                return -EIO;
 457        }
 458
 459        dev_info(&priv->client->dev,
 460                 "Successfully detected configuration links after %u loops: 0x%02x\n",
 461                 i, conflink_mask);
 462
 463        return 0;
 464}
 465
 466/* -----------------------------------------------------------------------------
 467 * V4L2 Subdev
 468 */
 469
 470static int max9286_set_pixelrate(struct max9286_priv *priv)
 471{
 472        struct max9286_source *source = NULL;
 473        u64 pixelrate = 0;
 474
 475        for_each_source(priv, source) {
 476                struct v4l2_ctrl *ctrl;
 477                u64 source_rate = 0;
 478
 479                /* Pixel rate is mandatory to be reported by sources. */
 480                ctrl = v4l2_ctrl_find(source->sd->ctrl_handler,
 481                                      V4L2_CID_PIXEL_RATE);
 482                if (!ctrl) {
 483                        pixelrate = 0;
 484                        break;
 485                }
 486
 487                /* All source must report the same pixel rate. */
 488                source_rate = v4l2_ctrl_g_ctrl_int64(ctrl);
 489                if (!pixelrate) {
 490                        pixelrate = source_rate;
 491                } else if (pixelrate != source_rate) {
 492                        dev_err(&priv->client->dev,
 493                                "Unable to calculate pixel rate\n");
 494                        return -EINVAL;
 495                }
 496        }
 497
 498        if (!pixelrate) {
 499                dev_err(&priv->client->dev,
 500                        "No pixel rate control available in sources\n");
 501                return -EINVAL;
 502        }
 503
 504        /*
 505         * The CSI-2 transmitter pixel rate is the single source rate multiplied
 506         * by the number of available sources.
 507         */
 508        return v4l2_ctrl_s_ctrl_int64(priv->pixelrate,
 509                                      pixelrate * priv->nsources);
 510}
 511
 512static int max9286_notify_bound(struct v4l2_async_notifier *notifier,
 513                                struct v4l2_subdev *subdev,
 514                                struct v4l2_async_subdev *asd)
 515{
 516        struct max9286_priv *priv = sd_to_max9286(notifier->sd);
 517        struct max9286_source *source = to_max9286_asd(asd)->source;
 518        unsigned int index = to_index(priv, source);
 519        unsigned int src_pad;
 520        int ret;
 521
 522        ret = media_entity_get_fwnode_pad(&subdev->entity,
 523                                          source->fwnode,
 524                                          MEDIA_PAD_FL_SOURCE);
 525        if (ret < 0) {
 526                dev_err(&priv->client->dev,
 527                        "Failed to find pad for %s\n", subdev->name);
 528                return ret;
 529        }
 530
 531        priv->bound_sources |= BIT(index);
 532        source->sd = subdev;
 533        src_pad = ret;
 534
 535        ret = media_create_pad_link(&source->sd->entity, src_pad,
 536                                    &priv->sd.entity, index,
 537                                    MEDIA_LNK_FL_ENABLED |
 538                                    MEDIA_LNK_FL_IMMUTABLE);
 539        if (ret) {
 540                dev_err(&priv->client->dev,
 541                        "Unable to link %s:%u -> %s:%u\n",
 542                        source->sd->name, src_pad, priv->sd.name, index);
 543                return ret;
 544        }
 545
 546        dev_dbg(&priv->client->dev, "Bound %s pad: %u on index %u\n",
 547                subdev->name, src_pad, index);
 548
 549        /*
 550         * We can only register v4l2_async_notifiers, which do not provide a
 551         * means to register a complete callback. bound_sources allows us to
 552         * identify when all remote serializers have completed their probe.
 553         */
 554        if (priv->bound_sources != priv->source_mask)
 555                return 0;
 556
 557        /*
 558         * All enabled sources have probed and enabled their reverse control
 559         * channels:
 560         *
 561         * - Increase the reverse channel amplitude to compensate for the
 562         *   remote ends high threshold, if not done already
 563         * - Verify all configuration links are properly detected
 564         * - Disable auto-ack as communication on the control channel are now
 565         *   stable.
 566         */
 567        if (priv->reverse_channel_mv < 170)
 568                max9286_reverse_channel_setup(priv, 170);
 569        max9286_check_config_link(priv, priv->source_mask);
 570
 571        /*
 572         * Re-configure I2C with local acknowledge disabled after cameras have
 573         * probed.
 574         */
 575        max9286_configure_i2c(priv, false);
 576
 577        return max9286_set_pixelrate(priv);
 578}
 579
 580static void max9286_notify_unbind(struct v4l2_async_notifier *notifier,
 581                                  struct v4l2_subdev *subdev,
 582                                  struct v4l2_async_subdev *asd)
 583{
 584        struct max9286_priv *priv = sd_to_max9286(notifier->sd);
 585        struct max9286_source *source = to_max9286_asd(asd)->source;
 586        unsigned int index = to_index(priv, source);
 587
 588        source->sd = NULL;
 589        priv->bound_sources &= ~BIT(index);
 590}
 591
 592static const struct v4l2_async_notifier_operations max9286_notify_ops = {
 593        .bound = max9286_notify_bound,
 594        .unbind = max9286_notify_unbind,
 595};
 596
 597static int max9286_v4l2_notifier_register(struct max9286_priv *priv)
 598{
 599        struct device *dev = &priv->client->dev;
 600        struct max9286_source *source = NULL;
 601        int ret;
 602
 603        if (!priv->nsources)
 604                return 0;
 605
 606        v4l2_async_notifier_init(&priv->notifier);
 607
 608        for_each_source(priv, source) {
 609                unsigned int i = to_index(priv, source);
 610                struct max9286_asd *mas;
 611
 612                mas = v4l2_async_notifier_add_fwnode_subdev(&priv->notifier,
 613                                                            source->fwnode,
 614                                                            struct max9286_asd);
 615                if (IS_ERR(mas)) {
 616                        dev_err(dev, "Failed to add subdev for source %u: %ld",
 617                                i, PTR_ERR(mas));
 618                        v4l2_async_notifier_cleanup(&priv->notifier);
 619                        return PTR_ERR(mas);
 620                }
 621
 622                mas->source = source;
 623        }
 624
 625        priv->notifier.ops = &max9286_notify_ops;
 626
 627        ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
 628        if (ret) {
 629                dev_err(dev, "Failed to register subdev_notifier");
 630                v4l2_async_notifier_cleanup(&priv->notifier);
 631                return ret;
 632        }
 633
 634        return 0;
 635}
 636
 637static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv)
 638{
 639        if (!priv->nsources)
 640                return;
 641
 642        v4l2_async_notifier_unregister(&priv->notifier);
 643        v4l2_async_notifier_cleanup(&priv->notifier);
 644}
 645
 646static int max9286_s_stream(struct v4l2_subdev *sd, int enable)
 647{
 648        struct max9286_priv *priv = sd_to_max9286(sd);
 649        struct max9286_source *source;
 650        unsigned int i;
 651        bool sync = false;
 652        int ret;
 653
 654        if (enable) {
 655                /*
 656                 * The frame sync between cameras is transmitted across the
 657                 * reverse channel as GPIO. We must open all channels while
 658                 * streaming to allow this synchronisation signal to be shared.
 659                 */
 660                max9286_i2c_mux_open(priv);
 661
 662                /* Start all cameras. */
 663                for_each_source(priv, source) {
 664                        ret = v4l2_subdev_call(source->sd, video, s_stream, 1);
 665                        if (ret)
 666                                return ret;
 667                }
 668
 669                ret = max9286_check_video_links(priv);
 670                if (ret)
 671                        return ret;
 672
 673                /*
 674                 * Wait until frame synchronization is locked.
 675                 *
 676                 * Manual says frame sync locking should take ~6 VTS.
 677                 * From practical experience at least 8 are required. Give
 678                 * 12 complete frames time (~400ms at 30 fps) to achieve frame
 679                 * locking before returning error.
 680                 */
 681                for (i = 0; i < 40; i++) {
 682                        if (max9286_read(priv, 0x31) & MAX9286_FSYNC_LOCKED) {
 683                                sync = true;
 684                                break;
 685                        }
 686                        usleep_range(9000, 11000);
 687                }
 688
 689                if (!sync) {
 690                        dev_err(&priv->client->dev,
 691                                "Failed to get frame synchronization\n");
 692                        return -EXDEV; /* Invalid cross-device link */
 693                }
 694
 695                /*
 696                 * Enable CSI output, VC set according to link number.
 697                 * Bit 7 must be set (chip manual says it's 0 and reserved).
 698                 */
 699                max9286_write(priv, 0x15, 0x80 | MAX9286_VCTYPE |
 700                              MAX9286_CSIOUTEN | MAX9286_0X15_RESV);
 701        } else {
 702                max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
 703
 704                /* Stop all cameras. */
 705                for_each_source(priv, source)
 706                        v4l2_subdev_call(source->sd, video, s_stream, 0);
 707
 708                max9286_i2c_mux_close(priv);
 709        }
 710
 711        return 0;
 712}
 713
 714static int max9286_enum_mbus_code(struct v4l2_subdev *sd,
 715                                  struct v4l2_subdev_pad_config *cfg,
 716                                  struct v4l2_subdev_mbus_code_enum *code)
 717{
 718        if (code->pad || code->index > 0)
 719                return -EINVAL;
 720
 721        code->code = MEDIA_BUS_FMT_UYVY8_1X16;
 722
 723        return 0;
 724}
 725
 726static struct v4l2_mbus_framefmt *
 727max9286_get_pad_format(struct max9286_priv *priv,
 728                       struct v4l2_subdev_pad_config *cfg,
 729                       unsigned int pad, u32 which)
 730{
 731        switch (which) {
 732        case V4L2_SUBDEV_FORMAT_TRY:
 733                return v4l2_subdev_get_try_format(&priv->sd, cfg, pad);
 734        case V4L2_SUBDEV_FORMAT_ACTIVE:
 735                return &priv->fmt[pad];
 736        default:
 737                return NULL;
 738        }
 739}
 740
 741static int max9286_set_fmt(struct v4l2_subdev *sd,
 742                           struct v4l2_subdev_pad_config *cfg,
 743                           struct v4l2_subdev_format *format)
 744{
 745        struct max9286_priv *priv = sd_to_max9286(sd);
 746        struct v4l2_mbus_framefmt *cfg_fmt;
 747
 748        if (format->pad == MAX9286_SRC_PAD)
 749                return -EINVAL;
 750
 751        /* Refuse non YUV422 formats as we hardcode DT to 8 bit YUV422 */
 752        switch (format->format.code) {
 753        case MEDIA_BUS_FMT_UYVY8_1X16:
 754        case MEDIA_BUS_FMT_VYUY8_1X16:
 755        case MEDIA_BUS_FMT_YUYV8_1X16:
 756        case MEDIA_BUS_FMT_YVYU8_1X16:
 757                break;
 758        default:
 759                format->format.code = MEDIA_BUS_FMT_UYVY8_1X16;
 760                break;
 761        }
 762
 763        cfg_fmt = max9286_get_pad_format(priv, cfg, format->pad, format->which);
 764        if (!cfg_fmt)
 765                return -EINVAL;
 766
 767        mutex_lock(&priv->mutex);
 768        *cfg_fmt = format->format;
 769        mutex_unlock(&priv->mutex);
 770
 771        return 0;
 772}
 773
 774static int max9286_get_fmt(struct v4l2_subdev *sd,
 775                           struct v4l2_subdev_pad_config *cfg,
 776                           struct v4l2_subdev_format *format)
 777{
 778        struct max9286_priv *priv = sd_to_max9286(sd);
 779        struct v4l2_mbus_framefmt *cfg_fmt;
 780        unsigned int pad = format->pad;
 781
 782        /*
 783         * Multiplexed Stream Support: Support link validation by returning the
 784         * format of the first bound link. All links must have the same format,
 785         * as we do not support mixing and matching of cameras connected to the
 786         * max9286.
 787         */
 788        if (pad == MAX9286_SRC_PAD)
 789                pad = __ffs(priv->bound_sources);
 790
 791        cfg_fmt = max9286_get_pad_format(priv, cfg, pad, format->which);
 792        if (!cfg_fmt)
 793                return -EINVAL;
 794
 795        mutex_lock(&priv->mutex);
 796        format->format = *cfg_fmt;
 797        mutex_unlock(&priv->mutex);
 798
 799        return 0;
 800}
 801
 802static const struct v4l2_subdev_video_ops max9286_video_ops = {
 803        .s_stream       = max9286_s_stream,
 804};
 805
 806static const struct v4l2_subdev_pad_ops max9286_pad_ops = {
 807        .enum_mbus_code = max9286_enum_mbus_code,
 808        .get_fmt        = max9286_get_fmt,
 809        .set_fmt        = max9286_set_fmt,
 810};
 811
 812static const struct v4l2_subdev_ops max9286_subdev_ops = {
 813        .video          = &max9286_video_ops,
 814        .pad            = &max9286_pad_ops,
 815};
 816
 817static void max9286_init_format(struct v4l2_mbus_framefmt *fmt)
 818{
 819        fmt->width              = 1280;
 820        fmt->height             = 800;
 821        fmt->code               = MEDIA_BUS_FMT_UYVY8_1X16;
 822        fmt->colorspace         = V4L2_COLORSPACE_SRGB;
 823        fmt->field              = V4L2_FIELD_NONE;
 824        fmt->ycbcr_enc          = V4L2_YCBCR_ENC_DEFAULT;
 825        fmt->quantization       = V4L2_QUANTIZATION_DEFAULT;
 826        fmt->xfer_func          = V4L2_XFER_FUNC_DEFAULT;
 827}
 828
 829static int max9286_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
 830{
 831        struct v4l2_mbus_framefmt *format;
 832        unsigned int i;
 833
 834        for (i = 0; i < MAX9286_N_SINKS; i++) {
 835                format = v4l2_subdev_get_try_format(subdev, fh->pad, i);
 836                max9286_init_format(format);
 837        }
 838
 839        return 0;
 840}
 841
 842static const struct v4l2_subdev_internal_ops max9286_subdev_internal_ops = {
 843        .open = max9286_open,
 844};
 845
 846static int max9286_s_ctrl(struct v4l2_ctrl *ctrl)
 847{
 848        switch (ctrl->id) {
 849        case V4L2_CID_PIXEL_RATE:
 850                return 0;
 851        default:
 852                return -EINVAL;
 853        }
 854}
 855
 856static const struct v4l2_ctrl_ops max9286_ctrl_ops = {
 857        .s_ctrl = max9286_s_ctrl,
 858};
 859
 860static int max9286_v4l2_register(struct max9286_priv *priv)
 861{
 862        struct device *dev = &priv->client->dev;
 863        struct fwnode_handle *ep;
 864        int ret;
 865        int i;
 866
 867        /* Register v4l2 async notifiers for connected Camera subdevices */
 868        ret = max9286_v4l2_notifier_register(priv);
 869        if (ret) {
 870                dev_err(dev, "Unable to register V4L2 async notifiers\n");
 871                return ret;
 872        }
 873
 874        /* Configure V4L2 for the MAX9286 itself */
 875
 876        for (i = 0; i < MAX9286_N_SINKS; i++)
 877                max9286_init_format(&priv->fmt[i]);
 878
 879        v4l2_i2c_subdev_init(&priv->sd, priv->client, &max9286_subdev_ops);
 880        priv->sd.internal_ops = &max9286_subdev_internal_ops;
 881        priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 882
 883        v4l2_ctrl_handler_init(&priv->ctrls, 1);
 884        priv->pixelrate = v4l2_ctrl_new_std(&priv->ctrls,
 885                                            &max9286_ctrl_ops,
 886                                            V4L2_CID_PIXEL_RATE,
 887                                            1, INT_MAX, 1, 50000000);
 888
 889        priv->sd.ctrl_handler = &priv->ctrls;
 890        ret = priv->ctrls.error;
 891        if (ret)
 892                goto err_async;
 893
 894        priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
 895
 896        priv->pads[MAX9286_SRC_PAD].flags = MEDIA_PAD_FL_SOURCE;
 897        for (i = 0; i < MAX9286_SRC_PAD; i++)
 898                priv->pads[i].flags = MEDIA_PAD_FL_SINK;
 899        ret = media_entity_pads_init(&priv->sd.entity, MAX9286_N_PADS,
 900                                     priv->pads);
 901        if (ret)
 902                goto err_async;
 903
 904        ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), MAX9286_SRC_PAD,
 905                                             0, 0);
 906        if (!ep) {
 907                dev_err(dev, "Unable to retrieve endpoint on \"port@4\"\n");
 908                ret = -ENOENT;
 909                goto err_async;
 910        }
 911        priv->sd.fwnode = ep;
 912
 913        ret = v4l2_async_register_subdev(&priv->sd);
 914        if (ret < 0) {
 915                dev_err(dev, "Unable to register subdevice\n");
 916                goto err_put_node;
 917        }
 918
 919        return 0;
 920
 921err_put_node:
 922        fwnode_handle_put(ep);
 923err_async:
 924        max9286_v4l2_notifier_unregister(priv);
 925
 926        return ret;
 927}
 928
 929static void max9286_v4l2_unregister(struct max9286_priv *priv)
 930{
 931        fwnode_handle_put(priv->sd.fwnode);
 932        v4l2_async_unregister_subdev(&priv->sd);
 933        max9286_v4l2_notifier_unregister(priv);
 934}
 935
 936/* -----------------------------------------------------------------------------
 937 * Probe/Remove
 938 */
 939
 940static int max9286_setup(struct max9286_priv *priv)
 941{
 942        /*
 943         * Link ordering values for all enabled links combinations. Orders must
 944         * be assigned sequentially from 0 to the number of enabled links
 945         * without leaving any hole for disabled links. We thus assign orders to
 946         * enabled links first, and use the remaining order values for disabled
 947         * links are all links must have a different order value;
 948         */
 949        static const u8 link_order[] = {
 950                (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxxx */
 951                (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxx0 */
 952                (3 << 6) | (2 << 4) | (0 << 2) | (1 << 0), /* xx0x */
 953                (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xx10 */
 954                (3 << 6) | (0 << 4) | (2 << 2) | (1 << 0), /* x0xx */
 955                (3 << 6) | (1 << 4) | (2 << 2) | (0 << 0), /* x1x0 */
 956                (3 << 6) | (1 << 4) | (0 << 2) | (2 << 0), /* x10x */
 957                (3 << 6) | (1 << 4) | (1 << 2) | (0 << 0), /* x210 */
 958                (0 << 6) | (3 << 4) | (2 << 2) | (1 << 0), /* 0xxx */
 959                (1 << 6) | (3 << 4) | (2 << 2) | (0 << 0), /* 1xx0 */
 960                (1 << 6) | (3 << 4) | (0 << 2) | (2 << 0), /* 1x0x */
 961                (2 << 6) | (3 << 4) | (1 << 2) | (0 << 0), /* 2x10 */
 962                (1 << 6) | (0 << 4) | (3 << 2) | (2 << 0), /* 10xx */
 963                (2 << 6) | (1 << 4) | (3 << 2) | (0 << 0), /* 21x0 */
 964                (2 << 6) | (1 << 4) | (0 << 2) | (3 << 0), /* 210x */
 965                (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* 3210 */
 966        };
 967
 968        /*
 969         * Set the I2C bus speed.
 970         *
 971         * Enable I2C Local Acknowledge during the probe sequences of the camera
 972         * only. This should be disabled after the mux is initialised.
 973         */
 974        max9286_configure_i2c(priv, true);
 975        max9286_reverse_channel_setup(priv, priv->reverse_channel_mv);
 976
 977        /*
 978         * Enable GMSL links, mask unused ones and autodetect link
 979         * used as CSI clock source.
 980         */
 981        max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
 982        max9286_write(priv, 0x0b, link_order[priv->route_mask]);
 983        max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
 984
 985        /*
 986         * Video format setup:
 987         * Disable CSI output, VC is set according to Link number.
 988         */
 989        max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
 990
 991        /* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
 992        max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
 993                      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
 994                      MAX9286_DATATYPE_YUV422_8BIT);
 995
 996        /* Automatic: FRAMESYNC taken from the slowest Link. */
 997        max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
 998                      MAX9286_FSYNCMETH_AUTO);
 999
1000        /* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
1001        max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
1002                      MAX9286_HVSRC_D14);
1003
1004        /*
1005         * The overlap window seems to provide additional validation by tracking
1006         * the delay between vsync and frame sync, generating an error if the
1007         * delay is bigger than the programmed window, though it's not yet clear
1008         * what value should be set.
1009         *
1010         * As it's an optional value and can be disabled, we do so by setting
1011         * a 0 overlap value.
1012         */
1013        max9286_write(priv, 0x63, 0);
1014        max9286_write(priv, 0x64, 0);
1015
1016        /*
1017         * Wait for 2ms to allow the link to resynchronize after the
1018         * configuration change.
1019         */
1020        usleep_range(2000, 5000);
1021
1022        return 0;
1023}
1024
1025static void max9286_gpio_set(struct gpio_chip *chip,
1026                             unsigned int offset, int value)
1027{
1028        struct max9286_priv *priv = gpiochip_get_data(chip);
1029
1030        if (value)
1031                priv->gpio_state |= BIT(offset);
1032        else
1033                priv->gpio_state &= ~BIT(offset);
1034
1035        max9286_write(priv, 0x0f, MAX9286_0X0F_RESERVED | priv->gpio_state);
1036}
1037
1038static int max9286_gpio_get(struct gpio_chip *chip, unsigned int offset)
1039{
1040        struct max9286_priv *priv = gpiochip_get_data(chip);
1041
1042        return priv->gpio_state & BIT(offset);
1043}
1044
1045static int max9286_register_gpio(struct max9286_priv *priv)
1046{
1047        struct device *dev = &priv->client->dev;
1048        struct gpio_chip *gpio = &priv->gpio;
1049        int ret;
1050
1051        /* Configure the GPIO */
1052        gpio->label = dev_name(dev);
1053        gpio->parent = dev;
1054        gpio->owner = THIS_MODULE;
1055        gpio->of_node = dev->of_node;
1056        gpio->ngpio = 2;
1057        gpio->base = -1;
1058        gpio->set = max9286_gpio_set;
1059        gpio->get = max9286_gpio_get;
1060        gpio->can_sleep = true;
1061
1062        /* GPIO values default to high */
1063        priv->gpio_state = BIT(0) | BIT(1);
1064
1065        ret = devm_gpiochip_add_data(dev, gpio, priv);
1066        if (ret)
1067                dev_err(dev, "Unable to create gpio_chip\n");
1068
1069        return ret;
1070}
1071
1072static int max9286_init(struct device *dev)
1073{
1074        struct max9286_priv *priv;
1075        struct i2c_client *client;
1076        int ret;
1077
1078        client = to_i2c_client(dev);
1079        priv = i2c_get_clientdata(client);
1080
1081        /* Enable the bus power. */
1082        ret = regulator_enable(priv->regulator);
1083        if (ret < 0) {
1084                dev_err(&client->dev, "Unable to turn PoC on\n");
1085                return ret;
1086        }
1087
1088        ret = max9286_setup(priv);
1089        if (ret) {
1090                dev_err(dev, "Unable to setup max9286\n");
1091                goto err_regulator;
1092        }
1093
1094        /*
1095         * Register all V4L2 interactions for the MAX9286 and notifiers for
1096         * any subdevices connected.
1097         */
1098        ret = max9286_v4l2_register(priv);
1099        if (ret) {
1100                dev_err(dev, "Failed to register with V4L2\n");
1101                goto err_regulator;
1102        }
1103
1104        ret = max9286_i2c_mux_init(priv);
1105        if (ret) {
1106                dev_err(dev, "Unable to initialize I2C multiplexer\n");
1107                goto err_v4l2_register;
1108        }
1109
1110        /* Leave the mux channels disabled until they are selected. */
1111        max9286_i2c_mux_close(priv);
1112
1113        return 0;
1114
1115err_v4l2_register:
1116        max9286_v4l2_unregister(priv);
1117err_regulator:
1118        regulator_disable(priv->regulator);
1119
1120        return ret;
1121}
1122
1123static void max9286_cleanup_dt(struct max9286_priv *priv)
1124{
1125        struct max9286_source *source;
1126
1127        for_each_source(priv, source) {
1128                fwnode_handle_put(source->fwnode);
1129                source->fwnode = NULL;
1130        }
1131}
1132
1133static int max9286_parse_dt(struct max9286_priv *priv)
1134{
1135        struct device *dev = &priv->client->dev;
1136        struct device_node *i2c_mux;
1137        struct device_node *node = NULL;
1138        unsigned int i2c_mux_mask = 0;
1139        u32 reverse_channel_microvolt;
1140
1141        /* Balance the of_node_put() performed by of_find_node_by_name(). */
1142        of_node_get(dev->of_node);
1143        i2c_mux = of_find_node_by_name(dev->of_node, "i2c-mux");
1144        if (!i2c_mux) {
1145                dev_err(dev, "Failed to find i2c-mux node\n");
1146                return -EINVAL;
1147        }
1148
1149        /* Identify which i2c-mux channels are enabled */
1150        for_each_child_of_node(i2c_mux, node) {
1151                u32 id = 0;
1152
1153                of_property_read_u32(node, "reg", &id);
1154                if (id >= MAX9286_NUM_GMSL)
1155                        continue;
1156
1157                if (!of_device_is_available(node)) {
1158                        dev_dbg(dev, "Skipping disabled I2C bus port %u\n", id);
1159                        continue;
1160                }
1161
1162                i2c_mux_mask |= BIT(id);
1163        }
1164        of_node_put(node);
1165        of_node_put(i2c_mux);
1166
1167        /* Parse the endpoints */
1168        for_each_endpoint_of_node(dev->of_node, node) {
1169                struct max9286_source *source;
1170                struct of_endpoint ep;
1171
1172                of_graph_parse_endpoint(node, &ep);
1173                dev_dbg(dev, "Endpoint %pOF on port %d",
1174                        ep.local_node, ep.port);
1175
1176                if (ep.port > MAX9286_NUM_GMSL) {
1177                        dev_err(dev, "Invalid endpoint %s on port %d",
1178                                of_node_full_name(ep.local_node), ep.port);
1179                        continue;
1180                }
1181
1182                /* For the source endpoint just parse the bus configuration. */
1183                if (ep.port == MAX9286_SRC_PAD) {
1184                        struct v4l2_fwnode_endpoint vep = {
1185                                .bus_type = V4L2_MBUS_CSI2_DPHY
1186                        };
1187                        int ret;
1188
1189                        ret = v4l2_fwnode_endpoint_parse(
1190                                        of_fwnode_handle(node), &vep);
1191                        if (ret) {
1192                                of_node_put(node);
1193                                return ret;
1194                        }
1195
1196                        priv->csi2_data_lanes =
1197                                vep.bus.mipi_csi2.num_data_lanes;
1198
1199                        continue;
1200                }
1201
1202                /* Skip if the corresponding GMSL link is unavailable. */
1203                if (!(i2c_mux_mask & BIT(ep.port)))
1204                        continue;
1205
1206                if (priv->sources[ep.port].fwnode) {
1207                        dev_err(dev,
1208                                "Multiple port endpoints are not supported: %d",
1209                                ep.port);
1210
1211                        continue;
1212                }
1213
1214                source = &priv->sources[ep.port];
1215                source->fwnode = fwnode_graph_get_remote_endpoint(
1216                                                of_fwnode_handle(node));
1217                if (!source->fwnode) {
1218                        dev_err(dev,
1219                                "Endpoint %pOF has no remote endpoint connection\n",
1220                                ep.local_node);
1221
1222                        continue;
1223                }
1224
1225                priv->source_mask |= BIT(ep.port);
1226                priv->nsources++;
1227        }
1228        of_node_put(node);
1229
1230        /*
1231         * Parse the initial value of the reverse channel amplitude from
1232         * the firmware interface and convert it to millivolts.
1233         *
1234         * Default it to 170mV for backward compatibility with DTBs that do not
1235         * provide the property.
1236         */
1237        if (of_property_read_u32(dev->of_node,
1238                                 "maxim,reverse-channel-microvolt",
1239                                 &reverse_channel_microvolt))
1240                priv->reverse_channel_mv = 170;
1241        else
1242                priv->reverse_channel_mv = reverse_channel_microvolt / 1000U;
1243
1244        priv->route_mask = priv->source_mask;
1245
1246        return 0;
1247}
1248
1249static int max9286_probe(struct i2c_client *client)
1250{
1251        struct max9286_priv *priv;
1252        int ret;
1253
1254        priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
1255        if (!priv)
1256                return -ENOMEM;
1257
1258        mutex_init(&priv->mutex);
1259
1260        priv->client = client;
1261        i2c_set_clientdata(client, priv);
1262
1263        priv->gpiod_pwdn = devm_gpiod_get_optional(&client->dev, "enable",
1264                                                   GPIOD_OUT_HIGH);
1265        if (IS_ERR(priv->gpiod_pwdn))
1266                return PTR_ERR(priv->gpiod_pwdn);
1267
1268        gpiod_set_consumer_name(priv->gpiod_pwdn, "max9286-pwdn");
1269        gpiod_set_value_cansleep(priv->gpiod_pwdn, 1);
1270
1271        /* Wait at least 4ms before the I2C lines latch to the address */
1272        if (priv->gpiod_pwdn)
1273                usleep_range(4000, 5000);
1274
1275        /*
1276         * The MAX9286 starts by default with all ports enabled, we disable all
1277         * ports early to ensure that all channels are disabled if we error out
1278         * and keep the bus consistent.
1279         */
1280        max9286_i2c_mux_close(priv);
1281
1282        /*
1283         * The MAX9286 initialises with auto-acknowledge enabled by default.
1284         * This can be invasive to other transactions on the same bus, so
1285         * disable it early. It will be enabled only as and when needed.
1286         */
1287        max9286_configure_i2c(priv, false);
1288
1289        ret = max9286_register_gpio(priv);
1290        if (ret)
1291                goto err_powerdown;
1292
1293        priv->regulator = devm_regulator_get(&client->dev, "poc");
1294        if (IS_ERR(priv->regulator)) {
1295                if (PTR_ERR(priv->regulator) != -EPROBE_DEFER)
1296                        dev_err(&client->dev,
1297                                "Unable to get PoC regulator (%ld)\n",
1298                                PTR_ERR(priv->regulator));
1299                ret = PTR_ERR(priv->regulator);
1300                goto err_powerdown;
1301        }
1302
1303        ret = max9286_parse_dt(priv);
1304        if (ret)
1305                goto err_powerdown;
1306
1307        ret = max9286_init(&client->dev);
1308        if (ret < 0)
1309                goto err_cleanup_dt;
1310
1311        return 0;
1312
1313err_cleanup_dt:
1314        max9286_cleanup_dt(priv);
1315err_powerdown:
1316        gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
1317
1318        return ret;
1319}
1320
1321static int max9286_remove(struct i2c_client *client)
1322{
1323        struct max9286_priv *priv = i2c_get_clientdata(client);
1324
1325        i2c_mux_del_adapters(priv->mux);
1326
1327        max9286_v4l2_unregister(priv);
1328
1329        regulator_disable(priv->regulator);
1330
1331        gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
1332
1333        max9286_cleanup_dt(priv);
1334
1335        return 0;
1336}
1337
1338static const struct of_device_id max9286_dt_ids[] = {
1339        { .compatible = "maxim,max9286" },
1340        {},
1341};
1342MODULE_DEVICE_TABLE(of, max9286_dt_ids);
1343
1344static struct i2c_driver max9286_i2c_driver = {
1345        .driver = {
1346                .name           = "max9286",
1347                .of_match_table = of_match_ptr(max9286_dt_ids),
1348        },
1349        .probe_new      = max9286_probe,
1350        .remove         = max9286_remove,
1351};
1352
1353module_i2c_driver(max9286_i2c_driver);
1354
1355MODULE_DESCRIPTION("Maxim MAX9286 GMSL Deserializer Driver");
1356MODULE_AUTHOR("Jacopo Mondi, Kieran Bingham, Laurent Pinchart, Niklas Söderlund, Vladimir Barinov");
1357MODULE_LICENSE("GPL");
1358