linux/drivers/media/i2c/ov02a10.c
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   1// SPDX-License-Identifier: GPL-2.0
   2// Copyright (c) 2020 MediaTek Inc.
   3
   4#include <linux/clk.h>
   5#include <linux/delay.h>
   6#include <linux/device.h>
   7#include <linux/gpio/consumer.h>
   8#include <linux/i2c.h>
   9#include <linux/module.h>
  10#include <linux/pm_runtime.h>
  11#include <linux/regulator/consumer.h>
  12#include <media/media-entity.h>
  13#include <media/v4l2-async.h>
  14#include <media/v4l2-ctrls.h>
  15#include <media/v4l2-fwnode.h>
  16#include <media/v4l2-subdev.h>
  17
  18#define OV02A10_ID                                      0x2509
  19#define OV02A10_ID_MASK                                 GENMASK(15, 0)
  20
  21#define OV02A10_REG_CHIP_ID                             0x02
  22
  23/* Bit[1] vertical upside down */
  24/* Bit[0] horizontal mirror */
  25#define REG_MIRROR_FLIP_CONTROL                         0x3f
  26
  27/* Orientation */
  28#define REG_MIRROR_FLIP_ENABLE                          0x03
  29
  30/* Bit[2:0] MIPI transmission speed select */
  31#define TX_SPEED_AREA_SEL                               0xa1
  32#define OV02A10_MIPI_TX_SPEED_DEFAULT                   0x04
  33
  34#define REG_PAGE_SWITCH                                 0xfd
  35#define REG_GLOBAL_EFFECTIVE                            0x01
  36#define REG_ENABLE                                      BIT(0)
  37
  38#define REG_SC_CTRL_MODE                                0xac
  39#define SC_CTRL_MODE_STANDBY                            0x00
  40#define SC_CTRL_MODE_STREAMING                          0x01
  41
  42/* Exposure control */
  43#define OV02A10_EXP_SHIFT                               8
  44#define OV02A10_REG_EXPOSURE_H                          0x03
  45#define OV02A10_REG_EXPOSURE_L                          0x04
  46#define OV02A10_EXPOSURE_MIN                            4
  47#define OV02A10_EXPOSURE_MAX_MARGIN                     4
  48#define OV02A10_EXPOSURE_STEP                           1
  49
  50/* Vblanking control */
  51#define OV02A10_VTS_SHIFT                               8
  52#define OV02A10_REG_VTS_H                               0x05
  53#define OV02A10_REG_VTS_L                               0x06
  54#define OV02A10_VTS_MAX                                 0x209f
  55#define OV02A10_BASE_LINES                              1224
  56
  57/* Analog gain control */
  58#define OV02A10_REG_GAIN                                0x24
  59#define OV02A10_GAIN_MIN                                0x10
  60#define OV02A10_GAIN_MAX                                0xf8
  61#define OV02A10_GAIN_STEP                               0x01
  62#define OV02A10_GAIN_DEFAULT                            0x40
  63
  64/* Test pattern control */
  65#define OV02A10_REG_TEST_PATTERN                        0xb6
  66
  67#define HZ_PER_MHZ                                      1000000L
  68#define OV02A10_LINK_FREQ_390MHZ                        (390 * HZ_PER_MHZ)
  69#define OV02A10_ECLK_FREQ                               (24 * HZ_PER_MHZ)
  70
  71/* Number of lanes supported by this driver */
  72#define OV02A10_DATA_LANES                              1
  73
  74/* Bits per sample of sensor output */
  75#define OV02A10_BITS_PER_SAMPLE                         10
  76
  77static const char * const ov02a10_supply_names[] = {
  78        "dovdd",        /* Digital I/O power */
  79        "avdd",         /* Analog power */
  80        "dvdd",         /* Digital core power */
  81};
  82
  83struct ov02a10_reg {
  84        u8 addr;
  85        u8 val;
  86};
  87
  88struct ov02a10_reg_list {
  89        u32 num_of_regs;
  90        const struct ov02a10_reg *regs;
  91};
  92
  93struct ov02a10_mode {
  94        u32 width;
  95        u32 height;
  96        u32 exp_def;
  97        u32 hts_def;
  98        u32 vts_def;
  99        const struct ov02a10_reg_list reg_list;
 100};
 101
 102struct ov02a10 {
 103        u32 eclk_freq;
 104        /* Indication of MIPI transmission speed select */
 105        u32 mipi_clock_voltage;
 106
 107        struct clk *eclk;
 108        struct gpio_desc *pd_gpio;
 109        struct gpio_desc *rst_gpio;
 110        struct regulator_bulk_data supplies[ARRAY_SIZE(ov02a10_supply_names)];
 111
 112        bool streaming;
 113        bool upside_down;
 114
 115        /*
 116         * Serialize control access, get/set format, get selection
 117         * and start streaming.
 118         */
 119        struct mutex mutex;
 120        struct v4l2_subdev subdev;
 121        struct media_pad pad;
 122        struct v4l2_mbus_framefmt fmt;
 123        struct v4l2_ctrl_handler ctrl_handler;
 124        struct v4l2_ctrl *exposure;
 125
 126        const struct ov02a10_mode *cur_mode;
 127};
 128
 129static inline struct ov02a10 *to_ov02a10(struct v4l2_subdev *sd)
 130{
 131        return container_of(sd, struct ov02a10, subdev);
 132}
 133
 134/*
 135 * eclk 24Mhz
 136 * pclk 39Mhz
 137 * linelength 934(0x3a6)
 138 * framelength 1390(0x56E)
 139 * grabwindow_width 1600
 140 * grabwindow_height 1200
 141 * max_framerate 30fps
 142 * mipi_datarate per lane 780Mbps
 143 */
 144static const struct ov02a10_reg ov02a10_1600x1200_regs[] = {
 145        {0xfd, 0x01},
 146        {0xac, 0x00},
 147        {0xfd, 0x00},
 148        {0x2f, 0x29},
 149        {0x34, 0x00},
 150        {0x35, 0x21},
 151        {0x30, 0x15},
 152        {0x33, 0x01},
 153        {0xfd, 0x01},
 154        {0x44, 0x00},
 155        {0x2a, 0x4c},
 156        {0x2b, 0x1e},
 157        {0x2c, 0x60},
 158        {0x25, 0x11},
 159        {0x03, 0x01},
 160        {0x04, 0xae},
 161        {0x09, 0x00},
 162        {0x0a, 0x02},
 163        {0x06, 0xa6},
 164        {0x31, 0x00},
 165        {0x24, 0x40},
 166        {0x01, 0x01},
 167        {0xfb, 0x73},
 168        {0xfd, 0x01},
 169        {0x16, 0x04},
 170        {0x1c, 0x09},
 171        {0x21, 0x42},
 172        {0x12, 0x04},
 173        {0x13, 0x10},
 174        {0x11, 0x40},
 175        {0x33, 0x81},
 176        {0xd0, 0x00},
 177        {0xd1, 0x01},
 178        {0xd2, 0x00},
 179        {0x50, 0x10},
 180        {0x51, 0x23},
 181        {0x52, 0x20},
 182        {0x53, 0x10},
 183        {0x54, 0x02},
 184        {0x55, 0x20},
 185        {0x56, 0x02},
 186        {0x58, 0x48},
 187        {0x5d, 0x15},
 188        {0x5e, 0x05},
 189        {0x66, 0x66},
 190        {0x68, 0x68},
 191        {0x6b, 0x00},
 192        {0x6c, 0x00},
 193        {0x6f, 0x40},
 194        {0x70, 0x40},
 195        {0x71, 0x0a},
 196        {0x72, 0xf0},
 197        {0x73, 0x10},
 198        {0x75, 0x80},
 199        {0x76, 0x10},
 200        {0x84, 0x00},
 201        {0x85, 0x10},
 202        {0x86, 0x10},
 203        {0x87, 0x00},
 204        {0x8a, 0x22},
 205        {0x8b, 0x22},
 206        {0x19, 0xf1},
 207        {0x29, 0x01},
 208        {0xfd, 0x01},
 209        {0x9d, 0x16},
 210        {0xa0, 0x29},
 211        {0xa1, 0x04},
 212        {0xad, 0x62},
 213        {0xae, 0x00},
 214        {0xaf, 0x85},
 215        {0xb1, 0x01},
 216        {0x8e, 0x06},
 217        {0x8f, 0x40},
 218        {0x90, 0x04},
 219        {0x91, 0xb0},
 220        {0x45, 0x01},
 221        {0x46, 0x00},
 222        {0x47, 0x6c},
 223        {0x48, 0x03},
 224        {0x49, 0x8b},
 225        {0x4a, 0x00},
 226        {0x4b, 0x07},
 227        {0x4c, 0x04},
 228        {0x4d, 0xb7},
 229        {0xf0, 0x40},
 230        {0xf1, 0x40},
 231        {0xf2, 0x40},
 232        {0xf3, 0x40},
 233        {0x3f, 0x00},
 234        {0xfd, 0x01},
 235        {0x05, 0x00},
 236        {0x06, 0xa6},
 237        {0xfd, 0x01},
 238};
 239
 240static const char * const ov02a10_test_pattern_menu[] = {
 241        "Disabled",
 242        "Eight Vertical Colour Bars",
 243};
 244
 245static const s64 link_freq_menu_items[] = {
 246        OV02A10_LINK_FREQ_390MHZ,
 247};
 248
 249static u64 to_pixel_rate(u32 f_index)
 250{
 251        u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV02A10_DATA_LANES;
 252
 253        do_div(pixel_rate, OV02A10_BITS_PER_SAMPLE);
 254
 255        return pixel_rate;
 256}
 257
 258static const struct ov02a10_mode supported_modes[] = {
 259        {
 260                .width = 1600,
 261                .height = 1200,
 262                .exp_def = 0x01ae,
 263                .hts_def = 0x03a6,
 264                .vts_def = 0x056e,
 265                .reg_list = {
 266                        .num_of_regs = ARRAY_SIZE(ov02a10_1600x1200_regs),
 267                        .regs = ov02a10_1600x1200_regs,
 268                },
 269        },
 270};
 271
 272static int ov02a10_write_array(struct ov02a10 *ov02a10,
 273                               const struct ov02a10_reg_list *r_list)
 274{
 275        struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 276        unsigned int i;
 277        int ret;
 278
 279        for (i = 0; i < r_list->num_of_regs; i++) {
 280                ret = i2c_smbus_write_byte_data(client, r_list->regs[i].addr,
 281                                                r_list->regs[i].val);
 282                if (ret < 0)
 283                        return ret;
 284        }
 285
 286        return 0;
 287}
 288
 289static void ov02a10_fill_fmt(const struct ov02a10_mode *mode,
 290                             struct v4l2_mbus_framefmt *fmt)
 291{
 292        fmt->width = mode->width;
 293        fmt->height = mode->height;
 294        fmt->field = V4L2_FIELD_NONE;
 295}
 296
 297static int ov02a10_set_fmt(struct v4l2_subdev *sd,
 298                           struct v4l2_subdev_pad_config *cfg,
 299                           struct v4l2_subdev_format *fmt)
 300{
 301        struct ov02a10 *ov02a10 = to_ov02a10(sd);
 302        struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
 303        struct v4l2_mbus_framefmt *frame_fmt;
 304        int ret = 0;
 305
 306        mutex_lock(&ov02a10->mutex);
 307
 308        if (ov02a10->streaming && fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
 309                ret = -EBUSY;
 310                goto out_unlock;
 311        }
 312
 313        /* Only one sensor mode supported */
 314        mbus_fmt->code = ov02a10->fmt.code;
 315        ov02a10_fill_fmt(ov02a10->cur_mode, mbus_fmt);
 316
 317        if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
 318                frame_fmt = v4l2_subdev_get_try_format(sd, cfg, 0);
 319        else
 320                frame_fmt = &ov02a10->fmt;
 321
 322        *frame_fmt = *mbus_fmt;
 323
 324out_unlock:
 325        mutex_unlock(&ov02a10->mutex);
 326        return ret;
 327}
 328
 329static int ov02a10_get_fmt(struct v4l2_subdev *sd,
 330                           struct v4l2_subdev_pad_config *cfg,
 331                           struct v4l2_subdev_format *fmt)
 332{
 333        struct ov02a10 *ov02a10 = to_ov02a10(sd);
 334        struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format;
 335
 336        mutex_lock(&ov02a10->mutex);
 337
 338        if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
 339                fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
 340        } else {
 341                fmt->format = ov02a10->fmt;
 342                mbus_fmt->code = ov02a10->fmt.code;
 343                ov02a10_fill_fmt(ov02a10->cur_mode, mbus_fmt);
 344        }
 345
 346        mutex_unlock(&ov02a10->mutex);
 347
 348        return 0;
 349}
 350
 351static int ov02a10_enum_mbus_code(struct v4l2_subdev *sd,
 352                                  struct v4l2_subdev_pad_config *cfg,
 353                                  struct v4l2_subdev_mbus_code_enum *code)
 354{
 355        struct ov02a10 *ov02a10 = to_ov02a10(sd);
 356
 357        if (code->index != 0)
 358                return -EINVAL;
 359
 360        code->code = ov02a10->fmt.code;
 361
 362        return 0;
 363}
 364
 365static int ov02a10_enum_frame_sizes(struct v4l2_subdev *sd,
 366                                    struct v4l2_subdev_pad_config *cfg,
 367                                    struct v4l2_subdev_frame_size_enum *fse)
 368{
 369        if (fse->index >= ARRAY_SIZE(supported_modes))
 370                return -EINVAL;
 371
 372        fse->min_width  = supported_modes[fse->index].width;
 373        fse->max_width  = supported_modes[fse->index].width;
 374        fse->max_height = supported_modes[fse->index].height;
 375        fse->min_height = supported_modes[fse->index].height;
 376
 377        return 0;
 378}
 379
 380static int ov02a10_check_sensor_id(struct ov02a10 *ov02a10)
 381{
 382        struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 383        u16 chip_id;
 384        int ret;
 385
 386        /* Validate the chip ID */
 387        ret = i2c_smbus_read_word_swapped(client, OV02A10_REG_CHIP_ID);
 388        if (ret < 0)
 389                return ret;
 390
 391        chip_id = le16_to_cpu((__force __le16)ret);
 392
 393        if ((chip_id & OV02A10_ID_MASK) != OV02A10_ID) {
 394                dev_err(&client->dev, "unexpected sensor id(0x%04x)\n", chip_id);
 395                return -EINVAL;
 396        }
 397
 398        return 0;
 399}
 400
 401static int ov02a10_power_on(struct device *dev)
 402{
 403        struct i2c_client *client = to_i2c_client(dev);
 404        struct v4l2_subdev *sd = i2c_get_clientdata(client);
 405        struct ov02a10 *ov02a10 = to_ov02a10(sd);
 406        int ret;
 407
 408        gpiod_set_value_cansleep(ov02a10->rst_gpio, 1);
 409        gpiod_set_value_cansleep(ov02a10->pd_gpio, 1);
 410
 411        ret = clk_prepare_enable(ov02a10->eclk);
 412        if (ret < 0) {
 413                dev_err(dev, "failed to enable eclk\n");
 414                return ret;
 415        }
 416
 417        ret = regulator_bulk_enable(ARRAY_SIZE(ov02a10_supply_names),
 418                                    ov02a10->supplies);
 419        if (ret < 0) {
 420                dev_err(dev, "failed to enable regulators\n");
 421                goto disable_clk;
 422        }
 423        usleep_range(5000, 6000);
 424
 425        gpiod_set_value_cansleep(ov02a10->pd_gpio, 0);
 426        usleep_range(5000, 6000);
 427
 428        gpiod_set_value_cansleep(ov02a10->rst_gpio, 0);
 429        usleep_range(5000, 6000);
 430
 431        ret = ov02a10_check_sensor_id(ov02a10);
 432        if (ret)
 433                goto disable_regulator;
 434
 435        return 0;
 436
 437disable_regulator:
 438        regulator_bulk_disable(ARRAY_SIZE(ov02a10_supply_names),
 439                               ov02a10->supplies);
 440disable_clk:
 441        clk_disable_unprepare(ov02a10->eclk);
 442
 443        return ret;
 444}
 445
 446static int ov02a10_power_off(struct device *dev)
 447{
 448        struct i2c_client *client = to_i2c_client(dev);
 449        struct v4l2_subdev *sd = i2c_get_clientdata(client);
 450        struct ov02a10 *ov02a10 = to_ov02a10(sd);
 451
 452        gpiod_set_value_cansleep(ov02a10->rst_gpio, 1);
 453        clk_disable_unprepare(ov02a10->eclk);
 454        gpiod_set_value_cansleep(ov02a10->pd_gpio, 1);
 455        regulator_bulk_disable(ARRAY_SIZE(ov02a10_supply_names),
 456                               ov02a10->supplies);
 457
 458        return 0;
 459}
 460
 461static int __ov02a10_start_stream(struct ov02a10 *ov02a10)
 462{
 463        struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 464        const struct ov02a10_reg_list *reg_list;
 465        int ret;
 466
 467        /* Apply default values of current mode */
 468        reg_list = &ov02a10->cur_mode->reg_list;
 469        ret = ov02a10_write_array(ov02a10, reg_list);
 470        if (ret)
 471                return ret;
 472
 473        /* Apply customized values from user */
 474        ret = __v4l2_ctrl_handler_setup(ov02a10->subdev.ctrl_handler);
 475        if (ret)
 476                return ret;
 477
 478        /* Set orientation to 180 degree */
 479        if (ov02a10->upside_down) {
 480                ret = i2c_smbus_write_byte_data(client, REG_MIRROR_FLIP_CONTROL,
 481                                                REG_MIRROR_FLIP_ENABLE);
 482                if (ret < 0) {
 483                        dev_err(&client->dev, "failed to set orientation\n");
 484                        return ret;
 485                }
 486                ret = i2c_smbus_write_byte_data(client, REG_GLOBAL_EFFECTIVE,
 487                                                REG_ENABLE);
 488                if (ret < 0)
 489                        return ret;
 490        }
 491
 492        /* Set MIPI TX speed according to DT property */
 493        if (ov02a10->mipi_clock_voltage != OV02A10_MIPI_TX_SPEED_DEFAULT) {
 494                ret = i2c_smbus_write_byte_data(client, TX_SPEED_AREA_SEL,
 495                                                ov02a10->mipi_clock_voltage);
 496                if (ret < 0)
 497                        return ret;
 498        }
 499
 500        /* Set stream on register */
 501        return i2c_smbus_write_byte_data(client, REG_SC_CTRL_MODE,
 502                                         SC_CTRL_MODE_STREAMING);
 503}
 504
 505static int __ov02a10_stop_stream(struct ov02a10 *ov02a10)
 506{
 507        struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 508
 509        return i2c_smbus_write_byte_data(client, REG_SC_CTRL_MODE,
 510                                         SC_CTRL_MODE_STANDBY);
 511}
 512
 513static int ov02a10_entity_init_cfg(struct v4l2_subdev *sd,
 514                                   struct v4l2_subdev_pad_config *cfg)
 515{
 516        struct v4l2_subdev_format fmt = {
 517                .which = V4L2_SUBDEV_FORMAT_TRY,
 518                .format = {
 519                        .width = 1600,
 520                        .height = 1200,
 521                }
 522        };
 523
 524        ov02a10_set_fmt(sd, cfg, &fmt);
 525
 526        return 0;
 527}
 528
 529static int ov02a10_s_stream(struct v4l2_subdev *sd, int on)
 530{
 531        struct ov02a10 *ov02a10 = to_ov02a10(sd);
 532        struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 533        int ret;
 534
 535        mutex_lock(&ov02a10->mutex);
 536
 537        if (ov02a10->streaming == on) {
 538                ret = 0;
 539                goto unlock_and_return;
 540        }
 541
 542        if (on) {
 543                ret = pm_runtime_get_sync(&client->dev);
 544                if (ret < 0) {
 545                        pm_runtime_put_noidle(&client->dev);
 546                        goto unlock_and_return;
 547                }
 548
 549                ret = __ov02a10_start_stream(ov02a10);
 550                if (ret) {
 551                        __ov02a10_stop_stream(ov02a10);
 552                        ov02a10->streaming = !on;
 553                        goto err_rpm_put;
 554                }
 555        } else {
 556                __ov02a10_stop_stream(ov02a10);
 557                pm_runtime_put(&client->dev);
 558        }
 559
 560        ov02a10->streaming = on;
 561        mutex_unlock(&ov02a10->mutex);
 562
 563        return 0;
 564
 565err_rpm_put:
 566        pm_runtime_put(&client->dev);
 567unlock_and_return:
 568        mutex_unlock(&ov02a10->mutex);
 569
 570        return ret;
 571}
 572
 573static const struct dev_pm_ops ov02a10_pm_ops = {
 574        SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
 575                                pm_runtime_force_resume)
 576        SET_RUNTIME_PM_OPS(ov02a10_power_off, ov02a10_power_on, NULL)
 577};
 578
 579static int ov02a10_set_exposure(struct ov02a10 *ov02a10, int val)
 580{
 581        struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 582        int ret;
 583
 584        ret = i2c_smbus_write_byte_data(client, REG_PAGE_SWITCH, REG_ENABLE);
 585        if (ret < 0)
 586                return ret;
 587
 588        ret = i2c_smbus_write_byte_data(client, OV02A10_REG_EXPOSURE_H,
 589                                        val >> OV02A10_EXP_SHIFT);
 590        if (ret < 0)
 591                return ret;
 592
 593        ret = i2c_smbus_write_byte_data(client, OV02A10_REG_EXPOSURE_L, val);
 594        if (ret < 0)
 595                return ret;
 596
 597        return i2c_smbus_write_byte_data(client, REG_GLOBAL_EFFECTIVE,
 598                                         REG_ENABLE);
 599}
 600
 601static int ov02a10_set_gain(struct ov02a10 *ov02a10, int val)
 602{
 603        struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 604        int ret;
 605
 606        ret = i2c_smbus_write_byte_data(client, REG_PAGE_SWITCH, REG_ENABLE);
 607        if (ret < 0)
 608                return ret;
 609
 610        ret = i2c_smbus_write_byte_data(client, OV02A10_REG_GAIN, val);
 611        if (ret < 0)
 612                return ret;
 613
 614        return i2c_smbus_write_byte_data(client, REG_GLOBAL_EFFECTIVE,
 615                                         REG_ENABLE);
 616}
 617
 618static int ov02a10_set_vblank(struct ov02a10 *ov02a10, int val)
 619{
 620        struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 621        u32 vts = val + ov02a10->cur_mode->height - OV02A10_BASE_LINES;
 622        int ret;
 623
 624        ret = i2c_smbus_write_byte_data(client, REG_PAGE_SWITCH, REG_ENABLE);
 625        if (ret < 0)
 626                return ret;
 627
 628        ret = i2c_smbus_write_byte_data(client, OV02A10_REG_VTS_H,
 629                                        vts >> OV02A10_VTS_SHIFT);
 630        if (ret < 0)
 631                return ret;
 632
 633        ret = i2c_smbus_write_byte_data(client, OV02A10_REG_VTS_L, vts);
 634        if (ret < 0)
 635                return ret;
 636
 637        return i2c_smbus_write_byte_data(client, REG_GLOBAL_EFFECTIVE,
 638                                         REG_ENABLE);
 639}
 640
 641static int ov02a10_set_test_pattern(struct ov02a10 *ov02a10, int pattern)
 642{
 643        struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 644        int ret;
 645
 646        ret = i2c_smbus_write_byte_data(client, REG_PAGE_SWITCH, REG_ENABLE);
 647        if (ret < 0)
 648                return ret;
 649
 650        ret = i2c_smbus_write_byte_data(client, OV02A10_REG_TEST_PATTERN,
 651                                        pattern);
 652        if (ret < 0)
 653                return ret;
 654
 655        ret = i2c_smbus_write_byte_data(client, REG_GLOBAL_EFFECTIVE,
 656                                        REG_ENABLE);
 657        if (ret < 0)
 658                return ret;
 659
 660        return i2c_smbus_write_byte_data(client, REG_SC_CTRL_MODE,
 661                                         SC_CTRL_MODE_STREAMING);
 662}
 663
 664static int ov02a10_set_ctrl(struct v4l2_ctrl *ctrl)
 665{
 666        struct ov02a10 *ov02a10 = container_of(ctrl->handler,
 667                                               struct ov02a10, ctrl_handler);
 668        struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 669        s64 max_expo;
 670        int ret;
 671
 672        /* Propagate change of current control to all related controls */
 673        if (ctrl->id == V4L2_CID_VBLANK) {
 674                /* Update max exposure while meeting expected vblanking */
 675                max_expo = ov02a10->cur_mode->height + ctrl->val -
 676                           OV02A10_EXPOSURE_MAX_MARGIN;
 677                __v4l2_ctrl_modify_range(ov02a10->exposure,
 678                                         ov02a10->exposure->minimum, max_expo,
 679                                         ov02a10->exposure->step,
 680                                         ov02a10->exposure->default_value);
 681        }
 682
 683        /* V4L2 controls values will be applied only when power is already up */
 684        if (!pm_runtime_get_if_in_use(&client->dev))
 685                return 0;
 686
 687        switch (ctrl->id) {
 688        case V4L2_CID_EXPOSURE:
 689                ret = ov02a10_set_exposure(ov02a10, ctrl->val);
 690                break;
 691        case V4L2_CID_ANALOGUE_GAIN:
 692                ret = ov02a10_set_gain(ov02a10, ctrl->val);
 693                break;
 694        case V4L2_CID_VBLANK:
 695                ret = ov02a10_set_vblank(ov02a10, ctrl->val);
 696                break;
 697        case V4L2_CID_TEST_PATTERN:
 698                ret = ov02a10_set_test_pattern(ov02a10, ctrl->val);
 699                break;
 700        default:
 701                ret = -EINVAL;
 702                break;
 703        }
 704
 705        pm_runtime_put(&client->dev);
 706
 707        return ret;
 708}
 709
 710static const struct v4l2_subdev_video_ops ov02a10_video_ops = {
 711        .s_stream = ov02a10_s_stream,
 712};
 713
 714static const struct v4l2_subdev_pad_ops ov02a10_pad_ops = {
 715        .init_cfg = ov02a10_entity_init_cfg,
 716        .enum_mbus_code = ov02a10_enum_mbus_code,
 717        .enum_frame_size = ov02a10_enum_frame_sizes,
 718        .get_fmt = ov02a10_get_fmt,
 719        .set_fmt = ov02a10_set_fmt,
 720};
 721
 722static const struct v4l2_subdev_ops ov02a10_subdev_ops = {
 723        .video  = &ov02a10_video_ops,
 724        .pad    = &ov02a10_pad_ops,
 725};
 726
 727static const struct media_entity_operations ov02a10_subdev_entity_ops = {
 728        .link_validate = v4l2_subdev_link_validate,
 729};
 730
 731static const struct v4l2_ctrl_ops ov02a10_ctrl_ops = {
 732        .s_ctrl = ov02a10_set_ctrl,
 733};
 734
 735static int ov02a10_initialize_controls(struct ov02a10 *ov02a10)
 736{
 737        struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
 738        const struct ov02a10_mode *mode;
 739        struct v4l2_ctrl_handler *handler;
 740        struct v4l2_ctrl *ctrl;
 741        s64 exposure_max;
 742        s64 vblank_def;
 743        s64 pixel_rate;
 744        s64 h_blank;
 745        int ret;
 746
 747        handler = &ov02a10->ctrl_handler;
 748        mode = ov02a10->cur_mode;
 749        ret = v4l2_ctrl_handler_init(handler, 7);
 750        if (ret)
 751                return ret;
 752
 753        handler->lock = &ov02a10->mutex;
 754
 755        ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ, 0, 0,
 756                                      link_freq_menu_items);
 757        if (ctrl)
 758                ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
 759
 760        pixel_rate = to_pixel_rate(0);
 761        v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, 0, pixel_rate, 1,
 762                          pixel_rate);
 763
 764        h_blank = mode->hts_def - mode->width;
 765        v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK, h_blank, h_blank, 1,
 766                          h_blank);
 767
 768        vblank_def = mode->vts_def - mode->height;
 769        v4l2_ctrl_new_std(handler, &ov02a10_ctrl_ops, V4L2_CID_VBLANK,
 770                          vblank_def, OV02A10_VTS_MAX - mode->height, 1,
 771                          vblank_def);
 772
 773        exposure_max = mode->vts_def - 4;
 774        ov02a10->exposure = v4l2_ctrl_new_std(handler, &ov02a10_ctrl_ops,
 775                                              V4L2_CID_EXPOSURE,
 776                                              OV02A10_EXPOSURE_MIN,
 777                                              exposure_max,
 778                                              OV02A10_EXPOSURE_STEP,
 779                                              mode->exp_def);
 780
 781        v4l2_ctrl_new_std(handler, &ov02a10_ctrl_ops,
 782                          V4L2_CID_ANALOGUE_GAIN, OV02A10_GAIN_MIN,
 783                          OV02A10_GAIN_MAX, OV02A10_GAIN_STEP,
 784                          OV02A10_GAIN_DEFAULT);
 785
 786        v4l2_ctrl_new_std_menu_items(handler, &ov02a10_ctrl_ops,
 787                                     V4L2_CID_TEST_PATTERN,
 788                                     ARRAY_SIZE(ov02a10_test_pattern_menu) - 1,
 789                                     0, 0, ov02a10_test_pattern_menu);
 790
 791        if (handler->error) {
 792                ret = handler->error;
 793                dev_err(&client->dev, "failed to init controls(%d)\n", ret);
 794                goto err_free_handler;
 795        }
 796
 797        ov02a10->subdev.ctrl_handler = handler;
 798
 799        return 0;
 800
 801err_free_handler:
 802        v4l2_ctrl_handler_free(handler);
 803
 804        return ret;
 805}
 806
 807static int ov02a10_check_hwcfg(struct device *dev, struct ov02a10 *ov02a10)
 808{
 809        struct fwnode_handle *ep;
 810        struct fwnode_handle *fwnode = dev_fwnode(dev);
 811        struct v4l2_fwnode_endpoint bus_cfg = {
 812                .bus_type = V4L2_MBUS_CSI2_DPHY,
 813        };
 814        unsigned int i, j;
 815        u32 clk_volt;
 816        int ret;
 817
 818        if (!fwnode)
 819                return -EINVAL;
 820
 821        ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
 822        if (!ep)
 823                return -ENXIO;
 824
 825        ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
 826        fwnode_handle_put(ep);
 827        if (ret)
 828                return ret;
 829
 830        /* Optional indication of MIPI clock voltage unit */
 831        ret = fwnode_property_read_u32(ep, "ovti,mipi-clock-voltage",
 832                                       &clk_volt);
 833
 834        if (!ret)
 835                ov02a10->mipi_clock_voltage = clk_volt;
 836
 837        for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
 838                for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
 839                        if (link_freq_menu_items[i] ==
 840                                bus_cfg.link_frequencies[j])
 841                                break;
 842                }
 843
 844                if (j == bus_cfg.nr_of_link_frequencies) {
 845                        dev_err(dev, "no link frequency %lld supported\n",
 846                                link_freq_menu_items[i]);
 847                        ret = -EINVAL;
 848                        break;
 849                }
 850        }
 851
 852        v4l2_fwnode_endpoint_free(&bus_cfg);
 853
 854        return ret;
 855}
 856
 857static int ov02a10_probe(struct i2c_client *client)
 858{
 859        struct device *dev = &client->dev;
 860        struct ov02a10 *ov02a10;
 861        unsigned int i;
 862        unsigned int rotation;
 863        int ret;
 864
 865        ov02a10 = devm_kzalloc(dev, sizeof(*ov02a10), GFP_KERNEL);
 866        if (!ov02a10)
 867                return -ENOMEM;
 868
 869        ret = ov02a10_check_hwcfg(dev, ov02a10);
 870        if (ret)
 871                return dev_err_probe(dev, ret,
 872                                     "failed to check HW configuration\n");
 873
 874        v4l2_i2c_subdev_init(&ov02a10->subdev, client, &ov02a10_subdev_ops);
 875
 876        ov02a10->mipi_clock_voltage = OV02A10_MIPI_TX_SPEED_DEFAULT;
 877        ov02a10->fmt.code = MEDIA_BUS_FMT_SBGGR10_1X10;
 878
 879        /* Optional indication of physical rotation of sensor */
 880        rotation = 0;
 881        device_property_read_u32(dev, "rotation", &rotation);
 882        if (rotation == 180) {
 883                ov02a10->upside_down = true;
 884                ov02a10->fmt.code = MEDIA_BUS_FMT_SRGGB10_1X10;
 885        }
 886
 887        ov02a10->eclk = devm_clk_get(dev, "eclk");
 888        if (IS_ERR(ov02a10->eclk))
 889                return dev_err_probe(dev, PTR_ERR(ov02a10->eclk),
 890                                     "failed to get eclk\n");
 891
 892        ret = device_property_read_u32(dev, "clock-frequency",
 893                                       &ov02a10->eclk_freq);
 894        if (ret < 0)
 895                return dev_err_probe(dev, ret,
 896                                     "failed to get eclk frequency\n");
 897
 898        ret = clk_set_rate(ov02a10->eclk, ov02a10->eclk_freq);
 899        if (ret < 0)
 900                return dev_err_probe(dev, ret,
 901                                     "failed to set eclk frequency (24MHz)\n");
 902
 903        if (clk_get_rate(ov02a10->eclk) != OV02A10_ECLK_FREQ)
 904                dev_warn(dev, "eclk mismatched, mode is based on 24MHz\n");
 905
 906        ov02a10->pd_gpio = devm_gpiod_get(dev, "powerdown", GPIOD_OUT_HIGH);
 907        if (IS_ERR(ov02a10->pd_gpio))
 908                return dev_err_probe(dev, PTR_ERR(ov02a10->pd_gpio),
 909                                     "failed to get powerdown-gpios\n");
 910
 911        ov02a10->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
 912        if (IS_ERR(ov02a10->rst_gpio))
 913                return dev_err_probe(dev, PTR_ERR(ov02a10->rst_gpio),
 914                                     "failed to get reset-gpios\n");
 915
 916        for (i = 0; i < ARRAY_SIZE(ov02a10_supply_names); i++)
 917                ov02a10->supplies[i].supply = ov02a10_supply_names[i];
 918
 919        ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ov02a10_supply_names),
 920                                      ov02a10->supplies);
 921        if (ret)
 922                return dev_err_probe(dev, ret, "failed to get regulators\n");
 923
 924        mutex_init(&ov02a10->mutex);
 925
 926        /* Set default mode */
 927        ov02a10->cur_mode = &supported_modes[0];
 928
 929        ret = ov02a10_initialize_controls(ov02a10);
 930        if (ret) {
 931                dev_err_probe(dev, ret, "failed to initialize controls\n");
 932                goto err_destroy_mutex;
 933        }
 934
 935        /* Initialize subdev */
 936        ov02a10->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 937        ov02a10->subdev.entity.ops = &ov02a10_subdev_entity_ops;
 938        ov02a10->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
 939        ov02a10->pad.flags = MEDIA_PAD_FL_SOURCE;
 940
 941        ret = media_entity_pads_init(&ov02a10->subdev.entity, 1, &ov02a10->pad);
 942        if (ret < 0) {
 943                dev_err_probe(dev, ret, "failed to initialize entity pads\n");
 944                goto err_free_handler;
 945        }
 946
 947        pm_runtime_enable(dev);
 948        if (!pm_runtime_enabled(dev)) {
 949                ret = ov02a10_power_on(dev);
 950                if (ret < 0) {
 951                        dev_err_probe(dev, ret, "failed to power on\n");
 952                        goto err_clean_entity;
 953                }
 954        }
 955
 956        ret = v4l2_async_register_subdev(&ov02a10->subdev);
 957        if (ret) {
 958                dev_err_probe(dev, ret, "failed to register V4L2 subdev\n");
 959                goto err_power_off;
 960        }
 961
 962        return 0;
 963
 964err_power_off:
 965        if (pm_runtime_enabled(dev))
 966                pm_runtime_disable(dev);
 967        else
 968                ov02a10_power_off(dev);
 969err_clean_entity:
 970        media_entity_cleanup(&ov02a10->subdev.entity);
 971err_free_handler:
 972        v4l2_ctrl_handler_free(ov02a10->subdev.ctrl_handler);
 973err_destroy_mutex:
 974        mutex_destroy(&ov02a10->mutex);
 975
 976        return ret;
 977}
 978
 979static int ov02a10_remove(struct i2c_client *client)
 980{
 981        struct v4l2_subdev *sd = i2c_get_clientdata(client);
 982        struct ov02a10 *ov02a10 = to_ov02a10(sd);
 983
 984        v4l2_async_unregister_subdev(sd);
 985        media_entity_cleanup(&sd->entity);
 986        v4l2_ctrl_handler_free(sd->ctrl_handler);
 987        pm_runtime_disable(&client->dev);
 988        if (!pm_runtime_status_suspended(&client->dev))
 989                ov02a10_power_off(&client->dev);
 990        pm_runtime_set_suspended(&client->dev);
 991        mutex_destroy(&ov02a10->mutex);
 992
 993        return 0;
 994}
 995
 996static const struct of_device_id ov02a10_of_match[] = {
 997        { .compatible = "ovti,ov02a10" },
 998        {}
 999};
1000MODULE_DEVICE_TABLE(of, ov02a10_of_match);
1001
1002static struct i2c_driver ov02a10_i2c_driver = {
1003        .driver = {
1004                .name = "ov02a10",
1005                .pm = &ov02a10_pm_ops,
1006                .of_match_table = ov02a10_of_match,
1007        },
1008        .probe_new      = &ov02a10_probe,
1009        .remove         = &ov02a10_remove,
1010};
1011module_i2c_driver(ov02a10_i2c_driver);
1012
1013MODULE_AUTHOR("Dongchun Zhu <dongchun.zhu@mediatek.com>");
1014MODULE_DESCRIPTION("OmniVision OV02A10 sensor driver");
1015MODULE_LICENSE("GPL v2");
1016