LXR linux/drivers/memstick/host/r592.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (C) 2010 - Maxim Levitsky
   4 * driver for Ricoh memstick readers
   5 */
   6
   7#include <linux/kernel.h>
   8#include <linux/module.h>
   9#include <linux/freezer.h>
  10#include <linux/jiffies.h>
  11#include <linux/interrupt.h>
  12#include <linux/pci.h>
  13#include <linux/pci_ids.h>
  14#include <linux/delay.h>
  15#include <linux/slab.h>
  16#include <linux/kthread.h>
  17#include <linux/sched.h>
  18#include <linux/highmem.h>
  19#include <asm/byteorder.h>
  20#include <linux/swab.h>
  21#include "r592.h"
  22
  23static bool r592_enable_dma = 1;
  24static int debug;
  25
  26static const char *tpc_names[] = {
  27        "MS_TPC_READ_MG_STATUS",
  28        "MS_TPC_READ_LONG_DATA",
  29        "MS_TPC_READ_SHORT_DATA",
  30        "MS_TPC_READ_REG",
  31        "MS_TPC_READ_QUAD_DATA",
  32        "INVALID",
  33        "MS_TPC_GET_INT",
  34        "MS_TPC_SET_RW_REG_ADRS",
  35        "MS_TPC_EX_SET_CMD",
  36        "MS_TPC_WRITE_QUAD_DATA",
  37        "MS_TPC_WRITE_REG",
  38        "MS_TPC_WRITE_SHORT_DATA",
  39        "MS_TPC_WRITE_LONG_DATA",
  40        "MS_TPC_SET_CMD",
  41};
  42
  43/**
  44 * memstick_debug_get_tpc_name - debug helper that returns string for
  45 * a TPC number
  46 */
  47const char *memstick_debug_get_tpc_name(int tpc)
  48{
  49        return tpc_names[tpc-1];
  50}
  51EXPORT_SYMBOL(memstick_debug_get_tpc_name);
  52
  53
  54/* Read a register*/
  55static inline u32 r592_read_reg(struct r592_device *dev, int address)
  56{
  57        u32 value = readl(dev->mmio + address);
  58        dbg_reg("reg #%02d == 0x%08x", address, value);
  59        return value;
  60}
  61
  62/* Write a register */
  63static inline void r592_write_reg(struct r592_device *dev,
  64                                                        int address, u32 value)
  65{
  66        dbg_reg("reg #%02d <- 0x%08x", address, value);
  67        writel(value, dev->mmio + address);
  68}
  69
  70/* Reads a big endian DWORD register */
  71static inline u32 r592_read_reg_raw_be(struct r592_device *dev, int address)
  72{
  73        u32 value = __raw_readl(dev->mmio + address);
  74        dbg_reg("reg #%02d == 0x%08x", address, value);
  75        return be32_to_cpu(value);
  76}
  77
  78/* Writes a big endian DWORD register */
  79static inline void r592_write_reg_raw_be(struct r592_device *dev,
  80                                                        int address, u32 value)
  81{
  82        dbg_reg("reg #%02d <- 0x%08x", address, value);
  83        __raw_writel(cpu_to_be32(value), dev->mmio + address);
  84}
  85
  86/* Set specific bits in a register (little endian) */
  87static inline void r592_set_reg_mask(struct r592_device *dev,
  88                                                        int address, u32 mask)
  89{
  90        u32 reg = readl(dev->mmio + address);
  91        dbg_reg("reg #%02d |= 0x%08x (old =0x%08x)", address, mask, reg);
  92        writel(reg | mask , dev->mmio + address);
  93}
  94
  95/* Clear specific bits in a register (little endian) */
  96static inline void r592_clear_reg_mask(struct r592_device *dev,
  97                                                int address, u32 mask)
  98{
  99        u32 reg = readl(dev->mmio + address);
 100        dbg_reg("reg #%02d &= 0x%08x (old = 0x%08x, mask = 0x%08x)",
 101                                                address, ~mask, reg, mask);
 102        writel(reg & ~mask, dev->mmio + address);
 103}
 104
 105
 106/* Wait for status bits while checking for errors */
 107static int r592_wait_status(struct r592_device *dev, u32 mask, u32 wanted_mask)
 108{
 109        unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 110        u32 reg = r592_read_reg(dev, R592_STATUS);
 111
 112        if ((reg & mask) == wanted_mask)
 113                return 0;
 114
 115        while (time_before(jiffies, timeout)) {
 116
 117                reg = r592_read_reg(dev, R592_STATUS);
 118
 119                if ((reg & mask) == wanted_mask)
 120                        return 0;
 121
 122                if (reg & (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR))
 123                        return -EIO;
 124
 125                cpu_relax();
 126        }
 127        return -ETIME;
 128}
 129
 130
 131/* Enable/disable device */
 132static int r592_enable_device(struct r592_device *dev, bool enable)
 133{
 134        dbg("%sabling the device", enable ? "en" : "dis");
 135
 136        if (enable) {
 137
 138                /* Power up the card */
 139                r592_write_reg(dev, R592_POWER, R592_POWER_0 | R592_POWER_1);
 140
 141                /* Perform a reset */
 142                r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);
 143
 144                msleep(100);
 145        } else
 146                /* Power down the card */
 147                r592_write_reg(dev, R592_POWER, 0);
 148
 149        return 0;
 150}
 151
 152/* Set serial/parallel mode */
 153static int r592_set_mode(struct r592_device *dev, bool parallel_mode)
 154{
 155        if (!parallel_mode) {
 156                dbg("switching to serial mode");
 157
 158                /* Set serial mode */
 159                r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_SERIAL);
 160
 161                r592_clear_reg_mask(dev, R592_POWER, R592_POWER_20);
 162
 163        } else {
 164                dbg("switching to parallel mode");
 165
 166                /* This setting should be set _before_ switch TPC */
 167                r592_set_reg_mask(dev, R592_POWER, R592_POWER_20);
 168
 169                r592_clear_reg_mask(dev, R592_IO,
 170                        R592_IO_SERIAL1 | R592_IO_SERIAL2);
 171
 172                /* Set the parallel mode now */
 173                r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_PARALLEL);
 174        }
 175
 176        dev->parallel_mode = parallel_mode;
 177        return 0;
 178}
 179
 180/* Perform a controller reset without powering down the card */
 181static void r592_host_reset(struct r592_device *dev)
 182{
 183        r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);
 184        msleep(100);
 185        r592_set_mode(dev, dev->parallel_mode);
 186}
 187
 188#ifdef CONFIG_PM_SLEEP
 189/* Disable all hardware interrupts */
 190static void r592_clear_interrupts(struct r592_device *dev)
 191{
 192        /* Disable & ACK all interrupts */
 193        r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_ACK_MASK);
 194        r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_EN_MASK);
 195}
 196#endif
 197
 198/* Tests if there is an CRC error */
 199static int r592_test_io_error(struct r592_device *dev)
 200{
 201        if (!(r592_read_reg(dev, R592_STATUS) &
 202                (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR)))
 203                return 0;
 204
 205        return -EIO;
 206}
 207
 208/* Ensure that FIFO is ready for use */
 209static int r592_test_fifo_empty(struct r592_device *dev)
 210{
 211        if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)
 212                return 0;
 213
 214        dbg("FIFO not ready, trying to reset the device");
 215        r592_host_reset(dev);
 216
 217        if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)
 218                return 0;
 219
 220        message("FIFO still not ready, giving up");
 221        return -EIO;
 222}
 223
 224/* Activates the DMA transfer from to FIFO */
 225static void r592_start_dma(struct r592_device *dev, bool is_write)
 226{
 227        unsigned long flags;
 228        u32 reg;
 229        spin_lock_irqsave(&dev->irq_lock, flags);
 230
 231        /* Ack interrupts (just in case) + enable them */
 232        r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);
 233        r592_set_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);
 234
 235        /* Set DMA address */
 236        r592_write_reg(dev, R592_FIFO_DMA, sg_dma_address(&dev->req->sg));
 237
 238        /* Enable the DMA */
 239        reg = r592_read_reg(dev, R592_FIFO_DMA_SETTINGS);
 240        reg |= R592_FIFO_DMA_SETTINGS_EN;
 241
 242        if (!is_write)
 243                reg |= R592_FIFO_DMA_SETTINGS_DIR;
 244        else
 245                reg &= ~R592_FIFO_DMA_SETTINGS_DIR;
 246        r592_write_reg(dev, R592_FIFO_DMA_SETTINGS, reg);
 247
 248        spin_unlock_irqrestore(&dev->irq_lock, flags);
 249}
 250
 251/* Cleanups DMA related settings */
 252static void r592_stop_dma(struct r592_device *dev, int error)
 253{
 254        r592_clear_reg_mask(dev, R592_FIFO_DMA_SETTINGS,
 255                R592_FIFO_DMA_SETTINGS_EN);
 256
 257        /* This is only a precation */
 258        r592_write_reg(dev, R592_FIFO_DMA,
 259                        dev->dummy_dma_page_physical_address);
 260
 261        r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);
 262        r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);
 263        dev->dma_error = error;
 264}
 265
 266/* Test if hardware supports DMA */
 267static void r592_check_dma(struct r592_device *dev)
 268{
 269        dev->dma_capable = r592_enable_dma &&
 270                (r592_read_reg(dev, R592_FIFO_DMA_SETTINGS) &
 271                        R592_FIFO_DMA_SETTINGS_CAP);
 272}
 273
 274/* Transfers fifo contents in/out using DMA */
 275static int r592_transfer_fifo_dma(struct r592_device *dev)
 276{
 277        int len, sg_count;
 278        bool is_write;
 279
 280        if (!dev->dma_capable || !dev->req->long_data)
 281                return -EINVAL;
 282
 283        len = dev->req->sg.length;
 284        is_write = dev->req->data_dir == WRITE;
 285
 286        if (len != R592_LFIFO_SIZE)
 287                return -EINVAL;
 288
 289        dbg_verbose("doing dma transfer");
 290
 291        dev->dma_error = 0;
 292        reinit_completion(&dev->dma_done);
 293
 294        /* TODO: hidden assumption about nenth beeing always 1 */
 295        sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
 296                PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
 297
 298        if (sg_count != 1 || sg_dma_len(&dev->req->sg) < R592_LFIFO_SIZE) {
 299                message("problem in dma_map_sg");
 300                return -EIO;
 301        }
 302
 303        r592_start_dma(dev, is_write);
 304
 305        /* Wait for DMA completion */
 306        if (!wait_for_completion_timeout(
 307                        &dev->dma_done, msecs_to_jiffies(1000))) {
 308                message("DMA timeout");
 309                r592_stop_dma(dev, -ETIMEDOUT);
 310        }
 311
 312        dma_unmap_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
 313                PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
 314
 315
 316        return dev->dma_error;
 317}
 318
 319/*
 320 * Writes the FIFO in 4 byte chunks.
 321 * If length isn't 4 byte aligned, rest of the data if put to a fifo
 322 * to be written later
 323 * Use r592_flush_fifo_write to flush that fifo when writing for the
 324 * last time
 325 */
 326static void r592_write_fifo_pio(struct r592_device *dev,
 327                                        unsigned char *buffer, int len)
 328{
 329        /* flush spill from former write */
 330        if (!kfifo_is_empty(&dev->pio_fifo)) {
 331
 332                u8 tmp[4] = {0};
 333                int copy_len = kfifo_in(&dev->pio_fifo, buffer, len);
 334
 335                if (!kfifo_is_full(&dev->pio_fifo))
 336                        return;
 337                len -= copy_len;
 338                buffer += copy_len;
 339
 340                copy_len = kfifo_out(&dev->pio_fifo, tmp, 4);
 341                WARN_ON(copy_len != 4);
 342                r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)tmp);
 343        }
 344
 345        WARN_ON(!kfifo_is_empty(&dev->pio_fifo));
 346
 347        /* write full dwords */
 348        while (len >= 4) {
 349                r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);
 350                buffer += 4;
 351                len -= 4;
 352        }
 353
 354        /* put remaining bytes to the spill */
 355        if (len)
 356                kfifo_in(&dev->pio_fifo, buffer, len);
 357}
 358
 359/* Flushes the temporary FIFO used to make aligned DWORD writes */
 360static void r592_flush_fifo_write(struct r592_device *dev)
 361{
 362        int ret;
 363        u8 buffer[4] = { 0 };
 364
 365        if (kfifo_is_empty(&dev->pio_fifo))
 366                return;
 367
 368        ret = kfifo_out(&dev->pio_fifo, buffer, 4);
 369        /* intentionally ignore __must_check return code */
 370        (void)ret;
 371        r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);
 372}
 373
 374/*
 375 * Read a fifo in 4 bytes chunks.
 376 * If input doesn't fit the buffer, it places bytes of last dword in spill
 377 * buffer, so that they don't get lost on last read, just throw these away.
 378 */
 379static void r592_read_fifo_pio(struct r592_device *dev,
 380                                                unsigned char *buffer, int len)
 381{
 382        u8 tmp[4];
 383
 384        /* Read from last spill */
 385        if (!kfifo_is_empty(&dev->pio_fifo)) {
 386                int bytes_copied =
 387                        kfifo_out(&dev->pio_fifo, buffer, min(4, len));
 388                buffer += bytes_copied;
 389                len -= bytes_copied;
 390
 391                if (!kfifo_is_empty(&dev->pio_fifo))
 392                        return;
 393        }
 394
 395        /* Reads dwords from FIFO */
 396        while (len >= 4) {
 397                *(u32 *)buffer = r592_read_reg_raw_be(dev, R592_FIFO_PIO);
 398                buffer += 4;
 399                len -= 4;
 400        }
 401
 402        if (len) {
 403                *(u32 *)tmp = r592_read_reg_raw_be(dev, R592_FIFO_PIO);
 404                kfifo_in(&dev->pio_fifo, tmp, 4);
 405                len -= kfifo_out(&dev->pio_fifo, buffer, len);
 406        }
 407
 408        WARN_ON(len);
 409        return;
 410}
 411
 412/* Transfers actual data using PIO. */
 413static int r592_transfer_fifo_pio(struct r592_device *dev)
 414{
 415        unsigned long flags;
 416
 417        bool is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;
 418        struct sg_mapping_iter miter;
 419
 420        kfifo_reset(&dev->pio_fifo);
 421
 422        if (!dev->req->long_data) {
 423                if (is_write) {
 424                        r592_write_fifo_pio(dev, dev->req->data,
 425                                                        dev->req->data_len);
 426                        r592_flush_fifo_write(dev);
 427                } else
 428                        r592_read_fifo_pio(dev, dev->req->data,
 429                                                        dev->req->data_len);
 430                return 0;
 431        }
 432
 433        local_irq_save(flags);
 434        sg_miter_start(&miter, &dev->req->sg, 1, SG_MITER_ATOMIC |
 435                (is_write ? SG_MITER_FROM_SG : SG_MITER_TO_SG));
 436
 437        /* Do the transfer fifo<->memory*/
 438        while (sg_miter_next(&miter))
 439                if (is_write)
 440                        r592_write_fifo_pio(dev, miter.addr, miter.length);
 441                else
 442                        r592_read_fifo_pio(dev, miter.addr, miter.length);
 443
 444
 445        /* Write last few non aligned bytes*/
 446        if (is_write)
 447                r592_flush_fifo_write(dev);
 448
 449        sg_miter_stop(&miter);
 450        local_irq_restore(flags);
 451        return 0;
 452}
 453
 454/* Executes one TPC (data is read/written from small or large fifo) */
 455static void r592_execute_tpc(struct r592_device *dev)
 456{
 457        bool is_write;
 458        int len, error;
 459        u32 status, reg;
 460
 461        if (!dev->req) {
 462                message("BUG: tpc execution without request!");
 463                return;
 464        }
 465
 466        is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;
 467        len = dev->req->long_data ?
 468                dev->req->sg.length : dev->req->data_len;
 469
 470        /* Ensure that FIFO can hold the input data */
 471        if (len > R592_LFIFO_SIZE) {
 472                message("IO: hardware doesn't support TPCs longer that 512");
 473                error = -ENOSYS;
 474                goto out;
 475        }
 476
 477        if (!(r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_PRSNT)) {
 478                dbg("IO: refusing to send TPC because card is absent");
 479                error = -ENODEV;
 480                goto out;
 481        }
 482
 483        dbg("IO: executing %s LEN=%d",
 484                        memstick_debug_get_tpc_name(dev->req->tpc), len);
 485
 486        /* Set IO direction */
 487        if (is_write)
 488                r592_set_reg_mask(dev, R592_IO, R592_IO_DIRECTION);
 489        else
 490                r592_clear_reg_mask(dev, R592_IO, R592_IO_DIRECTION);
 491
 492
 493        error = r592_test_fifo_empty(dev);
 494        if (error)
 495                goto out;
 496
 497        /* Transfer write data */
 498        if (is_write) {
 499                error = r592_transfer_fifo_dma(dev);
 500                if (error == -EINVAL)
 501                        error = r592_transfer_fifo_pio(dev);
 502        }
 503
 504        if (error)
 505                goto out;
 506
 507        /* Trigger the TPC */
 508        reg = (len << R592_TPC_EXEC_LEN_SHIFT) |
 509                (dev->req->tpc << R592_TPC_EXEC_TPC_SHIFT) |
 510                        R592_TPC_EXEC_BIG_FIFO;
 511
 512        r592_write_reg(dev, R592_TPC_EXEC, reg);
 513
 514        /* Wait for TPC completion */
 515        status = R592_STATUS_RDY;
 516        if (dev->req->need_card_int)
 517                status |= R592_STATUS_CED;
 518
 519        error = r592_wait_status(dev, status, status);
 520        if (error) {
 521                message("card didn't respond");
 522                goto out;
 523        }
 524
 525        /* Test IO errors */
 526        error = r592_test_io_error(dev);
 527        if (error) {
 528                dbg("IO error");
 529                goto out;
 530        }
 531
 532        /* Read data from FIFO */
 533        if (!is_write) {
 534                error = r592_transfer_fifo_dma(dev);
 535                if (error == -EINVAL)
 536                        error = r592_transfer_fifo_pio(dev);
 537        }
 538
 539        /* read INT reg. This can be shortened with shifts, but that way
 540                its more readable */
 541        if (dev->parallel_mode && dev->req->need_card_int) {
 542
 543                dev->req->int_reg = 0;
 544                status = r592_read_reg(dev, R592_STATUS);
 545
 546                if (status & R592_STATUS_P_CMDNACK)
 547                        dev->req->int_reg |= MEMSTICK_INT_CMDNAK;
 548                if (status & R592_STATUS_P_BREQ)
 549                        dev->req->int_reg |= MEMSTICK_INT_BREQ;
 550                if (status & R592_STATUS_P_INTERR)
 551                        dev->req->int_reg |= MEMSTICK_INT_ERR;
 552                if (status & R592_STATUS_P_CED)
 553                        dev->req->int_reg |= MEMSTICK_INT_CED;
 554        }
 555
 556        if (error)
 557                dbg("FIFO read error");
 558out:
 559        dev->req->error = error;
 560        r592_clear_reg_mask(dev, R592_REG_MSC, R592_REG_MSC_LED);
 561        return;
 562}
 563
 564/* Main request processing thread */
 565static int r592_process_thread(void *data)
 566{
 567        int error;
 568        struct r592_device *dev = (struct r592_device *)data;
 569        unsigned long flags;
 570
 571        while (!kthread_should_stop()) {
 572                spin_lock_irqsave(&dev->io_thread_lock, flags);
 573                set_current_state(TASK_INTERRUPTIBLE);
 574                error = memstick_next_req(dev->host, &dev->req);
 575                spin_unlock_irqrestore(&dev->io_thread_lock, flags);
 576
 577                if (error) {
 578                        if (error == -ENXIO || error == -EAGAIN) {
 579                                dbg_verbose("IO: done IO, sleeping");
 580                        } else {
 581                                dbg("IO: unknown error from "
 582                                        "memstick_next_req %d", error);
 583                        }
 584
 585                        if (kthread_should_stop())
 586                                set_current_state(TASK_RUNNING);
 587
 588                        schedule();
 589                } else {
 590                        set_current_state(TASK_RUNNING);
 591                        r592_execute_tpc(dev);
 592                }
 593        }
 594        return 0;
 595}
 596
 597/* Reprogram chip to detect change in card state */
 598/* eg, if card is detected, arm it to detect removal, and vice versa */
 599static void r592_update_card_detect(struct r592_device *dev)
 600{
 601        u32 reg = r592_read_reg(dev, R592_REG_MSC);
 602        bool card_detected = reg & R592_REG_MSC_PRSNT;
 603
 604        dbg("update card detect. card state: %s", card_detected ?
 605                "present" : "absent");
 606
 607        reg &= ~((R592_REG_MSC_IRQ_REMOVE | R592_REG_MSC_IRQ_INSERT) << 16);
 608
 609        if (card_detected)
 610                reg |= (R592_REG_MSC_IRQ_REMOVE << 16);
 611        else
 612                reg |= (R592_REG_MSC_IRQ_INSERT << 16);
 613
 614        r592_write_reg(dev, R592_REG_MSC, reg);
 615}
 616
 617/* Timer routine that fires 1 second after last card detection event, */
 618static void r592_detect_timer(struct timer_list *t)
 619{
 620        struct r592_device *dev = from_timer(dev, t, detect_timer);
 621        r592_update_card_detect(dev);
 622        memstick_detect_change(dev->host);
 623}
 624
 625/* Interrupt handler */
 626static irqreturn_t r592_irq(int irq, void *data)
 627{
 628        struct r592_device *dev = (struct r592_device *)data;
 629        irqreturn_t ret = IRQ_NONE;
 630        u32 reg;
 631        u16 irq_enable, irq_status;
 632        unsigned long flags;
 633        int error;
 634
 635        spin_lock_irqsave(&dev->irq_lock, flags);
 636
 637        reg = r592_read_reg(dev, R592_REG_MSC);
 638        irq_enable = reg >> 16;
 639        irq_status = reg & 0xFFFF;
 640
 641        /* Ack the interrupts */
 642        reg &= ~irq_status;
 643        r592_write_reg(dev, R592_REG_MSC, reg);
 644
 645        /* Get the IRQ status minus bits that aren't enabled */
 646        irq_status &= (irq_enable);
 647
 648        /* Due to limitation of memstick core, we don't look at bits that
 649                indicate that card was removed/inserted and/or present */
 650        if (irq_status & (R592_REG_MSC_IRQ_INSERT | R592_REG_MSC_IRQ_REMOVE)) {
 651
 652                bool card_was_added = irq_status & R592_REG_MSC_IRQ_INSERT;
 653                ret = IRQ_HANDLED;
 654
 655                message("IRQ: card %s", card_was_added ? "added" : "removed");
 656
 657                mod_timer(&dev->detect_timer,
 658                        jiffies + msecs_to_jiffies(card_was_added ? 500 : 50));
 659        }
 660
 661        if (irq_status &
 662                (R592_REG_MSC_FIFO_DMA_DONE | R592_REG_MSC_FIFO_DMA_ERR)) {
 663                ret = IRQ_HANDLED;
 664
 665                if (irq_status & R592_REG_MSC_FIFO_DMA_ERR) {
 666                        message("IRQ: DMA error");
 667                        error = -EIO;
 668                } else {
 669                        dbg_verbose("IRQ: dma done");
 670                        error = 0;
 671                }
 672
 673                r592_stop_dma(dev, error);
 674                complete(&dev->dma_done);
 675        }
 676
 677        spin_unlock_irqrestore(&dev->irq_lock, flags);
 678        return ret;
 679}
 680
 681/* External inteface: set settings */
 682static int r592_set_param(struct memstick_host *host,
 683                        enum memstick_param param, int value)
 684{
 685        struct r592_device *dev = memstick_priv(host);
 686
 687        switch (param) {
 688        case MEMSTICK_POWER:
 689                switch (value) {
 690                case MEMSTICK_POWER_ON:
 691                        return r592_enable_device(dev, true);
 692                case MEMSTICK_POWER_OFF:
 693                        return r592_enable_device(dev, false);
 694                default:
 695                        return -EINVAL;
 696                }
 697        case MEMSTICK_INTERFACE:
 698                switch (value) {
 699                case MEMSTICK_SERIAL:
 700                        return r592_set_mode(dev, 0);
 701                case MEMSTICK_PAR4:
 702                        return r592_set_mode(dev, 1);
 703                default:
 704                        return -EINVAL;
 705                }
 706        default:
 707                return -EINVAL;
 708        }
 709}
 710
 711/* External interface: submit requests */
 712static void r592_submit_req(struct memstick_host *host)
 713{
 714        struct r592_device *dev = memstick_priv(host);
 715        unsigned long flags;
 716
 717        if (dev->req)
 718                return;
 719
 720        spin_lock_irqsave(&dev->io_thread_lock, flags);
 721        if (wake_up_process(dev->io_thread))
 722                dbg_verbose("IO thread woken to process requests");
 723        spin_unlock_irqrestore(&dev->io_thread_lock, flags);
 724}
 725
 726static const struct pci_device_id r592_pci_id_tbl[] = {
 727
 728        { PCI_VDEVICE(RICOH, 0x0592), },
 729        { },
 730};
 731
 732/* Main entry */
 733static int r592_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 734{
 735        int error = -ENOMEM;
 736        struct memstick_host *host;
 737        struct r592_device *dev;
 738
 739        /* Allocate memory */
 740        host = memstick_alloc_host(sizeof(struct r592_device), &pdev->dev);
 741        if (!host)
 742                goto error1;
 743
 744        dev = memstick_priv(host);
 745        dev->host = host;
 746        dev->pci_dev = pdev;
 747        pci_set_drvdata(pdev, dev);
 748
 749        /* pci initialization */
 750        error = pci_enable_device(pdev);
 751        if (error)
 752                goto error2;
 753
 754        pci_set_master(pdev);
 755        error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
 756        if (error)
 757                goto error3;
 758
 759        error = pci_request_regions(pdev, DRV_NAME);
 760        if (error)
 761                goto error3;
 762
 763        dev->mmio = pci_ioremap_bar(pdev, 0);
 764        if (!dev->mmio) {
 765                error = -ENOMEM;
 766                goto error4;
 767        }
 768
 769        dev->irq = pdev->irq;
 770        spin_lock_init(&dev->irq_lock);
 771        spin_lock_init(&dev->io_thread_lock);
 772        init_completion(&dev->dma_done);
 773        INIT_KFIFO(dev->pio_fifo);
 774        timer_setup(&dev->detect_timer, r592_detect_timer, 0);
 775
 776        /* Host initialization */
 777        host->caps = MEMSTICK_CAP_PAR4;
 778        host->request = r592_submit_req;
 779        host->set_param = r592_set_param;
 780        r592_check_dma(dev);
 781
 782        dev->io_thread = kthread_run(r592_process_thread, dev, "r592_io");
 783        if (IS_ERR(dev->io_thread)) {
 784                error = PTR_ERR(dev->io_thread);
 785                goto error5;
 786        }
 787
 788        /* This is just a precation, so don't fail */
 789        dev->dummy_dma_page = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
 790                &dev->dummy_dma_page_physical_address, GFP_KERNEL);
 791        r592_stop_dma(dev , 0);
 792
 793        error = request_irq(dev->irq, &r592_irq, IRQF_SHARED,
 794                          DRV_NAME, dev);
 795        if (error)
 796                goto error6;
 797
 798        r592_update_card_detect(dev);
 799        error = memstick_add_host(host);
 800        if (error)
 801                goto error7;
 802
 803        message("driver successfully loaded");
 804        return 0;
 805error7:
 806        free_irq(dev->irq, dev);
 807error6:
 808        if (dev->dummy_dma_page)
 809                dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page,
 810                        dev->dummy_dma_page_physical_address);
 811
 812        kthread_stop(dev->io_thread);
 813error5:
 814        iounmap(dev->mmio);
 815error4:
 816        pci_release_regions(pdev);
 817error3:
 818        pci_disable_device(pdev);
 819error2:
 820        memstick_free_host(host);
 821error1:
 822        return error;
 823}
 824
 825static void r592_remove(struct pci_dev *pdev)
 826{
 827        int error = 0;
 828        struct r592_device *dev = pci_get_drvdata(pdev);
 829
 830        /* Stop the processing thread.
 831        That ensures that we won't take any more requests */
 832        kthread_stop(dev->io_thread);
 833
 834        r592_enable_device(dev, false);
 835
 836        while (!error && dev->req) {
 837                dev->req->error = -ETIME;
 838                error = memstick_next_req(dev->host, &dev->req);
 839        }
 840        memstick_remove_host(dev->host);
 841
 842        free_irq(dev->irq, dev);
 843        iounmap(dev->mmio);
 844        pci_release_regions(pdev);
 845        pci_disable_device(pdev);
 846        memstick_free_host(dev->host);
 847
 848        if (dev->dummy_dma_page)
 849                dma_free_coherent(&pdev->dev, PAGE_SIZE, dev->dummy_dma_page,
 850                        dev->dummy_dma_page_physical_address);
 851}
 852
 853#ifdef CONFIG_PM_SLEEP
 854static int r592_suspend(struct device *core_dev)
 855{
 856        struct r592_device *dev = dev_get_drvdata(core_dev);
 857
 858        r592_clear_interrupts(dev);
 859        memstick_suspend_host(dev->host);
 860        del_timer_sync(&dev->detect_timer);
 861        return 0;
 862}
 863
 864static int r592_resume(struct device *core_dev)
 865{
 866        struct r592_device *dev = dev_get_drvdata(core_dev);
 867
 868        r592_clear_interrupts(dev);
 869        r592_enable_device(dev, false);
 870        memstick_resume_host(dev->host);
 871        r592_update_card_detect(dev);
 872        return 0;
 873}
 874#endif
 875
 876static SIMPLE_DEV_PM_OPS(r592_pm_ops, r592_suspend, r592_resume);
 877
 878MODULE_DEVICE_TABLE(pci, r592_pci_id_tbl);
 879
 880static struct pci_driver r852_pci_driver = {
 881        .name           = DRV_NAME,
 882        .id_table       = r592_pci_id_tbl,
 883        .probe          = r592_probe,
 884        .remove         = r592_remove,
 885        .driver.pm      = &r592_pm_ops,
 886};
 887
 888module_pci_driver(r852_pci_driver);
 889
 890module_param_named(enable_dma, r592_enable_dma, bool, S_IRUGO);
 891MODULE_PARM_DESC(enable_dma, "Enable usage of the DMA (default)");
 892module_param(debug, int, S_IRUGO | S_IWUSR);
 893MODULE_PARM_DESC(debug, "Debug level (0-3)");
 894
 895MODULE_LICENSE("GPL");
 896MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
 897MODULE_DESCRIPTION("Ricoh R5C592 Memstick/Memstick PRO card reader driver");
 898