1
2
3
4#ifndef _I40E_H_
5#define _I40E_H_
6
7#include <net/tcp.h>
8#include <net/udp.h>
9#include <linux/types.h>
10#include <linux/errno.h>
11#include <linux/module.h>
12#include <linux/pci.h>
13#include <linux/aer.h>
14#include <linux/netdevice.h>
15#include <linux/ioport.h>
16#include <linux/iommu.h>
17#include <linux/slab.h>
18#include <linux/list.h>
19#include <linux/hashtable.h>
20#include <linux/string.h>
21#include <linux/in.h>
22#include <linux/ip.h>
23#include <linux/sctp.h>
24#include <linux/pkt_sched.h>
25#include <linux/ipv6.h>
26#include <net/checksum.h>
27#include <net/ip6_checksum.h>
28#include <linux/ethtool.h>
29#include <linux/if_vlan.h>
30#include <linux/if_macvlan.h>
31#include <linux/if_bridge.h>
32#include <linux/clocksource.h>
33#include <linux/net_tstamp.h>
34#include <linux/ptp_clock_kernel.h>
35#include <net/pkt_cls.h>
36#include <net/tc_act/tc_gact.h>
37#include <net/tc_act/tc_mirred.h>
38#include <net/udp_tunnel.h>
39#include <net/xdp_sock.h>
40#include "i40e_type.h"
41#include "i40e_prototype.h"
42#include <linux/net/intel/i40e_client.h>
43#include <linux/avf/virtchnl.h>
44#include "i40e_virtchnl_pf.h"
45#include "i40e_txrx.h"
46#include "i40e_dcb.h"
47
48
49#define I40E_MAX_VEB 16
50
51#define I40E_MAX_NUM_DESCRIPTORS 4096
52#define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024)
53#define I40E_DEFAULT_NUM_DESCRIPTORS 512
54#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
55#define I40E_MIN_NUM_DESCRIPTORS 64
56#define I40E_MIN_MSIX 2
57#define I40E_DEFAULT_NUM_VMDQ_VSI 8
58#define I40E_MIN_VSI_ALLOC 83
59
60#define i40e_default_queues_per_vmdq(pf) \
61 (((pf)->hw_features & I40E_HW_RSS_AQ_CAPABLE) ? 4 : 1)
62#define I40E_DEFAULT_QUEUES_PER_VF 4
63#define I40E_MAX_VF_QUEUES 16
64#define i40e_pf_get_max_q_per_tc(pf) \
65 (((pf)->hw_features & I40E_HW_128_QP_RSS_CAPABLE) ? 128 : 64)
66#define I40E_FDIR_RING_COUNT 32
67#define I40E_MAX_AQ_BUF_SIZE 4096
68#define I40E_AQ_LEN 256
69#define I40E_MIN_ARQ_LEN 1
70#define I40E_MIN_ASQ_LEN 2
71#define I40E_AQ_WORK_LIMIT 66
72#define I40E_MAX_USER_PRIORITY 8
73#define I40E_DEFAULT_TRAFFIC_CLASS BIT(0)
74#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
75#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 16)
76
77#define I40E_NVM_VERSION_LO_SHIFT 0
78#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
79#define I40E_NVM_VERSION_HI_SHIFT 12
80#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
81#define I40E_OEM_VER_BUILD_MASK 0xffff
82#define I40E_OEM_VER_PATCH_MASK 0xff
83#define I40E_OEM_VER_BUILD_SHIFT 8
84#define I40E_OEM_VER_SHIFT 24
85#define I40E_PHY_DEBUG_ALL \
86 (I40E_AQ_PHY_DEBUG_DISABLE_LINK_FW | \
87 I40E_AQ_PHY_DEBUG_DISABLE_ALL_LINK_FW)
88
89#define I40E_OEM_EETRACK_ID 0xffffffff
90#define I40E_OEM_GEN_SHIFT 24
91#define I40E_OEM_SNAP_MASK 0x00ff0000
92#define I40E_OEM_SNAP_SHIFT 16
93#define I40E_OEM_RELEASE_MASK 0x0000ffff
94
95#define I40E_RX_DESC(R, i) \
96 (&(((union i40e_rx_desc *)((R)->desc))[i]))
97#define I40E_TX_DESC(R, i) \
98 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
99#define I40E_TX_CTXTDESC(R, i) \
100 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
101#define I40E_TX_FDIRDESC(R, i) \
102 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
103
104
105#define I40E_BW_CREDIT_DIVISOR 50
106#define I40E_BW_MBPS_DIVISOR 125000
107#define I40E_MAX_BW_INACTIVE_ACCUM 4
108
109
110enum i40e_state_t {
111 __I40E_TESTING,
112 __I40E_CONFIG_BUSY,
113 __I40E_CONFIG_DONE,
114 __I40E_DOWN,
115 __I40E_SERVICE_SCHED,
116 __I40E_ADMINQ_EVENT_PENDING,
117 __I40E_MDD_EVENT_PENDING,
118 __I40E_VFLR_EVENT_PENDING,
119 __I40E_RESET_RECOVERY_PENDING,
120 __I40E_TIMEOUT_RECOVERY_PENDING,
121 __I40E_MISC_IRQ_REQUESTED,
122 __I40E_RESET_INTR_RECEIVED,
123 __I40E_REINIT_REQUESTED,
124 __I40E_PF_RESET_REQUESTED,
125 __I40E_PF_RESET_AND_REBUILD_REQUESTED,
126 __I40E_CORE_RESET_REQUESTED,
127 __I40E_GLOBAL_RESET_REQUESTED,
128 __I40E_EMP_RESET_INTR_RECEIVED,
129 __I40E_SUSPENDED,
130 __I40E_PTP_TX_IN_PROGRESS,
131 __I40E_BAD_EEPROM,
132 __I40E_DOWN_REQUESTED,
133 __I40E_FD_FLUSH_REQUESTED,
134 __I40E_FD_ATR_AUTO_DISABLED,
135 __I40E_FD_SB_AUTO_DISABLED,
136 __I40E_RESET_FAILED,
137 __I40E_PORT_SUSPENDED,
138 __I40E_VF_DISABLE,
139 __I40E_MACVLAN_SYNC_PENDING,
140 __I40E_TEMP_LINK_POLLING,
141 __I40E_CLIENT_SERVICE_REQUESTED,
142 __I40E_CLIENT_L2_CHANGE,
143 __I40E_CLIENT_RESET,
144 __I40E_VIRTCHNL_OP_PENDING,
145 __I40E_RECOVERY_MODE,
146 __I40E_VF_RESETS_DISABLED,
147 __I40E_VFS_RELEASING,
148
149 __I40E_STATE_SIZE__,
150};
151
152#define I40E_PF_RESET_FLAG BIT_ULL(__I40E_PF_RESET_REQUESTED)
153#define I40E_PF_RESET_AND_REBUILD_FLAG \
154 BIT_ULL(__I40E_PF_RESET_AND_REBUILD_REQUESTED)
155
156
157enum i40e_vsi_state_t {
158 __I40E_VSI_DOWN,
159 __I40E_VSI_NEEDS_RESTART,
160 __I40E_VSI_SYNCING_FILTERS,
161 __I40E_VSI_OVERFLOW_PROMISC,
162 __I40E_VSI_REINIT_REQUESTED,
163 __I40E_VSI_DOWN_REQUESTED,
164
165 __I40E_VSI_STATE_SIZE__,
166};
167
168enum i40e_interrupt_policy {
169 I40E_INTERRUPT_BEST_CASE,
170 I40E_INTERRUPT_MEDIUM,
171 I40E_INTERRUPT_LOWEST
172};
173
174struct i40e_lump_tracking {
175 u16 num_entries;
176 u16 search_hint;
177 u16 list[0];
178#define I40E_PILE_VALID_BIT 0x8000
179#define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2)
180};
181
182#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
183#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
184#define I40E_FDIR_BUFFER_FULL_MARGIN 10
185#define I40E_FDIR_BUFFER_HEAD_ROOM 32
186#define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4)
187
188#define I40E_HKEY_ARRAY_SIZE ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4)
189#define I40E_HLUT_ARRAY_SIZE ((I40E_PFQF_HLUT_MAX_INDEX + 1) * 4)
190#define I40E_VF_HLUT_ARRAY_SIZE ((I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4)
191
192enum i40e_fd_stat_idx {
193 I40E_FD_STAT_ATR,
194 I40E_FD_STAT_SB,
195 I40E_FD_STAT_ATR_TUNNEL,
196 I40E_FD_STAT_PF_COUNT
197};
198#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
199#define I40E_FD_ATR_STAT_IDX(pf_id) \
200 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
201#define I40E_FD_SB_STAT_IDX(pf_id) \
202 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
203#define I40E_FD_ATR_TUNNEL_STAT_IDX(pf_id) \
204 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR_TUNNEL)
205
206
207
208
209struct i40e_rx_flow_userdef {
210 bool flex_filter;
211 u16 flex_word;
212 u16 flex_offset;
213};
214
215struct i40e_fdir_filter {
216 struct hlist_node fdir_node;
217
218 u8 flow_type;
219 u8 ipl4_proto;
220
221 __be32 dst_ip;
222 __be32 src_ip;
223 __be32 dst_ip6[4];
224 __be32 src_ip6[4];
225 __be16 src_port;
226 __be16 dst_port;
227 __be32 sctp_v_tag;
228
229 __be16 vlan_etype;
230 __be16 vlan_tag;
231
232 __be16 flex_word;
233 u16 flex_offset;
234 bool flex_filter;
235
236
237 u16 q_index;
238 u8 flex_off;
239 u8 pctype;
240 u16 dest_vsi;
241 u8 dest_ctl;
242 u8 fd_status;
243 u16 cnt_index;
244 u32 fd_id;
245};
246
247#define I40E_CLOUD_FIELD_OMAC BIT(0)
248#define I40E_CLOUD_FIELD_IMAC BIT(1)
249#define I40E_CLOUD_FIELD_IVLAN BIT(2)
250#define I40E_CLOUD_FIELD_TEN_ID BIT(3)
251#define I40E_CLOUD_FIELD_IIP BIT(4)
252
253#define I40E_CLOUD_FILTER_FLAGS_OMAC I40E_CLOUD_FIELD_OMAC
254#define I40E_CLOUD_FILTER_FLAGS_IMAC I40E_CLOUD_FIELD_IMAC
255#define I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN (I40E_CLOUD_FIELD_IMAC | \
256 I40E_CLOUD_FIELD_IVLAN)
257#define I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID (I40E_CLOUD_FIELD_IMAC | \
258 I40E_CLOUD_FIELD_TEN_ID)
259#define I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC (I40E_CLOUD_FIELD_OMAC | \
260 I40E_CLOUD_FIELD_IMAC | \
261 I40E_CLOUD_FIELD_TEN_ID)
262#define I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID (I40E_CLOUD_FIELD_IMAC | \
263 I40E_CLOUD_FIELD_IVLAN | \
264 I40E_CLOUD_FIELD_TEN_ID)
265#define I40E_CLOUD_FILTER_FLAGS_IIP I40E_CLOUD_FIELD_IIP
266
267struct i40e_cloud_filter {
268 struct hlist_node cloud_node;
269 unsigned long cookie;
270
271 u8 dst_mac[ETH_ALEN];
272 u8 src_mac[ETH_ALEN];
273 __be16 vlan_id;
274 u16 seid;
275 __be16 dst_port;
276 __be16 src_port;
277 u32 tenant_id;
278 union {
279 struct {
280 struct in_addr dst_ip;
281 struct in_addr src_ip;
282 } v4;
283 struct {
284 struct in6_addr dst_ip6;
285 struct in6_addr src_ip6;
286 } v6;
287 } ip;
288#define dst_ipv6 ip.v6.dst_ip6.s6_addr32
289#define src_ipv6 ip.v6.src_ip6.s6_addr32
290#define dst_ipv4 ip.v4.dst_ip.s_addr
291#define src_ipv4 ip.v4.src_ip.s_addr
292 u16 n_proto;
293 u8 ip_proto;
294 u8 flags;
295#define I40E_CLOUD_TNL_TYPE_NONE 0xff
296 u8 tunnel_type;
297};
298
299#define I40E_DCB_PRIO_TYPE_STRICT 0
300#define I40E_DCB_PRIO_TYPE_ETS 1
301#define I40E_DCB_STRICT_PRIO_CREDITS 127
302
303struct i40e_tc_info {
304 u16 qoffset;
305 u16 qcount;
306 u8 netdev_tc;
307};
308
309
310struct i40e_tc_configuration {
311 u8 numtc;
312 u8 enabled_tc;
313 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
314};
315
316#define I40E_UDP_PORT_INDEX_UNUSED 255
317struct i40e_udp_port_config {
318
319 u16 port;
320 u8 type;
321 u8 filter_index;
322};
323
324#define I40_DDP_FLASH_REGION 100
325#define I40E_PROFILE_INFO_SIZE 48
326#define I40E_MAX_PROFILE_NUM 16
327#define I40E_PROFILE_LIST_SIZE \
328 (I40E_PROFILE_INFO_SIZE * I40E_MAX_PROFILE_NUM + 4)
329#define I40E_DDP_PROFILE_PATH "intel/i40e/ddp/"
330#define I40E_DDP_PROFILE_NAME_MAX 64
331
332int i40e_ddp_load(struct net_device *netdev, const u8 *data, size_t size,
333 bool is_add);
334int i40e_ddp_flash(struct net_device *netdev, struct ethtool_flash *flash);
335
336struct i40e_ddp_profile_list {
337 u32 p_count;
338 struct i40e_profile_info p_info[];
339};
340
341struct i40e_ddp_old_profile_list {
342 struct list_head list;
343 size_t old_ddp_size;
344 u8 old_ddp_buf[];
345};
346
347
348#define I40E_FLEX_SET_FSIZE(fsize) (((fsize) << \
349 I40E_PRTQF_FLX_PIT_FSIZE_SHIFT) & \
350 I40E_PRTQF_FLX_PIT_FSIZE_MASK)
351#define I40E_FLEX_SET_DST_WORD(dst) (((dst) << \
352 I40E_PRTQF_FLX_PIT_DEST_OFF_SHIFT) & \
353 I40E_PRTQF_FLX_PIT_DEST_OFF_MASK)
354#define I40E_FLEX_SET_SRC_WORD(src) (((src) << \
355 I40E_PRTQF_FLX_PIT_SOURCE_OFF_SHIFT) & \
356 I40E_PRTQF_FLX_PIT_SOURCE_OFF_MASK)
357#define I40E_FLEX_PREP_VAL(dst, fsize, src) (I40E_FLEX_SET_DST_WORD(dst) | \
358 I40E_FLEX_SET_FSIZE(fsize) | \
359 I40E_FLEX_SET_SRC_WORD(src))
360
361
362#define I40E_MAX_FLEX_SRC_OFFSET 0x1F
363
364
365#define I40E_ORT_SET_IDX(idx) (((idx) << \
366 I40E_GLQF_ORT_PIT_INDX_SHIFT) & \
367 I40E_GLQF_ORT_PIT_INDX_MASK)
368
369#define I40E_ORT_SET_COUNT(count) (((count) << \
370 I40E_GLQF_ORT_FIELD_CNT_SHIFT) & \
371 I40E_GLQF_ORT_FIELD_CNT_MASK)
372
373#define I40E_ORT_SET_PAYLOAD(payload) (((payload) << \
374 I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT) & \
375 I40E_GLQF_ORT_FLX_PAYLOAD_MASK)
376
377#define I40E_ORT_PREP_VAL(idx, count, payload) (I40E_ORT_SET_IDX(idx) | \
378 I40E_ORT_SET_COUNT(count) | \
379 I40E_ORT_SET_PAYLOAD(payload))
380
381#define I40E_L3_GLQF_ORT_IDX 34
382#define I40E_L4_GLQF_ORT_IDX 35
383
384
385#define I40E_FLEX_PIT_IDX_START_L3 3
386#define I40E_FLEX_PIT_IDX_START_L4 6
387
388#define I40E_FLEX_PIT_TABLE_SIZE 3
389
390#define I40E_FLEX_DEST_UNUSED 63
391
392#define I40E_FLEX_INDEX_ENTRIES 8
393
394
395#define I40E_FLEX_INPUT_MASK (I40E_FLEX_50_MASK | I40E_FLEX_51_MASK | \
396 I40E_FLEX_52_MASK | I40E_FLEX_53_MASK | \
397 I40E_FLEX_54_MASK | I40E_FLEX_55_MASK | \
398 I40E_FLEX_56_MASK | I40E_FLEX_57_MASK)
399
400struct i40e_flex_pit {
401 struct list_head list;
402 u16 src_offset;
403 u8 pit_index;
404};
405
406struct i40e_fwd_adapter {
407 struct net_device *netdev;
408 int bit_no;
409};
410
411struct i40e_channel {
412 struct list_head list;
413 bool initialized;
414 u8 type;
415 u16 vsi_number;
416 u16 stat_counter_idx;
417 u16 base_queue;
418 u16 num_queue_pairs;
419 u16 seid;
420
421 u8 enabled_tc;
422 struct i40e_aqc_vsi_properties_data info;
423
424 u64 max_tx_rate;
425 struct i40e_fwd_adapter *fwd;
426
427
428 struct i40e_vsi *parent_vsi;
429};
430
431static inline bool i40e_is_channel_macvlan(struct i40e_channel *ch)
432{
433 return !!ch->fwd;
434}
435
436static inline u8 *i40e_channel_mac(struct i40e_channel *ch)
437{
438 if (i40e_is_channel_macvlan(ch))
439 return ch->fwd->netdev->dev_addr;
440 else
441 return NULL;
442}
443
444
445struct i40e_pf {
446 struct pci_dev *pdev;
447 struct i40e_hw hw;
448 DECLARE_BITMAP(state, __I40E_STATE_SIZE__);
449 struct msix_entry *msix_entries;
450 bool fc_autoneg_status;
451
452 u16 eeprom_version;
453 u16 num_vmdq_vsis;
454 u16 num_vmdq_qps;
455 u16 num_vmdq_msix;
456 u16 num_req_vfs;
457 u16 num_vf_qps;
458 u16 num_lan_qps;
459 u16 num_lan_msix;
460 u16 num_fdsb_msix;
461 u16 num_iwarp_msix;
462 int iwarp_base_vector;
463 int queues_left;
464 u16 alloc_rss_size;
465 u16 rss_size_max;
466 u16 fdir_pf_filter_count;
467 u16 num_alloc_vsi;
468 u8 atr_sample_rate;
469 bool wol_en;
470
471 struct hlist_head fdir_filter_list;
472 u16 fdir_pf_active_filters;
473 unsigned long fd_flush_timestamp;
474 u32 fd_flush_cnt;
475 u32 fd_add_err;
476 u32 fd_atr_cnt;
477
478
479
480
481
482 u16 fd_tcp4_filter_cnt;
483 u16 fd_udp4_filter_cnt;
484 u16 fd_sctp4_filter_cnt;
485 u16 fd_ip4_filter_cnt;
486
487 u16 fd_tcp6_filter_cnt;
488 u16 fd_udp6_filter_cnt;
489 u16 fd_sctp6_filter_cnt;
490 u16 fd_ip6_filter_cnt;
491
492
493
494
495
496
497 struct list_head l3_flex_pit_list;
498 struct list_head l4_flex_pit_list;
499
500 struct udp_tunnel_nic_shared udp_tunnel_shared;
501 struct udp_tunnel_nic_info udp_tunnel_nic;
502
503 struct hlist_head cloud_filter_list;
504 u16 num_cloud_filters;
505
506 enum i40e_interrupt_policy int_policy;
507 u16 rx_itr_default;
508 u16 tx_itr_default;
509 u32 msg_enable;
510 char int_name[I40E_INT_NAME_STR_LEN];
511 u16 adminq_work_limit;
512 unsigned long service_timer_period;
513 unsigned long service_timer_previous;
514 struct timer_list service_timer;
515 struct work_struct service_task;
516
517 u32 hw_features;
518#define I40E_HW_RSS_AQ_CAPABLE BIT(0)
519#define I40E_HW_128_QP_RSS_CAPABLE BIT(1)
520#define I40E_HW_ATR_EVICT_CAPABLE BIT(2)
521#define I40E_HW_WB_ON_ITR_CAPABLE BIT(3)
522#define I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE BIT(4)
523#define I40E_HW_NO_PCI_LINK_CHECK BIT(5)
524#define I40E_HW_100M_SGMII_CAPABLE BIT(6)
525#define I40E_HW_NO_DCB_SUPPORT BIT(7)
526#define I40E_HW_USE_SET_LLDP_MIB BIT(8)
527#define I40E_HW_GENEVE_OFFLOAD_CAPABLE BIT(9)
528#define I40E_HW_PTP_L4_CAPABLE BIT(10)
529#define I40E_HW_WOL_MC_MAGIC_PKT_WAKE BIT(11)
530#define I40E_HW_HAVE_CRT_RETIMER BIT(13)
531#define I40E_HW_OUTER_UDP_CSUM_CAPABLE BIT(14)
532#define I40E_HW_PHY_CONTROLS_LEDS BIT(15)
533#define I40E_HW_STOP_FW_LLDP BIT(16)
534#define I40E_HW_PORT_ID_VALID BIT(17)
535#define I40E_HW_RESTART_AUTONEG BIT(18)
536
537 u32 flags;
538#define I40E_FLAG_RX_CSUM_ENABLED BIT(0)
539#define I40E_FLAG_MSI_ENABLED BIT(1)
540#define I40E_FLAG_MSIX_ENABLED BIT(2)
541#define I40E_FLAG_RSS_ENABLED BIT(3)
542#define I40E_FLAG_VMDQ_ENABLED BIT(4)
543#define I40E_FLAG_SRIOV_ENABLED BIT(5)
544#define I40E_FLAG_DCB_CAPABLE BIT(6)
545#define I40E_FLAG_DCB_ENABLED BIT(7)
546#define I40E_FLAG_FD_SB_ENABLED BIT(8)
547#define I40E_FLAG_FD_ATR_ENABLED BIT(9)
548#define I40E_FLAG_MFP_ENABLED BIT(10)
549#define I40E_FLAG_HW_ATR_EVICT_ENABLED BIT(11)
550#define I40E_FLAG_VEB_MODE_ENABLED BIT(12)
551#define I40E_FLAG_VEB_STATS_ENABLED BIT(13)
552#define I40E_FLAG_LINK_POLLING_ENABLED BIT(14)
553#define I40E_FLAG_TRUE_PROMISC_SUPPORT BIT(15)
554#define I40E_FLAG_LEGACY_RX BIT(16)
555#define I40E_FLAG_PTP BIT(17)
556#define I40E_FLAG_IWARP_ENABLED BIT(18)
557#define I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED BIT(19)
558#define I40E_FLAG_SOURCE_PRUNING_DISABLED BIT(20)
559#define I40E_FLAG_TC_MQPRIO BIT(21)
560#define I40E_FLAG_FD_SB_INACTIVE BIT(22)
561#define I40E_FLAG_FD_SB_TO_CLOUD_FILTER BIT(23)
562#define I40E_FLAG_DISABLE_FW_LLDP BIT(24)
563#define I40E_FLAG_RS_FEC BIT(25)
564#define I40E_FLAG_BASE_R_FEC BIT(26)
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586#define I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED BIT(27)
587
588 struct i40e_client_instance *cinst;
589 bool stat_offsets_loaded;
590 struct i40e_hw_port_stats stats;
591 struct i40e_hw_port_stats stats_offsets;
592 u32 tx_timeout_count;
593 u32 tx_timeout_recovery_level;
594 unsigned long tx_timeout_last_recovery;
595 u32 tx_sluggish_count;
596 u32 hw_csum_rx_error;
597 u32 led_status;
598 u16 corer_count;
599 u16 globr_count;
600 u16 empr_count;
601 u16 pfr_count;
602 u16 sw_int_count;
603
604 struct mutex switch_mutex;
605 u16 lan_vsi;
606 u16 lan_veb;
607#define I40E_NO_VEB 0xffff
608#define I40E_NO_VSI 0xffff
609 u16 next_vsi;
610 struct i40e_vsi **vsi;
611 struct i40e_veb *veb[I40E_MAX_VEB];
612
613 struct i40e_lump_tracking *qp_pile;
614 struct i40e_lump_tracking *irq_pile;
615
616
617 u16 pf_seid;
618 u16 main_vsi_seid;
619 u16 mac_seid;
620 struct kobject *switch_kobj;
621#ifdef CONFIG_DEBUG_FS
622 struct dentry *i40e_dbg_pf;
623#endif
624 bool cur_promisc;
625
626 u16 instance;
627
628
629 struct i40e_vf *vf;
630 int num_alloc_vfs;
631 u32 vf_aq_requests;
632 u32 arq_overflows;
633
634
635
636
637
638
639
640
641 u16 dcbx_cap;
642
643 struct i40e_filter_control_settings filter_settings;
644 struct i40e_rx_pb_config pb_cfg;
645 struct i40e_dcbx_config tmp_cfg;
646
647 struct ptp_clock *ptp_clock;
648 struct ptp_clock_info ptp_caps;
649 struct sk_buff *ptp_tx_skb;
650 unsigned long ptp_tx_start;
651 struct hwtstamp_config tstamp_config;
652 struct timespec64 ptp_prev_hw_time;
653 ktime_t ptp_reset_start;
654 struct mutex tmreg_lock;
655 u32 ptp_adj_mult;
656 u32 tx_hwtstamp_timeouts;
657 u32 tx_hwtstamp_skipped;
658 u32 rx_hwtstamp_cleared;
659 u32 latch_event_flags;
660 spinlock_t ptp_rx_lock;
661 unsigned long latch_events[4];
662 bool ptp_tx;
663 bool ptp_rx;
664 u16 rss_table_size;
665 u32 max_bw;
666 u32 min_bw;
667
668 u32 ioremap_len;
669 u32 fd_inv;
670 u16 phy_led_val;
671
672 u16 override_q_count;
673 u16 last_sw_conf_flags;
674 u16 last_sw_conf_valid_flags;
675
676 struct list_head ddp_old_prof;
677};
678
679
680
681
682
683
684
685static inline u64 i40e_addr_to_hkey(const u8 *macaddr)
686{
687 u64 key = 0;
688
689 ether_addr_copy((u8 *)&key, macaddr);
690 return key;
691}
692
693enum i40e_filter_state {
694 I40E_FILTER_INVALID = 0,
695 I40E_FILTER_NEW,
696 I40E_FILTER_ACTIVE,
697 I40E_FILTER_FAILED,
698 I40E_FILTER_REMOVE,
699
700};
701struct i40e_mac_filter {
702 struct hlist_node hlist;
703 u8 macaddr[ETH_ALEN];
704#define I40E_VLAN_ANY -1
705 s16 vlan;
706 enum i40e_filter_state state;
707};
708
709
710
711
712
713
714
715
716
717struct i40e_new_mac_filter {
718 struct hlist_node hlist;
719 struct i40e_mac_filter *f;
720
721
722 enum i40e_filter_state state;
723};
724
725struct i40e_veb {
726 struct i40e_pf *pf;
727 u16 idx;
728 u16 veb_idx;
729 u16 seid;
730 u16 uplink_seid;
731 u16 stats_idx;
732 u8 enabled_tc;
733 u16 bridge_mode;
734 u16 flags;
735 u16 bw_limit;
736 u8 bw_max_quanta;
737 bool is_abs_credits;
738 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
739 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
740 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
741 struct kobject *kobj;
742 bool stat_offsets_loaded;
743 struct i40e_eth_stats stats;
744 struct i40e_eth_stats stats_offsets;
745 struct i40e_veb_tc_stats tc_stats;
746 struct i40e_veb_tc_stats tc_stats_offsets;
747};
748
749
750struct i40e_vsi {
751 struct net_device *netdev;
752 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
753 bool netdev_registered;
754 bool stat_offsets_loaded;
755
756 u32 current_netdev_flags;
757 DECLARE_BITMAP(state, __I40E_VSI_STATE_SIZE__);
758#define I40E_VSI_FLAG_FILTER_CHANGED BIT(0)
759#define I40E_VSI_FLAG_VEB_OWNER BIT(1)
760 unsigned long flags;
761
762
763 spinlock_t mac_filter_hash_lock;
764
765 DECLARE_HASHTABLE(mac_filter_hash, 8);
766 bool has_vlan_filter;
767
768
769 struct rtnl_link_stats64 net_stats;
770 struct rtnl_link_stats64 net_stats_offsets;
771 struct i40e_eth_stats eth_stats;
772 struct i40e_eth_stats eth_stats_offsets;
773 u32 tx_restart;
774 u32 tx_busy;
775 u64 tx_linearize;
776 u64 tx_force_wb;
777 u32 rx_buf_failed;
778 u32 rx_page_failed;
779
780
781 struct i40e_ring **rx_rings;
782 struct i40e_ring **tx_rings;
783 struct i40e_ring **xdp_rings;
784
785 u32 active_filters;
786 u32 promisc_threshold;
787
788 u16 work_limit;
789 u16 int_rate_limit;
790
791 u16 rss_table_size;
792 u16 rss_size;
793 u8 *rss_hkey_user;
794 u8 *rss_lut_user;
795
796
797 u16 max_frame;
798 u16 rx_buf_len;
799
800 struct bpf_prog *xdp_prog;
801
802
803 struct i40e_q_vector **q_vectors;
804 int num_q_vectors;
805 int base_vector;
806 bool irqs_ready;
807
808 u16 seid;
809 u16 id;
810 u16 uplink_seid;
811
812 u16 base_queue;
813 u16 alloc_queue_pairs;
814 u16 req_queue_pairs;
815 u16 num_queue_pairs;
816 u16 num_tx_desc;
817 u16 num_rx_desc;
818 enum i40e_vsi_type type;
819 s16 vf_id;
820
821 struct tc_mqprio_qopt_offload mqprio_qopt;
822 struct i40e_tc_configuration tc_config;
823 struct i40e_aqc_vsi_properties_data info;
824
825
826 u16 bw_limit;
827 u8 bw_max_quanta;
828
829
830 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
831
832 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
833
834 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
835
836 struct i40e_pf *back;
837 u16 idx;
838 u16 veb_idx;
839 struct kobject *kobj;
840 bool current_isup;
841 enum i40e_aq_link_speed current_speed;
842
843
844 u16 cnt_q_avail;
845 u16 orig_rss_size;
846 u16 current_rss_size;
847 bool reconfig_rss;
848
849 u16 next_base_queue;
850
851 struct list_head ch_list;
852 u16 tc_seid_map[I40E_MAX_TRAFFIC_CLASS];
853
854
855#define I40E_MAX_MACVLANS 128
856#define I40E_MIN_MACVLAN_VECTORS 2
857 DECLARE_BITMAP(fwd_bitmask, I40E_MAX_MACVLANS);
858 struct list_head macvlan_list;
859 int macvlan_cnt;
860
861 void *priv;
862
863
864 irqreturn_t (*irq_handler)(int irq, void *data);
865
866 unsigned long *af_xdp_zc_qps;
867} ____cacheline_internodealigned_in_smp;
868
869struct i40e_netdev_priv {
870 struct i40e_vsi *vsi;
871};
872
873
874struct i40e_q_vector {
875 struct i40e_vsi *vsi;
876
877 u16 v_idx;
878 u16 reg_idx;
879
880 struct napi_struct napi;
881
882 struct i40e_ring_container rx;
883 struct i40e_ring_container tx;
884
885 u8 itr_countdown;
886 u8 num_ringpairs;
887
888 cpumask_t affinity_mask;
889 struct irq_affinity_notify affinity_notify;
890
891 struct rcu_head rcu;
892 char name[I40E_INT_NAME_STR_LEN];
893 bool arm_wb_state;
894} ____cacheline_internodealigned_in_smp;
895
896
897struct i40e_device {
898 struct list_head list;
899 struct i40e_pf *pf;
900};
901
902
903
904
905
906static inline char *i40e_nvm_version_str(struct i40e_hw *hw)
907{
908 static char buf[32];
909 u32 full_ver;
910
911 full_ver = hw->nvm.oem_ver;
912
913 if (hw->nvm.eetrack == I40E_OEM_EETRACK_ID) {
914 u8 gen, snap;
915 u16 release;
916
917 gen = (u8)(full_ver >> I40E_OEM_GEN_SHIFT);
918 snap = (u8)((full_ver & I40E_OEM_SNAP_MASK) >>
919 I40E_OEM_SNAP_SHIFT);
920 release = (u16)(full_ver & I40E_OEM_RELEASE_MASK);
921
922 snprintf(buf, sizeof(buf), "%x.%x.%x", gen, snap, release);
923 } else {
924 u8 ver, patch;
925 u16 build;
926
927 ver = (u8)(full_ver >> I40E_OEM_VER_SHIFT);
928 build = (u16)((full_ver >> I40E_OEM_VER_BUILD_SHIFT) &
929 I40E_OEM_VER_BUILD_MASK);
930 patch = (u8)(full_ver & I40E_OEM_VER_PATCH_MASK);
931
932 snprintf(buf, sizeof(buf),
933 "%x.%02x 0x%x %d.%d.%d",
934 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
935 I40E_NVM_VERSION_HI_SHIFT,
936 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
937 I40E_NVM_VERSION_LO_SHIFT,
938 hw->nvm.eetrack, ver, build, patch);
939 }
940
941 return buf;
942}
943
944
945
946
947
948
949
950static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
951{
952 struct i40e_netdev_priv *np = netdev_priv(netdev);
953 struct i40e_vsi *vsi = np->vsi;
954
955 return vsi->back;
956}
957
958static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
959 irqreturn_t (*irq_handler)(int, void *))
960{
961 vsi->irq_handler = irq_handler;
962}
963
964
965
966
967
968static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
969{
970 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
971}
972
973
974
975
976
977
978
979
980
981static inline u64 i40e_read_fd_input_set(struct i40e_pf *pf, u16 addr)
982{
983 u64 val;
984
985 val = i40e_read_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 1));
986 val <<= 32;
987 val += i40e_read_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 0));
988
989 return val;
990}
991
992
993
994
995
996
997
998
999
1000
1001static inline void i40e_write_fd_input_set(struct i40e_pf *pf,
1002 u16 addr, u64 val)
1003{
1004 i40e_write_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 1),
1005 (u32)(val >> 32));
1006 i40e_write_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 0),
1007 (u32)(val & 0xFFFFFFFFULL));
1008}
1009
1010
1011int i40e_up(struct i40e_vsi *vsi);
1012void i40e_down(struct i40e_vsi *vsi);
1013extern const char i40e_driver_name[];
1014void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
1015void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired);
1016int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
1017int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
1018void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
1019 u16 rss_table_size, u16 rss_size);
1020struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id);
1021
1022
1023
1024
1025
1026static inline struct i40e_vsi *
1027i40e_find_vsi_by_type(struct i40e_pf *pf, u16 type)
1028{
1029 int i;
1030
1031 for (i = 0; i < pf->num_alloc_vsi; i++) {
1032 struct i40e_vsi *vsi = pf->vsi[i];
1033
1034 if (vsi && vsi->type == type)
1035 return vsi;
1036 }
1037
1038 return NULL;
1039}
1040void i40e_update_stats(struct i40e_vsi *vsi);
1041void i40e_update_veb_stats(struct i40e_veb *veb);
1042void i40e_update_eth_stats(struct i40e_vsi *vsi);
1043struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
1044int i40e_fetch_switch_configuration(struct i40e_pf *pf,
1045 bool printconfig);
1046
1047int i40e_add_del_fdir(struct i40e_vsi *vsi,
1048 struct i40e_fdir_filter *input, bool add);
1049void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
1050u32 i40e_get_current_fd_count(struct i40e_pf *pf);
1051u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
1052u32 i40e_get_current_atr_cnt(struct i40e_pf *pf);
1053u32 i40e_get_global_fd_count(struct i40e_pf *pf);
1054bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
1055void i40e_set_ethtool_ops(struct net_device *netdev);
1056struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1057 const u8 *macaddr, s16 vlan);
1058void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f);
1059void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan);
1060int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
1061struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
1062 u16 uplink, u32 param1);
1063int i40e_vsi_release(struct i40e_vsi *vsi);
1064void i40e_service_event_schedule(struct i40e_pf *pf);
1065void i40e_notify_client_of_vf_msg(struct i40e_vsi *vsi, u32 vf_id,
1066 u8 *msg, u16 len);
1067
1068int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q, bool is_xdp,
1069 bool enable);
1070int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable);
1071int i40e_vsi_start_rings(struct i40e_vsi *vsi);
1072void i40e_vsi_stop_rings(struct i40e_vsi *vsi);
1073void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi);
1074int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi);
1075int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
1076struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
1077 u16 downlink_seid, u8 enabled_tc);
1078void i40e_veb_release(struct i40e_veb *veb);
1079
1080int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
1081int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
1082void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
1083void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
1084void i40e_pf_reset_stats(struct i40e_pf *pf);
1085#ifdef CONFIG_DEBUG_FS
1086void i40e_dbg_pf_init(struct i40e_pf *pf);
1087void i40e_dbg_pf_exit(struct i40e_pf *pf);
1088void i40e_dbg_init(void);
1089void i40e_dbg_exit(void);
1090#else
1091static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
1092static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
1093static inline void i40e_dbg_init(void) {}
1094static inline void i40e_dbg_exit(void) {}
1095#endif
1096
1097int i40e_lan_add_device(struct i40e_pf *pf);
1098int i40e_lan_del_device(struct i40e_pf *pf);
1099void i40e_client_subtask(struct i40e_pf *pf);
1100void i40e_notify_client_of_l2_param_changes(struct i40e_vsi *vsi);
1101void i40e_notify_client_of_netdev_close(struct i40e_vsi *vsi, bool reset);
1102void i40e_notify_client_of_vf_enable(struct i40e_pf *pf, u32 num_vfs);
1103void i40e_notify_client_of_vf_reset(struct i40e_pf *pf, u32 vf_id);
1104void i40e_client_update_msix_info(struct i40e_pf *pf);
1105int i40e_vf_client_capable(struct i40e_pf *pf, u32 vf_id);
1106
1107
1108
1109
1110
1111static inline void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
1112{
1113 struct i40e_pf *pf = vsi->back;
1114 struct i40e_hw *hw = &pf->hw;
1115 u32 val;
1116
1117 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
1118 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
1119 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
1120 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
1121
1122}
1123
1124void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
1125void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
1126int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
1127int i40e_open(struct net_device *netdev);
1128int i40e_close(struct net_device *netdev);
1129int i40e_vsi_open(struct i40e_vsi *vsi);
1130void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
1131int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid);
1132int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid);
1133void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid);
1134void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid);
1135struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1136 const u8 *macaddr);
1137int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr);
1138bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
1139int i40e_count_filters(struct i40e_vsi *vsi);
1140struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr);
1141void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
1142static inline bool i40e_is_sw_dcb(struct i40e_pf *pf)
1143{
1144 return !!(pf->flags & I40E_FLAG_DISABLE_FW_LLDP);
1145}
1146
1147#ifdef CONFIG_I40E_DCB
1148void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
1149 struct i40e_dcbx_config *old_cfg,
1150 struct i40e_dcbx_config *new_cfg);
1151void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
1152void i40e_dcbnl_setup(struct i40e_vsi *vsi);
1153bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
1154 struct i40e_dcbx_config *old_cfg,
1155 struct i40e_dcbx_config *new_cfg);
1156int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg);
1157int i40e_dcb_sw_default_config(struct i40e_pf *pf);
1158#endif
1159void i40e_ptp_rx_hang(struct i40e_pf *pf);
1160void i40e_ptp_tx_hang(struct i40e_pf *pf);
1161void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
1162void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
1163void i40e_ptp_set_increment(struct i40e_pf *pf);
1164int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
1165int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
1166void i40e_ptp_save_hw_time(struct i40e_pf *pf);
1167void i40e_ptp_restore_hw_time(struct i40e_pf *pf);
1168void i40e_ptp_init(struct i40e_pf *pf);
1169void i40e_ptp_stop(struct i40e_pf *pf);
1170int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
1171i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf);
1172i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf);
1173i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf);
1174void i40e_print_link_message(struct i40e_vsi *vsi, bool isup);
1175
1176void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags);
1177
1178static inline bool i40e_enabled_xdp_vsi(struct i40e_vsi *vsi)
1179{
1180 return !!READ_ONCE(vsi->xdp_prog);
1181}
1182
1183int i40e_create_queue_channel(struct i40e_vsi *vsi, struct i40e_channel *ch);
1184int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate);
1185int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
1186 struct i40e_cloud_filter *filter,
1187 bool add);
1188int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
1189 struct i40e_cloud_filter *filter,
1190 bool add);
1191#endif
1192