linux/drivers/rtc/rtc-s5m.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2//
   3// Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
   4//      http://www.samsung.com
   5//
   6//  Copyright (C) 2013 Google, Inc
   7
   8#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   9
  10#include <linux/module.h>
  11#include <linux/i2c.h>
  12#include <linux/bcd.h>
  13#include <linux/regmap.h>
  14#include <linux/rtc.h>
  15#include <linux/platform_device.h>
  16#include <linux/mfd/samsung/core.h>
  17#include <linux/mfd/samsung/irq.h>
  18#include <linux/mfd/samsung/rtc.h>
  19#include <linux/mfd/samsung/s2mps14.h>
  20
  21/*
  22 * Maximum number of retries for checking changes in UDR field
  23 * of S5M_RTC_UDR_CON register (to limit possible endless loop).
  24 *
  25 * After writing to RTC registers (setting time or alarm) read the UDR field
  26 * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
  27 * been transferred.
  28 */
  29#define UDR_READ_RETRY_CNT      5
  30
  31enum {
  32        RTC_SEC = 0,
  33        RTC_MIN,
  34        RTC_HOUR,
  35        RTC_WEEKDAY,
  36        RTC_DATE,
  37        RTC_MONTH,
  38        RTC_YEAR1,
  39        RTC_YEAR2,
  40        /* Make sure this is always the last enum name. */
  41        RTC_MAX_NUM_TIME_REGS
  42};
  43
  44/*
  45 * Registers used by the driver which are different between chipsets.
  46 *
  47 * Operations like read time and write alarm/time require updating
  48 * specific fields in UDR register. These fields usually are auto-cleared
  49 * (with some exceptions).
  50 *
  51 * Table of operations per device:
  52 *
  53 * Device     | Write time | Read time | Write alarm
  54 * =================================================
  55 * S5M8767    | UDR + TIME |           | UDR
  56 * S2MPS11/14 | WUDR       | RUDR      | WUDR + RUDR
  57 * S2MPS13    | WUDR       | RUDR      | WUDR + AUDR
  58 * S2MPS15    | WUDR       | RUDR      | AUDR
  59 */
  60struct s5m_rtc_reg_config {
  61        /* Number of registers used for setting time/alarm0/alarm1 */
  62        unsigned int regs_count;
  63        /* First register for time, seconds */
  64        unsigned int time;
  65        /* RTC control register */
  66        unsigned int ctrl;
  67        /* First register for alarm 0, seconds */
  68        unsigned int alarm0;
  69        /* First register for alarm 1, seconds */
  70        unsigned int alarm1;
  71        /*
  72         * Register for update flag (UDR). Typically setting UDR field to 1
  73         * will enable update of time or alarm register. Then it will be
  74         * auto-cleared after successful update.
  75         */
  76        unsigned int udr_update;
  77        /* Auto-cleared mask in UDR field for writing time and alarm */
  78        unsigned int autoclear_udr_mask;
  79        /*
  80         * Masks in UDR field for time and alarm operations.
  81         * The read time mask can be 0. Rest should not.
  82         */
  83        unsigned int read_time_udr_mask;
  84        unsigned int write_time_udr_mask;
  85        unsigned int write_alarm_udr_mask;
  86};
  87
  88/* Register map for S5M8763 and S5M8767 */
  89static const struct s5m_rtc_reg_config s5m_rtc_regs = {
  90        .regs_count             = 8,
  91        .time                   = S5M_RTC_SEC,
  92        .ctrl                   = S5M_ALARM1_CONF,
  93        .alarm0                 = S5M_ALARM0_SEC,
  94        .alarm1                 = S5M_ALARM1_SEC,
  95        .udr_update             = S5M_RTC_UDR_CON,
  96        .autoclear_udr_mask     = S5M_RTC_UDR_MASK,
  97        .read_time_udr_mask     = 0, /* Not needed */
  98        .write_time_udr_mask    = S5M_RTC_UDR_MASK | S5M_RTC_TIME_EN_MASK,
  99        .write_alarm_udr_mask   = S5M_RTC_UDR_MASK,
 100};
 101
 102/* Register map for S2MPS13 */
 103static const struct s5m_rtc_reg_config s2mps13_rtc_regs = {
 104        .regs_count             = 7,
 105        .time                   = S2MPS_RTC_SEC,
 106        .ctrl                   = S2MPS_RTC_CTRL,
 107        .alarm0                 = S2MPS_ALARM0_SEC,
 108        .alarm1                 = S2MPS_ALARM1_SEC,
 109        .udr_update             = S2MPS_RTC_UDR_CON,
 110        .autoclear_udr_mask     = S2MPS_RTC_WUDR_MASK,
 111        .read_time_udr_mask     = S2MPS_RTC_RUDR_MASK,
 112        .write_time_udr_mask    = S2MPS_RTC_WUDR_MASK,
 113        .write_alarm_udr_mask   = S2MPS_RTC_WUDR_MASK | S2MPS13_RTC_AUDR_MASK,
 114};
 115
 116/* Register map for S2MPS11/14 */
 117static const struct s5m_rtc_reg_config s2mps14_rtc_regs = {
 118        .regs_count             = 7,
 119        .time                   = S2MPS_RTC_SEC,
 120        .ctrl                   = S2MPS_RTC_CTRL,
 121        .alarm0                 = S2MPS_ALARM0_SEC,
 122        .alarm1                 = S2MPS_ALARM1_SEC,
 123        .udr_update             = S2MPS_RTC_UDR_CON,
 124        .autoclear_udr_mask     = S2MPS_RTC_WUDR_MASK,
 125        .read_time_udr_mask     = S2MPS_RTC_RUDR_MASK,
 126        .write_time_udr_mask    = S2MPS_RTC_WUDR_MASK,
 127        .write_alarm_udr_mask   = S2MPS_RTC_WUDR_MASK | S2MPS_RTC_RUDR_MASK,
 128};
 129
 130/*
 131 * Register map for S2MPS15 - in comparison to S2MPS14 the WUDR and AUDR bits
 132 * are swapped.
 133 */
 134static const struct s5m_rtc_reg_config s2mps15_rtc_regs = {
 135        .regs_count             = 7,
 136        .time                   = S2MPS_RTC_SEC,
 137        .ctrl                   = S2MPS_RTC_CTRL,
 138        .alarm0                 = S2MPS_ALARM0_SEC,
 139        .alarm1                 = S2MPS_ALARM1_SEC,
 140        .udr_update             = S2MPS_RTC_UDR_CON,
 141        .autoclear_udr_mask     = S2MPS_RTC_WUDR_MASK,
 142        .read_time_udr_mask     = S2MPS_RTC_RUDR_MASK,
 143        .write_time_udr_mask    = S2MPS15_RTC_WUDR_MASK,
 144        .write_alarm_udr_mask   = S2MPS15_RTC_AUDR_MASK,
 145};
 146
 147struct s5m_rtc_info {
 148        struct device *dev;
 149        struct i2c_client *i2c;
 150        struct sec_pmic_dev *s5m87xx;
 151        struct regmap *regmap;
 152        struct rtc_device *rtc_dev;
 153        int irq;
 154        enum sec_device_type device_type;
 155        int rtc_24hr_mode;
 156        const struct s5m_rtc_reg_config *regs;
 157};
 158
 159static const struct regmap_config s5m_rtc_regmap_config = {
 160        .reg_bits = 8,
 161        .val_bits = 8,
 162
 163        .max_register = S5M_RTC_REG_MAX,
 164};
 165
 166static const struct regmap_config s2mps14_rtc_regmap_config = {
 167        .reg_bits = 8,
 168        .val_bits = 8,
 169
 170        .max_register = S2MPS_RTC_REG_MAX,
 171};
 172
 173static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm,
 174                               int rtc_24hr_mode)
 175{
 176        tm->tm_sec = data[RTC_SEC] & 0x7f;
 177        tm->tm_min = data[RTC_MIN] & 0x7f;
 178        if (rtc_24hr_mode) {
 179                tm->tm_hour = data[RTC_HOUR] & 0x1f;
 180        } else {
 181                tm->tm_hour = data[RTC_HOUR] & 0x0f;
 182                if (data[RTC_HOUR] & HOUR_PM_MASK)
 183                        tm->tm_hour += 12;
 184        }
 185
 186        tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f);
 187        tm->tm_mday = data[RTC_DATE] & 0x1f;
 188        tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
 189        tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100;
 190        tm->tm_yday = 0;
 191        tm->tm_isdst = 0;
 192}
 193
 194static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
 195{
 196        data[RTC_SEC] = tm->tm_sec;
 197        data[RTC_MIN] = tm->tm_min;
 198
 199        if (tm->tm_hour >= 12)
 200                data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK;
 201        else
 202                data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK;
 203
 204        data[RTC_WEEKDAY] = 1 << tm->tm_wday;
 205        data[RTC_DATE] = tm->tm_mday;
 206        data[RTC_MONTH] = tm->tm_mon + 1;
 207        data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
 208
 209        if (tm->tm_year < 100) {
 210                pr_err("RTC cannot handle the year %d\n",
 211                       1900 + tm->tm_year);
 212                return -EINVAL;
 213        } else {
 214                return 0;
 215        }
 216}
 217
 218/*
 219 * Read RTC_UDR_CON register and wait till UDR field is cleared.
 220 * This indicates that time/alarm update ended.
 221 */
 222static int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
 223{
 224        int ret, retry = UDR_READ_RETRY_CNT;
 225        unsigned int data;
 226
 227        do {
 228                ret = regmap_read(info->regmap, info->regs->udr_update, &data);
 229        } while (--retry && (data & info->regs->autoclear_udr_mask) && !ret);
 230
 231        if (!retry)
 232                dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
 233
 234        return ret;
 235}
 236
 237static int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
 238                struct rtc_wkalrm *alarm)
 239{
 240        int ret;
 241        unsigned int val;
 242
 243        switch (info->device_type) {
 244        case S5M8767X:
 245        case S5M8763X:
 246                ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val);
 247                val &= S5M_ALARM0_STATUS;
 248                break;
 249        case S2MPS15X:
 250        case S2MPS14X:
 251        case S2MPS13X:
 252                ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2,
 253                                &val);
 254                val &= S2MPS_ALARM0_STATUS;
 255                break;
 256        default:
 257                return -EINVAL;
 258        }
 259        if (ret < 0)
 260                return ret;
 261
 262        if (val)
 263                alarm->pending = 1;
 264        else
 265                alarm->pending = 0;
 266
 267        return 0;
 268}
 269
 270static int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
 271{
 272        int ret;
 273        unsigned int data;
 274
 275        ret = regmap_read(info->regmap, info->regs->udr_update, &data);
 276        if (ret < 0) {
 277                dev_err(info->dev, "failed to read update reg(%d)\n", ret);
 278                return ret;
 279        }
 280
 281        data |= info->regs->write_time_udr_mask;
 282
 283        ret = regmap_write(info->regmap, info->regs->udr_update, data);
 284        if (ret < 0) {
 285                dev_err(info->dev, "failed to write update reg(%d)\n", ret);
 286                return ret;
 287        }
 288
 289        ret = s5m8767_wait_for_udr_update(info);
 290
 291        return ret;
 292}
 293
 294static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
 295{
 296        int ret;
 297        unsigned int data;
 298
 299        ret = regmap_read(info->regmap, info->regs->udr_update, &data);
 300        if (ret < 0) {
 301                dev_err(info->dev, "%s: fail to read update reg(%d)\n",
 302                        __func__, ret);
 303                return ret;
 304        }
 305
 306        data |= info->regs->write_alarm_udr_mask;
 307        switch (info->device_type) {
 308        case S5M8763X:
 309        case S5M8767X:
 310                data &= ~S5M_RTC_TIME_EN_MASK;
 311                break;
 312        case S2MPS15X:
 313        case S2MPS14X:
 314        case S2MPS13X:
 315                /* No exceptions needed */
 316                break;
 317        default:
 318                return -EINVAL;
 319        }
 320
 321        ret = regmap_write(info->regmap, info->regs->udr_update, data);
 322        if (ret < 0) {
 323                dev_err(info->dev, "%s: fail to write update reg(%d)\n",
 324                        __func__, ret);
 325                return ret;
 326        }
 327
 328        ret = s5m8767_wait_for_udr_update(info);
 329
 330        /* On S2MPS13 the AUDR is not auto-cleared */
 331        if (info->device_type == S2MPS13X)
 332                regmap_update_bits(info->regmap, info->regs->udr_update,
 333                                   S2MPS13_RTC_AUDR_MASK, 0);
 334
 335        return ret;
 336}
 337
 338static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm)
 339{
 340        tm->tm_sec = bcd2bin(data[RTC_SEC]);
 341        tm->tm_min = bcd2bin(data[RTC_MIN]);
 342
 343        if (data[RTC_HOUR] & HOUR_12) {
 344                tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f);
 345                if (data[RTC_HOUR] & HOUR_PM)
 346                        tm->tm_hour += 12;
 347        } else {
 348                tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
 349        }
 350
 351        tm->tm_wday = data[RTC_WEEKDAY] & 0x07;
 352        tm->tm_mday = bcd2bin(data[RTC_DATE]);
 353        tm->tm_mon = bcd2bin(data[RTC_MONTH]);
 354        tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100;
 355        tm->tm_year -= 1900;
 356}
 357
 358static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data)
 359{
 360        data[RTC_SEC] = bin2bcd(tm->tm_sec);
 361        data[RTC_MIN] = bin2bcd(tm->tm_min);
 362        data[RTC_HOUR] = bin2bcd(tm->tm_hour);
 363        data[RTC_WEEKDAY] = tm->tm_wday;
 364        data[RTC_DATE] = bin2bcd(tm->tm_mday);
 365        data[RTC_MONTH] = bin2bcd(tm->tm_mon);
 366        data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100);
 367        data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100);
 368}
 369
 370static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
 371{
 372        struct s5m_rtc_info *info = dev_get_drvdata(dev);
 373        u8 data[RTC_MAX_NUM_TIME_REGS];
 374        int ret;
 375
 376        if (info->regs->read_time_udr_mask) {
 377                ret = regmap_update_bits(info->regmap,
 378                                info->regs->udr_update,
 379                                info->regs->read_time_udr_mask,
 380                                info->regs->read_time_udr_mask);
 381                if (ret) {
 382                        dev_err(dev,
 383                                "Failed to prepare registers for time reading: %d\n",
 384                                ret);
 385                        return ret;
 386                }
 387        }
 388        ret = regmap_bulk_read(info->regmap, info->regs->time, data,
 389                        info->regs->regs_count);
 390        if (ret < 0)
 391                return ret;
 392
 393        switch (info->device_type) {
 394        case S5M8763X:
 395                s5m8763_data_to_tm(data, tm);
 396                break;
 397
 398        case S5M8767X:
 399        case S2MPS15X:
 400        case S2MPS14X:
 401        case S2MPS13X:
 402                s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode);
 403                break;
 404
 405        default:
 406                return -EINVAL;
 407        }
 408
 409        dev_dbg(dev, "%s: %ptR(%d)\n", __func__, tm, tm->tm_wday);
 410
 411        return 0;
 412}
 413
 414static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
 415{
 416        struct s5m_rtc_info *info = dev_get_drvdata(dev);
 417        u8 data[RTC_MAX_NUM_TIME_REGS];
 418        int ret = 0;
 419
 420        switch (info->device_type) {
 421        case S5M8763X:
 422                s5m8763_tm_to_data(tm, data);
 423                break;
 424        case S5M8767X:
 425        case S2MPS15X:
 426        case S2MPS14X:
 427        case S2MPS13X:
 428                ret = s5m8767_tm_to_data(tm, data);
 429                break;
 430        default:
 431                return -EINVAL;
 432        }
 433
 434        if (ret < 0)
 435                return ret;
 436
 437        dev_dbg(dev, "%s: %ptR(%d)\n", __func__, tm, tm->tm_wday);
 438
 439        ret = regmap_raw_write(info->regmap, info->regs->time, data,
 440                        info->regs->regs_count);
 441        if (ret < 0)
 442                return ret;
 443
 444        ret = s5m8767_rtc_set_time_reg(info);
 445
 446        return ret;
 447}
 448
 449static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 450{
 451        struct s5m_rtc_info *info = dev_get_drvdata(dev);
 452        u8 data[RTC_MAX_NUM_TIME_REGS];
 453        unsigned int val;
 454        int ret, i;
 455
 456        ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
 457                        info->regs->regs_count);
 458        if (ret < 0)
 459                return ret;
 460
 461        switch (info->device_type) {
 462        case S5M8763X:
 463                s5m8763_data_to_tm(data, &alrm->time);
 464                ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val);
 465                if (ret < 0)
 466                        return ret;
 467
 468                alrm->enabled = !!val;
 469                break;
 470
 471        case S5M8767X:
 472        case S2MPS15X:
 473        case S2MPS14X:
 474        case S2MPS13X:
 475                s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
 476                alrm->enabled = 0;
 477                for (i = 0; i < info->regs->regs_count; i++) {
 478                        if (data[i] & ALARM_ENABLE_MASK) {
 479                                alrm->enabled = 1;
 480                                break;
 481                        }
 482                }
 483                break;
 484
 485        default:
 486                return -EINVAL;
 487        }
 488
 489        dev_dbg(dev, "%s: %ptR(%d)\n", __func__, &alrm->time, alrm->time.tm_wday);
 490
 491        ret = s5m_check_peding_alarm_interrupt(info, alrm);
 492
 493        return 0;
 494}
 495
 496static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
 497{
 498        u8 data[RTC_MAX_NUM_TIME_REGS];
 499        int ret, i;
 500        struct rtc_time tm;
 501
 502        ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
 503                        info->regs->regs_count);
 504        if (ret < 0)
 505                return ret;
 506
 507        s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
 508        dev_dbg(info->dev, "%s: %ptR(%d)\n", __func__, &tm, tm.tm_wday);
 509
 510        switch (info->device_type) {
 511        case S5M8763X:
 512                ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0);
 513                break;
 514
 515        case S5M8767X:
 516        case S2MPS15X:
 517        case S2MPS14X:
 518        case S2MPS13X:
 519                for (i = 0; i < info->regs->regs_count; i++)
 520                        data[i] &= ~ALARM_ENABLE_MASK;
 521
 522                ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
 523                                info->regs->regs_count);
 524                if (ret < 0)
 525                        return ret;
 526
 527                ret = s5m8767_rtc_set_alarm_reg(info);
 528
 529                break;
 530
 531        default:
 532                return -EINVAL;
 533        }
 534
 535        return ret;
 536}
 537
 538static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
 539{
 540        int ret;
 541        u8 data[RTC_MAX_NUM_TIME_REGS];
 542        u8 alarm0_conf;
 543        struct rtc_time tm;
 544
 545        ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
 546                        info->regs->regs_count);
 547        if (ret < 0)
 548                return ret;
 549
 550        s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
 551        dev_dbg(info->dev, "%s: %ptR(%d)\n", __func__, &tm, tm.tm_wday);
 552
 553        switch (info->device_type) {
 554        case S5M8763X:
 555                alarm0_conf = 0x77;
 556                ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf);
 557                break;
 558
 559        case S5M8767X:
 560        case S2MPS15X:
 561        case S2MPS14X:
 562        case S2MPS13X:
 563                data[RTC_SEC] |= ALARM_ENABLE_MASK;
 564                data[RTC_MIN] |= ALARM_ENABLE_MASK;
 565                data[RTC_HOUR] |= ALARM_ENABLE_MASK;
 566                data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
 567                if (data[RTC_DATE] & 0x1f)
 568                        data[RTC_DATE] |= ALARM_ENABLE_MASK;
 569                if (data[RTC_MONTH] & 0xf)
 570                        data[RTC_MONTH] |= ALARM_ENABLE_MASK;
 571                if (data[RTC_YEAR1] & 0x7f)
 572                        data[RTC_YEAR1] |= ALARM_ENABLE_MASK;
 573
 574                ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
 575                                info->regs->regs_count);
 576                if (ret < 0)
 577                        return ret;
 578                ret = s5m8767_rtc_set_alarm_reg(info);
 579
 580                break;
 581
 582        default:
 583                return -EINVAL;
 584        }
 585
 586        return ret;
 587}
 588
 589static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 590{
 591        struct s5m_rtc_info *info = dev_get_drvdata(dev);
 592        u8 data[RTC_MAX_NUM_TIME_REGS];
 593        int ret;
 594
 595        switch (info->device_type) {
 596        case S5M8763X:
 597                s5m8763_tm_to_data(&alrm->time, data);
 598                break;
 599
 600        case S5M8767X:
 601        case S2MPS15X:
 602        case S2MPS14X:
 603        case S2MPS13X:
 604                s5m8767_tm_to_data(&alrm->time, data);
 605                break;
 606
 607        default:
 608                return -EINVAL;
 609        }
 610
 611        dev_dbg(dev, "%s: %ptR(%d)\n", __func__, &alrm->time, alrm->time.tm_wday);
 612
 613        ret = s5m_rtc_stop_alarm(info);
 614        if (ret < 0)
 615                return ret;
 616
 617        ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
 618                        info->regs->regs_count);
 619        if (ret < 0)
 620                return ret;
 621
 622        ret = s5m8767_rtc_set_alarm_reg(info);
 623        if (ret < 0)
 624                return ret;
 625
 626        if (alrm->enabled)
 627                ret = s5m_rtc_start_alarm(info);
 628
 629        return ret;
 630}
 631
 632static int s5m_rtc_alarm_irq_enable(struct device *dev,
 633                                    unsigned int enabled)
 634{
 635        struct s5m_rtc_info *info = dev_get_drvdata(dev);
 636
 637        if (enabled)
 638                return s5m_rtc_start_alarm(info);
 639        else
 640                return s5m_rtc_stop_alarm(info);
 641}
 642
 643static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data)
 644{
 645        struct s5m_rtc_info *info = data;
 646
 647        rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
 648
 649        return IRQ_HANDLED;
 650}
 651
 652static const struct rtc_class_ops s5m_rtc_ops = {
 653        .read_time = s5m_rtc_read_time,
 654        .set_time = s5m_rtc_set_time,
 655        .read_alarm = s5m_rtc_read_alarm,
 656        .set_alarm = s5m_rtc_set_alarm,
 657        .alarm_irq_enable = s5m_rtc_alarm_irq_enable,
 658};
 659
 660static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
 661{
 662        u8 data[2];
 663        int ret;
 664
 665        switch (info->device_type) {
 666        case S5M8763X:
 667        case S5M8767X:
 668                /* UDR update time. Default of 7.32 ms is too long. */
 669                ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON,
 670                                S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US);
 671                if (ret < 0)
 672                        dev_err(info->dev, "%s: fail to change UDR time: %d\n",
 673                                        __func__, ret);
 674
 675                /* Set RTC control register : Binary mode, 24hour mode */
 676                data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
 677                data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
 678
 679                ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2);
 680                break;
 681
 682        case S2MPS15X:
 683        case S2MPS14X:
 684        case S2MPS13X:
 685                data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
 686                ret = regmap_write(info->regmap, info->regs->ctrl, data[0]);
 687                if (ret < 0)
 688                        break;
 689
 690                /*
 691                 * Should set WUDR & (RUDR or AUDR) bits to high after writing
 692                 * RTC_CTRL register like writing Alarm registers. We can't find
 693                 * the description from datasheet but vendor code does that
 694                 * really.
 695                 */
 696                ret = s5m8767_rtc_set_alarm_reg(info);
 697                break;
 698
 699        default:
 700                return -EINVAL;
 701        }
 702
 703        info->rtc_24hr_mode = 1;
 704        if (ret < 0) {
 705                dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
 706                        __func__, ret);
 707                return ret;
 708        }
 709
 710        return ret;
 711}
 712
 713static int s5m_rtc_probe(struct platform_device *pdev)
 714{
 715        struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent);
 716        struct s5m_rtc_info *info;
 717        const struct regmap_config *regmap_cfg;
 718        int ret, alarm_irq;
 719
 720        info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
 721        if (!info)
 722                return -ENOMEM;
 723
 724        switch (platform_get_device_id(pdev)->driver_data) {
 725        case S2MPS15X:
 726                regmap_cfg = &s2mps14_rtc_regmap_config;
 727                info->regs = &s2mps15_rtc_regs;
 728                alarm_irq = S2MPS14_IRQ_RTCA0;
 729                break;
 730        case S2MPS14X:
 731                regmap_cfg = &s2mps14_rtc_regmap_config;
 732                info->regs = &s2mps14_rtc_regs;
 733                alarm_irq = S2MPS14_IRQ_RTCA0;
 734                break;
 735        case S2MPS13X:
 736                regmap_cfg = &s2mps14_rtc_regmap_config;
 737                info->regs = &s2mps13_rtc_regs;
 738                alarm_irq = S2MPS14_IRQ_RTCA0;
 739                break;
 740        case S5M8763X:
 741                regmap_cfg = &s5m_rtc_regmap_config;
 742                info->regs = &s5m_rtc_regs;
 743                alarm_irq = S5M8763_IRQ_ALARM0;
 744                break;
 745        case S5M8767X:
 746                regmap_cfg = &s5m_rtc_regmap_config;
 747                info->regs = &s5m_rtc_regs;
 748                alarm_irq = S5M8767_IRQ_RTCA1;
 749                break;
 750        default:
 751                dev_err(&pdev->dev,
 752                                "Device type %lu is not supported by RTC driver\n",
 753                                platform_get_device_id(pdev)->driver_data);
 754                return -ENODEV;
 755        }
 756
 757        info->i2c = devm_i2c_new_dummy_device(&pdev->dev, s5m87xx->i2c->adapter,
 758                                              RTC_I2C_ADDR);
 759        if (IS_ERR(info->i2c)) {
 760                dev_err(&pdev->dev, "Failed to allocate I2C for RTC\n");
 761                return PTR_ERR(info->i2c);
 762        }
 763
 764        info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg);
 765        if (IS_ERR(info->regmap)) {
 766                ret = PTR_ERR(info->regmap);
 767                dev_err(&pdev->dev, "Failed to allocate RTC register map: %d\n",
 768                                ret);
 769                return ret;
 770        }
 771
 772        info->dev = &pdev->dev;
 773        info->s5m87xx = s5m87xx;
 774        info->device_type = platform_get_device_id(pdev)->driver_data;
 775
 776        if (s5m87xx->irq_data) {
 777                info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
 778                if (info->irq <= 0) {
 779                        dev_err(&pdev->dev, "Failed to get virtual IRQ %d\n",
 780                                alarm_irq);
 781                        return -EINVAL;
 782                }
 783        }
 784
 785        platform_set_drvdata(pdev, info);
 786
 787        ret = s5m8767_rtc_init_reg(info);
 788        if (ret)
 789                return ret;
 790
 791        device_init_wakeup(&pdev->dev, 1);
 792
 793        info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc",
 794                                                 &s5m_rtc_ops, THIS_MODULE);
 795
 796        if (IS_ERR(info->rtc_dev))
 797                return PTR_ERR(info->rtc_dev);
 798
 799        if (!info->irq) {
 800                dev_info(&pdev->dev, "Alarm IRQ not available\n");
 801                return 0;
 802        }
 803
 804        ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL,
 805                                        s5m_rtc_alarm_irq, 0, "rtc-alarm0",
 806                                        info);
 807        if (ret < 0) {
 808                dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
 809                        info->irq, ret);
 810                return ret;
 811        }
 812
 813        return 0;
 814}
 815
 816#ifdef CONFIG_PM_SLEEP
 817static int s5m_rtc_resume(struct device *dev)
 818{
 819        struct s5m_rtc_info *info = dev_get_drvdata(dev);
 820        int ret = 0;
 821
 822        if (info->irq && device_may_wakeup(dev))
 823                ret = disable_irq_wake(info->irq);
 824
 825        return ret;
 826}
 827
 828static int s5m_rtc_suspend(struct device *dev)
 829{
 830        struct s5m_rtc_info *info = dev_get_drvdata(dev);
 831        int ret = 0;
 832
 833        if (info->irq && device_may_wakeup(dev))
 834                ret = enable_irq_wake(info->irq);
 835
 836        return ret;
 837}
 838#endif /* CONFIG_PM_SLEEP */
 839
 840static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume);
 841
 842static const struct platform_device_id s5m_rtc_id[] = {
 843        { "s5m-rtc",            S5M8767X },
 844        { "s2mps13-rtc",        S2MPS13X },
 845        { "s2mps14-rtc",        S2MPS14X },
 846        { "s2mps15-rtc",        S2MPS15X },
 847        { },
 848};
 849MODULE_DEVICE_TABLE(platform, s5m_rtc_id);
 850
 851static struct platform_driver s5m_rtc_driver = {
 852        .driver         = {
 853                .name   = "s5m-rtc",
 854                .pm     = &s5m_rtc_pm_ops,
 855        },
 856        .probe          = s5m_rtc_probe,
 857        .id_table       = s5m_rtc_id,
 858};
 859
 860module_platform_driver(s5m_rtc_driver);
 861
 862/* Module information */
 863MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
 864MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver");
 865MODULE_LICENSE("GPL");
 866MODULE_ALIAS("platform:s5m-rtc");
 867