linux/drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/******************************************************************************
   3 *
   4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   5 *
   6 ******************************************************************************/
   7#define _RTL8188E_XMIT_C_
   8#include <osdep_service.h>
   9#include <drv_types.h>
  10#include <mon.h>
  11#include <wifi.h>
  12#include <osdep_intf.h>
  13#include <usb_ops_linux.h>
  14#include <rtl8188e_hal.h>
  15
  16s32 rtw_hal_init_xmit_priv(struct adapter *adapt)
  17{
  18        struct xmit_priv *pxmitpriv = &adapt->xmitpriv;
  19
  20        tasklet_setup(&pxmitpriv->xmit_tasklet, rtl8188eu_xmit_tasklet);
  21        return _SUCCESS;
  22}
  23
  24static u8 urb_zero_packet_chk(struct adapter *adapt, int sz)
  25{
  26        return !((sz + TXDESC_SIZE) % adapt->HalData->UsbBulkOutSize);
  27}
  28
  29static void rtl8188eu_cal_txdesc_chksum(struct tx_desc  *ptxdesc)
  30{
  31        u16 *usptr = (u16 *)ptxdesc;
  32        u32 count = 16; /* (32 bytes / 2 bytes per XOR) => 16 times */
  33        u32 index;
  34        u16 checksum = 0;
  35
  36        /* Clear first */
  37        ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
  38
  39        for (index = 0; index < count; index++)
  40                checksum = checksum ^ le16_to_cpu(*(__le16 *)(usptr + index));
  41        ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff & checksum);
  42}
  43
  44/*
  45 * In normal chip, we should send some packet to Hw which will be used by Fw
  46 * in FW LPS mode. The function is to fill the Tx descriptor of this packets,
  47 * then Fw can tell Hw to send these packet derectly.
  48 */
  49void rtl8188e_fill_fake_txdesc(struct adapter *adapt, u8 *desc, u32 BufferLen, u8  ispspoll, u8  is_btqosnull)
  50{
  51        struct tx_desc *ptxdesc;
  52
  53        /*  Clear all status */
  54        ptxdesc = (struct tx_desc *)desc;
  55        memset(desc, 0, TXDESC_SIZE);
  56
  57        /* offset 0 */
  58        ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); /* own, bFirstSeg, bLastSeg; */
  59
  60        ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); /* 32 bytes for TX Desc */
  61
  62        ptxdesc->txdw0 |= cpu_to_le32(BufferLen & 0x0000ffff); /*  Buffer size + command header */
  63
  64        /* offset 4 */
  65        ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT << QSEL_SHT) & 0x00001f00); /*  Fixed queue of Mgnt queue */
  66
  67        /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. */
  68        if (ispspoll) {
  69                ptxdesc->txdw1 |= cpu_to_le32(NAVUSEHDR);
  70        } else {
  71                ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); /*  Hw set sequence number */
  72                ptxdesc->txdw3 |= cpu_to_le32((8 << 28)); /* set bit3 to 1. Suugested by TimChen. 2009.12.29. */
  73        }
  74
  75        if (is_btqosnull)
  76                ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); /*  BT NULL */
  77
  78        /* offset 16 */
  79        ptxdesc->txdw4 |= cpu_to_le32(BIT(8));/* driver uses rate */
  80
  81        /*  USB interface drop packet if the checksum of descriptor isn't correct. */
  82        /*  Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). */
  83        rtl8188eu_cal_txdesc_chksum(ptxdesc);
  84}
  85
  86static void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc)
  87{
  88        if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
  89                switch (pattrib->encrypt) {
  90                /* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */
  91                case _WEP40_:
  92                case _WEP104_:
  93                        ptxdesc->txdw1 |= cpu_to_le32((0x01 << SEC_TYPE_SHT) & 0x00c00000);
  94                        ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
  95                        break;
  96                case _TKIP_:
  97                case _TKIP_WTMIC_:
  98                        ptxdesc->txdw1 |= cpu_to_le32((0x01 << SEC_TYPE_SHT) & 0x00c00000);
  99                        ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
 100                        break;
 101                case _AES_:
 102                        ptxdesc->txdw1 |= cpu_to_le32((0x03 << SEC_TYPE_SHT) & 0x00c00000);
 103                        ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
 104                        break;
 105                case _NO_PRIVACY_:
 106                default:
 107                        break;
 108                }
 109        }
 110}
 111
 112static void fill_txdesc_vcs(struct pkt_attrib *pattrib, __le32 *pdw)
 113{
 114        switch (pattrib->vcs_mode) {
 115        case RTS_CTS:
 116                *pdw |= cpu_to_le32(RTS_EN);
 117                break;
 118        case CTS_TO_SELF:
 119                *pdw |= cpu_to_le32(CTS_2_SELF);
 120                break;
 121        case NONE_VCS:
 122        default:
 123                break;
 124        }
 125        if (pattrib->vcs_mode) {
 126                *pdw |= cpu_to_le32(HW_RTS_EN);
 127                /*  Set RTS BW */
 128                if (pattrib->ht_en) {
 129                        *pdw |= (pattrib->bwmode & HT_CHANNEL_WIDTH_40) ?       cpu_to_le32(BIT(27)) : 0;
 130
 131                        if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
 132                                *pdw |= cpu_to_le32((0x01 << 28) & 0x30000000);
 133                        else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
 134                                *pdw |= cpu_to_le32((0x02 << 28) & 0x30000000);
 135                        else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
 136                                *pdw |= 0;
 137                        else
 138                                *pdw |= cpu_to_le32((0x03 << 28) & 0x30000000);
 139                }
 140        }
 141}
 142
 143static void fill_txdesc_phy(struct pkt_attrib *pattrib, __le32 *pdw)
 144{
 145        if (pattrib->ht_en) {
 146                *pdw |= (pattrib->bwmode & HT_CHANNEL_WIDTH_40) ?       cpu_to_le32(BIT(25)) : 0;
 147
 148                if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
 149                        *pdw |= cpu_to_le32((0x01 << DATA_SC_SHT) & 0x003f0000);
 150                else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
 151                        *pdw |= cpu_to_le32((0x02 << DATA_SC_SHT) & 0x003f0000);
 152                else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
 153                        *pdw |= 0;
 154                else
 155                        *pdw |= cpu_to_le32((0x03 << DATA_SC_SHT) & 0x003f0000);
 156        }
 157}
 158
 159static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bagg_pkt)
 160{
 161        int pull = 0;
 162        uint qsel;
 163        u8 data_rate, pwr_status, offset;
 164        struct adapter *adapt = pxmitframe->padapter;
 165        struct pkt_attrib *pattrib = &pxmitframe->attrib;
 166        struct odm_dm_struct *odmpriv = &adapt->HalData->odmpriv;
 167        struct tx_desc *ptxdesc = (struct tx_desc *)pmem;
 168        struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
 169        struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
 170
 171        if (adapt->registrypriv.mp_mode == 0) {
 172                if ((!bagg_pkt) && (urb_zero_packet_chk(adapt, sz) == 0)) {
 173                        ptxdesc = (struct tx_desc *)(pmem + PACKET_OFFSET_SZ);
 174                        pull = 1;
 175                }
 176        }
 177
 178        memset(ptxdesc, 0, sizeof(struct tx_desc));
 179
 180        /* 4 offset 0 */
 181        ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
 182        ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);/* update TXPKTSIZE */
 183
 184        offset = TXDESC_SIZE + OFFSET_SZ;
 185
 186        ptxdesc->txdw0 |= cpu_to_le32(((offset) << OFFSET_SHT) & 0x00ff0000);/* 32 bytes for TX Desc */
 187
 188        if (is_multicast_ether_addr(pattrib->ra))
 189                ptxdesc->txdw0 |= cpu_to_le32(BMC);
 190
 191        if (adapt->registrypriv.mp_mode == 0) {
 192                if (!bagg_pkt) {
 193                        if ((pull) && (pxmitframe->pkt_offset > 0))
 194                                pxmitframe->pkt_offset = pxmitframe->pkt_offset - 1;
 195                }
 196        }
 197
 198        /*  pkt_offset, unit:8 bytes padding */
 199        if (pxmitframe->pkt_offset > 0)
 200                ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000);
 201
 202        /* driver uses rate */
 203        ptxdesc->txdw4 |= cpu_to_le32(USERATE);/* rate control always by driver */
 204
 205        if ((pxmitframe->frame_tag & 0x0f) == DATA_FRAMETAG) {
 206                /* offset 4 */
 207                ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3F);
 208
 209                qsel = (uint)(pattrib->qsel & 0x0000001f);
 210                ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
 211
 212                ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000F0000);
 213
 214                fill_txdesc_sectype(pattrib, ptxdesc);
 215
 216                if (pattrib->ampdu_en) {
 217                        ptxdesc->txdw2 |= cpu_to_le32(AGG_EN);/* AGG EN */
 218                        ptxdesc->txdw6 = cpu_to_le32(0x6666f800);
 219                } else {
 220                        ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */
 221                }
 222
 223                /* offset 8 */
 224
 225                /* offset 12 */
 226                ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0FFF0000);
 227
 228                /* offset 16 , offset 20 */
 229                if (pattrib->qos_en)
 230                        ptxdesc->txdw4 |= cpu_to_le32(QOS);/* QoS */
 231
 232                /* offset 20 */
 233                if (pxmitframe->agg_num > 1)
 234                        ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << USB_TXAGG_NUM_SHT) & 0xFF000000);
 235
 236                if ((pattrib->ether_type != 0x888e) &&
 237                    (pattrib->ether_type != 0x0806) &&
 238                    (pattrib->ether_type != 0x88b4) &&
 239                    (pattrib->dhcp_pkt != 1)) {
 240                        /* Non EAP & ARP & DHCP type data packet */
 241
 242                        fill_txdesc_vcs(pattrib, &ptxdesc->txdw4);
 243                        fill_txdesc_phy(pattrib, &ptxdesc->txdw4);
 244
 245                        ptxdesc->txdw4 |= cpu_to_le32(0x00000008);/* RTS Rate=24M */
 246                        ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);/* DATA/RTS  Rate FB LMT */
 247
 248                        if (pattrib->ht_en) {
 249                                if (ODM_RA_GetShortGI_8188E(odmpriv, pattrib->mac_id))
 250                                        ptxdesc->txdw5 |= cpu_to_le32(SGI);/* SGI */
 251                        }
 252                        data_rate = ODM_RA_GetDecisionRate_8188E(odmpriv, pattrib->mac_id);
 253                        ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F);
 254                        pwr_status = ODM_RA_GetHwPwrStatus_8188E(odmpriv, pattrib->mac_id);
 255                        ptxdesc->txdw4 |= cpu_to_le32((pwr_status & 0x7) << PWR_STATUS_SHT);
 256                } else {
 257                        /*  EAP data packet and ARP packet and DHCP. */
 258                        /*  Use the 1M data rate to send the EAP/ARP packet. */
 259                        /*  This will maybe make the handshake smooth. */
 260                        ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */
 261                        if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
 262                                ptxdesc->txdw4 |= cpu_to_le32(BIT(24));/*  DATA_SHORT */
 263                        ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
 264                }
 265        } else if ((pxmitframe->frame_tag & 0x0f) == MGNT_FRAMETAG) {
 266                /* offset 4 */
 267                ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3f);
 268
 269                qsel = (uint)(pattrib->qsel & 0x0000001f);
 270                ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
 271
 272                ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000f0000);
 273
 274                /* offset 8 */
 275                /* CCX-TXRPT ack for xmit mgmt frames. */
 276                if (pxmitframe->ack_report)
 277                        ptxdesc->txdw2 |= cpu_to_le32(BIT(19));
 278
 279                /* offset 12 */
 280                ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0FFF0000);
 281
 282                /* offset 20 */
 283                ptxdesc->txdw5 |= cpu_to_le32(RTY_LMT_EN);/* retry limit enable */
 284                if (pattrib->retry_ctrl)
 285                        ptxdesc->txdw5 |= cpu_to_le32(0x00180000);/* retry limit = 6 */
 286                else
 287                        ptxdesc->txdw5 |= cpu_to_le32(0x00300000);/* retry limit = 12 */
 288
 289                ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
 290        } else if ((pxmitframe->frame_tag & 0x0f) == TXAGG_FRAMETAG) {
 291                DBG_88E("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
 292        } else {
 293                DBG_88E("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
 294
 295                /* offset 4 */
 296                ptxdesc->txdw1 |= cpu_to_le32((4) & 0x3f);/* CAM_ID(MAC_ID) */
 297
 298                ptxdesc->txdw1 |= cpu_to_le32((6 << RATE_ID_SHT) & 0x000f0000);/* raid */
 299
 300                /* offset 8 */
 301
 302                /* offset 12 */
 303                ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0fff0000);
 304
 305                /* offset 20 */
 306                ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
 307        }
 308
 309        /*  2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. */
 310        /*  (1) The sequence number of each non-Qos frame / broadcast / multicast / */
 311        /*  mgnt frame should be controlled by Hw because Fw will also send null data */
 312        /*  which we cannot control when Fw LPS enable. */
 313        /*  --> default enable non-Qos data sequense number. 2010.06.23. by tynli. */
 314        /*  (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. */
 315        /*  (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. */
 316        /*  2010.06.23. Added by tynli. */
 317        if (!pattrib->qos_en) {
 318                ptxdesc->txdw3 |= cpu_to_le32(EN_HWSEQ); /*  Hw set sequence number */
 319                ptxdesc->txdw4 |= cpu_to_le32(HW_SSN);  /*  Hw set sequence number */
 320        }
 321
 322        rtl88eu_dm_set_tx_ant_by_tx_info(odmpriv, pmem, pattrib->mac_id);
 323
 324        rtl8188eu_cal_txdesc_chksum(ptxdesc);
 325        _dbg_dump_tx_info(adapt, pxmitframe->frame_tag, ptxdesc);
 326        return pull;
 327}
 328
 329/* for non-agg data frame or management frame */
 330static s32 rtw_dump_xframe(struct adapter *adapt, struct xmit_frame *pxmitframe)
 331{
 332        s32 ret = _SUCCESS;
 333        s32 inner_ret = _SUCCESS;
 334        int t, sz, w_sz, pull = 0;
 335        u8 *mem_addr;
 336        u32 ff_hwaddr;
 337        struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
 338        struct pkt_attrib *pattrib = &pxmitframe->attrib;
 339        struct xmit_priv *pxmitpriv = &adapt->xmitpriv;
 340
 341        if ((pxmitframe->frame_tag == DATA_FRAMETAG) &&
 342            (pxmitframe->attrib.ether_type != 0x0806) &&
 343            (pxmitframe->attrib.ether_type != 0x888e) &&
 344            (pxmitframe->attrib.ether_type != 0x88b4) &&
 345            (pxmitframe->attrib.dhcp_pkt != 1))
 346                rtw_issue_addbareq_cmd(adapt, pxmitframe);
 347        mem_addr = pxmitframe->buf_addr;
 348
 349        RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("%s()\n", __func__));
 350
 351        for (t = 0; t < pattrib->nr_frags; t++) {
 352                if (inner_ret != _SUCCESS && ret == _SUCCESS)
 353                        ret = _FAIL;
 354
 355                if (t != (pattrib->nr_frags - 1)) {
 356                        RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("pattrib->nr_frags=%d\n", pattrib->nr_frags));
 357
 358                        sz = pxmitpriv->frag_len;
 359                        sz = sz - 4 - pattrib->icv_len;
 360                } else {
 361                        /* no frag */
 362                        sz = pattrib->last_txcmdsz;
 363                }
 364
 365                pull = update_txdesc(pxmitframe, mem_addr, sz, false);
 366
 367                if (pull) {
 368                        mem_addr += PACKET_OFFSET_SZ; /* pull txdesc head */
 369                        pxmitframe->buf_addr = mem_addr;
 370                        w_sz = sz + TXDESC_SIZE;
 371                } else {
 372                        w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ;
 373                }
 374                ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe);
 375
 376                inner_ret = usb_write_port(adapt, ff_hwaddr, w_sz, pxmitbuf);
 377
 378                rtw_count_tx_stats(adapt, pxmitframe, sz);
 379
 380                RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_write_port, w_sz=%d\n", w_sz));
 381
 382                mem_addr += w_sz;
 383
 384                mem_addr = (u8 *)round_up((size_t)mem_addr, 4);
 385        }
 386
 387        rtw_free_xmitframe(pxmitpriv, pxmitframe);
 388
 389        if  (ret != _SUCCESS)
 390                rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN);
 391
 392        return ret;
 393}
 394
 395static u32 xmitframe_need_length(struct xmit_frame *pxmitframe)
 396{
 397        struct pkt_attrib *pattrib = &pxmitframe->attrib;
 398
 399        u32 len;
 400
 401        /*  no consider fragement */
 402        len = pattrib->hdrlen + pattrib->iv_len +
 403                SNAP_SIZE + sizeof(u16) +
 404                pattrib->pktlen +
 405                ((pattrib->bswenc) ? pattrib->icv_len : 0);
 406
 407        if (pattrib->encrypt == _TKIP_)
 408                len += 8;
 409
 410        return len;
 411}
 412
 413bool rtl8188eu_xmitframe_complete(struct adapter *adapt,
 414                                  struct xmit_priv *pxmitpriv)
 415{
 416        struct xmit_frame *pxmitframe = NULL;
 417        struct xmit_frame *pfirstframe = NULL;
 418        struct xmit_buf *pxmitbuf;
 419
 420        /*  aggregate variable */
 421        struct hw_xmit *phwxmit;
 422        struct sta_info *psta = NULL;
 423        struct tx_servq *ptxservq = NULL;
 424
 425        struct list_head *xmitframe_plist = NULL, *xmitframe_phead = NULL;
 426
 427        u32 pbuf;       /*  next pkt address */
 428        u32 pbuf_tail;  /*  last pkt tail */
 429        u32 len;        /*  packet length, except TXDESC_SIZE and PKT_OFFSET */
 430
 431        u32 bulksize = adapt->HalData->UsbBulkOutSize;
 432        u8 desc_cnt;
 433        u32 bulkptr;
 434
 435        /*  dump frame variable */
 436        u32 ff_hwaddr;
 437
 438        RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n"));
 439
 440        pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
 441        if (!pxmitbuf)
 442                return false;
 443
 444        /* 3 1. pick up first frame */
 445        rtw_free_xmitframe(pxmitpriv, pxmitframe);
 446
 447        pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
 448        if (!pxmitframe) {
 449                /*  no more xmit frame, release xmit buffer */
 450                rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
 451                return false;
 452        }
 453
 454        pxmitframe->pxmitbuf = pxmitbuf;
 455        pxmitframe->buf_addr = pxmitbuf->pbuf;
 456        pxmitbuf->priv_data = pxmitframe;
 457
 458        pxmitframe->agg_num = 1; /*  alloc xmitframe should assign to 1. */
 459        pxmitframe->pkt_offset = 1; /*  first frame of aggregation, reserve offset */
 460
 461        rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
 462
 463        /*  always return ndis_packet after rtw_xmitframe_coalesce */
 464        rtw_os_xmit_complete(adapt, pxmitframe);
 465
 466        /* 3 2. aggregate same priority and same DA(AP or STA) frames */
 467        pfirstframe = pxmitframe;
 468        len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE + (pfirstframe->pkt_offset * PACKET_OFFSET_SZ);
 469        pbuf_tail = len;
 470        pbuf = round_up(pbuf_tail, 8);
 471
 472        /*  check pkt amount in one bulk */
 473        desc_cnt = 0;
 474        bulkptr = bulksize;
 475        if (pbuf < bulkptr) {
 476                desc_cnt++;
 477        } else {
 478                desc_cnt = 0;
 479                bulkptr = ((pbuf / bulksize) + 1) * bulksize; /*  round to next bulksize */
 480        }
 481
 482        /*  dequeue same priority packet from station tx queue */
 483        psta = pfirstframe->attrib.psta;
 484        switch (pfirstframe->attrib.priority) {
 485        case 1:
 486        case 2:
 487                ptxservq = &psta->sta_xmitpriv.bk_q;
 488                phwxmit = pxmitpriv->hwxmits + 3;
 489                break;
 490        case 4:
 491        case 5:
 492                ptxservq = &psta->sta_xmitpriv.vi_q;
 493                phwxmit = pxmitpriv->hwxmits + 1;
 494                break;
 495        case 6:
 496        case 7:
 497                ptxservq = &psta->sta_xmitpriv.vo_q;
 498                phwxmit = pxmitpriv->hwxmits;
 499                break;
 500        case 0:
 501        case 3:
 502        default:
 503                ptxservq = &psta->sta_xmitpriv.be_q;
 504                phwxmit = pxmitpriv->hwxmits + 2;
 505                break;
 506        }
 507        spin_lock_bh(&pxmitpriv->lock);
 508
 509        xmitframe_phead = get_list_head(&ptxservq->sta_pending);
 510        xmitframe_plist = xmitframe_phead->next;
 511
 512        while (xmitframe_phead != xmitframe_plist) {
 513                pxmitframe = container_of(xmitframe_plist, struct xmit_frame, list);
 514                xmitframe_plist = xmitframe_plist->next;
 515
 516                pxmitframe->agg_num = 0; /*  not first frame of aggregation */
 517                pxmitframe->pkt_offset = 0; /*  not first frame of aggregation, no need to reserve offset */
 518
 519                len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ);
 520
 521                if (round_up(pbuf + len, 8) > MAX_XMITBUF_SZ) {
 522                        pxmitframe->agg_num = 1;
 523                        pxmitframe->pkt_offset = 1;
 524                        break;
 525                }
 526                list_del_init(&pxmitframe->list);
 527                ptxservq->qcnt--;
 528                phwxmit->accnt--;
 529
 530                pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf;
 531
 532                rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
 533                /*  always return ndis_packet after rtw_xmitframe_coalesce */
 534                rtw_os_xmit_complete(adapt, pxmitframe);
 535
 536                /*  (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz */
 537                update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz, true);
 538
 539                /*  don't need xmitframe any more */
 540                rtw_free_xmitframe(pxmitpriv, pxmitframe);
 541
 542                /*  handle pointer and stop condition */
 543                pbuf_tail = pbuf + len;
 544                pbuf = round_up(pbuf_tail, 8);
 545
 546                pfirstframe->agg_num++;
 547                if (pfirstframe->agg_num ==  MAX_TX_AGG_PACKET_NUMBER)
 548                        break;
 549
 550                if (pbuf < bulkptr) {
 551                        desc_cnt++;
 552                        if (desc_cnt == adapt->HalData->UsbTxAggDescNum)
 553                                break;
 554                } else {
 555                        desc_cnt = 0;
 556                        bulkptr = ((pbuf / bulksize) + 1) * bulksize;
 557                }
 558        } /* end while (aggregate same priority and same DA(AP or STA) frames) */
 559
 560        if (list_empty(&ptxservq->sta_pending.queue))
 561                list_del_init(&ptxservq->tx_pending);
 562
 563        spin_unlock_bh(&pxmitpriv->lock);
 564        if ((pfirstframe->attrib.ether_type != 0x0806) &&
 565            (pfirstframe->attrib.ether_type != 0x888e) &&
 566            (pfirstframe->attrib.ether_type != 0x88b4) &&
 567            (pfirstframe->attrib.dhcp_pkt != 1))
 568                rtw_issue_addbareq_cmd(adapt, pfirstframe);
 569        /* 3 3. update first frame txdesc */
 570        if ((pbuf_tail % bulksize) == 0) {
 571                /*  remove pkt_offset */
 572                pbuf_tail -= PACKET_OFFSET_SZ;
 573                pfirstframe->buf_addr += PACKET_OFFSET_SZ;
 574                pfirstframe->pkt_offset--;
 575        }
 576
 577        update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz, true);
 578
 579        /* 3 4. write xmit buffer to USB FIFO */
 580        ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe);
 581        usb_write_port(adapt, ff_hwaddr, pbuf_tail, pxmitbuf);
 582
 583        /* 3 5. update statisitc */
 584        pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE);
 585        pbuf_tail -= (pfirstframe->pkt_offset * PACKET_OFFSET_SZ);
 586
 587        rtw_count_tx_stats(adapt, pfirstframe, pbuf_tail);
 588
 589        rtw_free_xmitframe(pxmitpriv, pfirstframe);
 590
 591        return true;
 592}
 593
 594/*
 595 * Return
 596 *      true    dump packet directly
 597 *      false   enqueue packet
 598 */
 599bool rtw_hal_xmit(struct adapter *adapt, struct xmit_frame *pxmitframe)
 600{
 601        s32 res;
 602        struct xmit_buf *pxmitbuf = NULL;
 603        struct xmit_priv *pxmitpriv = &adapt->xmitpriv;
 604        struct pkt_attrib *pattrib = &pxmitframe->attrib;
 605        struct mlme_priv *pmlmepriv = &adapt->mlmepriv;
 606
 607        spin_lock_bh(&pxmitpriv->lock);
 608
 609        if (rtw_txframes_sta_ac_pending(adapt, pattrib) > 0)
 610                goto enqueue;
 611
 612        if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING))
 613                goto enqueue;
 614
 615        pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
 616        if (!pxmitbuf)
 617                goto enqueue;
 618
 619        spin_unlock_bh(&pxmitpriv->lock);
 620
 621        pxmitframe->pxmitbuf = pxmitbuf;
 622        pxmitframe->buf_addr = pxmitbuf->pbuf;
 623        pxmitbuf->priv_data = pxmitframe;
 624
 625        res = rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
 626
 627        if (res == _SUCCESS) {
 628                rtw_dump_xframe(adapt, pxmitframe);
 629        } else {
 630                DBG_88E("==> %s xmitframe_coalesce failed\n", __func__);
 631                rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
 632                rtw_free_xmitframe(pxmitpriv, pxmitframe);
 633        }
 634
 635        return true;
 636
 637enqueue:
 638        res = rtw_xmitframe_enqueue(adapt, pxmitframe);
 639        spin_unlock_bh(&pxmitpriv->lock);
 640
 641        if (res != _SUCCESS) {
 642                RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n"));
 643                rtw_free_xmitframe(pxmitpriv, pxmitframe);
 644
 645                /*  Trick, make the statistics correct */
 646                pxmitpriv->tx_pkts--;
 647                pxmitpriv->tx_drop++;
 648                return true;
 649        }
 650
 651        return false;
 652}
 653
 654s32 rtw_hal_mgnt_xmit(struct adapter *adapt, struct xmit_frame *pmgntframe)
 655{
 656        struct xmit_priv *xmitpriv = &adapt->xmitpriv;
 657
 658        rtl88eu_mon_xmit_hook(adapt->pmondev, pmgntframe, xmitpriv->frag_len);
 659        return rtw_dump_xframe(adapt, pmgntframe);
 660}
 661