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9#include <linux/bitops.h>
10#include <linux/module.h>
11#include <linux/pci.h>
12#include <linux/rational.h>
13
14#include <linux/dmaengine.h>
15#include <linux/dma/dw.h>
16
17#include "8250_dwlib.h"
18
19#define PCI_DEVICE_ID_INTEL_QRK_UARTx 0x0936
20
21#define PCI_DEVICE_ID_INTEL_BYT_UART1 0x0f0a
22#define PCI_DEVICE_ID_INTEL_BYT_UART2 0x0f0c
23
24#define PCI_DEVICE_ID_INTEL_BSW_UART1 0x228a
25#define PCI_DEVICE_ID_INTEL_BSW_UART2 0x228c
26
27#define PCI_DEVICE_ID_INTEL_EHL_UART0 0x4b96
28#define PCI_DEVICE_ID_INTEL_EHL_UART1 0x4b97
29#define PCI_DEVICE_ID_INTEL_EHL_UART2 0x4b98
30#define PCI_DEVICE_ID_INTEL_EHL_UART3 0x4b99
31#define PCI_DEVICE_ID_INTEL_EHL_UART4 0x4b9a
32#define PCI_DEVICE_ID_INTEL_EHL_UART5 0x4b9b
33
34#define PCI_DEVICE_ID_INTEL_BDW_UART1 0x9ce3
35#define PCI_DEVICE_ID_INTEL_BDW_UART2 0x9ce4
36
37
38
39#define BYT_PRV_CLK 0x800
40#define BYT_PRV_CLK_EN BIT(0)
41#define BYT_PRV_CLK_M_VAL_SHIFT 1
42#define BYT_PRV_CLK_N_VAL_SHIFT 16
43#define BYT_PRV_CLK_UPDATE BIT(31)
44
45#define BYT_TX_OVF_INT 0x820
46#define BYT_TX_OVF_INT_MASK BIT(1)
47
48struct lpss8250;
49
50struct lpss8250_board {
51 unsigned long freq;
52 unsigned int base_baud;
53 int (*setup)(struct lpss8250 *, struct uart_port *p);
54 void (*exit)(struct lpss8250 *);
55};
56
57struct lpss8250 {
58 struct dw8250_port_data data;
59 struct lpss8250_board *board;
60
61
62 struct dw_dma_chip dma_chip;
63 struct dw_dma_slave dma_param;
64 u8 dma_maxburst;
65};
66
67static inline struct lpss8250 *to_lpss8250(struct dw8250_port_data *data)
68{
69 return container_of(data, struct lpss8250, data);
70}
71
72static void byt_set_termios(struct uart_port *p, struct ktermios *termios,
73 struct ktermios *old)
74{
75 unsigned int baud = tty_termios_baud_rate(termios);
76 struct lpss8250 *lpss = to_lpss8250(p->private_data);
77 unsigned long fref = lpss->board->freq, fuart = baud * 16;
78 unsigned long w = BIT(15) - 1;
79 unsigned long m, n;
80 u32 reg;
81
82
83 fuart = fuart ? fuart : 9600 * 16;
84
85
86 fuart *= rounddown_pow_of_two(fref / fuart);
87
88
89
90
91
92
93
94 rational_best_approximation(fuart, fref, w, w, &m, &n);
95 p->uartclk = fuart;
96
97
98 reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT);
99 writel(reg, p->membase + BYT_PRV_CLK);
100 reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE;
101 writel(reg, p->membase + BYT_PRV_CLK);
102
103 p->status &= ~UPSTAT_AUTOCTS;
104 if (termios->c_cflag & CRTSCTS)
105 p->status |= UPSTAT_AUTOCTS;
106
107 serial8250_do_set_termios(p, termios, old);
108}
109
110static unsigned int byt_get_mctrl(struct uart_port *port)
111{
112 unsigned int ret = serial8250_do_get_mctrl(port);
113
114
115 ret |= TIOCM_CAR | TIOCM_DSR;
116
117 return ret;
118}
119
120static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
121{
122 struct dw_dma_slave *param = &lpss->dma_param;
123 struct pci_dev *pdev = to_pci_dev(port->dev);
124 unsigned int dma_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
125 struct pci_dev *dma_dev = pci_get_slot(pdev->bus, dma_devfn);
126
127 switch (pdev->device) {
128 case PCI_DEVICE_ID_INTEL_BYT_UART1:
129 case PCI_DEVICE_ID_INTEL_BSW_UART1:
130 case PCI_DEVICE_ID_INTEL_BDW_UART1:
131 param->src_id = 3;
132 param->dst_id = 2;
133 break;
134 case PCI_DEVICE_ID_INTEL_BYT_UART2:
135 case PCI_DEVICE_ID_INTEL_BSW_UART2:
136 case PCI_DEVICE_ID_INTEL_BDW_UART2:
137 param->src_id = 5;
138 param->dst_id = 4;
139 break;
140 default:
141 return -EINVAL;
142 }
143
144 param->dma_dev = &dma_dev->dev;
145 param->m_master = 0;
146 param->p_master = 1;
147
148 lpss->dma_maxburst = 16;
149
150 port->set_termios = byt_set_termios;
151 port->get_mctrl = byt_get_mctrl;
152
153
154 writel(BYT_TX_OVF_INT_MASK, port->membase + BYT_TX_OVF_INT);
155
156 return 0;
157}
158
159static int ehl_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
160{
161 return 0;
162}
163
164#ifdef CONFIG_SERIAL_8250_DMA
165static const struct dw_dma_platform_data qrk_serial_dma_pdata = {
166 .nr_channels = 2,
167 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
168 .chan_priority = CHAN_PRIORITY_ASCENDING,
169 .block_size = 4095,
170 .nr_masters = 1,
171 .data_width = {4},
172 .multi_block = {0},
173};
174
175static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port)
176{
177 struct uart_8250_dma *dma = &lpss->data.dma;
178 struct dw_dma_chip *chip = &lpss->dma_chip;
179 struct dw_dma_slave *param = &lpss->dma_param;
180 struct pci_dev *pdev = to_pci_dev(port->dev);
181 int ret;
182
183 chip->pdata = &qrk_serial_dma_pdata;
184 chip->dev = &pdev->dev;
185 chip->id = pdev->devfn;
186 chip->irq = pci_irq_vector(pdev, 0);
187 chip->regs = pci_ioremap_bar(pdev, 1);
188 if (!chip->regs)
189 return;
190
191
192 ret = dw_dma_probe(chip);
193 if (ret)
194 return;
195
196 pci_try_set_mwi(pdev);
197
198
199 dma->rx_dma_addr = 0xfffff000;
200 dma->tx_dma_addr = 0xfffff000;
201
202 param->dma_dev = &pdev->dev;
203 param->src_id = 0;
204 param->dst_id = 1;
205 param->hs_polarity = true;
206
207 lpss->dma_maxburst = 8;
208}
209
210static void qrk_serial_exit_dma(struct lpss8250 *lpss)
211{
212 struct dw_dma_chip *chip = &lpss->dma_chip;
213 struct dw_dma_slave *param = &lpss->dma_param;
214
215 if (!param->dma_dev)
216 return;
217
218 dw_dma_remove(chip);
219
220 pci_iounmap(to_pci_dev(chip->dev), chip->regs);
221}
222#else
223static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) {}
224static void qrk_serial_exit_dma(struct lpss8250 *lpss) {}
225#endif
226
227static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
228{
229 qrk_serial_setup_dma(lpss, port);
230 return 0;
231}
232
233static void qrk_serial_exit(struct lpss8250 *lpss)
234{
235 qrk_serial_exit_dma(lpss);
236}
237
238static bool lpss8250_dma_filter(struct dma_chan *chan, void *param)
239{
240 struct dw_dma_slave *dws = param;
241
242 if (dws->dma_dev != chan->device->dev)
243 return false;
244
245 chan->private = dws;
246 return true;
247}
248
249static int lpss8250_dma_setup(struct lpss8250 *lpss, struct uart_8250_port *port)
250{
251 struct uart_8250_dma *dma = &lpss->data.dma;
252 struct dw_dma_slave *rx_param, *tx_param;
253 struct device *dev = port->port.dev;
254
255 if (!lpss->dma_param.dma_dev)
256 return 0;
257
258 rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
259 if (!rx_param)
260 return -ENOMEM;
261
262 tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
263 if (!tx_param)
264 return -ENOMEM;
265
266 *rx_param = lpss->dma_param;
267 dma->rxconf.src_maxburst = lpss->dma_maxburst;
268
269 *tx_param = lpss->dma_param;
270 dma->txconf.dst_maxburst = lpss->dma_maxburst;
271
272 dma->fn = lpss8250_dma_filter;
273 dma->rx_param = rx_param;
274 dma->tx_param = tx_param;
275
276 port->dma = dma;
277 return 0;
278}
279
280static int lpss8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
281{
282 struct uart_8250_port uart;
283 struct lpss8250 *lpss;
284 int ret;
285
286 ret = pcim_enable_device(pdev);
287 if (ret)
288 return ret;
289
290 pci_set_master(pdev);
291
292 lpss = devm_kzalloc(&pdev->dev, sizeof(*lpss), GFP_KERNEL);
293 if (!lpss)
294 return -ENOMEM;
295
296 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
297 if (ret < 0)
298 return ret;
299
300 lpss->board = (struct lpss8250_board *)id->driver_data;
301
302 memset(&uart, 0, sizeof(struct uart_8250_port));
303
304 uart.port.dev = &pdev->dev;
305 uart.port.irq = pci_irq_vector(pdev, 0);
306 uart.port.private_data = &lpss->data;
307 uart.port.type = PORT_16550A;
308 uart.port.iotype = UPIO_MEM;
309 uart.port.regshift = 2;
310 uart.port.uartclk = lpss->board->base_baud * 16;
311 uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
312 uart.capabilities = UART_CAP_FIFO | UART_CAP_AFE;
313 uart.port.mapbase = pci_resource_start(pdev, 0);
314 uart.port.membase = pcim_iomap(pdev, 0, 0);
315 if (!uart.port.membase)
316 return -ENOMEM;
317
318 ret = lpss->board->setup(lpss, &uart.port);
319 if (ret)
320 return ret;
321
322 dw8250_setup_port(&uart.port);
323
324 ret = lpss8250_dma_setup(lpss, &uart);
325 if (ret)
326 goto err_exit;
327
328 ret = serial8250_register_8250_port(&uart);
329 if (ret < 0)
330 goto err_exit;
331
332 lpss->data.line = ret;
333
334 pci_set_drvdata(pdev, lpss);
335 return 0;
336
337err_exit:
338 if (lpss->board->exit)
339 lpss->board->exit(lpss);
340 pci_free_irq_vectors(pdev);
341 return ret;
342}
343
344static void lpss8250_remove(struct pci_dev *pdev)
345{
346 struct lpss8250 *lpss = pci_get_drvdata(pdev);
347
348 serial8250_unregister_port(lpss->data.line);
349
350 if (lpss->board->exit)
351 lpss->board->exit(lpss);
352 pci_free_irq_vectors(pdev);
353}
354
355static const struct lpss8250_board byt_board = {
356 .freq = 100000000,
357 .base_baud = 2764800,
358 .setup = byt_serial_setup,
359};
360
361static const struct lpss8250_board ehl_board = {
362 .freq = 200000000,
363 .base_baud = 12500000,
364 .setup = ehl_serial_setup,
365};
366
367static const struct lpss8250_board qrk_board = {
368 .freq = 44236800,
369 .base_baud = 2764800,
370 .setup = qrk_serial_setup,
371 .exit = qrk_serial_exit,
372};
373
374static const struct pci_device_id pci_ids[] = {
375 { PCI_DEVICE_DATA(INTEL, QRK_UARTx, &qrk_board) },
376 { PCI_DEVICE_DATA(INTEL, EHL_UART0, &ehl_board) },
377 { PCI_DEVICE_DATA(INTEL, EHL_UART1, &ehl_board) },
378 { PCI_DEVICE_DATA(INTEL, EHL_UART2, &ehl_board) },
379 { PCI_DEVICE_DATA(INTEL, EHL_UART3, &ehl_board) },
380 { PCI_DEVICE_DATA(INTEL, EHL_UART4, &ehl_board) },
381 { PCI_DEVICE_DATA(INTEL, EHL_UART5, &ehl_board) },
382 { PCI_DEVICE_DATA(INTEL, BYT_UART1, &byt_board) },
383 { PCI_DEVICE_DATA(INTEL, BYT_UART2, &byt_board) },
384 { PCI_DEVICE_DATA(INTEL, BSW_UART1, &byt_board) },
385 { PCI_DEVICE_DATA(INTEL, BSW_UART2, &byt_board) },
386 { PCI_DEVICE_DATA(INTEL, BDW_UART1, &byt_board) },
387 { PCI_DEVICE_DATA(INTEL, BDW_UART2, &byt_board) },
388 { }
389};
390MODULE_DEVICE_TABLE(pci, pci_ids);
391
392static struct pci_driver lpss8250_pci_driver = {
393 .name = "8250_lpss",
394 .id_table = pci_ids,
395 .probe = lpss8250_probe,
396 .remove = lpss8250_remove,
397};
398
399module_pci_driver(lpss8250_pci_driver);
400
401MODULE_AUTHOR("Intel Corporation");
402MODULE_LICENSE("GPL v2");
403MODULE_DESCRIPTION("Intel LPSS UART driver");
404
