1
2#ifndef _IDE_H
3#define _IDE_H
4
5
6
7
8
9
10#include <linux/init.h>
11#include <linux/ioport.h>
12#include <linux/ata.h>
13#include <linux/blk-mq.h>
14#include <linux/proc_fs.h>
15#include <linux/interrupt.h>
16#include <linux/bitops.h>
17#include <linux/bio.h>
18#include <linux/pci.h>
19#include <linux/completion.h>
20#include <linux/pm.h>
21#include <linux/mutex.h>
22
23#include <linux/cdrom.h>
24#include <scsi/scsi_cmnd.h>
25#include <asm/byteorder.h>
26#include <asm/io.h>
27
28
29
30
31#define SUPPORT_VLB_SYNC 1
32#define IDE_DEFAULT_MAX_FAILURES 1
33#define ERROR_MAX 8
34#define ERROR_RESET 3
35#define ERROR_RECAL 1
36
37struct device;
38
39
40enum ata_priv_type {
41 ATA_PRIV_MISC,
42 ATA_PRIV_TASKFILE,
43 ATA_PRIV_PC,
44 ATA_PRIV_SENSE,
45 ATA_PRIV_PM_SUSPEND,
46 ATA_PRIV_PM_RESUME,
47};
48
49struct ide_request {
50 struct scsi_request sreq;
51 u8 sense[SCSI_SENSE_BUFFERSIZE];
52 u8 type;
53 void *special;
54};
55
56static inline struct ide_request *ide_req(struct request *rq)
57{
58 return blk_mq_rq_to_pdu(rq);
59}
60
61static inline bool ata_misc_request(struct request *rq)
62{
63 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_MISC;
64}
65
66static inline bool ata_taskfile_request(struct request *rq)
67{
68 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_TASKFILE;
69}
70
71static inline bool ata_pc_request(struct request *rq)
72{
73 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_PC;
74}
75
76static inline bool ata_sense_request(struct request *rq)
77{
78 return blk_rq_is_private(rq) && ide_req(rq)->type == ATA_PRIV_SENSE;
79}
80
81static inline bool ata_pm_request(struct request *rq)
82{
83 return blk_rq_is_private(rq) &&
84 (ide_req(rq)->type == ATA_PRIV_PM_SUSPEND ||
85 ide_req(rq)->type == ATA_PRIV_PM_RESUME);
86}
87
88
89enum {
90 IDE_DRV_ERROR_GENERAL = 101,
91 IDE_DRV_ERROR_FILEMARK = 102,
92 IDE_DRV_ERROR_EOD = 103,
93};
94
95
96
97
98#define IDE_NR_PORTS (10)
99
100struct ide_io_ports {
101 unsigned long data_addr;
102
103 union {
104 unsigned long error_addr;
105 unsigned long feature_addr;
106 };
107
108 unsigned long nsect_addr;
109 unsigned long lbal_addr;
110 unsigned long lbam_addr;
111 unsigned long lbah_addr;
112
113 unsigned long device_addr;
114
115 union {
116 unsigned long status_addr;
117 unsigned long command_addr;
118 };
119
120 unsigned long ctl_addr;
121
122 unsigned long irq_addr;
123};
124
125#define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
126
127#define BAD_R_STAT (ATA_BUSY | ATA_ERR)
128#define BAD_W_STAT (BAD_R_STAT | ATA_DF)
129#define BAD_STAT (BAD_R_STAT | ATA_DRQ)
130#define DRIVE_READY (ATA_DRDY | ATA_DSC)
131
132#define BAD_CRC (ATA_ABORTED | ATA_ICRC)
133
134#define SATA_NR_PORTS (3)
135
136#define SATA_STATUS_OFFSET (0)
137#define SATA_ERROR_OFFSET (1)
138#define SATA_CONTROL_OFFSET (2)
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156#define PRD_BYTES 8
157#define PRD_ENTRIES 256
158
159
160
161
162#define PARTN_BITS 6
163#define MAX_DRIVES 2
164
165
166
167
168enum {
169
170 WAIT_DRQ = 1 * HZ,
171
172 WAIT_READY = 5 * HZ,
173
174 WAIT_PIDENTIFY = 10 * HZ,
175
176 WAIT_WORSTCASE = 30 * HZ,
177
178 WAIT_CMD = 10 * HZ,
179
180 WAIT_FLOPPY_CMD = 50 * HZ,
181
182
183
184
185
186 WAIT_TAPE_CMD = 900 * HZ,
187
188 WAIT_MIN_SLEEP = HZ / 50,
189};
190
191
192
193
194
195#define REQ_DRIVE_RESET 0x20
196#define REQ_DEVSET_EXEC 0x21
197#define REQ_PARK_HEADS 0x22
198#define REQ_UNPARK_HEADS 0x23
199
200
201
202
203
204enum { ide_unknown, ide_generic, ide_pci,
205 ide_cmd640, ide_dtc2278, ide_ali14xx,
206 ide_qd65xx, ide_umc8672, ide_ht6560b,
207 ide_4drives, ide_pmac, ide_acorn,
208 ide_au1xxx, ide_palm3710
209};
210
211typedef u8 hwif_chipset_t;
212
213
214
215
216struct ide_hw {
217 union {
218 struct ide_io_ports io_ports;
219 unsigned long io_ports_array[IDE_NR_PORTS];
220 };
221
222 int irq;
223 struct device *dev, *parent;
224 unsigned long config;
225};
226
227static inline void ide_std_init_ports(struct ide_hw *hw,
228 unsigned long io_addr,
229 unsigned long ctl_addr)
230{
231 unsigned int i;
232
233 for (i = 0; i <= 7; i++)
234 hw->io_ports_array[i] = io_addr++;
235
236 hw->io_ports.ctl_addr = ctl_addr;
237}
238
239#define MAX_HWIFS 10
240
241
242
243
244
245#define ide_scsi 0x21
246#define ide_disk 0x20
247#define ide_optical 0x7
248#define ide_cdrom 0x5
249#define ide_tape 0x1
250#define ide_floppy 0x0
251
252
253
254
255enum {
256 IDE_SFLAG_SET_GEOMETRY = BIT(0),
257 IDE_SFLAG_RECALIBRATE = BIT(1),
258 IDE_SFLAG_SET_MULTMODE = BIT(2),
259};
260
261
262
263
264typedef enum {
265 ide_stopped,
266 ide_started,
267} ide_startstop_t;
268
269enum {
270 IDE_VALID_ERROR = BIT(1),
271 IDE_VALID_FEATURE = IDE_VALID_ERROR,
272 IDE_VALID_NSECT = BIT(2),
273 IDE_VALID_LBAL = BIT(3),
274 IDE_VALID_LBAM = BIT(4),
275 IDE_VALID_LBAH = BIT(5),
276 IDE_VALID_DEVICE = BIT(6),
277 IDE_VALID_LBA = IDE_VALID_LBAL |
278 IDE_VALID_LBAM |
279 IDE_VALID_LBAH,
280 IDE_VALID_OUT_TF = IDE_VALID_FEATURE |
281 IDE_VALID_NSECT |
282 IDE_VALID_LBA,
283 IDE_VALID_IN_TF = IDE_VALID_NSECT |
284 IDE_VALID_LBA,
285 IDE_VALID_OUT_HOB = IDE_VALID_OUT_TF,
286 IDE_VALID_IN_HOB = IDE_VALID_ERROR |
287 IDE_VALID_NSECT |
288 IDE_VALID_LBA,
289};
290
291enum {
292 IDE_TFLAG_LBA48 = BIT(0),
293 IDE_TFLAG_WRITE = BIT(1),
294 IDE_TFLAG_CUSTOM_HANDLER = BIT(2),
295 IDE_TFLAG_DMA_PIO_FALLBACK = BIT(3),
296
297 IDE_TFLAG_IO_16BIT = BIT(4),
298
299 IDE_TFLAG_DYN = BIT(5),
300 IDE_TFLAG_FS = BIT(6),
301 IDE_TFLAG_MULTI_PIO = BIT(7),
302 IDE_TFLAG_SET_XFER = BIT(8),
303};
304
305enum {
306 IDE_FTFLAG_FLAGGED = BIT(0),
307 IDE_FTFLAG_SET_IN_FLAGS = BIT(1),
308 IDE_FTFLAG_OUT_DATA = BIT(2),
309 IDE_FTFLAG_IN_DATA = BIT(3),
310};
311
312struct ide_taskfile {
313 u8 data;
314 union {
315 u8 error;
316 u8 feature;
317 };
318 u8 nsect;
319 u8 lbal;
320 u8 lbam;
321 u8 lbah;
322 u8 device;
323 union {
324 u8 status;
325 u8 command;
326 };
327};
328
329struct ide_cmd {
330 struct ide_taskfile tf;
331 struct ide_taskfile hob;
332 struct {
333 struct {
334 u8 tf;
335 u8 hob;
336 } out, in;
337 } valid;
338
339 u16 tf_flags;
340 u8 ftf_flags;
341 int protocol;
342
343 int sg_nents;
344 int orig_sg_nents;
345 int sg_dma_direction;
346
347 unsigned int nbytes;
348 unsigned int nleft;
349 unsigned int last_xfer_len;
350
351 struct scatterlist *cursg;
352 unsigned int cursg_ofs;
353
354 struct request *rq;
355};
356
357
358enum {
359
360 PC_FLAG_ABORT = BIT(0),
361 PC_FLAG_SUPPRESS_ERROR = BIT(1),
362 PC_FLAG_WAIT_FOR_DSC = BIT(2),
363 PC_FLAG_DMA_OK = BIT(3),
364 PC_FLAG_DMA_IN_PROGRESS = BIT(4),
365 PC_FLAG_DMA_ERROR = BIT(5),
366 PC_FLAG_WRITING = BIT(6),
367};
368
369#define ATAPI_WAIT_PC (60 * HZ)
370
371struct ide_atapi_pc {
372
373 u8 c[12];
374
375 int retries;
376 int error;
377
378
379 int req_xfer;
380
381
382 struct request *rq;
383
384 unsigned long flags;
385
386
387
388
389
390 unsigned long timeout;
391};
392
393struct ide_devset;
394struct ide_driver;
395
396#ifdef CONFIG_BLK_DEV_IDEACPI
397struct ide_acpi_drive_link;
398struct ide_acpi_hwif_link;
399#endif
400
401struct ide_drive_s;
402
403struct ide_disk_ops {
404 int (*check)(struct ide_drive_s *, const char *);
405 int (*get_capacity)(struct ide_drive_s *);
406 void (*unlock_native_capacity)(struct ide_drive_s *);
407 void (*setup)(struct ide_drive_s *);
408 void (*flush)(struct ide_drive_s *);
409 int (*init_media)(struct ide_drive_s *, struct gendisk *);
410 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
411 int);
412 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
413 sector_t);
414 int (*ioctl)(struct ide_drive_s *, struct block_device *,
415 fmode_t, unsigned int, unsigned long);
416 int (*compat_ioctl)(struct ide_drive_s *, struct block_device *,
417 fmode_t, unsigned int, unsigned long);
418};
419
420
421enum {
422 IDE_AFLAG_DRQ_INTERRUPT = BIT(0),
423
424
425
426 IDE_AFLAG_NO_EJECT = BIT(1),
427
428 IDE_AFLAG_PRE_ATAPI12 = BIT(2),
429
430 IDE_AFLAG_TOCADDR_AS_BCD = BIT(3),
431
432 IDE_AFLAG_TOCTRACKS_AS_BCD = BIT(4),
433
434 IDE_AFLAG_TOC_VALID = BIT(6),
435
436 IDE_AFLAG_DOOR_LOCKED = BIT(7),
437
438 IDE_AFLAG_NO_SPEED_SELECT = BIT(8),
439 IDE_AFLAG_VERTOS_300_SSD = BIT(9),
440 IDE_AFLAG_VERTOS_600_ESD = BIT(10),
441 IDE_AFLAG_SANYO_3CD = BIT(11),
442 IDE_AFLAG_FULL_CAPS_PAGE = BIT(12),
443 IDE_AFLAG_PLAY_AUDIO_OK = BIT(13),
444 IDE_AFLAG_LE_SPEED_FIELDS = BIT(14),
445
446
447
448 IDE_AFLAG_CLIK_DRIVE = BIT(15),
449
450 IDE_AFLAG_ZIP_DRIVE = BIT(16),
451
452 IDE_AFLAG_SRFP = BIT(17),
453
454
455 IDE_AFLAG_IGNORE_DSC = BIT(18),
456
457 IDE_AFLAG_ADDRESS_VALID = BIT(19),
458
459 IDE_AFLAG_BUSY = BIT(20),
460
461 IDE_AFLAG_DETECT_BS = BIT(21),
462
463 IDE_AFLAG_FILEMARK = BIT(22),
464
465 IDE_AFLAG_MEDIUM_PRESENT = BIT(23),
466
467 IDE_AFLAG_NO_AUTOCLOSE = BIT(24),
468};
469
470
471enum {
472
473 IDE_DFLAG_KEEP_SETTINGS = BIT(0),
474
475 IDE_DFLAG_USING_DMA = BIT(1),
476
477 IDE_DFLAG_UNMASK = BIT(2),
478
479 IDE_DFLAG_NOFLUSH = BIT(3),
480
481 IDE_DFLAG_DSC_OVERLAP = BIT(4),
482
483 IDE_DFLAG_NICE1 = BIT(5),
484
485 IDE_DFLAG_PRESENT = BIT(6),
486
487 IDE_DFLAG_NOHPA = BIT(7),
488
489 IDE_DFLAG_ID_READ = BIT(8),
490 IDE_DFLAG_NOPROBE = BIT(9),
491
492 IDE_DFLAG_REMOVABLE = BIT(10),
493 IDE_DFLAG_FORCED_GEOM = BIT(12),
494
495 IDE_DFLAG_NO_UNMASK = BIT(13),
496
497 IDE_DFLAG_NO_IO_32BIT = BIT(14),
498
499 IDE_DFLAG_DOORLOCKING = BIT(15),
500
501 IDE_DFLAG_NODMA = BIT(16),
502
503 IDE_DFLAG_BLOCKED = BIT(17),
504
505 IDE_DFLAG_SLEEPING = BIT(18),
506 IDE_DFLAG_POST_RESET = BIT(19),
507 IDE_DFLAG_UDMA33_WARNED = BIT(20),
508 IDE_DFLAG_LBA48 = BIT(21),
509
510 IDE_DFLAG_WCACHE = BIT(22),
511
512 IDE_DFLAG_NOWERR = BIT(23),
513
514 IDE_DFLAG_DMA_PIO_RETRY = BIT(24),
515 IDE_DFLAG_LBA = BIT(25),
516
517 IDE_DFLAG_NO_UNLOAD = BIT(26),
518
519 IDE_DFLAG_PARKED = BIT(27),
520 IDE_DFLAG_MEDIA_CHANGED = BIT(28),
521
522 IDE_DFLAG_WP = BIT(29),
523 IDE_DFLAG_FORMAT_IN_PROGRESS = BIT(30),
524 IDE_DFLAG_NIEN_QUIRK = BIT(31),
525};
526
527struct ide_drive_s {
528 char name[4];
529 char driver_req[10];
530
531 struct request_queue *queue;
532
533 bool (*prep_rq)(struct ide_drive_s *, struct request *);
534
535 struct blk_mq_tag_set tag_set;
536
537 struct request *rq;
538 void *driver_data;
539 u16 *id;
540#ifdef CONFIG_IDE_PROC_FS
541 struct proc_dir_entry *proc;
542 const struct ide_proc_devset *settings;
543#endif
544 struct hwif_s *hwif;
545
546 const struct ide_disk_ops *disk_ops;
547
548 unsigned long dev_flags;
549
550 unsigned long sleep;
551 unsigned long timeout;
552
553 u8 special_flags;
554
555 u8 select;
556 u8 retry_pio;
557 u8 waiting_for_dma;
558 u8 dma;
559
560 u8 init_speed;
561 u8 current_speed;
562 u8 desired_speed;
563 u8 pio_mode;
564 u8 dma_mode;
565 u8 dn;
566 u8 acoustic;
567 u8 media;
568 u8 ready_stat;
569 u8 mult_count;
570 u8 mult_req;
571 u8 io_32bit;
572 u8 bad_wstat;
573 u8 head;
574 u8 sect;
575 u8 bios_head;
576 u8 bios_sect;
577
578
579 u8 pc_delay;
580
581 unsigned int bios_cyl;
582 unsigned int cyl;
583 void *drive_data;
584 unsigned int failures;
585 unsigned int max_failures;
586 u64 probed_capacity;
587 u64 capacity64;
588
589 int lun;
590 int crc_count;
591
592 unsigned long debug_mask;
593
594#ifdef CONFIG_BLK_DEV_IDEACPI
595 struct ide_acpi_drive_link *acpidata;
596#endif
597 struct list_head list;
598 struct device gendev;
599 struct completion gendev_rel_comp;
600
601
602 struct ide_atapi_pc *pc;
603
604
605 struct ide_atapi_pc *failed_pc;
606
607
608 int (*pc_callback)(struct ide_drive_s *, int);
609
610 ide_startstop_t (*irq_handler)(struct ide_drive_s *);
611
612 unsigned long atapi_flags;
613
614 struct ide_atapi_pc request_sense_pc;
615
616
617 bool sense_rq_armed;
618 bool sense_rq_active;
619 struct request *sense_rq;
620 struct request_sense sense_data;
621
622
623 struct work_struct rq_work;
624 struct list_head rq_list;
625};
626
627typedef struct ide_drive_s ide_drive_t;
628
629#define to_ide_device(dev) container_of(dev, ide_drive_t, gendev)
630
631#define to_ide_drv(obj, cont_type) \
632 container_of(obj, struct cont_type, dev)
633
634#define ide_drv_g(disk, cont_type) \
635 container_of((disk)->private_data, struct cont_type, driver)
636
637struct ide_port_info;
638
639struct ide_tp_ops {
640 void (*exec_command)(struct hwif_s *, u8);
641 u8 (*read_status)(struct hwif_s *);
642 u8 (*read_altstatus)(struct hwif_s *);
643 void (*write_devctl)(struct hwif_s *, u8);
644
645 void (*dev_select)(ide_drive_t *);
646 void (*tf_load)(ide_drive_t *, struct ide_taskfile *, u8);
647 void (*tf_read)(ide_drive_t *, struct ide_taskfile *, u8);
648
649 void (*input_data)(ide_drive_t *, struct ide_cmd *,
650 void *, unsigned int);
651 void (*output_data)(ide_drive_t *, struct ide_cmd *,
652 void *, unsigned int);
653};
654
655extern const struct ide_tp_ops default_tp_ops;
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675struct ide_port_ops {
676 void (*init_dev)(ide_drive_t *);
677 void (*set_pio_mode)(struct hwif_s *, ide_drive_t *);
678 void (*set_dma_mode)(struct hwif_s *, ide_drive_t *);
679 blk_status_t (*reset_poll)(ide_drive_t *);
680 void (*pre_reset)(ide_drive_t *);
681 void (*resetproc)(ide_drive_t *);
682 void (*maskproc)(ide_drive_t *, int);
683 void (*quirkproc)(ide_drive_t *);
684 void (*clear_irq)(ide_drive_t *);
685 int (*test_irq)(struct hwif_s *);
686
687 u8 (*mdma_filter)(ide_drive_t *);
688 u8 (*udma_filter)(ide_drive_t *);
689
690 u8 (*cable_detect)(struct hwif_s *);
691};
692
693struct ide_dma_ops {
694 void (*dma_host_set)(struct ide_drive_s *, int);
695 int (*dma_setup)(struct ide_drive_s *, struct ide_cmd *);
696 void (*dma_start)(struct ide_drive_s *);
697 int (*dma_end)(struct ide_drive_s *);
698 int (*dma_test_irq)(struct ide_drive_s *);
699 void (*dma_lost_irq)(struct ide_drive_s *);
700
701 int (*dma_check)(struct ide_drive_s *, struct ide_cmd *);
702 int (*dma_timer_expiry)(struct ide_drive_s *);
703 void (*dma_clear)(struct ide_drive_s *);
704
705
706
707
708 u8 (*dma_sff_read_status)(struct hwif_s *);
709};
710
711enum {
712 IDE_PFLAG_PROBING = BIT(0),
713};
714
715struct ide_host;
716
717typedef struct hwif_s {
718 struct hwif_s *mate;
719 struct proc_dir_entry *proc;
720
721 struct ide_host *host;
722
723 char name[6];
724
725 struct ide_io_ports io_ports;
726
727 unsigned long sata_scr[SATA_NR_PORTS];
728
729 ide_drive_t *devices[MAX_DRIVES + 1];
730
731 unsigned long port_flags;
732
733 u8 major;
734 u8 index;
735 u8 channel;
736
737 u32 host_flags;
738
739 u8 pio_mask;
740
741 u8 ultra_mask;
742 u8 mwdma_mask;
743 u8 swdma_mask;
744
745 u8 cbl;
746
747 hwif_chipset_t chipset;
748
749 struct device *dev;
750
751 void (*rw_disk)(ide_drive_t *, struct request *);
752
753 const struct ide_tp_ops *tp_ops;
754 const struct ide_port_ops *port_ops;
755 const struct ide_dma_ops *dma_ops;
756
757
758 unsigned int *dmatable_cpu;
759
760 dma_addr_t dmatable_dma;
761
762
763 int prd_max_nents;
764
765 int prd_ent_size;
766
767
768 struct scatterlist *sg_table;
769 int sg_max_nents;
770
771 struct ide_cmd cmd;
772
773 int rqsize;
774 int irq;
775
776 unsigned long dma_base;
777
778 unsigned long config_data;
779 unsigned long select_data;
780
781 unsigned long extra_base;
782 unsigned extra_ports;
783
784 unsigned present : 1;
785 unsigned busy : 1;
786
787 struct device gendev;
788 struct device *portdev;
789
790 struct completion gendev_rel_comp;
791
792 void *hwif_data;
793
794#ifdef CONFIG_BLK_DEV_IDEACPI
795 struct ide_acpi_hwif_link *acpidata;
796#endif
797
798
799 ide_startstop_t (*handler)(ide_drive_t *);
800
801
802 unsigned int polling : 1;
803
804
805 ide_drive_t *cur_dev;
806
807
808 struct request *rq;
809
810
811 struct timer_list timer;
812
813 unsigned long poll_timeout;
814
815 int (*expiry)(ide_drive_t *);
816
817 int req_gen;
818 int req_gen_timer;
819
820 spinlock_t lock;
821} ____cacheline_internodealigned_in_smp ide_hwif_t;
822
823#define MAX_HOST_PORTS 4
824
825struct ide_host {
826 ide_hwif_t *ports[MAX_HOST_PORTS + 1];
827 unsigned int n_ports;
828 struct device *dev[2];
829
830 int (*init_chipset)(struct pci_dev *);
831
832 void (*get_lock)(irq_handler_t, void *);
833 void (*release_lock)(void);
834
835 irq_handler_t irq_handler;
836
837 unsigned long host_flags;
838
839 int irq_flags;
840
841 void *host_priv;
842 ide_hwif_t *cur_port;
843
844
845 volatile unsigned long host_busy;
846};
847
848#define IDE_HOST_BUSY 0
849
850
851
852
853typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
854typedef int (ide_expiry_t)(ide_drive_t *);
855
856
857typedef void (xfer_func_t)(ide_drive_t *, struct ide_cmd *, void *, unsigned);
858
859extern struct mutex ide_setting_mtx;
860
861
862
863
864
865#define DS_SYNC BIT(0)
866
867struct ide_devset {
868 int (*get)(ide_drive_t *);
869 int (*set)(ide_drive_t *, int);
870 unsigned int flags;
871};
872
873#define __DEVSET(_flags, _get, _set) { \
874 .flags = _flags, \
875 .get = _get, \
876 .set = _set, \
877}
878
879#define ide_devset_get(name, field) \
880static int get_##name(ide_drive_t *drive) \
881{ \
882 return drive->field; \
883}
884
885#define ide_devset_set(name, field) \
886static int set_##name(ide_drive_t *drive, int arg) \
887{ \
888 drive->field = arg; \
889 return 0; \
890}
891
892#define ide_devset_get_flag(name, flag) \
893static int get_##name(ide_drive_t *drive) \
894{ \
895 return !!(drive->dev_flags & flag); \
896}
897
898#define ide_devset_set_flag(name, flag) \
899static int set_##name(ide_drive_t *drive, int arg) \
900{ \
901 if (arg) \
902 drive->dev_flags |= flag; \
903 else \
904 drive->dev_flags &= ~flag; \
905 return 0; \
906}
907
908#define __IDE_DEVSET(_name, _flags, _get, _set) \
909const struct ide_devset ide_devset_##_name = \
910 __DEVSET(_flags, _get, _set)
911
912#define IDE_DEVSET(_name, _flags, _get, _set) \
913static __IDE_DEVSET(_name, _flags, _get, _set)
914
915#define ide_devset_rw(_name, _func) \
916IDE_DEVSET(_name, 0, get_##_func, set_##_func)
917
918#define ide_devset_w(_name, _func) \
919IDE_DEVSET(_name, 0, NULL, set_##_func)
920
921#define ide_ext_devset_rw(_name, _func) \
922__IDE_DEVSET(_name, 0, get_##_func, set_##_func)
923
924#define ide_ext_devset_rw_sync(_name, _func) \
925__IDE_DEVSET(_name, DS_SYNC, get_##_func, set_##_func)
926
927#define ide_decl_devset(_name) \
928extern const struct ide_devset ide_devset_##_name
929
930ide_decl_devset(io_32bit);
931ide_decl_devset(keepsettings);
932ide_decl_devset(pio_mode);
933ide_decl_devset(unmaskirq);
934ide_decl_devset(using_dma);
935
936#ifdef CONFIG_IDE_PROC_FS
937
938
939
940
941#define ide_devset_rw_field(_name, _field) \
942ide_devset_get(_name, _field); \
943ide_devset_set(_name, _field); \
944IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
945
946#define ide_devset_ro_field(_name, _field) \
947ide_devset_get(_name, _field); \
948IDE_DEVSET(_name, 0, get_##_name, NULL)
949
950#define ide_devset_rw_flag(_name, _field) \
951ide_devset_get_flag(_name, _field); \
952ide_devset_set_flag(_name, _field); \
953IDE_DEVSET(_name, DS_SYNC, get_##_name, set_##_name)
954
955struct ide_proc_devset {
956 const char *name;
957 const struct ide_devset *setting;
958 int min, max;
959 int (*mulf)(ide_drive_t *);
960 int (*divf)(ide_drive_t *);
961};
962
963#define __IDE_PROC_DEVSET(_name, _min, _max, _mulf, _divf) { \
964 .name = __stringify(_name), \
965 .setting = &ide_devset_##_name, \
966 .min = _min, \
967 .max = _max, \
968 .mulf = _mulf, \
969 .divf = _divf, \
970}
971
972#define IDE_PROC_DEVSET(_name, _min, _max) \
973__IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
974
975typedef struct {
976 const char *name;
977 umode_t mode;
978 int (*show)(struct seq_file *, void *);
979} ide_proc_entry_t;
980
981void proc_ide_create(void);
982void proc_ide_destroy(void);
983void ide_proc_register_port(ide_hwif_t *);
984void ide_proc_port_register_devices(ide_hwif_t *);
985void ide_proc_unregister_device(ide_drive_t *);
986void ide_proc_unregister_port(ide_hwif_t *);
987void ide_proc_register_driver(ide_drive_t *, struct ide_driver *);
988void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *);
989
990int ide_capacity_proc_show(struct seq_file *m, void *v);
991int ide_geometry_proc_show(struct seq_file *m, void *v);
992#else
993static inline void proc_ide_create(void) { ; }
994static inline void proc_ide_destroy(void) { ; }
995static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
996static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
997static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
998static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
999static inline void ide_proc_register_driver(ide_drive_t *drive,
1000 struct ide_driver *driver) { ; }
1001static inline void ide_proc_unregister_driver(ide_drive_t *drive,
1002 struct ide_driver *driver) { ; }
1003#endif
1004
1005enum {
1006
1007 IDE_DBG_FUNC = BIT(0),
1008
1009 IDE_DBG_SENSE = BIT(1),
1010
1011 IDE_DBG_PC = BIT(2),
1012
1013 IDE_DBG_RQ = BIT(3),
1014
1015 IDE_DBG_PROBE = BIT(4),
1016};
1017
1018
1019#define __ide_debug_log(lvl, fmt, args...) \
1020{ \
1021 if (unlikely(drive->debug_mask & lvl)) \
1022 printk(KERN_INFO DRV_NAME ": %s: " fmt "\n", \
1023 __func__, ## args); \
1024}
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044enum {
1045 IDE_PM_START_SUSPEND,
1046 IDE_PM_FLUSH_CACHE = IDE_PM_START_SUSPEND,
1047 IDE_PM_STANDBY,
1048
1049 IDE_PM_START_RESUME,
1050 IDE_PM_RESTORE_PIO = IDE_PM_START_RESUME,
1051 IDE_PM_IDLE,
1052 IDE_PM_RESTORE_DMA,
1053
1054 IDE_PM_COMPLETED,
1055};
1056
1057int generic_ide_suspend(struct device *, pm_message_t);
1058int generic_ide_resume(struct device *);
1059
1060void ide_complete_power_step(ide_drive_t *, struct request *);
1061ide_startstop_t ide_start_power_step(ide_drive_t *, struct request *);
1062void ide_complete_pm_rq(ide_drive_t *, struct request *);
1063void ide_check_pm_state(ide_drive_t *, struct request *);
1064
1065
1066
1067
1068
1069
1070
1071struct ide_driver {
1072 const char *version;
1073 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
1074 struct device_driver gen_driver;
1075 int (*probe)(ide_drive_t *);
1076 void (*remove)(ide_drive_t *);
1077 void (*resume)(ide_drive_t *);
1078 void (*shutdown)(ide_drive_t *);
1079#ifdef CONFIG_IDE_PROC_FS
1080 ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
1081 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
1082#endif
1083};
1084
1085#define to_ide_driver(drv) container_of(drv, struct ide_driver, gen_driver)
1086
1087int ide_device_get(ide_drive_t *);
1088void ide_device_put(ide_drive_t *);
1089
1090struct ide_ioctl_devset {
1091 unsigned int get_ioctl;
1092 unsigned int set_ioctl;
1093 const struct ide_devset *setting;
1094};
1095
1096int ide_setting_ioctl(ide_drive_t *, struct block_device *, unsigned int,
1097 unsigned long, const struct ide_ioctl_devset *);
1098
1099int generic_ide_ioctl(ide_drive_t *, struct block_device *, unsigned, unsigned long);
1100
1101extern int ide_vlb_clk;
1102extern int ide_pci_clk;
1103
1104int ide_end_rq(ide_drive_t *, struct request *, blk_status_t, unsigned int);
1105void ide_kill_rq(ide_drive_t *, struct request *);
1106void ide_insert_request_head(ide_drive_t *, struct request *);
1107
1108void __ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int);
1109void ide_set_handler(ide_drive_t *, ide_handler_t *, unsigned int);
1110
1111void ide_execute_command(ide_drive_t *, struct ide_cmd *, ide_handler_t *,
1112 unsigned int);
1113
1114void ide_pad_transfer(ide_drive_t *, int, int);
1115
1116ide_startstop_t ide_error(ide_drive_t *, const char *, u8);
1117
1118void ide_fix_driveid(u16 *);
1119
1120extern void ide_fixstring(u8 *, const int, const int);
1121
1122int ide_busy_sleep(ide_drive_t *, unsigned long, int);
1123
1124int __ide_wait_stat(ide_drive_t *, u8, u8, unsigned long, u8 *);
1125int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
1126
1127ide_startstop_t ide_do_park_unpark(ide_drive_t *, struct request *);
1128ide_startstop_t ide_do_devset(ide_drive_t *, struct request *);
1129
1130extern ide_startstop_t ide_do_reset (ide_drive_t *);
1131
1132extern int ide_devset_execute(ide_drive_t *drive,
1133 const struct ide_devset *setting, int arg);
1134
1135void ide_complete_cmd(ide_drive_t *, struct ide_cmd *, u8, u8);
1136int ide_complete_rq(ide_drive_t *, blk_status_t, unsigned int);
1137
1138void ide_tf_readback(ide_drive_t *drive, struct ide_cmd *cmd);
1139void ide_tf_dump(const char *, struct ide_cmd *);
1140
1141void ide_exec_command(ide_hwif_t *, u8);
1142u8 ide_read_status(ide_hwif_t *);
1143u8 ide_read_altstatus(ide_hwif_t *);
1144void ide_write_devctl(ide_hwif_t *, u8);
1145
1146void ide_dev_select(ide_drive_t *);
1147void ide_tf_load(ide_drive_t *, struct ide_taskfile *, u8);
1148void ide_tf_read(ide_drive_t *, struct ide_taskfile *, u8);
1149
1150void ide_input_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
1151void ide_output_data(ide_drive_t *, struct ide_cmd *, void *, unsigned int);
1152
1153void SELECT_MASK(ide_drive_t *, int);
1154
1155u8 ide_read_error(ide_drive_t *);
1156void ide_read_bcount_and_ireason(ide_drive_t *, u16 *, u8 *);
1157
1158int ide_check_ireason(ide_drive_t *, struct request *, int, int, int);
1159
1160int ide_check_atapi_device(ide_drive_t *, const char *);
1161
1162void ide_init_pc(struct ide_atapi_pc *);
1163
1164
1165extern wait_queue_head_t ide_park_wq;
1166ssize_t ide_park_show(struct device *dev, struct device_attribute *attr,
1167 char *buf);
1168ssize_t ide_park_store(struct device *dev, struct device_attribute *attr,
1169 const char *buf, size_t len);
1170
1171
1172
1173
1174
1175
1176
1177enum {
1178 REQ_IDETAPE_PC1 = BIT(0),
1179 REQ_IDETAPE_PC2 = BIT(1),
1180 REQ_IDETAPE_READ = BIT(2),
1181 REQ_IDETAPE_WRITE = BIT(3),
1182};
1183
1184int ide_queue_pc_tail(ide_drive_t *, struct gendisk *, struct ide_atapi_pc *,
1185 void *, unsigned int);
1186
1187int ide_do_test_unit_ready(ide_drive_t *, struct gendisk *);
1188int ide_do_start_stop(ide_drive_t *, struct gendisk *, int);
1189int ide_set_media_lock(ide_drive_t *, struct gendisk *, int);
1190void ide_create_request_sense_cmd(ide_drive_t *, struct ide_atapi_pc *);
1191void ide_retry_pc(ide_drive_t *drive);
1192
1193void ide_prep_sense(ide_drive_t *drive, struct request *rq);
1194int ide_queue_sense_rq(ide_drive_t *drive, void *special);
1195
1196int ide_cd_expiry(ide_drive_t *);
1197
1198int ide_cd_get_xferlen(struct request *);
1199
1200ide_startstop_t ide_issue_pc(ide_drive_t *, struct ide_cmd *);
1201
1202ide_startstop_t do_rw_taskfile(ide_drive_t *, struct ide_cmd *);
1203
1204void ide_pio_bytes(ide_drive_t *, struct ide_cmd *, unsigned int, unsigned int);
1205
1206void ide_finish_cmd(ide_drive_t *, struct ide_cmd *, u8);
1207
1208int ide_raw_taskfile(ide_drive_t *, struct ide_cmd *, u8 *, u16);
1209int ide_no_data_taskfile(ide_drive_t *, struct ide_cmd *);
1210
1211int ide_taskfile_ioctl(ide_drive_t *, unsigned long);
1212
1213int ide_dev_read_id(ide_drive_t *, u8, u16 *, int);
1214
1215extern int ide_driveid_update(ide_drive_t *);
1216extern int ide_config_drive_speed(ide_drive_t *, u8);
1217extern u8 eighty_ninty_three (ide_drive_t *);
1218extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1219
1220extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1221
1222extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1223
1224extern void ide_timer_expiry(struct timer_list *t);
1225extern irqreturn_t ide_intr(int irq, void *dev_id);
1226extern blk_status_t ide_queue_rq(struct blk_mq_hw_ctx *, const struct blk_mq_queue_data *);
1227extern blk_status_t ide_issue_rq(ide_drive_t *, struct request *, bool);
1228extern void ide_requeue_and_plug(ide_drive_t *drive, struct request *rq);
1229
1230void ide_init_disk(struct gendisk *, ide_drive_t *);
1231
1232#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1233extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1234#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1235#else
1236#define ide_pci_register_driver(d) pci_register_driver(d)
1237#endif
1238
1239static inline int ide_pci_is_in_compatibility_mode(struct pci_dev *dev)
1240{
1241 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5)
1242 return 1;
1243 return 0;
1244}
1245
1246void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *,
1247 struct ide_hw *, struct ide_hw **);
1248void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1249
1250#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1251int ide_pci_set_master(struct pci_dev *, const char *);
1252unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
1253int ide_pci_check_simplex(ide_hwif_t *, const struct ide_port_info *);
1254int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
1255#else
1256static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1257 const struct ide_port_info *d)
1258{
1259 return -EINVAL;
1260}
1261#endif
1262
1263struct ide_pci_enablebit {
1264 u8 reg;
1265 u8 mask;
1266 u8 val;
1267};
1268
1269enum {
1270
1271 IDE_HFLAG_ISA_PORTS = BIT(0),
1272
1273 IDE_HFLAG_SINGLE = BIT(1),
1274
1275 IDE_HFLAG_PIO_NO_BLACKLIST = BIT(2),
1276
1277 IDE_HFLAG_QD_2ND_PORT = BIT(3),
1278
1279 IDE_HFLAG_ABUSE_PREFETCH = BIT(4),
1280
1281 IDE_HFLAG_ABUSE_FAST_DEVSEL = BIT(5),
1282
1283 IDE_HFLAG_ABUSE_DMA_MODES = BIT(6),
1284
1285
1286
1287
1288 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = BIT(7),
1289
1290 IDE_HFLAG_POST_SET_MODE = BIT(8),
1291
1292 IDE_HFLAG_NO_SET_MODE = BIT(9),
1293
1294 IDE_HFLAG_TRUST_BIOS_FOR_DMA = BIT(10),
1295
1296 IDE_HFLAG_CS5520 = BIT(11),
1297
1298 IDE_HFLAG_NO_ATAPI_DMA = BIT(12),
1299
1300 IDE_HFLAG_NON_BOOTABLE = BIT(13),
1301
1302 IDE_HFLAG_NO_DMA = BIT(14),
1303
1304 IDE_HFLAG_NO_AUTODMA = BIT(15),
1305
1306 IDE_HFLAG_MMIO = BIT(16),
1307
1308 IDE_HFLAG_NO_LBA48 = BIT(17),
1309
1310 IDE_HFLAG_NO_LBA48_DMA = BIT(18),
1311
1312 IDE_HFLAG_ERROR_STOPS_FIFO = BIT(19),
1313
1314 IDE_HFLAG_SERIALIZE = BIT(20),
1315
1316 IDE_HFLAG_DTC2278 = BIT(21),
1317
1318 IDE_HFLAG_4DRIVES = BIT(22),
1319
1320 IDE_HFLAG_TRM290 = BIT(23),
1321
1322 IDE_HFLAG_IO_32BIT = BIT(24),
1323
1324 IDE_HFLAG_UNMASK_IRQS = BIT(25),
1325 IDE_HFLAG_BROKEN_ALTSTATUS = BIT(26),
1326
1327 IDE_HFLAG_SERIALIZE_DMA = BIT(27),
1328
1329 IDE_HFLAG_CLEAR_SIMPLEX = BIT(28),
1330
1331 IDE_HFLAG_NO_DSC = BIT(29),
1332
1333 IDE_HFLAG_NO_IO_32BIT = BIT(30),
1334
1335 IDE_HFLAG_NO_UNMASK_IRQS = BIT(31),
1336};
1337
1338#ifdef CONFIG_BLK_DEV_OFFBOARD
1339# define IDE_HFLAG_OFF_BOARD 0
1340#else
1341# define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
1342#endif
1343
1344struct ide_port_info {
1345 char *name;
1346
1347 int (*init_chipset)(struct pci_dev *);
1348
1349 void (*get_lock)(irq_handler_t, void *);
1350 void (*release_lock)(void);
1351
1352 void (*init_iops)(ide_hwif_t *);
1353 void (*init_hwif)(ide_hwif_t *);
1354 int (*init_dma)(ide_hwif_t *,
1355 const struct ide_port_info *);
1356
1357 const struct ide_tp_ops *tp_ops;
1358 const struct ide_port_ops *port_ops;
1359 const struct ide_dma_ops *dma_ops;
1360
1361 struct ide_pci_enablebit enablebits[2];
1362
1363 hwif_chipset_t chipset;
1364
1365 u16 max_sectors;
1366
1367 u32 host_flags;
1368
1369 int irq_flags;
1370
1371 u8 pio_mask;
1372 u8 swdma_mask;
1373 u8 mwdma_mask;
1374 u8 udma_mask;
1375};
1376
1377
1378
1379
1380
1381struct ide_pm_state {
1382
1383 int pm_step;
1384
1385 u32 pm_state;
1386 void* data;
1387};
1388
1389
1390int ide_pci_init_one(struct pci_dev *, const struct ide_port_info *, void *);
1391int ide_pci_init_two(struct pci_dev *, struct pci_dev *,
1392 const struct ide_port_info *, void *);
1393void ide_pci_remove(struct pci_dev *);
1394
1395#ifdef CONFIG_PM
1396int ide_pci_suspend(struct pci_dev *, pm_message_t);
1397int ide_pci_resume(struct pci_dev *);
1398#else
1399#define ide_pci_suspend NULL
1400#define ide_pci_resume NULL
1401#endif
1402
1403void ide_map_sg(ide_drive_t *, struct ide_cmd *);
1404void ide_init_sg_cmd(struct ide_cmd *, unsigned int);
1405
1406#define BAD_DMA_DRIVE 0
1407#define GOOD_DMA_DRIVE 1
1408
1409struct drive_list_entry {
1410 const char *id_model;
1411 const char *id_firmware;
1412};
1413
1414int ide_in_drive_list(u16 *, const struct drive_list_entry *);
1415
1416#ifdef CONFIG_BLK_DEV_IDEDMA
1417int ide_dma_good_drive(ide_drive_t *);
1418int __ide_dma_bad_drive(ide_drive_t *);
1419
1420u8 ide_find_dma_mode(ide_drive_t *, u8);
1421
1422static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1423{
1424 return ide_find_dma_mode(drive, XFER_UDMA_6);
1425}
1426
1427void ide_dma_off_quietly(ide_drive_t *);
1428void ide_dma_off(ide_drive_t *);
1429void ide_dma_on(ide_drive_t *);
1430int ide_set_dma(ide_drive_t *);
1431void ide_check_dma_crc(ide_drive_t *);
1432ide_startstop_t ide_dma_intr(ide_drive_t *);
1433
1434int ide_allocate_dma_engine(ide_hwif_t *);
1435void ide_release_dma_engine(ide_hwif_t *);
1436
1437int ide_dma_prepare(ide_drive_t *, struct ide_cmd *);
1438void ide_dma_unmap_sg(ide_drive_t *, struct ide_cmd *);
1439
1440#ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1441int config_drive_for_dma(ide_drive_t *);
1442int ide_build_dmatable(ide_drive_t *, struct ide_cmd *);
1443void ide_dma_host_set(ide_drive_t *, int);
1444int ide_dma_setup(ide_drive_t *, struct ide_cmd *);
1445extern void ide_dma_start(ide_drive_t *);
1446int ide_dma_end(ide_drive_t *);
1447int ide_dma_test_irq(ide_drive_t *);
1448int ide_dma_sff_timer_expiry(ide_drive_t *);
1449u8 ide_dma_sff_read_status(ide_hwif_t *);
1450extern const struct ide_dma_ops sff_dma_ops;
1451#else
1452static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
1453#endif
1454
1455void ide_dma_lost_irq(ide_drive_t *);
1456ide_startstop_t ide_dma_timeout_retry(ide_drive_t *, int);
1457
1458#else
1459static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1460static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1461static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
1462static inline void ide_dma_off(ide_drive_t *drive) { ; }
1463static inline void ide_dma_on(ide_drive_t *drive) { ; }
1464static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1465static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1466static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1467static inline ide_startstop_t ide_dma_intr(ide_drive_t *drive) { return ide_stopped; }
1468static inline ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) { return ide_stopped; }
1469static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
1470static inline int ide_dma_prepare(ide_drive_t *drive,
1471 struct ide_cmd *cmd) { return 1; }
1472static inline void ide_dma_unmap_sg(ide_drive_t *drive,
1473 struct ide_cmd *cmd) { ; }
1474#endif
1475
1476#ifdef CONFIG_BLK_DEV_IDEACPI
1477int ide_acpi_init(void);
1478bool ide_port_acpi(ide_hwif_t *hwif);
1479extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1480extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1481extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1482void ide_acpi_init_port(ide_hwif_t *);
1483void ide_acpi_port_init_devices(ide_hwif_t *);
1484extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1485#else
1486static inline int ide_acpi_init(void) { return 0; }
1487static inline bool ide_port_acpi(ide_hwif_t *hwif) { return 0; }
1488static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1489static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1490static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1491static inline void ide_acpi_init_port(ide_hwif_t *hwif) { ; }
1492static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
1493static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1494#endif
1495
1496void ide_check_nien_quirk_list(ide_drive_t *);
1497void ide_undecoded_slave(ide_drive_t *);
1498
1499void ide_port_apply_params(ide_hwif_t *);
1500int ide_sysfs_register_port(ide_hwif_t *);
1501
1502struct ide_host *ide_host_alloc(const struct ide_port_info *, struct ide_hw **,
1503 unsigned int);
1504void ide_host_free(struct ide_host *);
1505int ide_host_register(struct ide_host *, const struct ide_port_info *,
1506 struct ide_hw **);
1507int ide_host_add(const struct ide_port_info *, struct ide_hw **, unsigned int,
1508 struct ide_host **);
1509void ide_host_remove(struct ide_host *);
1510int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
1511void ide_port_unregister_devices(ide_hwif_t *);
1512void ide_port_scan(ide_hwif_t *);
1513
1514static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1515{
1516 return hwif->hwif_data;
1517}
1518
1519static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1520{
1521 hwif->hwif_data = data;
1522}
1523
1524u64 ide_get_lba_addr(struct ide_cmd *, int);
1525u8 ide_dump_status(ide_drive_t *, const char *, u8);
1526
1527struct ide_timing {
1528 u8 mode;
1529 u8 setup;
1530 u16 act8b;
1531 u16 rec8b;
1532 u16 cyc8b;
1533 u16 active;
1534 u16 recover;
1535 u16 cycle;
1536 u16 udma;
1537};
1538
1539enum {
1540 IDE_TIMING_SETUP = BIT(0),
1541 IDE_TIMING_ACT8B = BIT(1),
1542 IDE_TIMING_REC8B = BIT(2),
1543 IDE_TIMING_CYC8B = BIT(3),
1544 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1545 IDE_TIMING_CYC8B,
1546 IDE_TIMING_ACTIVE = BIT(4),
1547 IDE_TIMING_RECOVER = BIT(5),
1548 IDE_TIMING_CYCLE = BIT(6),
1549 IDE_TIMING_UDMA = BIT(7),
1550 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1551 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1552 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1553};
1554
1555struct ide_timing *ide_timing_find_mode(u8);
1556u16 ide_pio_cycle_time(ide_drive_t *, u8);
1557void ide_timing_merge(struct ide_timing *, struct ide_timing *,
1558 struct ide_timing *, unsigned int);
1559int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
1560
1561#ifdef CONFIG_IDE_XFER_MODE
1562int ide_scan_pio_blacklist(char *);
1563const char *ide_xfer_verbose(u8);
1564int ide_pio_need_iordy(ide_drive_t *, const u8);
1565int ide_set_pio_mode(ide_drive_t *, u8);
1566int ide_set_dma_mode(ide_drive_t *, u8);
1567void ide_set_pio(ide_drive_t *, u8);
1568int ide_set_xfer_rate(ide_drive_t *, u8);
1569#else
1570static inline void ide_set_pio(ide_drive_t *drive, u8 pio) { ; }
1571static inline int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) { return -1; }
1572#endif
1573
1574static inline void ide_set_max_pio(ide_drive_t *drive)
1575{
1576 ide_set_pio(drive, 255);
1577}
1578
1579char *ide_media_string(ide_drive_t *);
1580
1581extern const struct attribute_group *ide_dev_groups[];
1582extern struct bus_type ide_bus_type;
1583extern struct class *ide_port_class;
1584
1585static inline void ide_dump_identify(u8 *id)
1586{
1587 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1588}
1589
1590static inline int hwif_to_node(ide_hwif_t *hwif)
1591{
1592 return hwif->dev ? dev_to_node(hwif->dev) : -1;
1593}
1594
1595static inline ide_drive_t *ide_get_pair_dev(ide_drive_t *drive)
1596{
1597 ide_drive_t *peer = drive->hwif->devices[(drive->dn ^ 1) & 1];
1598
1599 return (peer->dev_flags & IDE_DFLAG_PRESENT) ? peer : NULL;
1600}
1601
1602static inline void *ide_get_drivedata(ide_drive_t *drive)
1603{
1604 return drive->drive_data;
1605}
1606
1607static inline void ide_set_drivedata(ide_drive_t *drive, void *data)
1608{
1609 drive->drive_data = data;
1610}
1611
1612#define ide_port_for_each_dev(i, dev, port) \
1613 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++)
1614
1615#define ide_port_for_each_present_dev(i, dev, port) \
1616 for ((i) = 0; ((dev) = (port)->devices[i]) || (i) < MAX_DRIVES; (i)++) \
1617 if ((dev)->dev_flags & IDE_DFLAG_PRESENT)
1618
1619#define ide_host_for_each_port(i, port, host) \
1620 for ((i) = 0; ((port) = (host)->ports[i]) || (i) < MAX_HOST_PORTS; (i)++)
1621
1622
1623#endif
1624