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13#ifndef __CROS_EC_COMMANDS_H
14#define __CROS_EC_COMMANDS_H
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18
19#define BUILD_ASSERT(_cond)
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26
27
28#define EC_PROTO_VERSION 0x00000002
29
30
31#define EC_VER_MASK(version) BIT(version)
32
33
34#define EC_LPC_ADDR_ACPI_DATA 0x62
35#define EC_LPC_ADDR_ACPI_CMD 0x66
36
37
38#define EC_LPC_ADDR_HOST_DATA 0x200
39#define EC_LPC_ADDR_HOST_CMD 0x204
40
41
42
43#define EC_LPC_ADDR_HOST_ARGS 0x800
44#define EC_LPC_ADDR_HOST_PARAM 0x804
45
46
47
48#define EC_LPC_ADDR_HOST_PACKET 0x800
49#define EC_LPC_HOST_PACKET_SIZE 0x100
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54
55#define EC_HOST_CMD_REGION0 0x800
56#define EC_HOST_CMD_REGION1 0x880
57#define EC_HOST_CMD_REGION_SIZE 0x80
58
59
60#define EC_LPC_CMDR_DATA BIT(0)
61#define EC_LPC_CMDR_PENDING BIT(1)
62#define EC_LPC_CMDR_BUSY BIT(2)
63#define EC_LPC_CMDR_CMD BIT(3)
64#define EC_LPC_CMDR_ACPI_BRST BIT(4)
65#define EC_LPC_CMDR_SCI BIT(5)
66#define EC_LPC_CMDR_SMI BIT(6)
67
68#define EC_LPC_ADDR_MEMMAP 0x900
69#define EC_MEMMAP_SIZE 255
70#define EC_MEMMAP_TEXT_MAX 8
71
72
73#define EC_MEMMAP_TEMP_SENSOR 0x00
74#define EC_MEMMAP_FAN 0x10
75#define EC_MEMMAP_TEMP_SENSOR_B 0x18
76#define EC_MEMMAP_ID 0x20
77#define EC_MEMMAP_ID_VERSION 0x22
78#define EC_MEMMAP_THERMAL_VERSION 0x23
79#define EC_MEMMAP_BATTERY_VERSION 0x24
80#define EC_MEMMAP_SWITCHES_VERSION 0x25
81#define EC_MEMMAP_EVENTS_VERSION 0x26
82#define EC_MEMMAP_HOST_CMD_FLAGS 0x27
83
84#define EC_MEMMAP_SWITCHES 0x30
85
86#define EC_MEMMAP_HOST_EVENTS 0x34
87
88#define EC_MEMMAP_BATT_VOLT 0x40
89#define EC_MEMMAP_BATT_RATE 0x44
90#define EC_MEMMAP_BATT_CAP 0x48
91#define EC_MEMMAP_BATT_FLAG 0x4c
92#define EC_MEMMAP_BATT_COUNT 0x4d
93#define EC_MEMMAP_BATT_INDEX 0x4e
94
95#define EC_MEMMAP_BATT_DCAP 0x50
96#define EC_MEMMAP_BATT_DVLT 0x54
97#define EC_MEMMAP_BATT_LFCC 0x58
98#define EC_MEMMAP_BATT_CCNT 0x5c
99
100#define EC_MEMMAP_BATT_MFGR 0x60
101#define EC_MEMMAP_BATT_MODEL 0x68
102#define EC_MEMMAP_BATT_SERIAL 0x70
103#define EC_MEMMAP_BATT_TYPE 0x78
104#define EC_MEMMAP_ALS 0x80
105
106#define EC_MEMMAP_ACC_STATUS 0x90
107
108#define EC_MEMMAP_ACC_DATA 0x92
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111
112#define EC_MEMMAP_GYRO_DATA 0xa0
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120#define EC_MEMMAP_NO_ACPI 0xe0
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123#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
124#define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4)
125#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7)
126
127
128#define EC_TEMP_SENSOR_ENTRIES 16
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133
134#define EC_TEMP_SENSOR_B_ENTRIES 8
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136
137#define EC_TEMP_SENSOR_NOT_PRESENT 0xff
138#define EC_TEMP_SENSOR_ERROR 0xfe
139#define EC_TEMP_SENSOR_NOT_POWERED 0xfd
140#define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
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145#define EC_TEMP_SENSOR_OFFSET 200
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150#define EC_ALS_ENTRIES 2
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157#define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
158
159#define EC_FAN_SPEED_ENTRIES 4
160#define EC_FAN_SPEED_NOT_PRESENT 0xffff
161#define EC_FAN_SPEED_STALLED 0xfffe
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163
164#define EC_BATT_FLAG_AC_PRESENT 0x01
165#define EC_BATT_FLAG_BATT_PRESENT 0x02
166#define EC_BATT_FLAG_DISCHARGING 0x04
167#define EC_BATT_FLAG_CHARGING 0x08
168#define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
169
170#define EC_BATT_FLAG_INVALID_DATA 0x20
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172
173#define EC_SWITCH_LID_OPEN 0x01
174#define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
175#define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
176
177#define EC_SWITCH_IGNORE1 0x08
178
179#define EC_SWITCH_DEDICATED_RECOVERY 0x10
180
181#define EC_SWITCH_IGNORE0 0x20
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184
185#define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
186
187#define EC_HOST_CMD_FLAG_VERSION_3 0x02
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189
190#define EC_WIRELESS_SWITCH_ALL ~0x00
191#define EC_WIRELESS_SWITCH_WLAN 0x01
192#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02
193#define EC_WIRELESS_SWITCH_WWAN 0x04
194#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08
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216#define EC_CMD_ACPI_READ 0x0080
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231#define EC_CMD_ACPI_WRITE 0x0081
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240#define EC_CMD_ACPI_BURST_ENABLE 0x0082
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248#define EC_CMD_ACPI_BURST_DISABLE 0x0083
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257#define EC_CMD_ACPI_QUERY_EVENT 0x0084
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262#define EC_ACPI_MEM_VERSION 0x00
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267#define EC_ACPI_MEM_TEST 0x01
268
269#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
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272#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
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274#define EC_ACPI_MEM_FAN_DUTY 0x04
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291#define EC_ACPI_MEM_TEMP_ID 0x05
292#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
293#define EC_ACPI_MEM_TEMP_COMMIT 0x07
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300#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0)
301#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1)
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318#define EC_ACPI_MEM_CHARGING_LIMIT 0x08
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321#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
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323#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
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335#define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
336#define EC_ACPI_MEM_TBMD_SHIFT 0
337#define EC_ACPI_MEM_TBMD_MASK 0x1
338#define EC_ACPI_MEM_DDPN_SHIFT 1
339#define EC_ACPI_MEM_DDPN_MASK 0x7
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353#define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a
354#define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b
355#define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c
356#define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d
357#define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e
358#define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f
359#define EC_ACPI_MEM_DEVICE_FEATURES6 0x10
360#define EC_ACPI_MEM_DEVICE_FEATURES7 0x11
361
362#define EC_ACPI_MEM_BATTERY_INDEX 0x12
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371#define EC_ACPI_MEM_USB_PORT_POWER 0x13
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377#define EC_ACPI_MEM_MAPPED_BEGIN 0x20
378#define EC_ACPI_MEM_MAPPED_SIZE 0xe0
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380
381#define EC_ACPI_MEM_VERSION_CURRENT 2
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423#define __ec_align1 __packed
424#define __ec_align2 __packed
425#define __ec_align4 __packed
426#define __ec_align_size1 __packed
427#define __ec_align_offset1 __packed
428#define __ec_align_offset2 __packed
429#define __ec_todo_packed __packed
430#define __ec_todo_unpacked
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434
435#define EC_LPC_STATUS_TO_HOST 0x01
436
437#define EC_LPC_STATUS_FROM_HOST 0x02
438
439#define EC_LPC_STATUS_PROCESSING 0x04
440
441#define EC_LPC_STATUS_LAST_CMD 0x08
442
443#define EC_LPC_STATUS_BURST_MODE 0x10
444
445#define EC_LPC_STATUS_SCI_PENDING 0x20
446
447#define EC_LPC_STATUS_SMI_PENDING 0x40
448
449#define EC_LPC_STATUS_RESERVED 0x80
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455#define EC_LPC_STATUS_BUSY_MASK \
456 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
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461
462enum ec_status {
463 EC_RES_SUCCESS = 0,
464 EC_RES_INVALID_COMMAND = 1,
465 EC_RES_ERROR = 2,
466 EC_RES_INVALID_PARAM = 3,
467 EC_RES_ACCESS_DENIED = 4,
468 EC_RES_INVALID_RESPONSE = 5,
469 EC_RES_INVALID_VERSION = 6,
470 EC_RES_INVALID_CHECKSUM = 7,
471 EC_RES_IN_PROGRESS = 8,
472 EC_RES_UNAVAILABLE = 9,
473 EC_RES_TIMEOUT = 10,
474 EC_RES_OVERFLOW = 11,
475 EC_RES_INVALID_HEADER = 12,
476 EC_RES_REQUEST_TRUNCATED = 13,
477 EC_RES_RESPONSE_TOO_BIG = 14,
478 EC_RES_BUS_ERROR = 15,
479 EC_RES_BUSY = 16,
480 EC_RES_INVALID_HEADER_VERSION = 17,
481 EC_RES_INVALID_HEADER_CRC = 18,
482 EC_RES_INVALID_DATA_CRC = 19,
483 EC_RES_DUP_UNAVAILABLE = 20,
484};
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493enum host_event_code {
494 EC_HOST_EVENT_LID_CLOSED = 1,
495 EC_HOST_EVENT_LID_OPEN = 2,
496 EC_HOST_EVENT_POWER_BUTTON = 3,
497 EC_HOST_EVENT_AC_CONNECTED = 4,
498 EC_HOST_EVENT_AC_DISCONNECTED = 5,
499 EC_HOST_EVENT_BATTERY_LOW = 6,
500 EC_HOST_EVENT_BATTERY_CRITICAL = 7,
501 EC_HOST_EVENT_BATTERY = 8,
502 EC_HOST_EVENT_THERMAL_THRESHOLD = 9,
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504 EC_HOST_EVENT_DEVICE = 10,
505 EC_HOST_EVENT_THERMAL = 11,
506 EC_HOST_EVENT_USB_CHARGER = 12,
507 EC_HOST_EVENT_KEY_PRESSED = 13,
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513 EC_HOST_EVENT_INTERFACE_READY = 14,
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515 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
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518 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,
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520 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
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523 EC_HOST_EVENT_THROTTLE_START = 18,
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525 EC_HOST_EVENT_THROTTLE_STOP = 19,
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528 EC_HOST_EVENT_HANG_DETECT = 20,
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530 EC_HOST_EVENT_HANG_REBOOT = 21,
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533 EC_HOST_EVENT_PD_MCU = 22,
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536 EC_HOST_EVENT_BATTERY_STATUS = 23,
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539 EC_HOST_EVENT_PANIC = 24,
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542 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25,
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545 EC_HOST_EVENT_RTC = 26,
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548 EC_HOST_EVENT_MKBP = 27,
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551 EC_HOST_EVENT_USB_MUX = 28,
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554 EC_HOST_EVENT_MODE_CHANGE = 29,
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557 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,
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560 EC_HOST_EVENT_WOV = 31,
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569 EC_HOST_EVENT_INVALID = 32
570};
571
572#define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1)
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582struct ec_lpc_host_args {
583 uint8_t flags;
584 uint8_t command_version;
585 uint8_t data_size;
586 uint8_t checksum;
587} __ec_align4;
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599#define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
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607#define EC_HOST_ARGS_FLAG_TO_HOST 0x02
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649#define EC_SPI_FRAME_START 0xec
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654#define EC_SPI_PAST_END 0xed
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661#define EC_SPI_RX_READY 0xf8
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667#define EC_SPI_RECEIVING 0xf9
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670#define EC_SPI_PROCESSING 0xfa
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676#define EC_SPI_RX_BAD_DATA 0xfb
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683#define EC_SPI_NOT_READY 0xfc
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690#define EC_SPI_OLD_READY 0xfd
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710#define EC_PROTO2_REQUEST_HEADER_BYTES 3
711#define EC_PROTO2_REQUEST_TRAILER_BYTES 1
712#define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \
713 EC_PROTO2_REQUEST_TRAILER_BYTES)
714
715#define EC_PROTO2_RESPONSE_HEADER_BYTES 2
716#define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
717#define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \
718 EC_PROTO2_RESPONSE_TRAILER_BYTES)
719
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721#define EC_PROTO2_MAX_PARAM_SIZE 0xfc
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724#define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \
725 EC_PROTO2_MAX_PARAM_SIZE)
726#define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \
727 EC_PROTO2_MAX_PARAM_SIZE)
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735#define EC_COMMAND_PROTOCOL_3 0xda
736
737#define EC_HOST_REQUEST_VERSION 3
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751struct ec_host_request {
752 uint8_t struct_version;
753 uint8_t checksum;
754 uint16_t command;
755 uint8_t command_version;
756 uint8_t reserved;
757 uint16_t data_len;
758} __ec_align4;
759
760#define EC_HOST_RESPONSE_VERSION 3
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771struct ec_host_response {
772 uint8_t struct_version;
773 uint8_t checksum;
774 uint16_t result;
775 uint16_t data_len;
776 uint16_t reserved;
777} __ec_align4;
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840struct ec_host_request4 {
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847 uint8_t fields0;
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854 uint8_t fields1;
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857 uint16_t command;
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860 uint16_t data_len;
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863 uint8_t reserved;
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866 uint8_t header_crc;
867} __ec_align4;
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870struct ec_host_response4 {
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877 uint8_t fields0;
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883 uint8_t fields1;
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886 uint16_t result;
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889 uint16_t data_len;
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892 uint8_t reserved;
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895 uint8_t header_crc;
896} __ec_align4;
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899#define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f
900#define EC_PACKET4_0_IS_RESPONSE_MASK 0x10
901#define EC_PACKET4_0_SEQ_NUM_SHIFT 5
902#define EC_PACKET4_0_SEQ_NUM_MASK 0x60
903#define EC_PACKET4_0_SEQ_DUP_MASK 0x80
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906#define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f
907#define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80
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931#define EC_CMD_PROTO_VERSION 0x0000
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937struct ec_response_proto_version {
938 uint32_t version;
939} __ec_align4;
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945#define EC_CMD_HELLO 0x0001
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951struct ec_params_hello {
952 uint32_t in_data;
953} __ec_align4;
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959struct ec_response_hello {
960 uint32_t out_data;
961} __ec_align4;
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964#define EC_CMD_GET_VERSION 0x0002
965
966enum ec_current_image {
967 EC_IMAGE_UNKNOWN = 0,
968 EC_IMAGE_RO,
969 EC_IMAGE_RW
970};
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979struct ec_response_get_version {
980 char version_string_ro[32];
981 char version_string_rw[32];
982 char reserved[32];
983 uint32_t current_image;
984} __ec_align4;
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987#define EC_CMD_READ_TEST 0x0003
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994struct ec_params_read_test {
995 uint32_t offset;
996 uint32_t size;
997} __ec_align4;
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1003struct ec_response_read_test {
1004 uint32_t data[32];
1005} __ec_align4;
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1012#define EC_CMD_GET_BUILD_INFO 0x0004
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1015#define EC_CMD_GET_CHIP_INFO 0x0005
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1023struct ec_response_get_chip_info {
1024 char vendor[32];
1025 char name[32];
1026 char revision[32];
1027} __ec_align4;
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1030#define EC_CMD_GET_BOARD_VERSION 0x0006
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1036struct ec_response_board_version {
1037 uint16_t board_version;
1038} __ec_align2;
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1048#define EC_CMD_READ_MEMMAP 0x0007
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1055struct ec_params_read_memmap {
1056 uint8_t offset;
1057 uint8_t size;
1058} __ec_align1;
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1061#define EC_CMD_GET_CMD_VERSIONS 0x0008
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1067struct ec_params_get_cmd_versions {
1068 uint8_t cmd;
1069} __ec_align1;
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1076struct ec_params_get_cmd_versions_v1 {
1077 uint16_t cmd;
1078} __ec_align2;
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1085struct ec_response_get_cmd_versions {
1086 uint32_t version_mask;
1087} __ec_align4;
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1096#define EC_CMD_GET_COMMS_STATUS 0x0009
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1099enum ec_comms_status {
1100 EC_COMMS_STATUS_PROCESSING = BIT(0),
1101};
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1108struct ec_response_get_comms_status {
1109 uint32_t flags;
1110} __ec_align4;
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1113#define EC_CMD_TEST_PROTOCOL 0x000A
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1116struct ec_params_test_protocol {
1117 uint32_t ec_result;
1118 uint32_t ret_len;
1119 uint8_t buf[32];
1120} __ec_align4;
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1123struct ec_response_test_protocol {
1124 uint8_t buf[32];
1125} __ec_align4;
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1128#define EC_CMD_GET_PROTOCOL_INFO 0x000B
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1132#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0)
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1142struct ec_response_get_protocol_info {
1143
1144 uint32_t protocol_versions;
1145 uint16_t max_request_packet_size;
1146 uint16_t max_response_packet_size;
1147 uint32_t flags;
1148} __ec_align4;
1149
1150
1151
1152
1153
1154
1155#define EC_GSV_SET 0x80000000
1156
1157
1158
1159
1160
1161#define EC_GSV_PARAM_MASK 0x00ffffff
1162
1163struct ec_params_get_set_value {
1164 uint32_t flags;
1165 uint32_t value;
1166} __ec_align4;
1167
1168struct ec_response_get_set_value {
1169 uint32_t flags;
1170 uint32_t value;
1171} __ec_align4;
1172
1173
1174#define EC_CMD_GSV_PAUSE_IN_S5 0x000C
1175
1176
1177
1178#define EC_CMD_GET_FEATURES 0x000D
1179
1180
1181enum ec_feature_code {
1182
1183
1184
1185
1186 EC_FEATURE_LIMITED = 0,
1187
1188
1189
1190
1191 EC_FEATURE_FLASH = 1,
1192
1193
1194
1195 EC_FEATURE_PWM_FAN = 2,
1196
1197
1198
1199 EC_FEATURE_PWM_KEYB = 3,
1200
1201
1202
1203 EC_FEATURE_LIGHTBAR = 4,
1204
1205 EC_FEATURE_LED = 5,
1206
1207
1208
1209
1210 EC_FEATURE_MOTION_SENSE = 6,
1211
1212 EC_FEATURE_KEYB = 7,
1213
1214 EC_FEATURE_PSTORE = 8,
1215
1216 EC_FEATURE_PORT80 = 9,
1217
1218
1219
1220
1221 EC_FEATURE_THERMAL = 10,
1222
1223 EC_FEATURE_BKLIGHT_SWITCH = 11,
1224
1225 EC_FEATURE_WIFI_SWITCH = 12,
1226
1227 EC_FEATURE_HOST_EVENTS = 13,
1228
1229 EC_FEATURE_GPIO = 14,
1230
1231 EC_FEATURE_I2C = 15,
1232
1233 EC_FEATURE_CHARGER = 16,
1234
1235 EC_FEATURE_BATTERY = 17,
1236
1237
1238
1239
1240 EC_FEATURE_SMART_BATTERY = 18,
1241
1242 EC_FEATURE_HANG_DETECT = 19,
1243
1244 EC_FEATURE_PMU = 20,
1245
1246 EC_FEATURE_SUB_MCU = 21,
1247
1248 EC_FEATURE_USB_PD = 22,
1249
1250 EC_FEATURE_USB_MUX = 23,
1251
1252 EC_FEATURE_MOTION_SENSE_FIFO = 24,
1253
1254 EC_FEATURE_VSTORE = 25,
1255
1256 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26,
1257
1258 EC_FEATURE_RTC = 27,
1259
1260 EC_FEATURE_FINGERPRINT = 28,
1261
1262 EC_FEATURE_TOUCHPAD = 29,
1263
1264 EC_FEATURE_RWSIG = 30,
1265
1266 EC_FEATURE_DEVICE_EVENT = 31,
1267
1268 EC_FEATURE_UNIFIED_WAKE_MASKS = 32,
1269
1270 EC_FEATURE_HOST_EVENT64 = 33,
1271
1272 EC_FEATURE_EXEC_IN_RAM = 34,
1273
1274 EC_FEATURE_CEC = 35,
1275
1276 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36,
1277
1278
1279
1280
1281
1282 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37,
1283
1284 EC_FEATURE_SCP = 39,
1285
1286 EC_FEATURE_ISH = 40,
1287
1288 EC_FEATURE_TYPEC_CMD = 41,
1289
1290
1291
1292
1293 EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42,
1294
1295
1296
1297
1298 EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43,
1299};
1300
1301#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
1302#define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32)
1303
1304struct ec_response_get_features {
1305 uint32_t flags[2];
1306} __ec_align4;
1307
1308
1309
1310#define EC_CMD_GET_SKU_ID 0x000E
1311
1312
1313#define EC_CMD_SET_SKU_ID 0x000F
1314
1315struct ec_sku_id_info {
1316 uint32_t sku_id;
1317} __ec_align4;
1318
1319
1320
1321
1322
1323#define EC_CMD_FLASH_INFO 0x0010
1324#define EC_VER_FLASH_INFO 2
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338struct ec_response_flash_info {
1339 uint32_t flash_size;
1340 uint32_t write_block_size;
1341 uint32_t erase_block_size;
1342 uint32_t protect_block_size;
1343} __ec_align4;
1344
1345
1346
1347
1348
1349#define EC_FLASH_INFO_ERASE_TO_0 BIT(0)
1350
1351
1352
1353
1354
1355
1356
1357
1358#define EC_FLASH_INFO_SELECT_REQUIRED BIT(1)
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389struct ec_response_flash_info_1 {
1390
1391 uint32_t flash_size;
1392 uint32_t write_block_size;
1393 uint32_t erase_block_size;
1394 uint32_t protect_block_size;
1395
1396
1397 uint32_t write_ideal_size;
1398 uint32_t flags;
1399} __ec_align4;
1400
1401struct ec_params_flash_info_2 {
1402
1403 uint16_t num_banks_desc;
1404
1405 uint8_t reserved[2];
1406} __ec_align4;
1407
1408struct ec_flash_bank {
1409
1410 uint16_t count;
1411
1412 uint8_t size_exp;
1413
1414 uint8_t write_size_exp;
1415
1416 uint8_t erase_size_exp;
1417
1418 uint8_t protect_size_exp;
1419
1420 uint8_t reserved[2];
1421};
1422
1423struct ec_response_flash_info_2 {
1424
1425 uint32_t flash_size;
1426
1427 uint32_t flags;
1428
1429 uint32_t write_ideal_size;
1430
1431 uint16_t num_banks_total;
1432
1433 uint16_t num_banks_desc;
1434 struct ec_flash_bank banks[];
1435} __ec_align4;
1436
1437
1438
1439
1440
1441
1442#define EC_CMD_FLASH_READ 0x0011
1443
1444
1445
1446
1447
1448
1449struct ec_params_flash_read {
1450 uint32_t offset;
1451 uint32_t size;
1452} __ec_align4;
1453
1454
1455#define EC_CMD_FLASH_WRITE 0x0012
1456#define EC_VER_FLASH_WRITE 1
1457
1458
1459#define EC_FLASH_WRITE_VER0_SIZE 64
1460
1461
1462
1463
1464
1465
1466struct ec_params_flash_write {
1467 uint32_t offset;
1468 uint32_t size;
1469
1470} __ec_align4;
1471
1472
1473#define EC_CMD_FLASH_ERASE 0x0013
1474
1475
1476
1477
1478
1479
1480struct ec_params_flash_erase {
1481 uint32_t offset;
1482 uint32_t size;
1483} __ec_align4;
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502enum ec_flash_erase_cmd {
1503 FLASH_ERASE_SECTOR,
1504 FLASH_ERASE_SECTOR_ASYNC,
1505 FLASH_ERASE_GET_RESULT,
1506};
1507
1508
1509
1510
1511
1512
1513
1514
1515struct ec_params_flash_erase_v1 {
1516 uint8_t cmd;
1517 uint8_t reserved;
1518 uint16_t flag;
1519 struct ec_params_flash_erase params;
1520} __ec_align4;
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532#define EC_CMD_FLASH_PROTECT 0x0015
1533#define EC_VER_FLASH_PROTECT 1
1534
1535
1536
1537#define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0)
1538
1539
1540
1541
1542#define EC_FLASH_PROTECT_RO_NOW BIT(1)
1543
1544#define EC_FLASH_PROTECT_ALL_NOW BIT(2)
1545
1546#define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3)
1547
1548#define EC_FLASH_PROTECT_ERROR_STUCK BIT(4)
1549
1550
1551
1552
1553
1554#define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5)
1555
1556#define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6)
1557
1558#define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7)
1559
1560#define EC_FLASH_PROTECT_RW_NOW BIT(8)
1561
1562#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9)
1563
1564#define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10)
1565
1566
1567
1568
1569
1570
1571
1572struct ec_params_flash_protect {
1573 uint32_t mask;
1574 uint32_t flags;
1575} __ec_align4;
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586struct ec_response_flash_protect {
1587 uint32_t flags;
1588 uint32_t valid_flags;
1589 uint32_t writable_flags;
1590} __ec_align4;
1591
1592
1593
1594
1595
1596
1597
1598#define EC_CMD_FLASH_REGION_INFO 0x0016
1599#define EC_VER_FLASH_REGION_INFO 1
1600
1601enum ec_flash_region {
1602
1603 EC_FLASH_REGION_RO = 0,
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613 EC_FLASH_REGION_ACTIVE,
1614
1615
1616
1617
1618 EC_FLASH_REGION_WP_RO,
1619
1620 EC_FLASH_REGION_UPDATE,
1621
1622 EC_FLASH_REGION_COUNT,
1623};
1624
1625
1626
1627
1628#define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE
1629
1630
1631
1632
1633
1634
1635struct ec_params_flash_region_info {
1636 uint32_t region;
1637} __ec_align4;
1638
1639struct ec_response_flash_region_info {
1640 uint32_t offset;
1641 uint32_t size;
1642} __ec_align4;
1643
1644
1645#define EC_CMD_VBNV_CONTEXT 0x0017
1646#define EC_VER_VBNV_CONTEXT 1
1647#define EC_VBNV_BLOCK_SIZE 16
1648
1649enum ec_vbnvcontext_op {
1650 EC_VBNV_CONTEXT_OP_READ,
1651 EC_VBNV_CONTEXT_OP_WRITE,
1652};
1653
1654struct ec_params_vbnvcontext {
1655 uint32_t op;
1656 uint8_t block[EC_VBNV_BLOCK_SIZE];
1657} __ec_align4;
1658
1659struct ec_response_vbnvcontext {
1660 uint8_t block[EC_VBNV_BLOCK_SIZE];
1661} __ec_align4;
1662
1663
1664
1665#define EC_CMD_FLASH_SPI_INFO 0x0018
1666
1667struct ec_response_flash_spi_info {
1668
1669 uint8_t jedec[3];
1670
1671
1672 uint8_t reserved0;
1673
1674
1675 uint8_t mfr_dev_id[2];
1676
1677
1678 uint8_t sr1, sr2;
1679} __ec_align1;
1680
1681
1682
1683#define EC_CMD_FLASH_SELECT 0x0019
1684
1685
1686
1687
1688
1689struct ec_params_flash_select {
1690 uint8_t select;
1691} __ec_align4;
1692
1693
1694
1695
1696
1697
1698#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020
1699
1700struct ec_response_pwm_get_fan_rpm {
1701 uint32_t rpm;
1702} __ec_align4;
1703
1704
1705#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021
1706
1707
1708struct ec_params_pwm_set_fan_target_rpm_v0 {
1709 uint32_t rpm;
1710} __ec_align4;
1711
1712
1713struct ec_params_pwm_set_fan_target_rpm_v1 {
1714 uint32_t rpm;
1715 uint8_t fan_idx;
1716} __ec_align_size1;
1717
1718
1719
1720#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022
1721
1722struct ec_response_pwm_get_keyboard_backlight {
1723 uint8_t percent;
1724 uint8_t enabled;
1725} __ec_align1;
1726
1727
1728
1729#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023
1730
1731struct ec_params_pwm_set_keyboard_backlight {
1732 uint8_t percent;
1733} __ec_align1;
1734
1735
1736#define EC_CMD_PWM_SET_FAN_DUTY 0x0024
1737
1738
1739struct ec_params_pwm_set_fan_duty_v0 {
1740 uint32_t percent;
1741} __ec_align4;
1742
1743
1744struct ec_params_pwm_set_fan_duty_v1 {
1745 uint32_t percent;
1746 uint8_t fan_idx;
1747} __ec_align_size1;
1748
1749#define EC_CMD_PWM_SET_DUTY 0x0025
1750
1751#define EC_PWM_MAX_DUTY 0xffff
1752
1753enum ec_pwm_type {
1754
1755 EC_PWM_TYPE_GENERIC = 0,
1756
1757 EC_PWM_TYPE_KB_LIGHT,
1758
1759 EC_PWM_TYPE_DISPLAY_LIGHT,
1760 EC_PWM_TYPE_COUNT,
1761};
1762
1763struct ec_params_pwm_set_duty {
1764 uint16_t duty;
1765 uint8_t pwm_type;
1766 uint8_t index;
1767} __ec_align4;
1768
1769#define EC_CMD_PWM_GET_DUTY 0x0026
1770
1771struct ec_params_pwm_get_duty {
1772 uint8_t pwm_type;
1773 uint8_t index;
1774} __ec_align1;
1775
1776struct ec_response_pwm_get_duty {
1777 uint16_t duty;
1778} __ec_align2;
1779
1780
1781
1782
1783
1784
1785
1786
1787#define EC_CMD_LIGHTBAR_CMD 0x0028
1788
1789struct rgb_s {
1790 uint8_t r, g, b;
1791} __ec_todo_unpacked;
1792
1793#define LB_BATTERY_LEVELS 4
1794
1795
1796
1797
1798
1799struct lightbar_params_v0 {
1800
1801 int32_t google_ramp_up;
1802 int32_t google_ramp_down;
1803 int32_t s3s0_ramp_up;
1804 int32_t s0_tick_delay[2];
1805 int32_t s0a_tick_delay[2];
1806 int32_t s0s3_ramp_down;
1807 int32_t s3_sleep_for;
1808 int32_t s3_ramp_up;
1809 int32_t s3_ramp_down;
1810
1811
1812 uint8_t new_s0;
1813 uint8_t osc_min[2];
1814 uint8_t osc_max[2];
1815 uint8_t w_ofs[2];
1816
1817
1818 uint8_t bright_bl_off_fixed[2];
1819 uint8_t bright_bl_on_min[2];
1820 uint8_t bright_bl_on_max[2];
1821
1822
1823 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1824
1825
1826 uint8_t s0_idx[2][LB_BATTERY_LEVELS];
1827 uint8_t s3_idx[2][LB_BATTERY_LEVELS];
1828
1829
1830 struct rgb_s color[8];
1831} __ec_todo_packed;
1832
1833struct lightbar_params_v1 {
1834
1835 int32_t google_ramp_up;
1836 int32_t google_ramp_down;
1837 int32_t s3s0_ramp_up;
1838 int32_t s0_tick_delay[2];
1839 int32_t s0a_tick_delay[2];
1840 int32_t s0s3_ramp_down;
1841 int32_t s3_sleep_for;
1842 int32_t s3_ramp_up;
1843 int32_t s3_ramp_down;
1844 int32_t s5_ramp_up;
1845 int32_t s5_ramp_down;
1846 int32_t tap_tick_delay;
1847 int32_t tap_gate_delay;
1848 int32_t tap_display_time;
1849
1850
1851 uint8_t tap_pct_red;
1852 uint8_t tap_pct_green;
1853 uint8_t tap_seg_min_on;
1854 uint8_t tap_seg_max_on;
1855 uint8_t tap_seg_osc;
1856 uint8_t tap_idx[3];
1857
1858
1859 uint8_t osc_min[2];
1860 uint8_t osc_max[2];
1861 uint8_t w_ofs[2];
1862
1863
1864 uint8_t bright_bl_off_fixed[2];
1865 uint8_t bright_bl_on_min[2];
1866 uint8_t bright_bl_on_max[2];
1867
1868
1869 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1870
1871
1872 uint8_t s0_idx[2][LB_BATTERY_LEVELS];
1873 uint8_t s3_idx[2][LB_BATTERY_LEVELS];
1874
1875
1876 uint8_t s5_idx;
1877
1878
1879 struct rgb_s color[8];
1880} __ec_todo_packed;
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891struct lightbar_params_v2_timing {
1892
1893 int32_t google_ramp_up;
1894 int32_t google_ramp_down;
1895 int32_t s3s0_ramp_up;
1896 int32_t s0_tick_delay[2];
1897 int32_t s0a_tick_delay[2];
1898 int32_t s0s3_ramp_down;
1899 int32_t s3_sleep_for;
1900 int32_t s3_ramp_up;
1901 int32_t s3_ramp_down;
1902 int32_t s5_ramp_up;
1903 int32_t s5_ramp_down;
1904 int32_t tap_tick_delay;
1905 int32_t tap_gate_delay;
1906 int32_t tap_display_time;
1907} __ec_todo_packed;
1908
1909struct lightbar_params_v2_tap {
1910
1911 uint8_t tap_pct_red;
1912 uint8_t tap_pct_green;
1913 uint8_t tap_seg_min_on;
1914 uint8_t tap_seg_max_on;
1915 uint8_t tap_seg_osc;
1916 uint8_t tap_idx[3];
1917} __ec_todo_packed;
1918
1919struct lightbar_params_v2_oscillation {
1920
1921 uint8_t osc_min[2];
1922 uint8_t osc_max[2];
1923 uint8_t w_ofs[2];
1924} __ec_todo_packed;
1925
1926struct lightbar_params_v2_brightness {
1927
1928 uint8_t bright_bl_off_fixed[2];
1929 uint8_t bright_bl_on_min[2];
1930 uint8_t bright_bl_on_max[2];
1931} __ec_todo_packed;
1932
1933struct lightbar_params_v2_thresholds {
1934
1935 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1936} __ec_todo_packed;
1937
1938struct lightbar_params_v2_colors {
1939
1940 uint8_t s0_idx[2][LB_BATTERY_LEVELS];
1941 uint8_t s3_idx[2][LB_BATTERY_LEVELS];
1942
1943
1944 uint8_t s5_idx;
1945
1946
1947 struct rgb_s color[8];
1948} __ec_todo_packed;
1949
1950
1951#define EC_LB_PROG_LEN 192
1952struct lightbar_program {
1953 uint8_t size;
1954 uint8_t data[EC_LB_PROG_LEN];
1955} __ec_todo_unpacked;
1956
1957struct ec_params_lightbar {
1958 uint8_t cmd;
1959 union {
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972 struct __ec_todo_unpacked {
1973 uint8_t num;
1974 } set_brightness, seq, demo;
1975
1976 struct __ec_todo_unpacked {
1977 uint8_t ctrl, reg, value;
1978 } reg;
1979
1980 struct __ec_todo_unpacked {
1981 uint8_t led, red, green, blue;
1982 } set_rgb;
1983
1984 struct __ec_todo_unpacked {
1985 uint8_t led;
1986 } get_rgb;
1987
1988 struct __ec_todo_unpacked {
1989 uint8_t enable;
1990 } manual_suspend_ctrl;
1991
1992 struct lightbar_params_v0 set_params_v0;
1993 struct lightbar_params_v1 set_params_v1;
1994
1995 struct lightbar_params_v2_timing set_v2par_timing;
1996 struct lightbar_params_v2_tap set_v2par_tap;
1997 struct lightbar_params_v2_oscillation set_v2par_osc;
1998 struct lightbar_params_v2_brightness set_v2par_bright;
1999 struct lightbar_params_v2_thresholds set_v2par_thlds;
2000 struct lightbar_params_v2_colors set_v2par_colors;
2001
2002 struct lightbar_program set_program;
2003 };
2004} __ec_todo_packed;
2005
2006struct ec_response_lightbar {
2007 union {
2008 struct __ec_todo_unpacked {
2009 struct __ec_todo_unpacked {
2010 uint8_t reg;
2011 uint8_t ic0;
2012 uint8_t ic1;
2013 } vals[23];
2014 } dump;
2015
2016 struct __ec_todo_unpacked {
2017 uint8_t num;
2018 } get_seq, get_brightness, get_demo;
2019
2020 struct lightbar_params_v0 get_params_v0;
2021 struct lightbar_params_v1 get_params_v1;
2022
2023
2024 struct lightbar_params_v2_timing get_params_v2_timing;
2025 struct lightbar_params_v2_tap get_params_v2_tap;
2026 struct lightbar_params_v2_oscillation get_params_v2_osc;
2027 struct lightbar_params_v2_brightness get_params_v2_bright;
2028 struct lightbar_params_v2_thresholds get_params_v2_thlds;
2029 struct lightbar_params_v2_colors get_params_v2_colors;
2030
2031 struct __ec_todo_unpacked {
2032 uint32_t num;
2033 uint32_t flags;
2034 } version;
2035
2036 struct __ec_todo_unpacked {
2037 uint8_t red, green, blue;
2038 } get_rgb;
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049 };
2050} __ec_todo_packed;
2051
2052
2053enum lightbar_command {
2054 LIGHTBAR_CMD_DUMP = 0,
2055 LIGHTBAR_CMD_OFF = 1,
2056 LIGHTBAR_CMD_ON = 2,
2057 LIGHTBAR_CMD_INIT = 3,
2058 LIGHTBAR_CMD_SET_BRIGHTNESS = 4,
2059 LIGHTBAR_CMD_SEQ = 5,
2060 LIGHTBAR_CMD_REG = 6,
2061 LIGHTBAR_CMD_SET_RGB = 7,
2062 LIGHTBAR_CMD_GET_SEQ = 8,
2063 LIGHTBAR_CMD_DEMO = 9,
2064 LIGHTBAR_CMD_GET_PARAMS_V0 = 10,
2065 LIGHTBAR_CMD_SET_PARAMS_V0 = 11,
2066 LIGHTBAR_CMD_VERSION = 12,
2067 LIGHTBAR_CMD_GET_BRIGHTNESS = 13,
2068 LIGHTBAR_CMD_GET_RGB = 14,
2069 LIGHTBAR_CMD_GET_DEMO = 15,
2070 LIGHTBAR_CMD_GET_PARAMS_V1 = 16,
2071 LIGHTBAR_CMD_SET_PARAMS_V1 = 17,
2072 LIGHTBAR_CMD_SET_PROGRAM = 18,
2073 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19,
2074 LIGHTBAR_CMD_SUSPEND = 20,
2075 LIGHTBAR_CMD_RESUME = 21,
2076 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22,
2077 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23,
2078 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24,
2079 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25,
2080 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26,
2081 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27,
2082 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28,
2083 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29,
2084 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30,
2085 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31,
2086 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32,
2087 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33,
2088 LIGHTBAR_NUM_CMDS
2089};
2090
2091
2092
2093
2094#define EC_CMD_LED_CONTROL 0x0029
2095
2096enum ec_led_id {
2097
2098 EC_LED_ID_BATTERY_LED = 0,
2099
2100
2101
2102
2103 EC_LED_ID_POWER_LED,
2104
2105 EC_LED_ID_ADAPTER_LED,
2106
2107 EC_LED_ID_LEFT_LED,
2108
2109 EC_LED_ID_RIGHT_LED,
2110
2111 EC_LED_ID_RECOVERY_HW_REINIT_LED,
2112
2113 EC_LED_ID_SYSRQ_DEBUG_LED,
2114
2115 EC_LED_ID_COUNT
2116};
2117
2118
2119#define EC_LED_FLAGS_QUERY BIT(0)
2120#define EC_LED_FLAGS_AUTO BIT(1)
2121
2122enum ec_led_colors {
2123 EC_LED_COLOR_RED = 0,
2124 EC_LED_COLOR_GREEN,
2125 EC_LED_COLOR_BLUE,
2126 EC_LED_COLOR_YELLOW,
2127 EC_LED_COLOR_WHITE,
2128 EC_LED_COLOR_AMBER,
2129
2130 EC_LED_COLOR_COUNT
2131};
2132
2133struct ec_params_led_control {
2134 uint8_t led_id;
2135 uint8_t flags;
2136
2137 uint8_t brightness[EC_LED_COLOR_COUNT];
2138} __ec_align1;
2139
2140struct ec_response_led_control {
2141
2142
2143
2144
2145
2146
2147
2148 uint8_t brightness_range[EC_LED_COLOR_COUNT];
2149} __ec_align1;
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160#define EC_CMD_VBOOT_HASH 0x002A
2161
2162struct ec_params_vboot_hash {
2163 uint8_t cmd;
2164 uint8_t hash_type;
2165 uint8_t nonce_size;
2166 uint8_t reserved0;
2167 uint32_t offset;
2168 uint32_t size;
2169 uint8_t nonce_data[64];
2170} __ec_align4;
2171
2172struct ec_response_vboot_hash {
2173 uint8_t status;
2174 uint8_t hash_type;
2175 uint8_t digest_size;
2176 uint8_t reserved0;
2177 uint32_t offset;
2178 uint32_t size;
2179 uint8_t hash_digest[64];
2180} __ec_align4;
2181
2182enum ec_vboot_hash_cmd {
2183 EC_VBOOT_HASH_GET = 0,
2184 EC_VBOOT_HASH_ABORT = 1,
2185 EC_VBOOT_HASH_START = 2,
2186 EC_VBOOT_HASH_RECALC = 3,
2187};
2188
2189enum ec_vboot_hash_type {
2190 EC_VBOOT_HASH_TYPE_SHA256 = 0,
2191};
2192
2193enum ec_vboot_hash_status {
2194 EC_VBOOT_HASH_STATUS_NONE = 0,
2195 EC_VBOOT_HASH_STATUS_DONE = 1,
2196 EC_VBOOT_HASH_STATUS_BUSY = 2,
2197};
2198
2199
2200
2201
2202
2203
2204#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
2205#define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd
2206#define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc
2207
2208
2209
2210
2211
2212#define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE
2213
2214
2215
2216
2217
2218
2219#define EC_CMD_MOTION_SENSE_CMD 0x002B
2220
2221
2222enum motionsense_command {
2223
2224
2225
2226
2227 MOTIONSENSE_CMD_DUMP = 0,
2228
2229
2230
2231
2232
2233
2234 MOTIONSENSE_CMD_INFO = 1,
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246 MOTIONSENSE_CMD_EC_RATE = 2,
2247
2248
2249
2250
2251
2252 MOTIONSENSE_CMD_SENSOR_ODR = 3,
2253
2254
2255
2256
2257
2258 MOTIONSENSE_CMD_SENSOR_RANGE = 4,
2259
2260
2261
2262
2263
2264
2265
2266
2267 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
2268
2269
2270
2271
2272 MOTIONSENSE_CMD_DATA = 6,
2273
2274
2275
2276
2277 MOTIONSENSE_CMD_FIFO_INFO = 7,
2278
2279
2280
2281
2282
2283 MOTIONSENSE_CMD_FIFO_FLUSH = 8,
2284
2285
2286
2287
2288 MOTIONSENSE_CMD_FIFO_READ = 9,
2289
2290
2291
2292
2293
2294 MOTIONSENSE_CMD_PERFORM_CALIB = 10,
2295
2296
2297
2298
2299
2300
2301
2302 MOTIONSENSE_CMD_SENSOR_OFFSET = 11,
2303
2304
2305
2306
2307
2308 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12,
2309
2310
2311
2312
2313
2314 MOTIONSENSE_CMD_SET_ACTIVITY = 13,
2315
2316
2317
2318
2319 MOTIONSENSE_CMD_LID_ANGLE = 14,
2320
2321
2322
2323
2324
2325
2326 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15,
2327
2328
2329
2330
2331
2332 MOTIONSENSE_CMD_SPOOF = 16,
2333
2334
2335 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17,
2336
2337
2338
2339
2340
2341 MOTIONSENSE_CMD_SENSOR_SCALE = 18,
2342
2343
2344 MOTIONSENSE_NUM_CMDS
2345};
2346
2347
2348enum motionsensor_type {
2349 MOTIONSENSE_TYPE_ACCEL = 0,
2350 MOTIONSENSE_TYPE_GYRO = 1,
2351 MOTIONSENSE_TYPE_MAG = 2,
2352 MOTIONSENSE_TYPE_PROX = 3,
2353 MOTIONSENSE_TYPE_LIGHT = 4,
2354 MOTIONSENSE_TYPE_ACTIVITY = 5,
2355 MOTIONSENSE_TYPE_BARO = 6,
2356 MOTIONSENSE_TYPE_SYNC = 7,
2357 MOTIONSENSE_TYPE_MAX,
2358};
2359
2360
2361enum motionsensor_location {
2362 MOTIONSENSE_LOC_BASE = 0,
2363 MOTIONSENSE_LOC_LID = 1,
2364 MOTIONSENSE_LOC_CAMERA = 2,
2365 MOTIONSENSE_LOC_MAX,
2366};
2367
2368
2369enum motionsensor_chip {
2370 MOTIONSENSE_CHIP_KXCJ9 = 0,
2371 MOTIONSENSE_CHIP_LSM6DS0 = 1,
2372 MOTIONSENSE_CHIP_BMI160 = 2,
2373 MOTIONSENSE_CHIP_SI1141 = 3,
2374 MOTIONSENSE_CHIP_SI1142 = 4,
2375 MOTIONSENSE_CHIP_SI1143 = 5,
2376 MOTIONSENSE_CHIP_KX022 = 6,
2377 MOTIONSENSE_CHIP_L3GD20H = 7,
2378 MOTIONSENSE_CHIP_BMA255 = 8,
2379 MOTIONSENSE_CHIP_BMP280 = 9,
2380 MOTIONSENSE_CHIP_OPT3001 = 10,
2381 MOTIONSENSE_CHIP_BH1730 = 11,
2382 MOTIONSENSE_CHIP_GPIO = 12,
2383 MOTIONSENSE_CHIP_LIS2DH = 13,
2384 MOTIONSENSE_CHIP_LSM6DSM = 14,
2385 MOTIONSENSE_CHIP_LIS2DE = 15,
2386 MOTIONSENSE_CHIP_LIS2MDL = 16,
2387 MOTIONSENSE_CHIP_LSM6DS3 = 17,
2388 MOTIONSENSE_CHIP_LSM6DSO = 18,
2389 MOTIONSENSE_CHIP_LNG2DM = 19,
2390 MOTIONSENSE_CHIP_MAX,
2391};
2392
2393
2394enum motionsensor_orientation {
2395 MOTIONSENSE_ORIENTATION_LANDSCAPE = 0,
2396 MOTIONSENSE_ORIENTATION_PORTRAIT = 1,
2397 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2,
2398 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3,
2399 MOTIONSENSE_ORIENTATION_UNKNOWN = 4,
2400};
2401
2402struct ec_response_motion_sensor_data {
2403
2404 uint8_t flags;
2405
2406 uint8_t sensor_num;
2407
2408 union {
2409 int16_t data[3];
2410 struct __ec_todo_packed {
2411 uint16_t reserved;
2412 uint32_t timestamp;
2413 };
2414 struct __ec_todo_unpacked {
2415 uint8_t activity;
2416 uint8_t state;
2417 int16_t add_info[2];
2418 };
2419 };
2420} __ec_todo_packed;
2421
2422
2423struct ec_response_motion_sense_fifo_info {
2424
2425 uint16_t size;
2426
2427 uint16_t count;
2428
2429
2430
2431 uint32_t timestamp;
2432
2433 uint16_t total_lost;
2434
2435 uint16_t lost[];
2436} __ec_todo_packed;
2437
2438struct ec_response_motion_sense_fifo_data {
2439 uint32_t number_data;
2440 struct ec_response_motion_sensor_data data[];
2441} __ec_todo_packed;
2442
2443
2444enum motionsensor_activity {
2445 MOTIONSENSE_ACTIVITY_RESERVED = 0,
2446 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1,
2447 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2,
2448 MOTIONSENSE_ACTIVITY_ORIENTATION = 3,
2449};
2450
2451struct ec_motion_sense_activity {
2452 uint8_t sensor_num;
2453 uint8_t activity;
2454 uint8_t enable;
2455 uint8_t reserved;
2456 uint16_t parameters[3];
2457} __ec_todo_unpacked;
2458
2459
2460#define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0)
2461
2462
2463#define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0)
2464
2465
2466
2467
2468
2469#define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0)
2470#define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1)
2471#define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2)
2472#define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3)
2473#define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4)
2474
2475
2476
2477
2478
2479
2480#define EC_MOTION_SENSE_NO_VALUE -1
2481
2482#define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000
2483
2484
2485
2486#define MOTION_SENSE_SET_OFFSET BIT(0)
2487
2488
2489#define MOTION_SENSE_DEFAULT_SCALE BIT(15)
2490
2491#define LID_ANGLE_UNRELIABLE 500
2492
2493enum motionsense_spoof_mode {
2494
2495 MOTIONSENSE_SPOOF_MODE_DISABLE = 0,
2496
2497
2498 MOTIONSENSE_SPOOF_MODE_CUSTOM,
2499
2500
2501 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT,
2502
2503
2504 MOTIONSENSE_SPOOF_MODE_QUERY,
2505};
2506
2507struct ec_params_motion_sense {
2508 uint8_t cmd;
2509 union {
2510
2511 struct __ec_todo_unpacked {
2512
2513
2514
2515
2516
2517 uint8_t max_sensor_count;
2518 } dump;
2519
2520
2521
2522
2523 struct __ec_todo_unpacked {
2524
2525
2526
2527 int16_t data;
2528 } kb_wake_angle;
2529
2530
2531
2532
2533
2534 struct __ec_todo_unpacked {
2535 uint8_t sensor_num;
2536 } info, info_3, data, fifo_flush, perform_calib,
2537 list_activities;
2538
2539
2540
2541
2542
2543 struct __ec_todo_unpacked {
2544 uint8_t sensor_num;
2545
2546
2547 uint8_t roundup;
2548
2549 uint16_t reserved;
2550
2551
2552 int32_t data;
2553 } ec_rate, sensor_odr, sensor_range;
2554
2555
2556 struct __ec_todo_packed {
2557 uint8_t sensor_num;
2558
2559
2560
2561
2562
2563
2564 uint16_t flags;
2565
2566
2567
2568
2569
2570
2571
2572 int16_t temp;
2573
2574
2575
2576
2577
2578
2579
2580
2581 int16_t offset[3];
2582 } sensor_offset;
2583
2584
2585 struct __ec_todo_packed {
2586 uint8_t sensor_num;
2587
2588
2589
2590
2591
2592
2593 uint16_t flags;
2594
2595
2596
2597
2598
2599
2600
2601 int16_t temp;
2602
2603
2604
2605
2606
2607
2608
2609
2610 uint16_t scale[3];
2611 } sensor_scale;
2612
2613
2614
2615
2616
2617
2618 struct __ec_todo_unpacked {
2619
2620
2621
2622
2623 uint32_t max_data_vector;
2624 } fifo_read;
2625
2626 struct ec_motion_sense_activity set_activity;
2627
2628
2629
2630
2631
2632 struct __ec_todo_unpacked {
2633
2634
2635
2636
2637 int8_t enable;
2638 } fifo_int_enable;
2639
2640
2641 struct __ec_todo_packed {
2642 uint8_t sensor_id;
2643
2644
2645 uint8_t spoof_enable;
2646
2647
2648 uint8_t reserved;
2649
2650
2651 int16_t components[3];
2652 } spoof;
2653
2654
2655 struct __ec_todo_unpacked {
2656
2657
2658
2659
2660 int16_t lid_angle;
2661
2662
2663
2664
2665
2666
2667
2668
2669 int16_t hys_degree;
2670 } tablet_mode_threshold;
2671 };
2672} __ec_todo_packed;
2673
2674struct ec_response_motion_sense {
2675 union {
2676
2677 struct __ec_todo_unpacked {
2678
2679 uint8_t module_flags;
2680
2681
2682 uint8_t sensor_count;
2683
2684
2685
2686
2687
2688 struct ec_response_motion_sensor_data sensor[0];
2689 } dump;
2690
2691
2692 struct __ec_todo_unpacked {
2693
2694 uint8_t type;
2695
2696
2697 uint8_t location;
2698
2699
2700 uint8_t chip;
2701 } info;
2702
2703
2704 struct __ec_todo_unpacked {
2705
2706 uint8_t type;
2707
2708
2709 uint8_t location;
2710
2711
2712 uint8_t chip;
2713
2714
2715 uint32_t min_frequency;
2716
2717
2718 uint32_t max_frequency;
2719
2720
2721 uint32_t fifo_max_event_count;
2722 } info_3;
2723
2724
2725 struct ec_response_motion_sensor_data data;
2726
2727
2728
2729
2730
2731
2732
2733
2734 struct __ec_todo_unpacked {
2735
2736 int32_t ret;
2737 } ec_rate, sensor_odr, sensor_range, kb_wake_angle,
2738 fifo_int_enable, spoof;
2739
2740
2741
2742
2743
2744 struct __ec_todo_unpacked {
2745 int16_t temp;
2746 int16_t offset[3];
2747 } sensor_offset, perform_calib;
2748
2749
2750 struct __ec_todo_unpacked {
2751 int16_t temp;
2752 uint16_t scale[3];
2753 } sensor_scale;
2754
2755 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush;
2756
2757 struct ec_response_motion_sense_fifo_data fifo_read;
2758
2759 struct __ec_todo_packed {
2760 uint16_t reserved;
2761 uint32_t enabled;
2762 uint32_t disabled;
2763 } list_activities;
2764
2765
2766
2767
2768 struct __ec_todo_unpacked {
2769
2770
2771
2772
2773 uint16_t value;
2774 } lid_angle;
2775
2776
2777 struct __ec_todo_unpacked {
2778
2779
2780
2781
2782 uint16_t lid_angle;
2783
2784
2785 uint16_t hys_degree;
2786 } tablet_mode_threshold;
2787
2788 };
2789} __ec_todo_packed;
2790
2791
2792
2793
2794
2795#define EC_CMD_FORCE_LID_OPEN 0x002C
2796
2797struct ec_params_force_lid_open {
2798 uint8_t enabled;
2799} __ec_align1;
2800
2801
2802
2803#define EC_CMD_CONFIG_POWER_BUTTON 0x002D
2804
2805enum ec_config_power_button_flags {
2806
2807 EC_POWER_BUTTON_ENABLE_PULSE = BIT(0),
2808};
2809
2810struct ec_params_config_power_button {
2811
2812 uint8_t flags;
2813} __ec_align1;
2814
2815
2816
2817
2818
2819#define EC_CMD_USB_CHARGE_SET_MODE 0x0030
2820
2821struct ec_params_usb_charge_set_mode {
2822 uint8_t usb_port_id;
2823 uint8_t mode:7;
2824 uint8_t inhibit_charge:1;
2825} __ec_align1;
2826
2827
2828
2829
2830
2831#define EC_PSTORE_SIZE_MAX 64
2832
2833
2834#define EC_CMD_PSTORE_INFO 0x0040
2835
2836struct ec_response_pstore_info {
2837
2838 uint32_t pstore_size;
2839
2840 uint32_t access_size;
2841} __ec_align4;
2842
2843
2844
2845
2846
2847
2848#define EC_CMD_PSTORE_READ 0x0041
2849
2850struct ec_params_pstore_read {
2851 uint32_t offset;
2852 uint32_t size;
2853} __ec_align4;
2854
2855
2856#define EC_CMD_PSTORE_WRITE 0x0042
2857
2858struct ec_params_pstore_write {
2859 uint32_t offset;
2860 uint32_t size;
2861 uint8_t data[EC_PSTORE_SIZE_MAX];
2862} __ec_align4;
2863
2864
2865
2866
2867
2868struct ec_params_rtc {
2869 uint32_t time;
2870} __ec_align4;
2871
2872struct ec_response_rtc {
2873 uint32_t time;
2874} __ec_align4;
2875
2876
2877#define EC_CMD_RTC_GET_VALUE 0x0044
2878#define EC_CMD_RTC_GET_ALARM 0x0045
2879
2880
2881#define EC_CMD_RTC_SET_VALUE 0x0046
2882#define EC_CMD_RTC_SET_ALARM 0x0047
2883
2884
2885#define EC_RTC_ALARM_CLEAR 0
2886
2887
2888
2889
2890
2891#define EC_PORT80_SIZE_MAX 32
2892
2893
2894#define EC_CMD_PORT80_LAST_BOOT 0x0048
2895#define EC_CMD_PORT80_READ 0x0048
2896
2897enum ec_port80_subcmd {
2898 EC_PORT80_GET_INFO = 0,
2899 EC_PORT80_READ_BUFFER,
2900};
2901
2902struct ec_params_port80_read {
2903 uint16_t subcmd;
2904 union {
2905 struct __ec_todo_unpacked {
2906 uint32_t offset;
2907 uint32_t num_entries;
2908 } read_buffer;
2909 };
2910} __ec_todo_packed;
2911
2912struct ec_response_port80_read {
2913 union {
2914 struct __ec_todo_unpacked {
2915 uint32_t writes;
2916 uint32_t history_size;
2917 uint32_t last_boot;
2918 } get_info;
2919 struct __ec_todo_unpacked {
2920 uint16_t codes[EC_PORT80_SIZE_MAX];
2921 } data;
2922 };
2923} __ec_todo_packed;
2924
2925struct ec_response_port80_last_boot {
2926 uint16_t code;
2927} __ec_align2;
2928
2929
2930
2931
2932
2933#define EC_VSTORE_SLOT_SIZE 64
2934
2935
2936#define EC_VSTORE_SLOT_MAX 32
2937
2938
2939#define EC_CMD_VSTORE_INFO 0x0049
2940struct ec_response_vstore_info {
2941
2942 uint32_t slot_locked;
2943
2944 uint8_t slot_count;
2945} __ec_align_size1;
2946
2947
2948
2949
2950
2951
2952#define EC_CMD_VSTORE_READ 0x004A
2953
2954struct ec_params_vstore_read {
2955 uint8_t slot;
2956} __ec_align1;
2957
2958struct ec_response_vstore_read {
2959 uint8_t data[EC_VSTORE_SLOT_SIZE];
2960} __ec_align1;
2961
2962
2963
2964
2965#define EC_CMD_VSTORE_WRITE 0x004B
2966
2967struct ec_params_vstore_write {
2968 uint8_t slot;
2969 uint8_t data[EC_VSTORE_SLOT_SIZE];
2970} __ec_align1;
2971
2972
2973
2974
2975
2976
2977
2978
2979#define EC_CMD_THERMAL_SET_THRESHOLD 0x0050
2980#define EC_CMD_THERMAL_GET_THRESHOLD 0x0051
2981
2982
2983
2984
2985
2986
2987struct ec_params_thermal_set_threshold {
2988 uint8_t sensor_type;
2989 uint8_t threshold_id;
2990 uint16_t value;
2991} __ec_align2;
2992
2993
2994struct ec_params_thermal_get_threshold {
2995 uint8_t sensor_type;
2996 uint8_t threshold_id;
2997} __ec_align1;
2998
2999struct ec_response_thermal_get_threshold {
3000 uint16_t value;
3001} __ec_align2;
3002
3003
3004
3005enum ec_temp_thresholds {
3006 EC_TEMP_THRESH_WARN = 0,
3007 EC_TEMP_THRESH_HIGH,
3008 EC_TEMP_THRESH_HALT,
3009
3010 EC_TEMP_THRESH_COUNT
3011};
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035struct ec_thermal_config {
3036 uint32_t temp_host[EC_TEMP_THRESH_COUNT];
3037 uint32_t temp_host_release[EC_TEMP_THRESH_COUNT];
3038 uint32_t temp_fan_off;
3039 uint32_t temp_fan_max;
3040} __ec_align4;
3041
3042
3043struct ec_params_thermal_get_threshold_v1 {
3044 uint32_t sensor_num;
3045} __ec_align4;
3046
3047
3048
3049
3050
3051
3052struct ec_params_thermal_set_threshold_v1 {
3053 uint32_t sensor_num;
3054 struct ec_thermal_config cfg;
3055} __ec_align4;
3056
3057
3058
3059
3060
3061#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052
3062
3063
3064struct ec_params_auto_fan_ctrl_v1 {
3065 uint8_t fan_idx;
3066} __ec_align1;
3067
3068
3069#define EC_CMD_TMP006_GET_CALIBRATION 0x0053
3070#define EC_CMD_TMP006_SET_CALIBRATION 0x0054
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082struct ec_params_tmp006_get_calibration {
3083 uint8_t index;
3084} __ec_align1;
3085
3086
3087struct ec_response_tmp006_get_calibration_v0 {
3088 float s0;
3089 float b0;
3090 float b1;
3091 float b2;
3092} __ec_align4;
3093
3094struct ec_params_tmp006_set_calibration_v0 {
3095 uint8_t index;
3096 uint8_t reserved[3];
3097 float s0;
3098 float b0;
3099 float b1;
3100 float b2;
3101} __ec_align4;
3102
3103
3104struct ec_response_tmp006_get_calibration_v1 {
3105 uint8_t algorithm;
3106 uint8_t num_params;
3107 uint8_t reserved[2];
3108 float val[];
3109} __ec_align4;
3110
3111struct ec_params_tmp006_set_calibration_v1 {
3112 uint8_t index;
3113 uint8_t algorithm;
3114 uint8_t num_params;
3115 uint8_t reserved;
3116 float val[];
3117} __ec_align4;
3118
3119
3120
3121#define EC_CMD_TMP006_GET_RAW 0x0055
3122
3123struct ec_params_tmp006_get_raw {
3124 uint8_t index;
3125} __ec_align1;
3126
3127struct ec_response_tmp006_get_raw {
3128 int32_t t;
3129 int32_t v;
3130} __ec_align4;
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145#define EC_CMD_MKBP_STATE 0x0060
3146
3147
3148
3149
3150#define EC_CMD_MKBP_INFO 0x0061
3151
3152struct ec_response_mkbp_info {
3153 uint32_t rows;
3154 uint32_t cols;
3155
3156 uint8_t reserved;
3157} __ec_align_size1;
3158
3159struct ec_params_mkbp_info {
3160 uint8_t info_type;
3161 uint8_t event_type;
3162} __ec_align1;
3163
3164enum ec_mkbp_info_type {
3165
3166
3167
3168
3169
3170 EC_MKBP_INFO_KBD = 0,
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181 EC_MKBP_INFO_SUPPORTED = 1,
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200 EC_MKBP_INFO_CURRENT = 2,
3201};
3202
3203
3204#define EC_CMD_MKBP_SIMULATE_KEY 0x0062
3205
3206struct ec_params_mkbp_simulate_key {
3207 uint8_t col;
3208 uint8_t row;
3209 uint8_t pressed;
3210} __ec_align1;
3211
3212#define EC_CMD_GET_KEYBOARD_ID 0x0063
3213
3214struct ec_response_keyboard_id {
3215 uint32_t keyboard_id;
3216} __ec_align4;
3217
3218enum keyboard_id {
3219 KEYBOARD_ID_UNSUPPORTED = 0,
3220 KEYBOARD_ID_UNREADABLE = 0xffffffff,
3221};
3222
3223
3224#define EC_CMD_MKBP_SET_CONFIG 0x0064
3225#define EC_CMD_MKBP_GET_CONFIG 0x0065
3226
3227
3228enum mkbp_config_flags {
3229 EC_MKBP_FLAGS_ENABLE = 1,
3230};
3231
3232enum mkbp_config_valid {
3233 EC_MKBP_VALID_SCAN_PERIOD = BIT(0),
3234 EC_MKBP_VALID_POLL_TIMEOUT = BIT(1),
3235 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3),
3236 EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4),
3237 EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5),
3238 EC_MKBP_VALID_DEBOUNCE_UP = BIT(6),
3239 EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7),
3240};
3241
3242
3243
3244
3245
3246
3247
3248struct ec_mkbp_config {
3249 uint32_t valid_mask;
3250 uint8_t flags;
3251 uint8_t valid_flags;
3252 uint16_t scan_period_us;
3253
3254 uint32_t poll_timeout_us;
3255
3256
3257
3258
3259
3260 uint16_t min_post_scan_delay_us;
3261
3262 uint16_t output_settle_us;
3263 uint16_t debounce_down_us;
3264 uint16_t debounce_up_us;
3265
3266 uint8_t fifo_max_depth;
3267} __ec_align_size1;
3268
3269struct ec_params_mkbp_set_config {
3270 struct ec_mkbp_config config;
3271} __ec_align_size1;
3272
3273struct ec_response_mkbp_get_config {
3274 struct ec_mkbp_config config;
3275} __ec_align_size1;
3276
3277
3278#define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066
3279
3280enum ec_keyscan_seq_cmd {
3281 EC_KEYSCAN_SEQ_STATUS = 0,
3282 EC_KEYSCAN_SEQ_CLEAR = 1,
3283 EC_KEYSCAN_SEQ_ADD = 2,
3284 EC_KEYSCAN_SEQ_START = 3,
3285 EC_KEYSCAN_SEQ_COLLECT = 4,
3286};
3287
3288enum ec_collect_flags {
3289
3290
3291
3292
3293 EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0),
3294};
3295
3296struct ec_collect_item {
3297 uint8_t flags;
3298} __ec_align1;
3299
3300struct ec_params_keyscan_seq_ctrl {
3301 uint8_t cmd;
3302 union {
3303 struct __ec_align1 {
3304 uint8_t active;
3305 uint8_t num_items;
3306
3307 uint8_t cur_item;
3308 } status;
3309 struct __ec_todo_unpacked {
3310
3311
3312
3313
3314 uint32_t time_us;
3315 uint8_t scan[0];
3316 } add;
3317 struct __ec_align1 {
3318 uint8_t start_item;
3319 uint8_t num_items;
3320 } collect;
3321 };
3322} __ec_todo_packed;
3323
3324struct ec_result_keyscan_seq_ctrl {
3325 union {
3326 struct __ec_todo_unpacked {
3327 uint8_t num_items;
3328
3329 struct ec_collect_item item[0];
3330 } collect;
3331 };
3332} __ec_todo_packed;
3333
3334
3335
3336
3337
3338
3339#define EC_CMD_GET_NEXT_EVENT 0x0067
3340
3341#define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7
3342
3343
3344
3345
3346
3347#define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT)
3348
3349
3350#define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1)
3351
3352enum ec_mkbp_event {
3353
3354 EC_MKBP_EVENT_KEY_MATRIX = 0,
3355
3356
3357 EC_MKBP_EVENT_HOST_EVENT = 1,
3358
3359
3360 EC_MKBP_EVENT_SENSOR_FIFO = 2,
3361
3362
3363 EC_MKBP_EVENT_BUTTON = 3,
3364
3365
3366 EC_MKBP_EVENT_SWITCH = 4,
3367
3368
3369 EC_MKBP_EVENT_FINGERPRINT = 5,
3370
3371
3372
3373
3374
3375 EC_MKBP_EVENT_SYSRQ = 6,
3376
3377
3378
3379
3380
3381 EC_MKBP_EVENT_HOST_EVENT64 = 7,
3382
3383
3384 EC_MKBP_EVENT_CEC_EVENT = 8,
3385
3386
3387 EC_MKBP_EVENT_CEC_MESSAGE = 9,
3388
3389
3390 EC_MKBP_EVENT_COUNT,
3391};
3392BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK);
3393
3394union __ec_align_offset1 ec_response_get_next_data {
3395 uint8_t key_matrix[13];
3396
3397
3398 uint32_t host_event;
3399 uint64_t host_event64;
3400
3401 struct __ec_todo_unpacked {
3402
3403 uint8_t reserved[3];
3404 struct ec_response_motion_sense_fifo_info info;
3405 } sensor_fifo;
3406
3407 uint32_t buttons;
3408
3409 uint32_t switches;
3410
3411 uint32_t fp_events;
3412
3413 uint32_t sysrq;
3414
3415
3416 uint32_t cec_events;
3417};
3418
3419union __ec_align_offset1 ec_response_get_next_data_v1 {
3420 uint8_t key_matrix[16];
3421
3422
3423 uint32_t host_event;
3424 uint64_t host_event64;
3425
3426 struct __ec_todo_unpacked {
3427
3428 uint8_t reserved[3];
3429 struct ec_response_motion_sense_fifo_info info;
3430 } sensor_fifo;
3431
3432 uint32_t buttons;
3433
3434 uint32_t switches;
3435
3436 uint32_t fp_events;
3437
3438 uint32_t sysrq;
3439
3440
3441 uint32_t cec_events;
3442
3443 uint8_t cec_message[16];
3444};
3445BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16);
3446
3447struct ec_response_get_next_event {
3448 uint8_t event_type;
3449
3450 union ec_response_get_next_data data;
3451} __ec_align1;
3452
3453struct ec_response_get_next_event_v1 {
3454 uint8_t event_type;
3455
3456 union ec_response_get_next_data_v1 data;
3457} __ec_align1;
3458
3459
3460
3461#define EC_MKBP_POWER_BUTTON 0
3462#define EC_MKBP_VOL_UP 1
3463#define EC_MKBP_VOL_DOWN 2
3464#define EC_MKBP_RECOVERY 3
3465
3466
3467#define EC_MKBP_LID_OPEN 0
3468#define EC_MKBP_TABLET_MODE 1
3469#define EC_MKBP_BASE_ATTACHED 2
3470#define EC_MKBP_FRONT_PROXIMITY 3
3471
3472
3473#define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068
3474
3475struct ec_response_keyboard_factory_test {
3476 uint16_t shorted;
3477} __ec_align2;
3478
3479
3480#define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF)
3481#define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F)
3482#define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4
3483#define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \
3484 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET)
3485#define EC_MKBP_FP_MATCH_IDX_OFFSET 12
3486#define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000
3487#define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \
3488 >> EC_MKBP_FP_MATCH_IDX_OFFSET)
3489#define EC_MKBP_FP_ENROLL BIT(27)
3490#define EC_MKBP_FP_MATCH BIT(28)
3491#define EC_MKBP_FP_FINGER_DOWN BIT(29)
3492#define EC_MKBP_FP_FINGER_UP BIT(30)
3493#define EC_MKBP_FP_IMAGE_READY BIT(31)
3494
3495#define EC_MKBP_FP_ERR_ENROLL_OK 0
3496#define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1
3497#define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2
3498#define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3
3499#define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5
3500
3501#define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1
3502
3503#define EC_MKBP_FP_ERR_MATCH_NO 0
3504#define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6
3505#define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7
3506#define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2
3507#define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4
3508#define EC_MKBP_FP_ERR_MATCH_YES 1
3509#define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3
3510#define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5
3511
3512
3513
3514
3515
3516
3517#define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070
3518
3519struct ec_params_temp_sensor_get_info {
3520 uint8_t id;
3521} __ec_align1;
3522
3523struct ec_response_temp_sensor_get_info {
3524 char sensor_name[32];
3525 uint8_t sensor_type;
3526} __ec_align1;
3527
3528
3529
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542
3543
3544
3545struct ec_params_host_event_mask {
3546 uint32_t mask;
3547} __ec_align4;
3548
3549struct ec_response_host_event_mask {
3550 uint32_t mask;
3551} __ec_align4;
3552
3553
3554#define EC_CMD_HOST_EVENT_GET_B 0x0087
3555#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088
3556#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089
3557#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D
3558
3559
3560#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A
3561#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B
3562#define EC_CMD_HOST_EVENT_CLEAR 0x008C
3563#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
3564#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F
3565
3566
3567
3568
3569
3570
3571struct ec_params_host_event {
3572
3573
3574 uint8_t action;
3575
3576
3577
3578
3579
3580 uint8_t mask_type;
3581
3582
3583 uint16_t reserved;
3584
3585
3586 uint64_t value;
3587} __ec_align4;
3588
3589
3590
3591
3592
3593
3594struct ec_response_host_event {
3595
3596
3597 uint64_t value;
3598} __ec_align4;
3599
3600enum ec_host_event_action {
3601
3602
3603
3604
3605 EC_HOST_EVENT_GET,
3606
3607
3608 EC_HOST_EVENT_SET,
3609
3610
3611 EC_HOST_EVENT_CLEAR,
3612};
3613
3614enum ec_host_event_mask_type {
3615
3616
3617 EC_HOST_EVENT_MAIN,
3618
3619
3620 EC_HOST_EVENT_B,
3621
3622
3623 EC_HOST_EVENT_SCI_MASK,
3624
3625
3626 EC_HOST_EVENT_SMI_MASK,
3627
3628
3629 EC_HOST_EVENT_ALWAYS_REPORT_MASK,
3630
3631
3632 EC_HOST_EVENT_ACTIVE_WAKE_MASK,
3633
3634
3635 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX,
3636
3637
3638 EC_HOST_EVENT_LAZY_WAKE_MASK_S3,
3639
3640
3641 EC_HOST_EVENT_LAZY_WAKE_MASK_S5,
3642};
3643
3644#define EC_CMD_HOST_EVENT 0x00A4
3645
3646
3647
3648
3649
3650#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090
3651
3652struct ec_params_switch_enable_backlight {
3653 uint8_t enabled;
3654} __ec_align1;
3655
3656
3657#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091
3658#define EC_VER_SWITCH_ENABLE_WIRELESS 1
3659
3660
3661struct ec_params_switch_enable_wireless_v0 {
3662 uint8_t enabled;
3663} __ec_align1;
3664
3665
3666struct ec_params_switch_enable_wireless_v1 {
3667
3668 uint8_t now_flags;
3669
3670
3671 uint8_t now_mask;
3672
3673
3674
3675
3676
3677
3678 uint8_t suspend_flags;
3679
3680
3681 uint8_t suspend_mask;
3682} __ec_align1;
3683
3684
3685struct ec_response_switch_enable_wireless_v1 {
3686
3687 uint8_t now_flags;
3688
3689
3690 uint8_t suspend_flags;
3691} __ec_align1;
3692
3693
3694
3695
3696
3697#define EC_CMD_GPIO_SET 0x0092
3698
3699struct ec_params_gpio_set {
3700 char name[32];
3701 uint8_t val;
3702} __ec_align1;
3703
3704
3705#define EC_CMD_GPIO_GET 0x0093
3706
3707
3708struct ec_params_gpio_get {
3709 char name[32];
3710} __ec_align1;
3711
3712struct ec_response_gpio_get {
3713 uint8_t val;
3714} __ec_align1;
3715
3716
3717struct ec_params_gpio_get_v1 {
3718 uint8_t subcmd;
3719 union {
3720 struct __ec_align1 {
3721 char name[32];
3722 } get_value_by_name;
3723 struct __ec_align1 {
3724 uint8_t index;
3725 } get_info;
3726 };
3727} __ec_align1;
3728
3729struct ec_response_gpio_get_v1 {
3730 union {
3731 struct __ec_align1 {
3732 uint8_t val;
3733 } get_value_by_name, get_count;
3734 struct __ec_todo_unpacked {
3735 uint8_t val;
3736 char name[32];
3737 uint32_t flags;
3738 } get_info;
3739 };
3740} __ec_todo_packed;
3741
3742enum gpio_get_subcmd {
3743 EC_GPIO_GET_BY_NAME = 0,
3744 EC_GPIO_GET_COUNT = 1,
3745 EC_GPIO_GET_INFO = 2,
3746};
3747
3748
3749
3750
3751
3752
3753
3754
3755
3756
3757
3758
3759#define EC_CMD_I2C_READ 0x0094
3760
3761struct ec_params_i2c_read {
3762 uint16_t addr;
3763 uint8_t read_size;
3764 uint8_t port;
3765 uint8_t offset;
3766} __ec_align_size1;
3767
3768struct ec_response_i2c_read {
3769 uint16_t data;
3770} __ec_align2;
3771
3772
3773#define EC_CMD_I2C_WRITE 0x0095
3774
3775struct ec_params_i2c_write {
3776 uint16_t data;
3777 uint16_t addr;
3778 uint8_t write_size;
3779 uint8_t port;
3780 uint8_t offset;
3781} __ec_align_size1;
3782
3783
3784
3785
3786
3787
3788
3789#define EC_CMD_CHARGE_CONTROL 0x0096
3790#define EC_VER_CHARGE_CONTROL 1
3791
3792enum ec_charge_control_mode {
3793 CHARGE_CONTROL_NORMAL = 0,
3794 CHARGE_CONTROL_IDLE,
3795 CHARGE_CONTROL_DISCHARGE,
3796};
3797
3798struct ec_params_charge_control {
3799 uint32_t mode;
3800} __ec_align4;
3801
3802
3803
3804
3805#define EC_CMD_CONSOLE_SNAPSHOT 0x0097
3806
3807
3808
3809
3810
3811
3812
3813
3814
3815
3816
3817
3818
3819#define EC_CMD_CONSOLE_READ 0x0098
3820
3821enum ec_console_read_subcmd {
3822 CONSOLE_READ_NEXT = 0,
3823 CONSOLE_READ_RECENT
3824};
3825
3826struct ec_params_console_read_v1 {
3827 uint8_t subcmd;
3828} __ec_align1;
3829
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839#define EC_CMD_BATTERY_CUT_OFF 0x0099
3840
3841#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0)
3842
3843struct ec_params_battery_cutoff {
3844 uint8_t flags;
3845} __ec_align1;
3846
3847
3848
3849
3850
3851
3852
3853#define EC_CMD_USB_MUX 0x009A
3854
3855struct ec_params_usb_mux {
3856 uint8_t mux;
3857} __ec_align1;
3858
3859
3860
3861
3862enum ec_ldo_state {
3863 EC_LDO_STATE_OFF = 0,
3864 EC_LDO_STATE_ON = 1,
3865};
3866
3867
3868
3869
3870#define EC_CMD_LDO_SET 0x009B
3871
3872struct ec_params_ldo_set {
3873 uint8_t index;
3874 uint8_t state;
3875} __ec_align1;
3876
3877
3878
3879
3880#define EC_CMD_LDO_GET 0x009C
3881
3882struct ec_params_ldo_get {
3883 uint8_t index;
3884} __ec_align1;
3885
3886struct ec_response_ldo_get {
3887 uint8_t state;
3888} __ec_align1;
3889
3890
3891
3892
3893
3894
3895
3896#define EC_CMD_POWER_INFO 0x009D
3897
3898struct ec_response_power_info {
3899 uint32_t usb_dev_type;
3900 uint16_t voltage_ac;
3901 uint16_t voltage_system;
3902 uint16_t current_system;
3903 uint16_t usb_current_limit;
3904} __ec_align4;
3905
3906
3907
3908
3909#define EC_CMD_I2C_PASSTHRU 0x009E
3910
3911
3912#define EC_I2C_FLAG_READ BIT(15)
3913
3914
3915#define EC_I2C_ADDR_MASK 0x3ff
3916
3917#define EC_I2C_STATUS_NAK BIT(0)
3918#define EC_I2C_STATUS_TIMEOUT BIT(1)
3919
3920
3921#define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
3922
3923struct ec_params_i2c_passthru_msg {
3924 uint16_t addr_flags;
3925 uint16_t len;
3926} __ec_align2;
3927
3928struct ec_params_i2c_passthru {
3929 uint8_t port;
3930 uint8_t num_msgs;
3931 struct ec_params_i2c_passthru_msg msg[];
3932
3933} __ec_align2;
3934
3935struct ec_response_i2c_passthru {
3936 uint8_t i2c_status;
3937 uint8_t num_msgs;
3938 uint8_t data[];
3939} __ec_align1;
3940
3941
3942
3943
3944#define EC_CMD_HANG_DETECT 0x009F
3945
3946
3947
3948#define EC_HANG_START_ON_POWER_PRESS BIT(0)
3949
3950
3951#define EC_HANG_START_ON_LID_CLOSE BIT(1)
3952
3953
3954#define EC_HANG_START_ON_LID_OPEN BIT(2)
3955
3956
3957#define EC_HANG_START_ON_RESUME BIT(3)
3958
3959
3960
3961
3962#define EC_HANG_STOP_ON_POWER_RELEASE BIT(8)
3963
3964
3965#define EC_HANG_STOP_ON_HOST_COMMAND BIT(9)
3966
3967
3968#define EC_HANG_STOP_ON_SUSPEND BIT(10)
3969
3970
3971
3972
3973
3974
3975
3976#define EC_HANG_START_NOW BIT(30)
3977
3978
3979
3980
3981
3982
3983#define EC_HANG_STOP_NOW BIT(31)
3984
3985struct ec_params_hang_detect {
3986
3987 uint32_t flags;
3988
3989
3990 uint16_t host_event_timeout_msec;
3991
3992
3993 uint16_t warm_reboot_timeout_msec;
3994} __ec_align4;
3995
3996
3997
3998
3999
4000
4001
4002
4003#define EC_CMD_CHARGE_STATE 0x00A0
4004
4005
4006enum charge_state_command {
4007 CHARGE_STATE_CMD_GET_STATE,
4008 CHARGE_STATE_CMD_GET_PARAM,
4009 CHARGE_STATE_CMD_SET_PARAM,
4010 CHARGE_STATE_NUM_CMDS
4011};
4012
4013
4014
4015
4016
4017enum charge_state_params {
4018 CS_PARAM_CHG_VOLTAGE,
4019 CS_PARAM_CHG_CURRENT,
4020 CS_PARAM_CHG_INPUT_CURRENT,
4021 CS_PARAM_CHG_STATUS,
4022 CS_PARAM_CHG_OPTION,
4023 CS_PARAM_LIMIT_POWER,
4024
4025
4026
4027
4028
4029 CS_NUM_BASE_PARAMS,
4030
4031
4032 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
4033 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
4034
4035
4036 CS_PARAM_DEBUG_MIN = 0x20000,
4037 CS_PARAM_DEBUG_CTL_MODE = 0x20000,
4038 CS_PARAM_DEBUG_MANUAL_MODE,
4039 CS_PARAM_DEBUG_SEEMS_DEAD,
4040 CS_PARAM_DEBUG_SEEMS_DISCONNECTED,
4041 CS_PARAM_DEBUG_BATT_REMOVED,
4042 CS_PARAM_DEBUG_MANUAL_CURRENT,
4043 CS_PARAM_DEBUG_MANUAL_VOLTAGE,
4044 CS_PARAM_DEBUG_MAX = 0x2ffff,
4045
4046
4047};
4048
4049struct ec_params_charge_state {
4050 uint8_t cmd;
4051 union {
4052
4053
4054 struct __ec_todo_unpacked {
4055 uint32_t param;
4056 } get_param;
4057
4058 struct __ec_todo_unpacked {
4059 uint32_t param;
4060 uint32_t value;
4061 } set_param;
4062 };
4063} __ec_todo_packed;
4064
4065struct ec_response_charge_state {
4066 union {
4067 struct __ec_align4 {
4068 int ac;
4069 int chg_voltage;
4070 int chg_current;
4071 int chg_input_current;
4072 int batt_state_of_charge;
4073 } get_state;
4074
4075 struct __ec_align4 {
4076 uint32_t value;
4077 } get_param;
4078
4079
4080 };
4081} __ec_align4;
4082
4083
4084
4085
4086
4087#define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1
4088
4089struct ec_params_current_limit {
4090 uint32_t limit;
4091} __ec_align4;
4092
4093
4094
4095
4096#define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
4097
4098
4099struct ec_params_external_power_limit_v1 {
4100 uint16_t current_lim;
4101 uint16_t voltage_lim;
4102} __ec_align2;
4103
4104#define EC_POWER_LIMIT_NONE 0xffff
4105
4106
4107
4108
4109#define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3
4110
4111struct ec_params_dedicated_charger_limit {
4112 uint16_t current_lim;
4113 uint16_t voltage_lim;
4114} __ec_align2;
4115
4116
4117
4118
4119
4120#define EC_CMD_HIBERNATION_DELAY 0x00A8
4121
4122struct ec_params_hibernation_delay {
4123
4124
4125
4126
4127 uint32_t seconds;
4128} __ec_align4;
4129
4130struct ec_response_hibernation_delay {
4131
4132
4133
4134
4135 uint32_t time_g3;
4136
4137
4138
4139
4140
4141 uint32_t time_remaining;
4142
4143
4144
4145
4146
4147 uint32_t hibernate_delay;
4148} __ec_align4;
4149
4150
4151#define EC_CMD_HOST_SLEEP_EVENT 0x00A9
4152
4153enum host_sleep_event {
4154 HOST_SLEEP_EVENT_S3_SUSPEND = 1,
4155 HOST_SLEEP_EVENT_S3_RESUME = 2,
4156 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3,
4157 HOST_SLEEP_EVENT_S0IX_RESUME = 4,
4158
4159 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5,
4160};
4161
4162struct ec_params_host_sleep_event {
4163 uint8_t sleep_event;
4164} __ec_align1;
4165
4166
4167
4168
4169
4170#define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0
4171
4172
4173#define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF
4174
4175struct ec_params_host_sleep_event_v1 {
4176
4177 uint8_t sleep_event;
4178
4179
4180 uint8_t reserved;
4181 union {
4182
4183 struct {
4184
4185
4186
4187
4188
4189
4190 uint16_t sleep_timeout_ms;
4191 } suspend_params;
4192
4193
4194 };
4195} __ec_align2;
4196
4197
4198#define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000
4199
4200
4201
4202
4203
4204
4205#define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF
4206
4207struct ec_response_host_sleep_event_v1 {
4208 union {
4209
4210 struct {
4211
4212
4213
4214
4215
4216 uint32_t sleep_transitions;
4217 } resume_response;
4218
4219
4220 };
4221} __ec_align4;
4222
4223
4224
4225#define EC_CMD_DEVICE_EVENT 0x00AA
4226
4227enum ec_device_event {
4228 EC_DEVICE_EVENT_TRACKPAD,
4229 EC_DEVICE_EVENT_DSP,
4230 EC_DEVICE_EVENT_WIFI,
4231};
4232
4233enum ec_device_event_param {
4234
4235 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS,
4236
4237 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS,
4238
4239 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS,
4240};
4241
4242#define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32)
4243
4244struct ec_params_device_event {
4245 uint32_t event_mask;
4246 uint8_t param;
4247} __ec_align_size1;
4248
4249struct ec_response_device_event {
4250 uint32_t event_mask;
4251} __ec_align4;
4252
4253
4254
4255
4256
4257#define EC_CMD_SB_READ_WORD 0x00B0
4258#define EC_CMD_SB_WRITE_WORD 0x00B1
4259
4260
4261
4262
4263#define EC_CMD_SB_READ_BLOCK 0x00B2
4264#define EC_CMD_SB_WRITE_BLOCK 0x00B3
4265
4266struct ec_params_sb_rd {
4267 uint8_t reg;
4268} __ec_align1;
4269
4270struct ec_response_sb_rd_word {
4271 uint16_t value;
4272} __ec_align2;
4273
4274struct ec_params_sb_wr_word {
4275 uint8_t reg;
4276 uint16_t value;
4277} __ec_align1;
4278
4279struct ec_response_sb_rd_block {
4280 uint8_t data[32];
4281} __ec_align1;
4282
4283struct ec_params_sb_wr_block {
4284 uint8_t reg;
4285 uint16_t data[32];
4286} __ec_align1;
4287
4288
4289
4290
4291
4292
4293
4294
4295
4296
4297#define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4
4298
4299enum ec_battery_vendor_param_mode {
4300 BATTERY_VENDOR_PARAM_MODE_GET = 0,
4301 BATTERY_VENDOR_PARAM_MODE_SET,
4302};
4303
4304struct ec_params_battery_vendor_param {
4305 uint32_t param;
4306 uint32_t value;
4307 uint8_t mode;
4308} __ec_align_size1;
4309
4310struct ec_response_battery_vendor_param {
4311 uint32_t value;
4312} __ec_align4;
4313
4314
4315
4316
4317
4318#define EC_CMD_SB_FW_UPDATE 0x00B5
4319
4320enum ec_sb_fw_update_subcmd {
4321 EC_SB_FW_UPDATE_PREPARE = 0x0,
4322 EC_SB_FW_UPDATE_INFO = 0x1,
4323 EC_SB_FW_UPDATE_BEGIN = 0x2,
4324 EC_SB_FW_UPDATE_WRITE = 0x3,
4325 EC_SB_FW_UPDATE_END = 0x4,
4326 EC_SB_FW_UPDATE_STATUS = 0x5,
4327 EC_SB_FW_UPDATE_PROTECT = 0x6,
4328 EC_SB_FW_UPDATE_MAX = 0x7,
4329};
4330
4331#define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32
4332#define SB_FW_UPDATE_CMD_STATUS_SIZE 2
4333#define SB_FW_UPDATE_CMD_INFO_SIZE 8
4334
4335struct ec_sb_fw_update_header {
4336 uint16_t subcmd;
4337 uint16_t fw_id;
4338} __ec_align4;
4339
4340struct ec_params_sb_fw_update {
4341 struct ec_sb_fw_update_header hdr;
4342 union {
4343
4344
4345
4346
4347
4348
4349
4350
4351
4352 struct __ec_align4 {
4353 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE];
4354 } write;
4355 };
4356} __ec_align4;
4357
4358struct ec_response_sb_fw_update {
4359 union {
4360
4361 struct __ec_align1 {
4362 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE];
4363 } info;
4364
4365
4366 struct __ec_align1 {
4367 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE];
4368 } status;
4369 };
4370} __ec_align1;
4371
4372
4373
4374
4375
4376
4377#define EC_CMD_ENTERING_MODE 0x00B6
4378
4379struct ec_params_entering_mode {
4380 int vboot_mode;
4381} __ec_align4;
4382
4383#define VBOOT_MODE_NORMAL 0
4384#define VBOOT_MODE_DEVELOPER 1
4385#define VBOOT_MODE_RECOVERY 2
4386
4387
4388
4389
4390
4391
4392#define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7
4393
4394enum ec_i2c_passthru_protect_subcmd {
4395 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0,
4396 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1,
4397};
4398
4399struct ec_params_i2c_passthru_protect {
4400 uint8_t subcmd;
4401 uint8_t port;
4402} __ec_align1;
4403
4404struct ec_response_i2c_passthru_protect {
4405 uint8_t status;
4406} __ec_align1;
4407
4408
4409
4410
4411
4412
4413
4414
4415
4416#define MAX_CEC_MSG_LEN 16
4417
4418
4419#define EC_CMD_CEC_WRITE_MSG 0x00B8
4420
4421
4422
4423
4424
4425struct ec_params_cec_write {
4426 uint8_t msg[MAX_CEC_MSG_LEN];
4427} __ec_align1;
4428
4429
4430#define EC_CMD_CEC_SET 0x00BA
4431
4432
4433
4434
4435
4436
4437
4438
4439
4440struct ec_params_cec_set {
4441 uint8_t cmd;
4442 uint8_t val;
4443} __ec_align1;
4444
4445
4446#define EC_CMD_CEC_GET 0x00BB
4447
4448
4449
4450
4451
4452struct ec_params_cec_get {
4453 uint8_t cmd;
4454} __ec_align1;
4455
4456
4457
4458
4459
4460
4461
4462
4463struct ec_response_cec_get {
4464 uint8_t val;
4465} __ec_align1;
4466
4467
4468enum cec_command {
4469
4470 CEC_CMD_ENABLE,
4471
4472 CEC_CMD_LOGICAL_ADDRESS,
4473};
4474
4475
4476enum mkbp_cec_event {
4477
4478 EC_MKBP_CEC_SEND_OK = BIT(0),
4479
4480 EC_MKBP_CEC_SEND_FAILED = BIT(1),
4481};
4482
4483
4484
4485
4486#define EC_CMD_EC_CODEC 0x00BC
4487
4488enum ec_codec_subcmd {
4489 EC_CODEC_GET_CAPABILITIES = 0x0,
4490 EC_CODEC_GET_SHM_ADDR = 0x1,
4491 EC_CODEC_SET_SHM_ADDR = 0x2,
4492 EC_CODEC_SUBCMD_COUNT,
4493};
4494
4495enum ec_codec_cap {
4496 EC_CODEC_CAP_WOV_AUDIO_SHM = 0,
4497 EC_CODEC_CAP_WOV_LANG_SHM = 1,
4498 EC_CODEC_CAP_LAST = 32,
4499};
4500
4501enum ec_codec_shm_id {
4502 EC_CODEC_SHM_ID_WOV_AUDIO = 0x0,
4503 EC_CODEC_SHM_ID_WOV_LANG = 0x1,
4504 EC_CODEC_SHM_ID_LAST,
4505};
4506
4507enum ec_codec_shm_type {
4508 EC_CODEC_SHM_TYPE_EC_RAM = 0x0,
4509 EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1,
4510};
4511
4512struct __ec_align1 ec_param_ec_codec_get_shm_addr {
4513 uint8_t shm_id;
4514 uint8_t reserved[3];
4515};
4516
4517struct __ec_align4 ec_param_ec_codec_set_shm_addr {
4518 uint64_t phys_addr;
4519 uint32_t len;
4520 uint8_t shm_id;
4521 uint8_t reserved[3];
4522};
4523
4524struct __ec_align4 ec_param_ec_codec {
4525 uint8_t cmd;
4526 uint8_t reserved[3];
4527
4528 union {
4529 struct ec_param_ec_codec_get_shm_addr
4530 get_shm_addr_param;
4531 struct ec_param_ec_codec_set_shm_addr
4532 set_shm_addr_param;
4533 };
4534};
4535
4536struct __ec_align4 ec_response_ec_codec_get_capabilities {
4537 uint32_t capabilities;
4538};
4539
4540struct __ec_align4 ec_response_ec_codec_get_shm_addr {
4541 uint64_t phys_addr;
4542 uint32_t len;
4543 uint8_t type;
4544 uint8_t reserved[3];
4545};
4546
4547
4548
4549
4550#define EC_CMD_EC_CODEC_DMIC 0x00BD
4551
4552enum ec_codec_dmic_subcmd {
4553 EC_CODEC_DMIC_GET_MAX_GAIN = 0x0,
4554 EC_CODEC_DMIC_SET_GAIN_IDX = 0x1,
4555 EC_CODEC_DMIC_GET_GAIN_IDX = 0x2,
4556 EC_CODEC_DMIC_SUBCMD_COUNT,
4557};
4558
4559enum ec_codec_dmic_channel {
4560 EC_CODEC_DMIC_CHANNEL_0 = 0x0,
4561 EC_CODEC_DMIC_CHANNEL_1 = 0x1,
4562 EC_CODEC_DMIC_CHANNEL_2 = 0x2,
4563 EC_CODEC_DMIC_CHANNEL_3 = 0x3,
4564 EC_CODEC_DMIC_CHANNEL_4 = 0x4,
4565 EC_CODEC_DMIC_CHANNEL_5 = 0x5,
4566 EC_CODEC_DMIC_CHANNEL_6 = 0x6,
4567 EC_CODEC_DMIC_CHANNEL_7 = 0x7,
4568 EC_CODEC_DMIC_CHANNEL_COUNT,
4569};
4570
4571struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx {
4572 uint8_t channel;
4573 uint8_t gain;
4574 uint8_t reserved[2];
4575};
4576
4577struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx {
4578 uint8_t channel;
4579 uint8_t reserved[3];
4580};
4581
4582struct __ec_align4 ec_param_ec_codec_dmic {
4583 uint8_t cmd;
4584 uint8_t reserved[3];
4585
4586 union {
4587 struct ec_param_ec_codec_dmic_set_gain_idx
4588 set_gain_idx_param;
4589 struct ec_param_ec_codec_dmic_get_gain_idx
4590 get_gain_idx_param;
4591 };
4592};
4593
4594struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain {
4595 uint8_t max_gain;
4596};
4597
4598struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx {
4599 uint8_t gain;
4600};
4601
4602
4603
4604
4605
4606#define EC_CMD_EC_CODEC_I2S_RX 0x00BE
4607
4608enum ec_codec_i2s_rx_subcmd {
4609 EC_CODEC_I2S_RX_ENABLE = 0x0,
4610 EC_CODEC_I2S_RX_DISABLE = 0x1,
4611 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2,
4612 EC_CODEC_I2S_RX_SET_DAIFMT = 0x3,
4613 EC_CODEC_I2S_RX_SET_BCLK = 0x4,
4614 EC_CODEC_I2S_RX_RESET = 0x5,
4615 EC_CODEC_I2S_RX_SUBCMD_COUNT,
4616};
4617
4618enum ec_codec_i2s_rx_sample_depth {
4619 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0,
4620 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1,
4621 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT,
4622};
4623
4624enum ec_codec_i2s_rx_daifmt {
4625 EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0,
4626 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1,
4627 EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2,
4628 EC_CODEC_I2S_RX_DAIFMT_COUNT,
4629};
4630
4631struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth {
4632 uint8_t depth;
4633 uint8_t reserved[3];
4634};
4635
4636struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain {
4637 uint8_t left;
4638 uint8_t right;
4639 uint8_t reserved[2];
4640};
4641
4642struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt {
4643 uint8_t daifmt;
4644 uint8_t reserved[3];
4645};
4646
4647struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk {
4648 uint32_t bclk;
4649};
4650
4651struct __ec_align4 ec_param_ec_codec_i2s_rx {
4652 uint8_t cmd;
4653 uint8_t reserved[3];
4654
4655 union {
4656 struct ec_param_ec_codec_i2s_rx_set_sample_depth
4657 set_sample_depth_param;
4658 struct ec_param_ec_codec_i2s_rx_set_daifmt
4659 set_daifmt_param;
4660 struct ec_param_ec_codec_i2s_rx_set_bclk
4661 set_bclk_param;
4662 };
4663};
4664
4665
4666
4667
4668#define EC_CMD_EC_CODEC_WOV 0x00BF
4669
4670enum ec_codec_wov_subcmd {
4671 EC_CODEC_WOV_SET_LANG = 0x0,
4672 EC_CODEC_WOV_SET_LANG_SHM = 0x1,
4673 EC_CODEC_WOV_GET_LANG = 0x2,
4674 EC_CODEC_WOV_ENABLE = 0x3,
4675 EC_CODEC_WOV_DISABLE = 0x4,
4676 EC_CODEC_WOV_READ_AUDIO = 0x5,
4677 EC_CODEC_WOV_READ_AUDIO_SHM = 0x6,
4678 EC_CODEC_WOV_SUBCMD_COUNT,
4679};
4680
4681
4682
4683
4684
4685
4686
4687
4688struct __ec_align4 ec_param_ec_codec_wov_set_lang {
4689 uint8_t hash[32];
4690 uint32_t total_len;
4691 uint32_t offset;
4692 uint8_t buf[128];
4693 uint32_t len;
4694};
4695
4696struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm {
4697 uint8_t hash[32];
4698 uint32_t total_len;
4699};
4700
4701struct __ec_align4 ec_param_ec_codec_wov {
4702 uint8_t cmd;
4703 uint8_t reserved[3];
4704
4705 union {
4706 struct ec_param_ec_codec_wov_set_lang
4707 set_lang_param;
4708 struct ec_param_ec_codec_wov_set_lang_shm
4709 set_lang_shm_param;
4710 };
4711};
4712
4713struct __ec_align4 ec_response_ec_codec_wov_get_lang {
4714 uint8_t hash[32];
4715};
4716
4717struct __ec_align4 ec_response_ec_codec_wov_read_audio {
4718 uint8_t buf[128];
4719 uint32_t len;
4720};
4721
4722struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm {
4723 uint32_t offset;
4724 uint32_t len;
4725};
4726
4727
4728
4729
4730
4731
4732
4733
4734#define EC_CMD_REBOOT_EC 0x00D2
4735
4736
4737enum ec_reboot_cmd {
4738 EC_REBOOT_CANCEL = 0,
4739 EC_REBOOT_JUMP_RO = 1,
4740 EC_REBOOT_JUMP_RW = 2,
4741
4742 EC_REBOOT_COLD = 4,
4743 EC_REBOOT_DISABLE_JUMP = 5,
4744 EC_REBOOT_HIBERNATE = 6,
4745 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7,
4746 EC_REBOOT_COLD_AP_OFF = 8,
4747};
4748
4749
4750#define EC_REBOOT_FLAG_RESERVED0 BIT(0)
4751#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1)
4752#define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2)
4753
4754struct ec_params_reboot_ec {
4755 uint8_t cmd;
4756 uint8_t flags;
4757} __ec_align1;
4758
4759
4760
4761
4762
4763
4764
4765#define EC_CMD_GET_PANIC_INFO 0x00D3
4766
4767
4768
4769
4770
4771
4772
4773
4774
4775
4776
4777
4778
4779
4780
4781
4782
4783
4784#define EC_CMD_REBOOT 0x00D1
4785
4786
4787
4788
4789
4790
4791
4792
4793#define EC_CMD_RESEND_RESPONSE 0x00DB
4794
4795
4796
4797
4798
4799
4800
4801
4802
4803
4804
4805#define EC_CMD_VERSION0 0x00DC
4806
4807
4808
4809
4810
4811
4812
4813
4814
4815#define EC_CMD_PD_EXCHANGE_STATUS 0x0100
4816#define EC_VER_PD_EXCHANGE_STATUS 2
4817
4818enum pd_charge_state {
4819 PD_CHARGE_NO_CHANGE = 0,
4820 PD_CHARGE_NONE,
4821 PD_CHARGE_5V,
4822 PD_CHARGE_MAX
4823};
4824
4825
4826#define EC_STATUS_HIBERNATING BIT(0)
4827
4828struct ec_params_pd_status {
4829 uint8_t status;
4830 int8_t batt_soc;
4831 uint8_t charge_state;
4832} __ec_align1;
4833
4834
4835#define PD_STATUS_HOST_EVENT BIT(0)
4836#define PD_STATUS_IN_RW BIT(1)
4837#define PD_STATUS_JUMPED_TO_IMAGE BIT(2)
4838#define PD_STATUS_TCPC_ALERT_0 BIT(3)
4839#define PD_STATUS_TCPC_ALERT_1 BIT(4)
4840#define PD_STATUS_TCPC_ALERT_2 BIT(5)
4841#define PD_STATUS_TCPC_ALERT_3 BIT(6)
4842#define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \
4843 PD_STATUS_TCPC_ALERT_1 | \
4844 PD_STATUS_HOST_EVENT)
4845struct ec_response_pd_status {
4846 uint32_t curr_lim_ma;
4847 uint16_t status;
4848 int8_t active_charge_port;
4849} __ec_align_size1;
4850
4851
4852#define EC_CMD_PD_HOST_EVENT_STATUS 0x0104
4853
4854
4855#define PD_EVENT_UPDATE_DEVICE BIT(0)
4856#define PD_EVENT_POWER_CHANGE BIT(1)
4857#define PD_EVENT_IDENTITY_RECEIVED BIT(2)
4858#define PD_EVENT_DATA_SWAP BIT(3)
4859struct ec_response_host_event_status {
4860 uint32_t status;
4861} __ec_align4;
4862
4863
4864#define EC_CMD_USB_PD_CONTROL 0x0101
4865
4866enum usb_pd_control_role {
4867 USB_PD_CTRL_ROLE_NO_CHANGE = 0,
4868 USB_PD_CTRL_ROLE_TOGGLE_ON = 1,
4869 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2,
4870 USB_PD_CTRL_ROLE_FORCE_SINK = 3,
4871 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4,
4872 USB_PD_CTRL_ROLE_FREEZE = 5,
4873 USB_PD_CTRL_ROLE_COUNT
4874};
4875
4876enum usb_pd_control_mux {
4877 USB_PD_CTRL_MUX_NO_CHANGE = 0,
4878 USB_PD_CTRL_MUX_NONE = 1,
4879 USB_PD_CTRL_MUX_USB = 2,
4880 USB_PD_CTRL_MUX_DP = 3,
4881 USB_PD_CTRL_MUX_DOCK = 4,
4882 USB_PD_CTRL_MUX_AUTO = 5,
4883 USB_PD_CTRL_MUX_COUNT
4884};
4885
4886enum usb_pd_control_swap {
4887 USB_PD_CTRL_SWAP_NONE = 0,
4888 USB_PD_CTRL_SWAP_DATA = 1,
4889 USB_PD_CTRL_SWAP_POWER = 2,
4890 USB_PD_CTRL_SWAP_VCONN = 3,
4891 USB_PD_CTRL_SWAP_COUNT
4892};
4893
4894struct ec_params_usb_pd_control {
4895 uint8_t port;
4896 uint8_t role;
4897 uint8_t mux;
4898 uint8_t swap;
4899} __ec_align1;
4900
4901#define PD_CTRL_RESP_ENABLED_COMMS BIT(0)
4902#define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1)
4903#define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2)
4904
4905#define PD_CTRL_RESP_ROLE_POWER BIT(0)
4906#define PD_CTRL_RESP_ROLE_DATA BIT(1)
4907#define PD_CTRL_RESP_ROLE_VCONN BIT(2)
4908#define PD_CTRL_RESP_ROLE_DR_POWER BIT(3)
4909#define PD_CTRL_RESP_ROLE_DR_DATA BIT(4)
4910#define PD_CTRL_RESP_ROLE_USB_COMM BIT(5)
4911#define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6)
4912
4913struct ec_response_usb_pd_control {
4914 uint8_t enabled;
4915 uint8_t role;
4916 uint8_t polarity;
4917 uint8_t state;
4918} __ec_align1;
4919
4920struct ec_response_usb_pd_control_v1 {
4921 uint8_t enabled;
4922 uint8_t role;
4923 uint8_t polarity;
4924 char state[32];
4925} __ec_align1;
4926
4927
4928#define USBC_PD_CC_NONE 0
4929#define USBC_PD_CC_NO_UFP 1
4930#define USBC_PD_CC_AUDIO_ACC 2
4931#define USBC_PD_CC_DEBUG_ACC 3
4932#define USBC_PD_CC_UFP_ATTACHED 4
4933#define USBC_PD_CC_DFP_ATTACHED 5
4934
4935
4936#define USB_PD_CTRL_ACTIVE_CABLE BIT(0)
4937
4938#define USB_PD_CTRL_OPTICAL_CABLE BIT(1)
4939
4940#define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2)
4941
4942#define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3)
4943
4944struct ec_response_usb_pd_control_v2 {
4945 uint8_t enabled;
4946 uint8_t role;
4947 uint8_t polarity;
4948 char state[32];
4949 uint8_t cc_state;
4950 uint8_t dp_mode;
4951 uint8_t reserved;
4952 uint8_t control_flags;
4953 uint8_t cable_speed;
4954 uint8_t cable_gen;
4955} __ec_align1;
4956
4957#define EC_CMD_USB_PD_PORTS 0x0102
4958
4959
4960#define EC_USB_PD_MAX_PORTS 8
4961
4962struct ec_response_usb_pd_ports {
4963 uint8_t num_ports;
4964} __ec_align1;
4965
4966#define EC_CMD_USB_PD_POWER_INFO 0x0103
4967
4968#define PD_POWER_CHARGING_PORT 0xff
4969struct ec_params_usb_pd_power_info {
4970 uint8_t port;
4971} __ec_align1;
4972
4973enum usb_chg_type {
4974 USB_CHG_TYPE_NONE,
4975 USB_CHG_TYPE_PD,
4976 USB_CHG_TYPE_C,
4977 USB_CHG_TYPE_PROPRIETARY,
4978 USB_CHG_TYPE_BC12_DCP,
4979 USB_CHG_TYPE_BC12_CDP,
4980 USB_CHG_TYPE_BC12_SDP,
4981 USB_CHG_TYPE_OTHER,
4982 USB_CHG_TYPE_VBUS,
4983 USB_CHG_TYPE_UNKNOWN,
4984 USB_CHG_TYPE_DEDICATED,
4985};
4986enum usb_power_roles {
4987 USB_PD_PORT_POWER_DISCONNECTED,
4988 USB_PD_PORT_POWER_SOURCE,
4989 USB_PD_PORT_POWER_SINK,
4990 USB_PD_PORT_POWER_SINK_NOT_CHARGING,
4991};
4992
4993struct usb_chg_measures {
4994 uint16_t voltage_max;
4995 uint16_t voltage_now;
4996 uint16_t current_max;
4997 uint16_t current_lim;
4998} __ec_align2;
4999
5000struct ec_response_usb_pd_power_info {
5001 uint8_t role;
5002 uint8_t type;
5003 uint8_t dualrole;
5004 uint8_t reserved1;
5005 struct usb_chg_measures meas;
5006 uint32_t max_power;
5007} __ec_align4;
5008
5009
5010
5011
5012
5013
5014
5015#define EC_CMD_CHARGE_PORT_COUNT 0x0105
5016struct ec_response_charge_port_count {
5017 uint8_t port_count;
5018} __ec_align1;
5019
5020
5021#define EC_CMD_USB_PD_FW_UPDATE 0x0110
5022
5023enum usb_pd_fw_update_cmds {
5024 USB_PD_FW_REBOOT,
5025 USB_PD_FW_FLASH_ERASE,
5026 USB_PD_FW_FLASH_WRITE,
5027 USB_PD_FW_ERASE_SIG,
5028};
5029
5030struct ec_params_usb_pd_fw_update {
5031 uint16_t dev_id;
5032 uint8_t cmd;
5033 uint8_t port;
5034 uint32_t size;
5035
5036} __ec_align4;
5037
5038
5039#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111
5040
5041#define PD_RW_HASH_SIZE 20
5042struct ec_params_usb_pd_rw_hash_entry {
5043 uint16_t dev_id;
5044 uint8_t dev_rw_hash[PD_RW_HASH_SIZE];
5045 uint8_t reserved;
5046
5047
5048
5049
5050 uint32_t current_image;
5051} __ec_align1;
5052
5053
5054#define EC_CMD_USB_PD_DEV_INFO 0x0112
5055
5056struct ec_params_usb_pd_info_request {
5057 uint8_t port;
5058} __ec_align1;
5059
5060
5061#define EC_CMD_USB_PD_DISCOVERY 0x0113
5062struct ec_params_usb_pd_discovery_entry {
5063 uint16_t vid;
5064 uint16_t pid;
5065 uint8_t ptype;
5066} __ec_align_size1;
5067
5068
5069#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
5070
5071
5072enum usb_pd_override_ports {
5073 OVERRIDE_DONT_CHARGE = -2,
5074 OVERRIDE_OFF = -1,
5075
5076};
5077
5078struct ec_params_charge_port_override {
5079 int16_t override_port;
5080} __ec_align2;
5081
5082
5083
5084
5085
5086
5087#define EC_CMD_PD_GET_LOG_ENTRY 0x0115
5088
5089struct ec_response_pd_log {
5090 uint32_t timestamp;
5091 uint8_t type;
5092 uint8_t size_port;
5093 uint16_t data;
5094 uint8_t payload[];
5095} __ec_align4;
5096
5097
5098#define PD_LOG_TIMESTAMP_SHIFT 10
5099
5100#define PD_LOG_SIZE_MASK 0x1f
5101#define PD_LOG_PORT_MASK 0xe0
5102#define PD_LOG_PORT_SHIFT 5
5103#define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \
5104 ((size) & PD_LOG_SIZE_MASK))
5105#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
5106#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)
5107
5108
5109
5110#define PD_EVENT_MCU_BASE 0x00
5111#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0)
5112#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1)
5113
5114#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2)
5115
5116#define PD_EVENT_ACC_BASE 0x20
5117#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0)
5118#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1)
5119
5120#define PD_EVENT_PS_BASE 0x40
5121#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0)
5122
5123#define PD_EVENT_VIDEO_BASE 0x60
5124#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)
5125#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1)
5126
5127#define PD_EVENT_NO_ENTRY 0xff
5128
5129
5130
5131
5132
5133
5134
5135#define CHARGE_FLAGS_DUAL_ROLE BIT(15)
5136
5137#define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14)
5138
5139#define CHARGE_FLAGS_OVERRIDE BIT(13)
5140
5141#define CHARGE_FLAGS_TYPE_SHIFT 3
5142#define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT)
5143
5144#define CHARGE_FLAGS_ROLE_MASK (7 << 0)
5145
5146
5147
5148
5149#define PS_FAULT_OCP 1
5150#define PS_FAULT_FAST_OCP 2
5151#define PS_FAULT_OVP 3
5152#define PS_FAULT_DISCH 4
5153
5154
5155
5156
5157struct mcdp_version {
5158 uint8_t major;
5159 uint8_t minor;
5160 uint16_t build;
5161} __ec_align4;
5162
5163struct mcdp_info {
5164 uint8_t family[2];
5165 uint8_t chipid[2];
5166 struct mcdp_version irom;
5167 struct mcdp_version fw;
5168} __ec_align4;
5169
5170
5171#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
5172#define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
5173
5174
5175#define EC_CMD_USB_PD_GET_AMODE 0x0116
5176struct ec_params_usb_pd_get_mode_request {
5177 uint16_t svid_idx;
5178 uint8_t port;
5179} __ec_align_size1;
5180
5181struct ec_params_usb_pd_get_mode_response {
5182 uint16_t svid;
5183 uint16_t opos;
5184 uint32_t vdo[6];
5185} __ec_align4;
5186
5187#define EC_CMD_USB_PD_SET_AMODE 0x0117
5188
5189enum pd_mode_cmd {
5190 PD_EXIT_MODE = 0,
5191 PD_ENTER_MODE = 1,
5192
5193 PD_MODE_CMD_COUNT,
5194};
5195
5196struct ec_params_usb_pd_set_mode_request {
5197 uint32_t cmd;
5198 uint16_t svid;
5199 uint8_t opos;
5200 uint8_t port;
5201} __ec_align4;
5202
5203
5204#define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118
5205
5206struct ec_params_pd_write_log_entry {
5207 uint8_t type;
5208 uint8_t port;
5209} __ec_align1;
5210
5211
5212
5213#define EC_CMD_PD_CONTROL 0x0119
5214
5215enum ec_pd_control_cmd {
5216 PD_SUSPEND = 0,
5217 PD_RESUME,
5218 PD_RESET,
5219 PD_CONTROL_DISABLE,
5220 PD_CHIP_ON,
5221};
5222
5223struct ec_params_pd_control {
5224 uint8_t chip;
5225 uint8_t subcmd;
5226} __ec_align1;
5227
5228
5229#define EC_CMD_USB_PD_MUX_INFO 0x011A
5230
5231struct ec_params_usb_pd_mux_info {
5232 uint8_t port;
5233} __ec_align1;
5234
5235
5236#define USB_PD_MUX_NONE 0
5237#define USB_PD_MUX_USB_ENABLED BIT(0)
5238#define USB_PD_MUX_DP_ENABLED BIT(1)
5239#define USB_PD_MUX_POLARITY_INVERTED BIT(2)
5240#define USB_PD_MUX_HPD_IRQ BIT(3)
5241#define USB_PD_MUX_HPD_LVL BIT(4)
5242#define USB_PD_MUX_SAFE_MODE BIT(5)
5243#define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6)
5244#define USB_PD_MUX_USB4_ENABLED BIT(7)
5245
5246struct ec_response_usb_pd_mux_info {
5247 uint8_t flags;
5248} __ec_align1;
5249
5250#define EC_CMD_PD_CHIP_INFO 0x011B
5251
5252struct ec_params_pd_chip_info {
5253 uint8_t port;
5254 uint8_t renew;
5255} __ec_align1;
5256
5257struct ec_response_pd_chip_info {
5258 uint16_t vendor_id;
5259 uint16_t product_id;
5260 uint16_t device_id;
5261 union {
5262 uint8_t fw_version_string[8];
5263 uint64_t fw_version_number;
5264 };
5265} __ec_align2;
5266
5267struct ec_response_pd_chip_info_v1 {
5268 uint16_t vendor_id;
5269 uint16_t product_id;
5270 uint16_t device_id;
5271 union {
5272 uint8_t fw_version_string[8];
5273 uint64_t fw_version_number;
5274 };
5275 union {
5276 uint8_t min_req_fw_version_string[8];
5277 uint64_t min_req_fw_version_number;
5278 };
5279} __ec_align2;
5280
5281
5282#define EC_CMD_RWSIG_CHECK_STATUS 0x011C
5283
5284struct ec_response_rwsig_check_status {
5285 uint32_t status;
5286} __ec_align4;
5287
5288
5289#define EC_CMD_RWSIG_ACTION 0x011D
5290
5291enum rwsig_action {
5292 RWSIG_ACTION_ABORT = 0,
5293 RWSIG_ACTION_CONTINUE = 1,
5294};
5295
5296struct ec_params_rwsig_action {
5297 uint32_t action;
5298} __ec_align4;
5299
5300
5301#define EC_CMD_EFS_VERIFY 0x011E
5302
5303struct ec_params_efs_verify {
5304 uint8_t region;
5305} __ec_align1;
5306
5307
5308
5309
5310
5311
5312#define EC_CMD_GET_CROS_BOARD_INFO 0x011F
5313
5314
5315
5316
5317#define EC_CMD_SET_CROS_BOARD_INFO 0x0120
5318
5319enum cbi_data_tag {
5320 CBI_TAG_BOARD_VERSION = 0,
5321 CBI_TAG_OEM_ID = 1,
5322 CBI_TAG_SKU_ID = 2,
5323 CBI_TAG_DRAM_PART_NUM = 3,
5324 CBI_TAG_OEM_NAME = 4,
5325 CBI_TAG_MODEL_ID = 5,
5326 CBI_TAG_COUNT,
5327};
5328
5329
5330
5331
5332
5333
5334
5335#define CBI_GET_RELOAD BIT(0)
5336
5337struct ec_params_get_cbi {
5338 uint32_t tag;
5339 uint32_t flag;
5340} __ec_align4;
5341
5342
5343
5344
5345
5346
5347
5348
5349
5350#define CBI_SET_NO_SYNC BIT(0)
5351#define CBI_SET_INIT BIT(1)
5352
5353struct ec_params_set_cbi {
5354 uint32_t tag;
5355 uint32_t flag;
5356 uint32_t size;
5357 uint8_t data[];
5358} __ec_align1;
5359
5360
5361
5362
5363#define EC_CMD_GET_UPTIME_INFO 0x0121
5364
5365struct ec_response_uptime_info {
5366
5367
5368
5369
5370
5371
5372
5373
5374 uint32_t time_since_ec_boot_ms;
5375
5376
5377
5378
5379
5380
5381
5382 uint32_t ap_resets_since_ec_boot;
5383
5384
5385
5386
5387
5388 uint32_t ec_reset_flags;
5389
5390
5391 struct ap_reset_log_entry {
5392
5393
5394
5395
5396 uint16_t reset_cause;
5397
5398
5399 uint16_t reserved;
5400
5401
5402
5403
5404
5405
5406 uint32_t reset_time_ms;
5407 } recent_ap_reset[4];
5408} __ec_align4;
5409
5410
5411
5412
5413
5414
5415
5416#define EC_CMD_ADD_ENTROPY 0x0122
5417
5418enum add_entropy_action {
5419
5420 ADD_ENTROPY_ASYNC = 0,
5421
5422
5423
5424
5425
5426 ADD_ENTROPY_RESET_ASYNC = 1,
5427
5428 ADD_ENTROPY_GET_RESULT = 2,
5429};
5430
5431struct ec_params_rollback_add_entropy {
5432 uint8_t action;
5433} __ec_align1;
5434
5435
5436
5437
5438#define EC_CMD_ADC_READ 0x0123
5439
5440struct ec_params_adc_read {
5441 uint8_t adc_channel;
5442} __ec_align1;
5443
5444struct ec_response_adc_read {
5445 int32_t adc_value;
5446} __ec_align4;
5447
5448
5449
5450
5451#define EC_CMD_ROLLBACK_INFO 0x0124
5452
5453struct ec_response_rollback_info {
5454 int32_t id;
5455 int32_t rollback_min_version;
5456 int32_t rw_rollback_version;
5457} __ec_align4;
5458
5459
5460
5461#define EC_CMD_AP_RESET 0x0125
5462
5463
5464
5465
5466
5467
5468
5469
5470
5471#define EC_CMD_REGULATOR_GET_INFO 0x012C
5472
5473
5474#define EC_REGULATOR_NAME_MAX_LEN 16
5475
5476
5477#define EC_REGULATOR_VOLTAGE_MAX_COUNT 16
5478
5479struct ec_params_regulator_get_info {
5480 uint32_t index;
5481} __ec_align4;
5482
5483struct ec_response_regulator_get_info {
5484 char name[EC_REGULATOR_NAME_MAX_LEN];
5485 uint16_t num_voltages;
5486 uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT];
5487} __ec_align2;
5488
5489
5490
5491
5492#define EC_CMD_REGULATOR_ENABLE 0x012D
5493
5494struct ec_params_regulator_enable {
5495 uint32_t index;
5496 uint8_t enable;
5497} __ec_align4;
5498
5499
5500
5501
5502
5503
5504#define EC_CMD_REGULATOR_IS_ENABLED 0x012E
5505
5506struct ec_params_regulator_is_enabled {
5507 uint32_t index;
5508} __ec_align4;
5509
5510struct ec_response_regulator_is_enabled {
5511 uint8_t enabled;
5512} __ec_align1;
5513
5514
5515
5516
5517
5518
5519
5520
5521
5522#define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F
5523
5524struct ec_params_regulator_set_voltage {
5525 uint32_t index;
5526 uint32_t min_mv;
5527 uint32_t max_mv;
5528} __ec_align4;
5529
5530
5531
5532
5533
5534
5535
5536#define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130
5537
5538struct ec_params_regulator_get_voltage {
5539 uint32_t index;
5540} __ec_align4;
5541
5542struct ec_response_regulator_get_voltage {
5543 uint32_t voltage_mv;
5544} __ec_align4;
5545
5546
5547
5548
5549
5550
5551
5552
5553
5554
5555
5556
5557#define EC_CMD_TYPEC_DISCOVERY 0x0131
5558
5559enum typec_partner_type {
5560 TYPEC_PARTNER_SOP = 0,
5561 TYPEC_PARTNER_SOP_PRIME = 1,
5562};
5563
5564struct ec_params_typec_discovery {
5565 uint8_t port;
5566 uint8_t partner_type;
5567} __ec_align1;
5568
5569struct svid_mode_info {
5570 uint16_t svid;
5571 uint16_t mode_count;
5572 uint32_t mode_vdo[6];
5573};
5574
5575struct ec_response_typec_discovery {
5576 uint8_t identity_count;
5577 uint8_t svid_count;
5578 uint16_t reserved;
5579 uint32_t discovery_vdo[6];
5580 struct svid_mode_info svids[0];
5581} __ec_align1;
5582
5583
5584#define EC_CMD_TYPEC_CONTROL 0x0132
5585
5586enum typec_control_command {
5587 TYPEC_CONTROL_COMMAND_EXIT_MODES,
5588 TYPEC_CONTROL_COMMAND_CLEAR_EVENTS,
5589 TYPEC_CONTROL_COMMAND_ENTER_MODE,
5590};
5591
5592struct ec_params_typec_control {
5593 uint8_t port;
5594 uint8_t command;
5595 uint16_t reserved;
5596
5597
5598
5599
5600
5601
5602 union {
5603 uint32_t clear_events_mask;
5604 uint8_t mode_to_enter;
5605 uint8_t placeholder[128];
5606 };
5607} __ec_align1;
5608
5609
5610
5611
5612
5613
5614
5615
5616
5617
5618
5619#define EC_CMD_TYPEC_STATUS 0x0133
5620
5621
5622
5623
5624
5625
5626
5627
5628enum pd_power_role {
5629 PD_ROLE_SINK = 0,
5630 PD_ROLE_SOURCE = 1
5631};
5632
5633
5634
5635
5636
5637
5638
5639
5640enum pd_data_role {
5641 PD_ROLE_UFP = 0,
5642 PD_ROLE_DFP = 1,
5643 PD_ROLE_DISCONNECTED = 2,
5644};
5645
5646enum pd_vconn_role {
5647 PD_ROLE_VCONN_OFF = 0,
5648 PD_ROLE_VCONN_SRC = 1,
5649};
5650
5651
5652
5653
5654
5655enum tcpc_cc_polarity {
5656
5657
5658
5659
5660
5661 POLARITY_CC1 = 0,
5662 POLARITY_CC2 = 1,
5663
5664
5665
5666
5667
5668 POLARITY_CC1_DTS = 2,
5669 POLARITY_CC2_DTS = 3,
5670
5671
5672
5673
5674
5675
5676
5677 POLARITY_COUNT
5678};
5679
5680#define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)
5681#define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)
5682#define PD_STATUS_EVENT_HARD_RESET BIT(2)
5683
5684struct ec_params_typec_status {
5685 uint8_t port;
5686} __ec_align1;
5687
5688struct ec_response_typec_status {
5689 uint8_t pd_enabled;
5690 uint8_t dev_connected;
5691 uint8_t sop_connected;
5692 uint8_t source_cap_count;
5693
5694 uint8_t power_role;
5695 uint8_t data_role;
5696 uint8_t vconn_role;
5697 uint8_t sink_cap_count;
5698
5699 uint8_t polarity;
5700 uint8_t cc_state;
5701 uint8_t dp_pin;
5702 uint8_t mux_state;
5703
5704 char tc_state[32];
5705
5706 uint32_t events;
5707
5708
5709
5710
5711
5712
5713
5714
5715
5716
5717
5718 uint16_t sop_revision;
5719 uint16_t sop_prime_revision;
5720
5721 uint32_t source_cap_pdos[7];
5722
5723 uint32_t sink_cap_pdos[7];
5724} __ec_align1;
5725
5726
5727
5728
5729
5730
5731
5732
5733#define EC_CMD_CR51_BASE 0x0300
5734#define EC_CMD_CR51_LAST 0x03FF
5735
5736
5737
5738
5739
5740#define EC_CMD_FP_PASSTHRU 0x0400
5741
5742#define EC_FP_FLAG_NOT_COMPLETE 0x1
5743
5744struct ec_params_fp_passthru {
5745 uint16_t len;
5746 uint16_t flags;
5747 uint8_t data[];
5748} __ec_align2;
5749
5750
5751#define EC_CMD_FP_MODE 0x0402
5752
5753
5754#define FP_MODE_DEEPSLEEP BIT(0)
5755
5756#define FP_MODE_FINGER_DOWN BIT(1)
5757
5758#define FP_MODE_FINGER_UP BIT(2)
5759
5760#define FP_MODE_CAPTURE BIT(3)
5761
5762#define FP_MODE_ENROLL_SESSION BIT(4)
5763
5764#define FP_MODE_ENROLL_IMAGE BIT(5)
5765
5766#define FP_MODE_MATCH BIT(6)
5767
5768#define FP_MODE_RESET_SENSOR BIT(7)
5769
5770#define FP_MODE_DONT_CHANGE BIT(31)
5771
5772#define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \
5773 FP_MODE_FINGER_DOWN | \
5774 FP_MODE_FINGER_UP | \
5775 FP_MODE_CAPTURE | \
5776 FP_MODE_ENROLL_SESSION | \
5777 FP_MODE_ENROLL_IMAGE | \
5778 FP_MODE_MATCH | \
5779 FP_MODE_RESET_SENSOR | \
5780 FP_MODE_DONT_CHANGE)
5781
5782
5783#define FP_MODE_CAPTURE_TYPE_SHIFT 28
5784#define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT)
5785
5786
5787
5788
5789enum fp_capture_type {
5790
5791 FP_CAPTURE_VENDOR_FORMAT = 0,
5792
5793 FP_CAPTURE_SIMPLE_IMAGE = 1,
5794
5795 FP_CAPTURE_PATTERN0 = 2,
5796
5797 FP_CAPTURE_PATTERN1 = 3,
5798
5799 FP_CAPTURE_QUALITY_TEST = 4,
5800
5801 FP_CAPTURE_RESET_TEST = 5,
5802 FP_CAPTURE_TYPE_MAX,
5803};
5804
5805#define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \
5806 >> FP_MODE_CAPTURE_TYPE_SHIFT)
5807
5808struct ec_params_fp_mode {
5809 uint32_t mode;
5810} __ec_align4;
5811
5812struct ec_response_fp_mode {
5813 uint32_t mode;
5814} __ec_align4;
5815
5816
5817#define EC_CMD_FP_INFO 0x0403
5818
5819
5820#define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF)
5821
5822#define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF)
5823
5824#define FP_ERROR_NO_IRQ BIT(12)
5825
5826#define FP_ERROR_SPI_COMM BIT(13)
5827
5828#define FP_ERROR_BAD_HWID BIT(14)
5829
5830#define FP_ERROR_INIT_FAIL BIT(15)
5831
5832struct ec_response_fp_info_v0 {
5833
5834 uint32_t vendor_id;
5835 uint32_t product_id;
5836 uint32_t model_id;
5837 uint32_t version;
5838
5839 uint32_t frame_size;
5840 uint32_t pixel_format;
5841 uint16_t width;
5842 uint16_t height;
5843 uint16_t bpp;
5844 uint16_t errors;
5845} __ec_align4;
5846
5847struct ec_response_fp_info {
5848
5849 uint32_t vendor_id;
5850 uint32_t product_id;
5851 uint32_t model_id;
5852 uint32_t version;
5853
5854 uint32_t frame_size;
5855 uint32_t pixel_format;
5856 uint16_t width;
5857 uint16_t height;
5858 uint16_t bpp;
5859 uint16_t errors;
5860
5861 uint32_t template_size;
5862 uint16_t template_max;
5863 uint16_t template_valid;
5864 uint32_t template_dirty;
5865 uint32_t template_version;
5866} __ec_align4;
5867
5868
5869#define EC_CMD_FP_FRAME 0x0404
5870
5871
5872#define FP_FRAME_INDEX_SHIFT 28
5873
5874#define FP_FRAME_INDEX_RAW_IMAGE 0
5875
5876#define FP_FRAME_INDEX_TEMPLATE 1
5877#define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT)
5878#define FP_FRAME_OFFSET_MASK 0x0FFFFFFF
5879
5880
5881#define FP_TEMPLATE_FORMAT_VERSION 3
5882
5883
5884#define FP_CONTEXT_NONCE_BYTES 12
5885#define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t))
5886#define FP_CONTEXT_TAG_BYTES 16
5887#define FP_CONTEXT_SALT_BYTES 16
5888#define FP_CONTEXT_TPM_BYTES 32
5889
5890struct ec_fp_template_encryption_metadata {
5891
5892
5893
5894 uint16_t struct_version;
5895
5896 uint16_t reserved;
5897
5898
5899
5900
5901 uint8_t nonce[FP_CONTEXT_NONCE_BYTES];
5902 uint8_t salt[FP_CONTEXT_SALT_BYTES];
5903 uint8_t tag[FP_CONTEXT_TAG_BYTES];
5904};
5905
5906struct ec_params_fp_frame {
5907
5908
5909
5910
5911
5912 uint32_t offset;
5913 uint32_t size;
5914} __ec_align4;
5915
5916
5917#define EC_CMD_FP_TEMPLATE 0x0405
5918
5919
5920#define FP_TEMPLATE_COMMIT 0x80000000
5921
5922struct ec_params_fp_template {
5923 uint32_t offset;
5924 uint32_t size;
5925 uint8_t data[];
5926} __ec_align4;
5927
5928
5929#define EC_CMD_FP_CONTEXT 0x0406
5930
5931struct ec_params_fp_context {
5932 uint32_t userid[FP_CONTEXT_USERID_WORDS];
5933} __ec_align4;
5934
5935#define EC_CMD_FP_STATS 0x0407
5936
5937#define FPSTATS_CAPTURE_INV BIT(0)
5938#define FPSTATS_MATCHING_INV BIT(1)
5939
5940struct ec_response_fp_stats {
5941 uint32_t capture_time_us;
5942 uint32_t matching_time_us;
5943 uint32_t overall_time_us;
5944 struct {
5945 uint32_t lo;
5946 uint32_t hi;
5947 } overall_t0;
5948 uint8_t timestamps_invalid;
5949 int8_t template_matched;
5950} __ec_align2;
5951
5952#define EC_CMD_FP_SEED 0x0408
5953struct ec_params_fp_seed {
5954
5955
5956
5957 uint16_t struct_version;
5958
5959 uint16_t reserved;
5960
5961 uint8_t seed[FP_CONTEXT_TPM_BYTES];
5962} __ec_align4;
5963
5964#define EC_CMD_FP_ENC_STATUS 0x0409
5965
5966
5967#define FP_ENC_STATUS_SEED_SET BIT(0)
5968
5969struct ec_response_fp_encryption_status {
5970
5971 uint32_t valid_flags;
5972
5973 uint32_t status;
5974} __ec_align4;
5975
5976
5977
5978
5979
5980#define EC_CMD_TP_SELF_TEST 0x0500
5981
5982
5983#define EC_CMD_TP_FRAME_INFO 0x0501
5984
5985struct ec_response_tp_frame_info {
5986 uint32_t n_frames;
5987 uint32_t frame_sizes[];
5988} __ec_align4;
5989
5990
5991#define EC_CMD_TP_FRAME_SNAPSHOT 0x0502
5992
5993
5994#define EC_CMD_TP_FRAME_GET 0x0503
5995
5996struct ec_params_tp_frame_get {
5997 uint32_t frame_index;
5998 uint32_t offset;
5999 uint32_t size;
6000} __ec_align4;
6001
6002
6003
6004
6005#define EC_COMM_TEXT_MAX 8
6006
6007
6008
6009
6010
6011#define EC_CMD_BATTERY_GET_STATIC 0x0600
6012
6013
6014
6015
6016
6017struct ec_params_battery_static_info {
6018 uint8_t index;
6019} __ec_align_size1;
6020
6021
6022
6023
6024
6025
6026
6027
6028
6029
6030
6031struct ec_response_battery_static_info {
6032 uint16_t design_capacity;
6033 uint16_t design_voltage;
6034 char manufacturer[EC_COMM_TEXT_MAX];
6035 char model[EC_COMM_TEXT_MAX];
6036 char serial[EC_COMM_TEXT_MAX];
6037 char type[EC_COMM_TEXT_MAX];
6038
6039 uint32_t cycle_count;
6040} __ec_align4;
6041
6042
6043
6044
6045
6046#define EC_CMD_BATTERY_GET_DYNAMIC 0x0601
6047
6048
6049
6050
6051
6052struct ec_params_battery_dynamic_info {
6053 uint8_t index;
6054} __ec_align_size1;
6055
6056
6057
6058
6059
6060
6061
6062
6063
6064
6065
6066struct ec_response_battery_dynamic_info {
6067 int16_t actual_voltage;
6068 int16_t actual_current;
6069 int16_t remaining_capacity;
6070 int16_t full_capacity;
6071 int16_t flags;
6072 int16_t desired_voltage;
6073 int16_t desired_current;
6074} __ec_align2;
6075
6076
6077
6078
6079#define EC_CMD_CHARGER_CONTROL 0x0602
6080
6081
6082
6083
6084
6085
6086
6087
6088
6089
6090
6091struct ec_params_charger_control {
6092 int16_t max_current;
6093 uint16_t otg_voltage;
6094 uint8_t allow_charging;
6095} __ec_align_size1;
6096
6097
6098#define EC_CMD_USB_PD_MUX_ACK 0x0603
6099
6100struct ec_params_usb_pd_mux_ack {
6101 uint8_t port;
6102} __ec_align1;
6103
6104
6105
6106
6107
6108
6109
6110
6111
6112
6113
6114
6115
6116
6117
6118
6119
6120
6121
6122
6123
6124
6125
6126
6127
6128
6129
6130#define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00
6131#define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF
6132
6133
6134
6135
6136
6137#define EC_PRIVATE_HOST_COMMAND_VALUE(command) \
6138 (EC_CMD_BOARD_SPECIFIC_BASE + (command))
6139
6140
6141
6142
6143
6144
6145
6146
6147
6148
6149
6150
6151
6152
6153
6154
6155
6156
6157
6158
6159
6160
6161
6162
6163
6164#define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
6165#define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
6166
6167
6168
6169
6170
6171
6172
6173
6174#define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE
6175#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
6176#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
6177
6178
6179
6180#endif
6181