linux/include/linux/platform_data/gpio-omap.h
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   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * OMAP GPIO handling defines and functions
   4 *
   5 * Copyright (C) 2003-2005 Nokia Corporation
   6 *
   7 * Written by Juha Yrjölä <juha.yrjola@nokia.com>
   8 */
   9
  10#ifndef __ASM_ARCH_OMAP_GPIO_H
  11#define __ASM_ARCH_OMAP_GPIO_H
  12
  13#ifndef __ASSEMBLER__
  14#include <linux/io.h>
  15#include <linux/platform_device.h>
  16#endif
  17
  18#define OMAP1_MPUIO_BASE                        0xfffb5000
  19
  20/*
  21 * These are the omap15xx/16xx offsets. The omap7xx offset are
  22 * OMAP_MPUIO_ / 2 offsets below.
  23 */
  24#define OMAP_MPUIO_INPUT_LATCH          0x00
  25#define OMAP_MPUIO_OUTPUT               0x04
  26#define OMAP_MPUIO_IO_CNTL              0x08
  27#define OMAP_MPUIO_KBR_LATCH            0x10
  28#define OMAP_MPUIO_KBC                  0x14
  29#define OMAP_MPUIO_GPIO_EVENT_MODE      0x18
  30#define OMAP_MPUIO_GPIO_INT_EDGE        0x1c
  31#define OMAP_MPUIO_KBD_INT              0x20
  32#define OMAP_MPUIO_GPIO_INT             0x24
  33#define OMAP_MPUIO_KBD_MASKIT           0x28
  34#define OMAP_MPUIO_GPIO_MASKIT          0x2c
  35#define OMAP_MPUIO_GPIO_DEBOUNCING      0x30
  36#define OMAP_MPUIO_LATCH                0x34
  37
  38#define OMAP34XX_NR_GPIOS               6
  39
  40/*
  41 * OMAP1510 GPIO registers
  42 */
  43#define OMAP1510_GPIO_DATA_INPUT        0x00
  44#define OMAP1510_GPIO_DATA_OUTPUT       0x04
  45#define OMAP1510_GPIO_DIR_CONTROL       0x08
  46#define OMAP1510_GPIO_INT_CONTROL       0x0c
  47#define OMAP1510_GPIO_INT_MASK          0x10
  48#define OMAP1510_GPIO_INT_STATUS        0x14
  49#define OMAP1510_GPIO_PIN_CONTROL       0x18
  50
  51#define OMAP1510_IH_GPIO_BASE           64
  52
  53/*
  54 * OMAP1610 specific GPIO registers
  55 */
  56#define OMAP1610_GPIO_REVISION          0x0000
  57#define OMAP1610_GPIO_SYSCONFIG         0x0010
  58#define OMAP1610_GPIO_SYSSTATUS         0x0014
  59#define OMAP1610_GPIO_IRQSTATUS1        0x0018
  60#define OMAP1610_GPIO_IRQENABLE1        0x001c
  61#define OMAP1610_GPIO_WAKEUPENABLE      0x0028
  62#define OMAP1610_GPIO_DATAIN            0x002c
  63#define OMAP1610_GPIO_DATAOUT           0x0030
  64#define OMAP1610_GPIO_DIRECTION         0x0034
  65#define OMAP1610_GPIO_EDGE_CTRL1        0x0038
  66#define OMAP1610_GPIO_EDGE_CTRL2        0x003c
  67#define OMAP1610_GPIO_CLEAR_IRQENABLE1  0x009c
  68#define OMAP1610_GPIO_CLEAR_WAKEUPENA   0x00a8
  69#define OMAP1610_GPIO_CLEAR_DATAOUT     0x00b0
  70#define OMAP1610_GPIO_SET_IRQENABLE1    0x00dc
  71#define OMAP1610_GPIO_SET_WAKEUPENA     0x00e8
  72#define OMAP1610_GPIO_SET_DATAOUT       0x00f0
  73
  74/*
  75 * OMAP7XX specific GPIO registers
  76 */
  77#define OMAP7XX_GPIO_DATA_INPUT         0x00
  78#define OMAP7XX_GPIO_DATA_OUTPUT        0x04
  79#define OMAP7XX_GPIO_DIR_CONTROL        0x08
  80#define OMAP7XX_GPIO_INT_CONTROL        0x0c
  81#define OMAP7XX_GPIO_INT_MASK           0x10
  82#define OMAP7XX_GPIO_INT_STATUS         0x14
  83
  84/*
  85 * omap2+ specific GPIO registers
  86 */
  87#define OMAP24XX_GPIO_REVISION          0x0000
  88#define OMAP24XX_GPIO_SYSCONFIG         0x0010
  89#define OMAP24XX_GPIO_IRQSTATUS1        0x0018
  90#define OMAP24XX_GPIO_IRQSTATUS2        0x0028
  91#define OMAP24XX_GPIO_IRQENABLE2        0x002c
  92#define OMAP24XX_GPIO_IRQENABLE1        0x001c
  93#define OMAP24XX_GPIO_WAKE_EN           0x0020
  94#define OMAP24XX_GPIO_CTRL              0x0030
  95#define OMAP24XX_GPIO_OE                0x0034
  96#define OMAP24XX_GPIO_DATAIN            0x0038
  97#define OMAP24XX_GPIO_DATAOUT           0x003c
  98#define OMAP24XX_GPIO_LEVELDETECT0      0x0040
  99#define OMAP24XX_GPIO_LEVELDETECT1      0x0044
 100#define OMAP24XX_GPIO_RISINGDETECT      0x0048
 101#define OMAP24XX_GPIO_FALLINGDETECT     0x004c
 102#define OMAP24XX_GPIO_DEBOUNCE_EN       0x0050
 103#define OMAP24XX_GPIO_DEBOUNCE_VAL      0x0054
 104#define OMAP24XX_GPIO_CLEARIRQENABLE1   0x0060
 105#define OMAP24XX_GPIO_SETIRQENABLE1     0x0064
 106#define OMAP24XX_GPIO_CLEARWKUENA       0x0080
 107#define OMAP24XX_GPIO_SETWKUENA         0x0084
 108#define OMAP24XX_GPIO_CLEARDATAOUT      0x0090
 109#define OMAP24XX_GPIO_SETDATAOUT        0x0094
 110
 111#define OMAP4_GPIO_REVISION             0x0000
 112#define OMAP4_GPIO_SYSCONFIG            0x0010
 113#define OMAP4_GPIO_EOI                  0x0020
 114#define OMAP4_GPIO_IRQSTATUSRAW0        0x0024
 115#define OMAP4_GPIO_IRQSTATUSRAW1        0x0028
 116#define OMAP4_GPIO_IRQSTATUS0           0x002c
 117#define OMAP4_GPIO_IRQSTATUS1           0x0030
 118#define OMAP4_GPIO_IRQSTATUSSET0        0x0034
 119#define OMAP4_GPIO_IRQSTATUSSET1        0x0038
 120#define OMAP4_GPIO_IRQSTATUSCLR0        0x003c
 121#define OMAP4_GPIO_IRQSTATUSCLR1        0x0040
 122#define OMAP4_GPIO_IRQWAKEN0            0x0044
 123#define OMAP4_GPIO_IRQWAKEN1            0x0048
 124#define OMAP4_GPIO_IRQENABLE1           0x011c
 125#define OMAP4_GPIO_WAKE_EN              0x0120
 126#define OMAP4_GPIO_IRQSTATUS2           0x0128
 127#define OMAP4_GPIO_IRQENABLE2           0x012c
 128#define OMAP4_GPIO_CTRL                 0x0130
 129#define OMAP4_GPIO_OE                   0x0134
 130#define OMAP4_GPIO_DATAIN               0x0138
 131#define OMAP4_GPIO_DATAOUT              0x013c
 132#define OMAP4_GPIO_LEVELDETECT0         0x0140
 133#define OMAP4_GPIO_LEVELDETECT1         0x0144
 134#define OMAP4_GPIO_RISINGDETECT         0x0148
 135#define OMAP4_GPIO_FALLINGDETECT        0x014c
 136#define OMAP4_GPIO_DEBOUNCENABLE        0x0150
 137#define OMAP4_GPIO_DEBOUNCINGTIME       0x0154
 138#define OMAP4_GPIO_CLEARIRQENABLE1      0x0160
 139#define OMAP4_GPIO_SETIRQENABLE1        0x0164
 140#define OMAP4_GPIO_CLEARWKUENA          0x0180
 141#define OMAP4_GPIO_SETWKUENA            0x0184
 142#define OMAP4_GPIO_CLEARDATAOUT         0x0190
 143#define OMAP4_GPIO_SETDATAOUT           0x0194
 144
 145#define OMAP_MAX_GPIO_LINES             192
 146
 147#define OMAP_MPUIO(nr)          (OMAP_MAX_GPIO_LINES + (nr))
 148#define OMAP_GPIO_IS_MPUIO(nr)  ((nr) >= OMAP_MAX_GPIO_LINES)
 149
 150#ifndef __ASSEMBLER__
 151struct omap_gpio_reg_offs {
 152        u16 revision;
 153        u16 sysconfig;
 154        u16 direction;
 155        u16 datain;
 156        u16 dataout;
 157        u16 set_dataout;
 158        u16 clr_dataout;
 159        u16 irqstatus;
 160        u16 irqstatus2;
 161        u16 irqstatus_raw0;
 162        u16 irqstatus_raw1;
 163        u16 irqenable;
 164        u16 irqenable2;
 165        u16 set_irqenable;
 166        u16 clr_irqenable;
 167        u16 debounce;
 168        u16 debounce_en;
 169        u16 ctrl;
 170        u16 wkup_en;
 171        u16 leveldetect0;
 172        u16 leveldetect1;
 173        u16 risingdetect;
 174        u16 fallingdetect;
 175        u16 irqctrl;
 176        u16 edgectrl1;
 177        u16 edgectrl2;
 178        u16 pinctrl;
 179
 180        bool irqenable_inv;
 181};
 182
 183struct omap_gpio_platform_data {
 184        int bank_type;
 185        int bank_width;         /* GPIO bank width */
 186        int bank_stride;        /* Only needed for omap1 MPUIO */
 187        bool dbck_flag;         /* dbck required or not - True for OMAP3&4 */
 188        bool loses_context;     /* whether the bank would ever lose context */
 189        bool is_mpuio;          /* whether the bank is of type MPUIO */
 190        u32 non_wakeup_gpios;
 191
 192        const struct omap_gpio_reg_offs *regs;
 193
 194        /* Return context loss count due to PM states changing */
 195        int (*get_context_loss_count)(struct device *dev);
 196};
 197
 198#endif /* __ASSEMBLER__ */
 199
 200#endif
 201