LXR linux/arch/arm64/include/asm/processor.h

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Based on arch/arm/include/asm/processor.h
   4 *
   5 * Copyright (C) 1995-1999 Russell King
   6 * Copyright (C) 2012 ARM Ltd.
   7 */
   8#ifndef __ASM_PROCESSOR_H
   9#define __ASM_PROCESSOR_H
  10
  11/*
  12 * On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
  13 * no point in shifting all network buffers by 2 bytes just to make some IP
  14 * header fields appear aligned in memory, potentially sacrificing some DMA
  15 * performance on some platforms.
  16 */
  17#define NET_IP_ALIGN    0
  18
  19#ifndef __ASSEMBLY__
  20
  21#include <linux/build_bug.h>
  22#include <linux/cache.h>
  23#include <linux/init.h>
  24#include <linux/stddef.h>
  25#include <linux/string.h>
  26#include <linux/thread_info.h>
  27
  28#include <vdso/processor.h>
  29
  30#include <asm/alternative.h>
  31#include <asm/cpufeature.h>
  32#include <asm/hw_breakpoint.h>
  33#include <asm/kasan.h>
  34#include <asm/lse.h>
  35#include <asm/pgtable-hwdef.h>
  36#include <asm/pointer_auth.h>
  37#include <asm/ptrace.h>
  38#include <asm/spectre.h>
  39#include <asm/types.h>
  40
  41/*
  42 * TASK_SIZE - the maximum size of a user space task.
  43 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
  44 */
  45
  46#define DEFAULT_MAP_WINDOW_64   (UL(1) << VA_BITS_MIN)
  47#define TASK_SIZE_64            (UL(1) << vabits_actual)
  48#define TASK_SIZE_MAX           (UL(1) << VA_BITS)
  49
  50#ifdef CONFIG_COMPAT
  51#if defined(CONFIG_ARM64_64K_PAGES) && defined(CONFIG_KUSER_HELPERS)
  52/*
  53 * With CONFIG_ARM64_64K_PAGES enabled, the last page is occupied
  54 * by the compat vectors page.
  55 */
  56#define TASK_SIZE_32            UL(0x100000000)
  57#else
  58#define TASK_SIZE_32            (UL(0x100000000) - PAGE_SIZE)
  59#endif /* CONFIG_ARM64_64K_PAGES */
  60#define TASK_SIZE               (test_thread_flag(TIF_32BIT) ? \
  61                                TASK_SIZE_32 : TASK_SIZE_64)
  62#define TASK_SIZE_OF(tsk)       (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
  63                                TASK_SIZE_32 : TASK_SIZE_64)
  64#define DEFAULT_MAP_WINDOW      (test_thread_flag(TIF_32BIT) ? \
  65                                TASK_SIZE_32 : DEFAULT_MAP_WINDOW_64)
  66#else
  67#define TASK_SIZE               TASK_SIZE_64
  68#define DEFAULT_MAP_WINDOW      DEFAULT_MAP_WINDOW_64
  69#endif /* CONFIG_COMPAT */
  70
  71#ifdef CONFIG_ARM64_FORCE_52BIT
  72#define STACK_TOP_MAX           TASK_SIZE_64
  73#define TASK_UNMAPPED_BASE      (PAGE_ALIGN(TASK_SIZE / 4))
  74#else
  75#define STACK_TOP_MAX           DEFAULT_MAP_WINDOW_64
  76#define TASK_UNMAPPED_BASE      (PAGE_ALIGN(DEFAULT_MAP_WINDOW / 4))
  77#endif /* CONFIG_ARM64_FORCE_52BIT */
  78
  79#ifdef CONFIG_COMPAT
  80#define AARCH32_VECTORS_BASE    0xffff0000
  81#define STACK_TOP               (test_thread_flag(TIF_32BIT) ? \
  82                                AARCH32_VECTORS_BASE : STACK_TOP_MAX)
  83#else
  84#define STACK_TOP               STACK_TOP_MAX
  85#endif /* CONFIG_COMPAT */
  86
  87#ifndef CONFIG_ARM64_FORCE_52BIT
  88#define arch_get_mmap_end(addr) ((addr > DEFAULT_MAP_WINDOW) ? TASK_SIZE :\
  89                                DEFAULT_MAP_WINDOW)
  90
  91#define arch_get_mmap_base(addr, base) ((addr > DEFAULT_MAP_WINDOW) ? \
  92                                        base + TASK_SIZE - DEFAULT_MAP_WINDOW :\
  93                                        base)
  94#endif /* CONFIG_ARM64_FORCE_52BIT */
  95
  96extern phys_addr_t arm64_dma_phys_limit;
  97#define ARCH_LOW_ADDRESS_LIMIT  (arm64_dma_phys_limit - 1)
  98
  99struct debug_info {
 100#ifdef CONFIG_HAVE_HW_BREAKPOINT
 101        /* Have we suspended stepping by a debugger? */
 102        int                     suspended_step;
 103        /* Allow breakpoints and watchpoints to be disabled for this thread. */
 104        int                     bps_disabled;
 105        int                     wps_disabled;
 106        /* Hardware breakpoints pinned to this task. */
 107        struct perf_event       *hbp_break[ARM_MAX_BRP];
 108        struct perf_event       *hbp_watch[ARM_MAX_WRP];
 109#endif
 110};
 111
 112struct cpu_context {
 113        unsigned long x19;
 114        unsigned long x20;
 115        unsigned long x21;
 116        unsigned long x22;
 117        unsigned long x23;
 118        unsigned long x24;
 119        unsigned long x25;
 120        unsigned long x26;
 121        unsigned long x27;
 122        unsigned long x28;
 123        unsigned long fp;
 124        unsigned long sp;
 125        unsigned long pc;
 126};
 127
 128struct thread_struct {
 129        struct cpu_context      cpu_context;    /* cpu context */
 130
 131        /*
 132         * Whitelisted fields for hardened usercopy:
 133         * Maintainers must ensure manually that this contains no
 134         * implicit padding.
 135         */
 136        struct {
 137                unsigned long   tp_value;       /* TLS register */
 138                unsigned long   tp2_value;
 139                struct user_fpsimd_state fpsimd_state;
 140        } uw;
 141
 142        unsigned int            fpsimd_cpu;
 143        void                    *sve_state;     /* SVE registers, if any */
 144        unsigned int            sve_vl;         /* SVE vector length */
 145        unsigned int            sve_vl_onexec;  /* SVE vl after next exec */
 146        unsigned long           fault_address;  /* fault info */
 147        unsigned long           fault_code;     /* ESR_EL1 value */
 148        struct debug_info       debug;          /* debugging */
 149#ifdef CONFIG_ARM64_PTR_AUTH
 150        struct ptrauth_keys_user        keys_user;
 151#ifdef CONFIG_ARM64_PTR_AUTH_KERNEL
 152        struct ptrauth_keys_kernel      keys_kernel;
 153#endif
 154#endif
 155#ifdef CONFIG_ARM64_MTE
 156        u64                     gcr_user_excl;
 157#endif
 158        u64                     sctlr_user;
 159};
 160
 161#define SCTLR_USER_MASK                                                        \
 162        (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | SCTLR_ELx_ENDA | SCTLR_ELx_ENDB |   \
 163         SCTLR_EL1_TCF0_MASK)
 164
 165static inline void arch_thread_struct_whitelist(unsigned long *offset,
 166                                                unsigned long *size)
 167{
 168        /* Verify that there is no padding among the whitelisted fields: */
 169        BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
 170                     sizeof_field(struct thread_struct, uw.tp_value) +
 171                     sizeof_field(struct thread_struct, uw.tp2_value) +
 172                     sizeof_field(struct thread_struct, uw.fpsimd_state));
 173
 174        *offset = offsetof(struct thread_struct, uw);
 175        *size = sizeof_field(struct thread_struct, uw);
 176}
 177
 178#ifdef CONFIG_COMPAT
 179#define task_user_tls(t)                                                \
 180({                                                                      \
 181        unsigned long *__tls;                                           \
 182        if (is_compat_thread(task_thread_info(t)))                      \
 183                __tls = &(t)->thread.uw.tp2_value;                      \
 184        else                                                            \
 185                __tls = &(t)->thread.uw.tp_value;                       \
 186        __tls;                                                          \
 187 })
 188#else
 189#define task_user_tls(t)        (&(t)->thread.uw.tp_value)
 190#endif
 191
 192/* Sync TPIDR_EL0 back to thread_struct for current */
 193void tls_preserve_current_state(void);
 194
 195#define INIT_THREAD {                           \
 196        .fpsimd_cpu = NR_CPUS,                  \
 197}
 198
 199static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
 200{
 201        memset(regs, 0, sizeof(*regs));
 202        forget_syscall(regs);
 203        regs->pc = pc;
 204
 205        if (system_uses_irq_prio_masking())
 206                regs->pmr_save = GIC_PRIO_IRQON;
 207}
 208
 209static inline void start_thread(struct pt_regs *regs, unsigned long pc,
 210                                unsigned long sp)
 211{
 212        start_thread_common(regs, pc);
 213        regs->pstate = PSR_MODE_EL0t;
 214        spectre_v4_enable_task_mitigation(current);
 215        regs->sp = sp;
 216}
 217
 218#ifdef CONFIG_COMPAT
 219static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
 220                                       unsigned long sp)
 221{
 222        start_thread_common(regs, pc);
 223        regs->pstate = PSR_AA32_MODE_USR;
 224        if (pc & 1)
 225                regs->pstate |= PSR_AA32_T_BIT;
 226
 227#ifdef __AARCH64EB__
 228        regs->pstate |= PSR_AA32_E_BIT;
 229#endif
 230
 231        spectre_v4_enable_task_mitigation(current);
 232        regs->compat_sp = sp;
 233}
 234#endif
 235
 236static inline bool is_ttbr0_addr(unsigned long addr)
 237{
 238        /* entry assembly clears tags for TTBR0 addrs */
 239        return addr < TASK_SIZE;
 240}
 241
 242static inline bool is_ttbr1_addr(unsigned long addr)
 243{
 244        /* TTBR1 addresses may have a tag if KASAN_SW_TAGS is in use */
 245        return arch_kasan_reset_tag(addr) >= PAGE_OFFSET;
 246}
 247
 248/* Forward declaration, a strange C thing */
 249struct task_struct;
 250
 251/* Free all resources held by a thread. */
 252extern void release_thread(struct task_struct *);
 253
 254unsigned long get_wchan(struct task_struct *p);
 255
 256void set_task_sctlr_el1(u64 sctlr);
 257
 258/* Thread switching */
 259extern struct task_struct *cpu_switch_to(struct task_struct *prev,
 260                                         struct task_struct *next);
 261
 262#define task_pt_regs(p) \
 263        ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
 264
 265#define KSTK_EIP(tsk)   ((unsigned long)task_pt_regs(tsk)->pc)
 266#define KSTK_ESP(tsk)   user_stack_pointer(task_pt_regs(tsk))
 267
 268/*
 269 * Prefetching support
 270 */
 271#define ARCH_HAS_PREFETCH
 272static inline void prefetch(const void *ptr)
 273{
 274        asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
 275}
 276
 277#define ARCH_HAS_PREFETCHW
 278static inline void prefetchw(const void *ptr)
 279{
 280        asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
 281}
 282
 283#define ARCH_HAS_SPINLOCK_PREFETCH
 284static inline void spin_lock_prefetch(const void *ptr)
 285{
 286        asm volatile(ARM64_LSE_ATOMIC_INSN(
 287                     "prfm pstl1strm, %a0",
 288                     "nop") : : "p" (ptr));
 289}
 290
 291extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
 292extern void __init minsigstksz_setup(void);
 293
 294/*
 295 * Not at the top of the file due to a direct #include cycle between
 296 * <asm/fpsimd.h> and <asm/processor.h>.  Deferring this #include
 297 * ensures that contents of processor.h are visible to fpsimd.h even if
 298 * processor.h is included first.
 299 *
 300 * These prctl helpers are the only things in this file that require
 301 * fpsimd.h.  The core code expects them to be in this header.
 302 */
 303#include <asm/fpsimd.h>
 304
 305/* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */
 306#define SVE_SET_VL(arg) sve_set_current_vl(arg)
 307#define SVE_GET_VL()    sve_get_current_vl()
 308
 309/* PR_PAC_RESET_KEYS prctl */
 310#define PAC_RESET_KEYS(tsk, arg)        ptrauth_prctl_reset_keys(tsk, arg)
 311
 312/* PR_PAC_{SET,GET}_ENABLED_KEYS prctl */
 313#define PAC_SET_ENABLED_KEYS(tsk, keys, enabled)                                \
 314        ptrauth_set_enabled_keys(tsk, keys, enabled)
 315#define PAC_GET_ENABLED_KEYS(tsk) ptrauth_get_enabled_keys(tsk)
 316
 317#ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
 318/* PR_{SET,GET}_TAGGED_ADDR_CTRL prctl */
 319long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg);
 320long get_tagged_addr_ctrl(struct task_struct *task);
 321#define SET_TAGGED_ADDR_CTRL(arg)       set_tagged_addr_ctrl(current, arg)
 322#define GET_TAGGED_ADDR_CTRL()          get_tagged_addr_ctrl(current)
 323#endif
 324
 325/*
 326 * For CONFIG_GCC_PLUGIN_STACKLEAK
 327 *
 328 * These need to be macros because otherwise we get stuck in a nightmare
 329 * of header definitions for the use of task_stack_page.
 330 */
 331
 332#define current_top_of_stack()                                                          \
 333({                                                                                      \
 334        struct stack_info _info;                                                        \
 335        BUG_ON(!on_accessible_stack(current, current_stack_pointer, 1, &_info));        \
 336        _info.high;                                                                     \
 337})
 338#define on_thread_stack()       (on_task_stack(current, current_stack_pointer, 1, NULL))
 339
 340#endif /* __ASSEMBLY__ */
 341#endif /* __ASM_PROCESSOR_H */
 342