LXR linux/arch/arm64/mm/flush.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Based on arch/arm/mm/flush.c
   4 *
   5 * Copyright (C) 1995-2002 Russell King
   6 * Copyright (C) 2012 ARM Ltd.
   7 */
   8
   9#include <linux/export.h>
  10#include <linux/mm.h>
  11#include <linux/pagemap.h>
  12
  13#include <asm/cacheflush.h>
  14#include <asm/cache.h>
  15#include <asm/tlbflush.h>
  16
  17void sync_icache_aliases(unsigned long start, unsigned long end)
  18{
  19        if (icache_is_aliasing()) {
  20                dcache_clean_pou(start, end);
  21                icache_inval_all_pou();
  22        } else {
  23                /*
  24                 * Don't issue kick_all_cpus_sync() after I-cache invalidation
  25                 * for user mappings.
  26                 */
  27                caches_clean_inval_pou(start, end);
  28        }
  29}
  30
  31static void flush_ptrace_access(struct vm_area_struct *vma, unsigned long start,
  32                                unsigned long end)
  33{
  34        if (vma->vm_flags & VM_EXEC)
  35                sync_icache_aliases(start, end);
  36}
  37
  38/*
  39 * Copy user data from/to a page which is mapped into a different processes
  40 * address space.  Really, we want to allow our "user space" model to handle
  41 * this.
  42 */
  43void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
  44                       unsigned long uaddr, void *dst, const void *src,
  45                       unsigned long len)
  46{
  47        memcpy(dst, src, len);
  48        flush_ptrace_access(vma, (unsigned long)dst, (unsigned long)dst + len);
  49}
  50
  51void __sync_icache_dcache(pte_t pte)
  52{
  53        struct page *page = pte_page(pte);
  54
  55        if (!test_bit(PG_dcache_clean, &page->flags)) {
  56                sync_icache_aliases((unsigned long)page_address(page),
  57                                    (unsigned long)page_address(page) +
  58                                            page_size(page));
  59                set_bit(PG_dcache_clean, &page->flags);
  60        }
  61}
  62EXPORT_SYMBOL_GPL(__sync_icache_dcache);
  63
  64/*
  65 * This function is called when a page has been modified by the kernel. Mark
  66 * it as dirty for later flushing when mapped in user space (if executable,
  67 * see __sync_icache_dcache).
  68 */
  69void flush_dcache_page(struct page *page)
  70{
  71        if (test_bit(PG_dcache_clean, &page->flags))
  72                clear_bit(PG_dcache_clean, &page->flags);
  73}
  74EXPORT_SYMBOL(flush_dcache_page);
  75
  76/*
  77 * Additional functions defined in assembly.
  78 */
  79EXPORT_SYMBOL(caches_clean_inval_pou);
  80
  81#ifdef CONFIG_ARCH_HAS_PMEM_API
  82void arch_wb_cache_pmem(void *addr, size_t size)
  83{
  84        /* Ensure order against any prior non-cacheable writes */
  85        dmb(osh);
  86        dcache_clean_pop((unsigned long)addr, (unsigned long)addr + size);
  87}
  88EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);
  89
  90void arch_invalidate_pmem(void *addr, size_t size)
  91{
  92        dcache_inval_poc((unsigned long)addr, (unsigned long)addr + size);
  93}
  94EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
  95#endif
  96