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12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/string.h>
17#include <linux/export.h>
18#include <linux/clk-provider.h>
19#include <linux/clkdev.h>
20#include <linux/err.h>
21#include <linux/gpio/driver.h>
22#include <linux/platform_device.h>
23#include <linux/platform_data/txx9/ndfmc.h>
24#include <linux/serial_core.h>
25#include <linux/mtd/physmap.h>
26#include <linux/leds.h>
27#include <linux/device.h>
28#include <linux/slab.h>
29#include <linux/io.h>
30#include <linux/irq.h>
31#include <asm/bootinfo.h>
32#include <asm/idle.h>
33#include <asm/time.h>
34#include <asm/reboot.h>
35#include <asm/r4kcache.h>
36#include <asm/setup.h>
37#include <asm/txx9/generic.h>
38#include <asm/txx9/pci.h>
39#include <asm/txx9tmr.h>
40#include <asm/txx9/dmac.h>
41#ifdef CONFIG_CPU_TX49XX
42#include <asm/txx9/tx4938.h>
43#endif
44
45
46struct resource txx9_ce_res[8];
47static char txx9_ce_res_name[8][4];
48
49
50unsigned int txx9_pcode;
51char txx9_pcode_str[8];
52static struct resource txx9_reg_res = {
53 .name = txx9_pcode_str,
54 .flags = IORESOURCE_MEM,
55};
56void __init
57txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
58{
59 int i;
60
61 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
62 sprintf(txx9_ce_res_name[i], "CE%d", i);
63 txx9_ce_res[i].flags = IORESOURCE_MEM;
64 txx9_ce_res[i].name = txx9_ce_res_name[i];
65 }
66
67 txx9_pcode = pcode;
68 sprintf(txx9_pcode_str, "TX%x", pcode);
69 if (base) {
70 txx9_reg_res.start = base & 0xfffffffffULL;
71 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
72 request_resource(&iomem_resource, &txx9_reg_res);
73 }
74}
75
76
77unsigned int txx9_master_clock;
78unsigned int txx9_cpu_clock;
79unsigned int txx9_gbus_clock;
80
81#ifdef CONFIG_CPU_TX39XX
82
83int txx9_ccfg_toeon __initdata;
84#else
85int txx9_ccfg_toeon __initdata = 1;
86#endif
87
88#define BOARD_VEC(board) extern struct txx9_board_vec board;
89#include <asm/txx9/boards.h>
90#undef BOARD_VEC
91
92struct txx9_board_vec *txx9_board_vec __initdata;
93static char txx9_system_type[32];
94
95static struct txx9_board_vec *board_vecs[] __initdata = {
96#define BOARD_VEC(board) &board,
97#include <asm/txx9/boards.h>
98#undef BOARD_VEC
99};
100
101static struct txx9_board_vec *__init find_board_byname(const char *name)
102{
103 int i;
104
105
106 for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
107 if (strstr(board_vecs[i]->system, name))
108 return board_vecs[i];
109 }
110 return NULL;
111}
112
113static void __init prom_init_cmdline(void)
114{
115 int argc;
116 int *argv32;
117 int i;
118
119 if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
120
121
122
123
124 argc = 0;
125 argv32 = NULL;
126 } else {
127 argc = (int)fw_arg0;
128 argv32 = (int *)fw_arg1;
129 }
130
131 arcs_cmdline[0] = '\0';
132
133 for (i = 1; i < argc; i++) {
134 char *str = (char *)(long)argv32[i];
135 if (i != 1)
136 strcat(arcs_cmdline, " ");
137 if (strchr(str, ' ')) {
138 strcat(arcs_cmdline, "\"");
139 strcat(arcs_cmdline, str);
140 strcat(arcs_cmdline, "\"");
141 } else
142 strcat(arcs_cmdline, str);
143 }
144}
145
146static int txx9_ic_disable __initdata;
147static int txx9_dc_disable __initdata;
148
149#if defined(CONFIG_CPU_TX49XX)
150
151static void __init early_flush_dcache(void)
152{
153 unsigned int conf = read_c0_config();
154 unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
155 unsigned int linesz = 32;
156 unsigned long addr, end;
157
158 end = INDEX_BASE + dc_size / 4;
159
160 for (addr = INDEX_BASE; addr < end; addr += linesz) {
161 cache_op(Index_Writeback_Inv_D, addr | 0);
162 cache_op(Index_Writeback_Inv_D, addr | 1);
163 cache_op(Index_Writeback_Inv_D, addr | 2);
164 cache_op(Index_Writeback_Inv_D, addr | 3);
165 }
166}
167
168static void __init txx9_cache_fixup(void)
169{
170 unsigned int conf;
171
172 conf = read_c0_config();
173
174 if (txx9_ic_disable) {
175 conf |= TX49_CONF_IC;
176 write_c0_config(conf);
177 }
178 if (txx9_dc_disable) {
179 early_flush_dcache();
180 conf |= TX49_CONF_DC;
181 write_c0_config(conf);
182 }
183
184
185 conf = read_c0_config();
186 if (!txx9_ic_disable)
187 conf &= ~TX49_CONF_IC;
188 if (!txx9_dc_disable)
189 conf &= ~TX49_CONF_DC;
190 write_c0_config(conf);
191
192 if (conf & TX49_CONF_IC)
193 pr_info("TX49XX I-Cache disabled.\n");
194 if (conf & TX49_CONF_DC)
195 pr_info("TX49XX D-Cache disabled.\n");
196}
197#elif defined(CONFIG_CPU_TX39XX)
198
199static void __init early_flush_dcache(void)
200{
201 unsigned int conf = read_c0_config();
202 unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
203 TX39_CONF_DCS_SHIFT));
204 unsigned int linesz = 16;
205 unsigned long addr, end;
206
207 end = INDEX_BASE + dc_size / 2;
208
209 for (addr = INDEX_BASE; addr < end; addr += linesz) {
210 cache_op(Index_Writeback_Inv_D, addr | 0);
211 cache_op(Index_Writeback_Inv_D, addr | 1);
212 }
213}
214
215static void __init txx9_cache_fixup(void)
216{
217 unsigned int conf;
218
219 conf = read_c0_config();
220
221 if (txx9_ic_disable) {
222 conf &= ~TX39_CONF_ICE;
223 write_c0_config(conf);
224 }
225 if (txx9_dc_disable) {
226 early_flush_dcache();
227 conf &= ~TX39_CONF_DCE;
228 write_c0_config(conf);
229 }
230
231
232 conf = read_c0_config();
233 if (!txx9_ic_disable)
234 conf |= TX39_CONF_ICE;
235 if (!txx9_dc_disable)
236 conf |= TX39_CONF_DCE;
237 write_c0_config(conf);
238
239 if (!(conf & TX39_CONF_ICE))
240 pr_info("TX39XX I-Cache disabled.\n");
241 if (!(conf & TX39_CONF_DCE))
242 pr_info("TX39XX D-Cache disabled.\n");
243}
244#else
245static inline void txx9_cache_fixup(void)
246{
247}
248#endif
249
250static void __init preprocess_cmdline(void)
251{
252 static char cmdline[COMMAND_LINE_SIZE] __initdata;
253 char *s;
254
255 strcpy(cmdline, arcs_cmdline);
256 s = cmdline;
257 arcs_cmdline[0] = '\0';
258 while (s && *s) {
259 char *str = strsep(&s, " ");
260 if (strncmp(str, "board=", 6) == 0) {
261 txx9_board_vec = find_board_byname(str + 6);
262 continue;
263 } else if (strncmp(str, "masterclk=", 10) == 0) {
264 unsigned int val;
265 if (kstrtouint(str + 10, 10, &val) == 0)
266 txx9_master_clock = val;
267 continue;
268 } else if (strcmp(str, "icdisable") == 0) {
269 txx9_ic_disable = 1;
270 continue;
271 } else if (strcmp(str, "dcdisable") == 0) {
272 txx9_dc_disable = 1;
273 continue;
274 } else if (strcmp(str, "toeoff") == 0) {
275 txx9_ccfg_toeon = 0;
276 continue;
277 } else if (strcmp(str, "toeon") == 0) {
278 txx9_ccfg_toeon = 1;
279 continue;
280 }
281 if (arcs_cmdline[0])
282 strcat(arcs_cmdline, " ");
283 strcat(arcs_cmdline, str);
284 }
285
286 txx9_cache_fixup();
287}
288
289static void __init select_board(void)
290{
291 const char *envstr;
292
293
294 if (txx9_board_vec)
295 return;
296
297 envstr = prom_getenv("board");
298 if (envstr) {
299 txx9_board_vec = find_board_byname(envstr);
300 if (txx9_board_vec)
301 return;
302 }
303
304
305#ifdef CONFIG_TOSHIBA_JMR3927
306 txx9_board_vec = &jmr3927_vec;
307#endif
308#ifdef CONFIG_CPU_TX49XX
309 switch (TX4938_REV_PCODE()) {
310#ifdef CONFIG_TOSHIBA_RBTX4927
311 case 0x4927:
312 txx9_board_vec = &rbtx4927_vec;
313 break;
314 case 0x4937:
315 txx9_board_vec = &rbtx4937_vec;
316 break;
317#endif
318#ifdef CONFIG_TOSHIBA_RBTX4938
319 case 0x4938:
320 txx9_board_vec = &rbtx4938_vec;
321 break;
322#endif
323#ifdef CONFIG_TOSHIBA_RBTX4939
324 case 0x4939:
325 txx9_board_vec = &rbtx4939_vec;
326 break;
327#endif
328 }
329#endif
330}
331
332void __init prom_init(void)
333{
334 prom_init_cmdline();
335 preprocess_cmdline();
336 select_board();
337
338 strcpy(txx9_system_type, txx9_board_vec->system);
339
340 txx9_board_vec->prom_init();
341}
342
343const char *get_system_type(void)
344{
345 return txx9_system_type;
346}
347
348const char *__init prom_getenv(const char *name)
349{
350 const s32 *str;
351
352 if (fw_arg2 < CKSEG0)
353 return NULL;
354
355 str = (const s32 *)fw_arg2;
356
357 while (str[0] && str[1]) {
358 if (!strcmp((const char *)(unsigned long)str[0], name))
359 return (const char *)(unsigned long)str[1];
360 str += 2;
361 }
362 return NULL;
363}
364
365static void __noreturn txx9_machine_halt(void)
366{
367 local_irq_disable();
368 clear_c0_status(ST0_IM);
369 while (1) {
370 if (cpu_wait) {
371 (*cpu_wait)();
372 if (cpu_has_counter) {
373
374
375
376
377
378 write_c0_compare(0);
379 }
380 }
381 }
382}
383
384
385void __init txx9_wdt_init(unsigned long base)
386{
387 struct resource res = {
388 .start = base,
389 .end = base + 0x100 - 1,
390 .flags = IORESOURCE_MEM,
391 };
392 platform_device_register_simple("txx9wdt", -1, &res, 1);
393}
394
395void txx9_wdt_now(unsigned long base)
396{
397 struct txx9_tmr_reg __iomem *tmrptr =
398 ioremap(base, sizeof(struct txx9_tmr_reg));
399
400 __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
401 __raw_writel(0, &tmrptr->tcr);
402
403 __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
404 __raw_writel(1, &tmrptr->cpra);
405 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
406 &tmrptr->tcr);
407}
408
409
410void __init txx9_spi_init(int busid, unsigned long base, int irq)
411{
412 struct resource res[] = {
413 {
414 .start = base,
415 .end = base + 0x20 - 1,
416 .flags = IORESOURCE_MEM,
417 }, {
418 .start = irq,
419 .flags = IORESOURCE_IRQ,
420 },
421 };
422 platform_device_register_simple("spi_txx9", busid,
423 res, ARRAY_SIZE(res));
424}
425
426void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
427{
428 struct platform_device *pdev =
429 platform_device_alloc("tc35815-mac", id);
430 if (!pdev ||
431 platform_device_add_data(pdev, ethaddr, 6) ||
432 platform_device_add(pdev))
433 platform_device_put(pdev);
434}
435
436void __init txx9_sio_init(unsigned long baseaddr, int irq,
437 unsigned int line, unsigned int sclk, int nocts)
438{
439#ifdef CONFIG_SERIAL_TXX9
440 struct uart_port req;
441
442 memset(&req, 0, sizeof(req));
443 req.line = line;
444 req.iotype = UPIO_MEM;
445 req.membase = ioremap(baseaddr, 0x24);
446 req.mapbase = baseaddr;
447 req.irq = irq;
448 if (!nocts)
449 req.flags |= UPF_BUGGY_UART ;
450 if (sclk) {
451 req.flags |= UPF_MAGIC_MULTIPLIER ;
452 req.uartclk = sclk;
453 } else
454 req.uartclk = TXX9_IMCLK;
455 early_serial_txx9_setup(&req);
456#endif
457}
458
459#ifdef CONFIG_EARLY_PRINTK
460static void null_prom_putchar(char c)
461{
462}
463void (*txx9_prom_putchar)(char c) = null_prom_putchar;
464
465void prom_putchar(char c)
466{
467 txx9_prom_putchar(c);
468}
469
470static void __iomem *early_txx9_sio_port;
471
472static void early_txx9_sio_putchar(char c)
473{
474#define TXX9_SICISR 0x0c
475#define TXX9_SITFIFO 0x1c
476#define TXX9_SICISR_TXALS 0x00000002
477 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
478 TXX9_SICISR_TXALS))
479 ;
480 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
481}
482
483void __init txx9_sio_putchar_init(unsigned long baseaddr)
484{
485 early_txx9_sio_port = ioremap(baseaddr, 0x24);
486 txx9_prom_putchar = early_txx9_sio_putchar;
487}
488#endif
489
490
491void __init plat_mem_setup(void)
492{
493 ioport_resource.start = 0;
494 ioport_resource.end = ~0UL;
495 iomem_resource.start = 0;
496 iomem_resource.end = ~0UL;
497
498
499 _machine_restart = (void (*)(char *))txx9_machine_halt;
500 _machine_halt = txx9_machine_halt;
501 pm_power_off = txx9_machine_halt;
502
503#ifdef CONFIG_PCI
504 pcibios_plat_setup = txx9_pcibios_setup;
505#endif
506 txx9_board_vec->mem_setup();
507}
508
509void __init arch_init_irq(void)
510{
511 txx9_board_vec->irq_setup();
512}
513
514void __init plat_time_init(void)
515{
516#ifdef CONFIG_CPU_TX49XX
517 mips_hpt_frequency = txx9_cpu_clock / 2;
518#endif
519 txx9_board_vec->time_init();
520}
521
522static void txx9_clk_init(void)
523{
524 struct clk_hw *hw;
525 int error;
526
527 hw = clk_hw_register_fixed_rate(NULL, "gbus", NULL, 0, txx9_gbus_clock);
528 if (IS_ERR(hw)) {
529 error = PTR_ERR(hw);
530 goto fail;
531 }
532
533 hw = clk_hw_register_fixed_factor(NULL, "imbus", "gbus", 0, 1, 2);
534 error = clk_hw_register_clkdev(hw, "imbus_clk", NULL);
535 if (error)
536 goto fail;
537
538#ifdef CONFIG_CPU_TX49XX
539 if (TX4938_REV_PCODE() == 0x4938) {
540 hw = clk_hw_register_fixed_factor(NULL, "spi", "gbus", 0, 1, 4);
541 error = clk_hw_register_clkdev(hw, "spi-baseclk", NULL);
542 if (error)
543 goto fail;
544 }
545#endif
546
547 return;
548
549fail:
550 pr_err("Failed to register clocks: %d\n", error);
551}
552
553static int __init _txx9_arch_init(void)
554{
555 txx9_clk_init();
556
557 if (txx9_board_vec->arch_init)
558 txx9_board_vec->arch_init();
559 return 0;
560}
561arch_initcall(_txx9_arch_init);
562
563static int __init _txx9_device_init(void)
564{
565 if (txx9_board_vec->device_init)
566 txx9_board_vec->device_init();
567 return 0;
568}
569device_initcall(_txx9_device_init);
570
571int (*txx9_irq_dispatch)(int pending);
572asmlinkage void plat_irq_dispatch(void)
573{
574 int pending = read_c0_status() & read_c0_cause() & ST0_IM;
575 int irq = txx9_irq_dispatch(pending);
576
577 if (likely(irq >= 0))
578 do_IRQ(irq);
579 else
580 spurious_interrupt();
581}
582
583
584#ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
585static unsigned long __swizzle_addr_none(unsigned long port)
586{
587 return port;
588}
589unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
590EXPORT_SYMBOL(__swizzle_addr_b);
591#endif
592
593#ifdef NEEDS_TXX9_IOSWABW
594static u16 ioswabw_default(volatile u16 *a, u16 x)
595{
596 return le16_to_cpu(x);
597}
598static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
599{
600 return x;
601}
602u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
603EXPORT_SYMBOL(ioswabw);
604u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
605EXPORT_SYMBOL(__mem_ioswabw);
606#endif
607
608void __init txx9_physmap_flash_init(int no, unsigned long addr,
609 unsigned long size,
610 const struct physmap_flash_data *pdata)
611{
612#if IS_ENABLED(CONFIG_MTD_PHYSMAP)
613 struct resource res = {
614 .start = addr,
615 .end = addr + size - 1,
616 .flags = IORESOURCE_MEM,
617 };
618 struct platform_device *pdev;
619 static struct mtd_partition parts[2];
620 struct physmap_flash_data pdata_part;
621
622
623 if (pdata->nr_parts == 0 && !pdata->parts &&
624 addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
625 !parts[0].name) {
626 parts[0].name = "boot";
627 parts[0].offset = 0x1fc00000 - addr;
628 parts[0].size = addr + size - 0x1fc00000;
629 parts[1].name = "user";
630 parts[1].offset = 0;
631 parts[1].size = 0x1fc00000 - addr;
632 pdata_part = *pdata;
633 pdata_part.nr_parts = ARRAY_SIZE(parts);
634 pdata_part.parts = parts;
635 pdata = &pdata_part;
636 }
637
638 pdev = platform_device_alloc("physmap-flash", no);
639 if (!pdev ||
640 platform_device_add_resources(pdev, &res, 1) ||
641 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
642 platform_device_add(pdev))
643 platform_device_put(pdev);
644#endif
645}
646
647void __init txx9_ndfmc_init(unsigned long baseaddr,
648 const struct txx9ndfmc_platform_data *pdata)
649{
650#if IS_ENABLED(CONFIG_MTD_NAND_TXX9NDFMC)
651 struct resource res = {
652 .start = baseaddr,
653 .end = baseaddr + 0x1000 - 1,
654 .flags = IORESOURCE_MEM,
655 };
656 struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
657
658 if (!pdev ||
659 platform_device_add_resources(pdev, &res, 1) ||
660 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
661 platform_device_add(pdev))
662 platform_device_put(pdev);
663#endif
664}
665
666#if IS_ENABLED(CONFIG_LEDS_GPIO)
667static DEFINE_SPINLOCK(txx9_iocled_lock);
668
669#define TXX9_IOCLED_MAXLEDS 8
670
671struct txx9_iocled_data {
672 struct gpio_chip chip;
673 u8 cur_val;
674 void __iomem *mmioaddr;
675 struct gpio_led_platform_data pdata;
676 struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
677 char names[TXX9_IOCLED_MAXLEDS][32];
678};
679
680static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
681{
682 struct txx9_iocled_data *data = gpiochip_get_data(chip);
683 return !!(data->cur_val & (1 << offset));
684}
685
686static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
687 int value)
688{
689 struct txx9_iocled_data *data = gpiochip_get_data(chip);
690 unsigned long flags;
691 spin_lock_irqsave(&txx9_iocled_lock, flags);
692 if (value)
693 data->cur_val |= 1 << offset;
694 else
695 data->cur_val &= ~(1 << offset);
696 writeb(data->cur_val, data->mmioaddr);
697 mmiowb();
698 spin_unlock_irqrestore(&txx9_iocled_lock, flags);
699}
700
701static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
702{
703 return 0;
704}
705
706static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
707 int value)
708{
709 txx9_iocled_set(chip, offset, value);
710 return 0;
711}
712
713void __init txx9_iocled_init(unsigned long baseaddr,
714 int basenum, unsigned int num, int lowactive,
715 const char *color, char **deftriggers)
716{
717 struct txx9_iocled_data *iocled;
718 struct platform_device *pdev;
719 int i;
720 static char *default_triggers[] __initdata = {
721 "heartbeat",
722 "disk-activity",
723 "nand-disk",
724 NULL,
725 };
726
727 if (!deftriggers)
728 deftriggers = default_triggers;
729 iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
730 if (!iocled)
731 return;
732 iocled->mmioaddr = ioremap(baseaddr, 1);
733 if (!iocled->mmioaddr)
734 goto out_free;
735 iocled->chip.get = txx9_iocled_get;
736 iocled->chip.set = txx9_iocled_set;
737 iocled->chip.direction_input = txx9_iocled_dir_in;
738 iocled->chip.direction_output = txx9_iocled_dir_out;
739 iocled->chip.label = "iocled";
740 iocled->chip.base = basenum;
741 iocled->chip.ngpio = num;
742 if (gpiochip_add_data(&iocled->chip, iocled))
743 goto out_unmap;
744 if (basenum < 0)
745 basenum = iocled->chip.base;
746
747 pdev = platform_device_alloc("leds-gpio", basenum);
748 if (!pdev)
749 goto out_gpio;
750 iocled->pdata.num_leds = num;
751 iocled->pdata.leds = iocled->leds;
752 for (i = 0; i < num; i++) {
753 struct gpio_led *led = &iocled->leds[i];
754 snprintf(iocled->names[i], sizeof(iocled->names[i]),
755 "iocled:%s:%u", color, i);
756 led->name = iocled->names[i];
757 led->gpio = basenum + i;
758 led->active_low = lowactive;
759 if (deftriggers && *deftriggers)
760 led->default_trigger = *deftriggers++;
761 }
762 pdev->dev.platform_data = &iocled->pdata;
763 if (platform_device_add(pdev))
764 goto out_pdev;
765 return;
766
767out_pdev:
768 platform_device_put(pdev);
769out_gpio:
770 gpiochip_remove(&iocled->chip);
771out_unmap:
772 iounmap(iocled->mmioaddr);
773out_free:
774 kfree(iocled);
775}
776#else
777void __init txx9_iocled_init(unsigned long baseaddr,
778 int basenum, unsigned int num, int lowactive,
779 const char *color, char **deftriggers)
780{
781}
782#endif
783
784void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
785 const struct txx9dmac_platform_data *pdata)
786{
787#if IS_ENABLED(CONFIG_TXX9_DMAC)
788 struct resource res[] = {
789 {
790 .start = baseaddr,
791 .end = baseaddr + 0x800 - 1,
792 .flags = IORESOURCE_MEM,
793#ifndef CONFIG_MACH_TX49XX
794 }, {
795 .start = irq,
796 .flags = IORESOURCE_IRQ,
797#endif
798 }
799 };
800#ifdef CONFIG_MACH_TX49XX
801 struct resource chan_res[] = {
802 {
803 .flags = IORESOURCE_IRQ,
804 }
805 };
806#endif
807 struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
808 struct txx9dmac_chan_platform_data cpdata;
809 int i;
810
811 if (!pdev ||
812 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
813 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
814 platform_device_add(pdev)) {
815 platform_device_put(pdev);
816 return;
817 }
818 memset(&cpdata, 0, sizeof(cpdata));
819 cpdata.dmac_dev = pdev;
820 for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
821#ifdef CONFIG_MACH_TX49XX
822 chan_res[0].start = irq + i;
823#endif
824 pdev = platform_device_alloc("txx9dmac-chan",
825 id * TXX9_DMA_MAX_NR_CHANNELS + i);
826 if (!pdev ||
827#ifdef CONFIG_MACH_TX49XX
828 platform_device_add_resources(pdev, chan_res,
829 ARRAY_SIZE(chan_res)) ||
830#endif
831 platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
832 platform_device_add(pdev))
833 platform_device_put(pdev);
834 }
835#endif
836}
837
838void __init txx9_aclc_init(unsigned long baseaddr, int irq,
839 unsigned int dmac_id,
840 unsigned int dma_chan_out,
841 unsigned int dma_chan_in)
842{
843#if IS_ENABLED(CONFIG_SND_SOC_TXX9ACLC)
844 unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS;
845 struct resource res[] = {
846 {
847 .start = baseaddr,
848 .end = baseaddr + 0x100 - 1,
849 .flags = IORESOURCE_MEM,
850 }, {
851 .start = irq,
852 .flags = IORESOURCE_IRQ,
853 }, {
854 .name = "txx9dmac-chan",
855 .start = dma_base + dma_chan_out,
856 .flags = IORESOURCE_DMA,
857 }, {
858 .name = "txx9dmac-chan",
859 .start = dma_base + dma_chan_in,
860 .flags = IORESOURCE_DMA,
861 }
862 };
863 struct platform_device *pdev =
864 platform_device_alloc("txx9aclc-ac97", -1);
865
866 if (!pdev ||
867 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
868 platform_device_add(pdev))
869 platform_device_put(pdev);
870#endif
871}
872
873static struct bus_type txx9_sramc_subsys = {
874 .name = "txx9_sram",
875 .dev_name = "txx9_sram",
876};
877
878struct txx9_sramc_dev {
879 struct device dev;
880 struct bin_attribute bindata_attr;
881 void __iomem *base;
882};
883
884static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj,
885 struct bin_attribute *bin_attr,
886 char *buf, loff_t pos, size_t size)
887{
888 struct txx9_sramc_dev *dev = bin_attr->private;
889 size_t ramsize = bin_attr->size;
890
891 if (pos >= ramsize)
892 return 0;
893 if (pos + size > ramsize)
894 size = ramsize - pos;
895 memcpy_fromio(buf, dev->base + pos, size);
896 return size;
897}
898
899static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj,
900 struct bin_attribute *bin_attr,
901 char *buf, loff_t pos, size_t size)
902{
903 struct txx9_sramc_dev *dev = bin_attr->private;
904 size_t ramsize = bin_attr->size;
905
906 if (pos >= ramsize)
907 return 0;
908 if (pos + size > ramsize)
909 size = ramsize - pos;
910 memcpy_toio(dev->base + pos, buf, size);
911 return size;
912}
913
914static void txx9_device_release(struct device *dev)
915{
916 struct txx9_sramc_dev *tdev;
917
918 tdev = container_of(dev, struct txx9_sramc_dev, dev);
919 kfree(tdev);
920}
921
922void __init txx9_sramc_init(struct resource *r)
923{
924 struct txx9_sramc_dev *dev;
925 size_t size;
926 int err;
927
928 err = subsys_system_register(&txx9_sramc_subsys, NULL);
929 if (err)
930 return;
931 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
932 if (!dev)
933 return;
934 size = resource_size(r);
935 dev->base = ioremap(r->start, size);
936 if (!dev->base) {
937 kfree(dev);
938 return;
939 }
940 dev->dev.release = &txx9_device_release;
941 dev->dev.bus = &txx9_sramc_subsys;
942 sysfs_bin_attr_init(&dev->bindata_attr);
943 dev->bindata_attr.attr.name = "bindata";
944 dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
945 dev->bindata_attr.read = txx9_sram_read;
946 dev->bindata_attr.write = txx9_sram_write;
947 dev->bindata_attr.size = size;
948 dev->bindata_attr.private = dev;
949 err = device_register(&dev->dev);
950 if (err)
951 goto exit_put;
952 err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
953 if (err) {
954 iounmap(dev->base);
955 device_unregister(&dev->dev);
956 }
957 return;
958exit_put:
959 iounmap(dev->base);
960 put_device(&dev->dev);
961}
962
