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12#include <linux/stddef.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/errno.h>
16#include <linux/reboot.h>
17#include <linux/pci.h>
18#include <linux/kdev_t.h>
19#include <linux/major.h>
20#include <linux/console.h>
21#include <linux/delay.h>
22#include <linux/seq_file.h>
23#include <linux/initrd.h>
24#include <linux/interrupt.h>
25#include <linux/fsl_devices.h>
26#include <linux/of_platform.h>
27#include <linux/pgtable.h>
28
29#include <asm/page.h>
30#include <linux/atomic.h>
31#include <asm/time.h>
32#include <asm/io.h>
33#include <asm/machdep.h>
34#include <asm/ipic.h>
35#include <asm/pci-bridge.h>
36#include <asm/irq.h>
37#include <mm/mmu_decl.h>
38#include <asm/prom.h>
39#include <asm/udbg.h>
40#include <asm/mpic.h>
41
42#include <sysdev/fsl_soc.h>
43#include <sysdev/fsl_pci.h>
44
45#include "mpc85xx.h"
46
47static int sbc_rev;
48
49static void __init sbc8548_pic_init(void)
50{
51 struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
52 0, 256, " OpenPIC ");
53 BUG_ON(mpic == NULL);
54 mpic_init(mpic);
55}
56
57
58static int __init sbc8548_hw_rev(void)
59{
60 struct device_node *np;
61 struct resource res;
62 unsigned int *rev;
63 int board_rev = 0;
64
65 np = of_find_compatible_node(NULL, NULL, "hw-rev");
66 if (np == NULL) {
67 printk("No HW-REV found in DTB.\n");
68 return -ENODEV;
69 }
70
71 of_address_to_resource(np, 0, &res);
72 of_node_put(np);
73
74 rev = ioremap(res.start,sizeof(unsigned int));
75 board_rev = (*rev) >> 28;
76 iounmap(rev);
77
78 return board_rev;
79}
80
81
82
83
84static void __init sbc8548_setup_arch(void)
85{
86 if (ppc_md.progress)
87 ppc_md.progress("sbc8548_setup_arch()", 0);
88
89 fsl_pci_assign_primary();
90
91 sbc_rev = sbc8548_hw_rev();
92}
93
94static void sbc8548_show_cpuinfo(struct seq_file *m)
95{
96 uint pvid, svid, phid1;
97
98 pvid = mfspr(SPRN_PVR);
99 svid = mfspr(SPRN_SVR);
100
101 seq_printf(m, "Vendor\t\t: Wind River\n");
102 seq_printf(m, "Machine\t\t: SBC8548 v%d\n", sbc_rev);
103 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
104 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
105
106
107 phid1 = mfspr(SPRN_HID1);
108 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
109}
110
111machine_arch_initcall(sbc8548, mpc85xx_common_publish_devices);
112
113
114
115
116static int __init sbc8548_probe(void)
117{
118 return of_machine_is_compatible("SBC8548");
119}
120
121define_machine(sbc8548) {
122 .name = "SBC8548",
123 .probe = sbc8548_probe,
124 .setup_arch = sbc8548_setup_arch,
125 .init_IRQ = sbc8548_pic_init,
126 .show_cpuinfo = sbc8548_show_cpuinfo,
127 .get_irq = mpic_get_irq,
128#ifdef CONFIG_PCI
129 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
130 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
131#endif
132 .calibrate_decr = generic_calibrate_decr,
133 .progress = udbg_progress,
134};
135