LXR linux/arch/powerpc/platforms/86xx/gef

   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * GE SBC310 board support
   4 *
   5 * Author: Martyn Welch <martyn.welch@ge.com>
   6 *
   7 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
   8 *
   9 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
  10 * Copyright 2006 Freescale Semiconductor Inc.
  11 *
  12 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
  13 */
  14
  15#include <linux/stddef.h>
  16#include <linux/kernel.h>
  17#include <linux/pci.h>
  18#include <linux/kdev_t.h>
  19#include <linux/delay.h>
  20#include <linux/seq_file.h>
  21#include <linux/of_platform.h>
  22
  23#include <asm/time.h>
  24#include <asm/machdep.h>
  25#include <asm/pci-bridge.h>
  26#include <asm/prom.h>
  27#include <mm/mmu_decl.h>
  28#include <asm/udbg.h>
  29
  30#include <asm/mpic.h>
  31#include <asm/nvram.h>
  32
  33#include <sysdev/fsl_pci.h>
  34#include <sysdev/fsl_soc.h>
  35#include <sysdev/ge/ge_pic.h>
  36
  37#include "mpc86xx.h"
  38
  39#undef DEBUG
  40
  41#ifdef DEBUG
  42#define DBG (fmt...) do { printk(KERN_ERR "SBC310: " fmt); } while (0)
  43#else
  44#define DBG (fmt...) do { } while (0)
  45#endif
  46
  47void __iomem *sbc310_regs;
  48
  49static void __init gef_sbc310_init_irq(void)
  50{
  51        struct device_node *cascade_node = NULL;
  52
  53        mpc86xx_init_irq();
  54
  55        /*
  56         * There is a simple interrupt handler in the main FPGA, this needs
  57         * to be cascaded into the MPIC
  58         */
  59        cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
  60        if (!cascade_node) {
  61                printk(KERN_WARNING "SBC310: No FPGA PIC\n");
  62                return;
  63        }
  64
  65        gef_pic_init(cascade_node);
  66        of_node_put(cascade_node);
  67}
  68
  69static void __init gef_sbc310_setup_arch(void)
  70{
  71        struct device_node *regs;
  72        printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
  73
  74#ifdef CONFIG_SMP
  75        mpc86xx_smp_init();
  76#endif
  77
  78        fsl_pci_assign_primary();
  79
  80        /* Remap basic board registers */
  81        regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
  82        if (regs) {
  83                sbc310_regs = of_iomap(regs, 0);
  84                if (sbc310_regs == NULL)
  85                        printk(KERN_WARNING "Unable to map board registers\n");
  86                of_node_put(regs);
  87        }
  88
  89#if defined(CONFIG_MMIO_NVRAM)
  90        mmio_nvram_init();
  91#endif
  92}
  93
  94/* Return the PCB revision */
  95static unsigned int gef_sbc310_get_board_id(void)
  96{
  97        unsigned int reg;
  98
  99        reg = ioread32(sbc310_regs);
 100        return reg & 0xff;
 101}
 102
 103/* Return the PCB revision */
 104static unsigned int gef_sbc310_get_pcb_rev(void)
 105{
 106        unsigned int reg;
 107
 108        reg = ioread32(sbc310_regs);
 109        return (reg >> 8) & 0xff;
 110}
 111
 112/* Return the board (software) revision */
 113static unsigned int gef_sbc310_get_board_rev(void)
 114{
 115        unsigned int reg;
 116
 117        reg = ioread32(sbc310_regs);
 118        return (reg >> 16) & 0xff;
 119}
 120
 121/* Return the FPGA revision */
 122static unsigned int gef_sbc310_get_fpga_rev(void)
 123{
 124        unsigned int reg;
 125
 126        reg = ioread32(sbc310_regs);
 127        return (reg >> 24) & 0xf;
 128}
 129
 130static void gef_sbc310_show_cpuinfo(struct seq_file *m)
 131{
 132        uint svid = mfspr(SPRN_SVR);
 133
 134        seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
 135
 136        seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
 137        seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
 138                ('A' + gef_sbc310_get_board_rev() - 1));
 139        seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc310_get_fpga_rev());
 140
 141        seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 142
 143}
 144
 145static void gef_sbc310_nec_fixup(struct pci_dev *pdev)
 146{
 147        unsigned int val;
 148
 149        /* Do not do the fixup on other platforms! */
 150        if (!machine_is(gef_sbc310))
 151                return;
 152
 153        printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
 154
 155        /* Ensure only ports 1 & 2 are enabled */
 156        pci_read_config_dword(pdev, 0xe0, &val);
 157        pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2);
 158
 159        /* System clock is 48-MHz Oscillator and EHCI Enabled. */
 160        pci_write_config_dword(pdev, 0xe4, 1 << 5);
 161}
 162DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
 163        gef_sbc310_nec_fixup);
 164
 165/*
 166 * Called very early, device-tree isn't unflattened
 167 *
 168 * This function is called to determine whether the BSP is compatible with the
 169 * supplied device-tree, which is assumed to be the correct one for the actual
 170 * board. It is expected thati, in the future, a kernel may support multiple
 171 * boards.
 172 */
 173static int __init gef_sbc310_probe(void)
 174{
 175        if (of_machine_is_compatible("gef,sbc310"))
 176                return 1;
 177
 178        return 0;
 179}
 180
 181machine_arch_initcall(gef_sbc310, mpc86xx_common_publish_devices);
 182
 183define_machine(gef_sbc310) {
 184        .name                   = "GE SBC310",
 185        .probe                  = gef_sbc310_probe,
 186        .setup_arch             = gef_sbc310_setup_arch,
 187        .init_IRQ               = gef_sbc310_init_irq,
 188        .show_cpuinfo           = gef_sbc310_show_cpuinfo,
 189        .get_irq                = mpic_get_irq,
 190        .time_init              = mpc86xx_time_init,
 191        .calibrate_decr         = generic_calibrate_decr,
 192        .progress               = udbg_progress,
 193#ifdef CONFIG_PCI
 194        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 195#endif
 196};
 197