1
2#ifndef __S390_ASM_SIGP_H
3#define __S390_ASM_SIGP_H
4
5
6#define SIGP_SENSE 1
7#define SIGP_EXTERNAL_CALL 2
8#define SIGP_EMERGENCY_SIGNAL 3
9#define SIGP_START 4
10#define SIGP_STOP 5
11#define SIGP_RESTART 6
12#define SIGP_STOP_AND_STORE_STATUS 9
13#define SIGP_INITIAL_CPU_RESET 11
14#define SIGP_CPU_RESET 12
15#define SIGP_SET_PREFIX 13
16#define SIGP_STORE_STATUS_AT_ADDRESS 14
17#define SIGP_SET_ARCHITECTURE 18
18#define SIGP_COND_EMERGENCY_SIGNAL 19
19#define SIGP_SENSE_RUNNING 21
20#define SIGP_SET_MULTI_THREADING 22
21#define SIGP_STORE_ADDITIONAL_STATUS 23
22
23
24#define SIGP_CC_ORDER_CODE_ACCEPTED 0
25#define SIGP_CC_STATUS_STORED 1
26#define SIGP_CC_BUSY 2
27#define SIGP_CC_NOT_OPERATIONAL 3
28
29
30
31#define SIGP_STATUS_INVALID_ORDER 0x00000002UL
32#define SIGP_STATUS_CHECK_STOP 0x00000010UL
33#define SIGP_STATUS_STOPPED 0x00000040UL
34#define SIGP_STATUS_EXT_CALL_PENDING 0x00000080UL
35#define SIGP_STATUS_INVALID_PARAMETER 0x00000100UL
36#define SIGP_STATUS_INCORRECT_STATE 0x00000200UL
37#define SIGP_STATUS_NOT_RUNNING 0x00000400UL
38
39#ifndef __ASSEMBLY__
40
41static inline int ____pcpu_sigp(u16 addr, u8 order, unsigned long parm,
42 u32 *status)
43{
44 union register_pair r1 = { .odd = parm, };
45 int cc;
46
47 asm volatile(
48 " sigp %[r1],%[addr],0(%[order])\n"
49 " ipm %[cc]\n"
50 " srl %[cc],28\n"
51 : [cc] "=&d" (cc), [r1] "+&d" (r1.pair)
52 : [addr] "d" (addr), [order] "a" (order)
53 : "cc");
54 *status = r1.even;
55 return cc;
56}
57
58static inline int __pcpu_sigp(u16 addr, u8 order, unsigned long parm,
59 u32 *status)
60{
61 u32 _status;
62 int cc;
63
64 cc = ____pcpu_sigp(addr, order, parm, &_status);
65 if (status && cc == SIGP_CC_STATUS_STORED)
66 *status = _status;
67 return cc;
68}
69
70#endif
71
72#endif
73