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13#include <linux/arm-smccc.h>
14#include <linux/compiler.h>
15#include <linux/device.h>
16#include <linux/init.h>
17#include <linux/mfd/core.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_platform.h>
21#include <linux/slab.h>
22#include <linux/uaccess.h>
23#include <linux/hashtable.h>
24
25#include <linux/firmware/xlnx-zynqmp.h>
26#include "zynqmp-debug.h"
27
28
29#define PM_API_FEATURE_CHECK_MAX_ORDER 7
30
31static bool feature_check_enabled;
32static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
33
34
35
36
37
38
39
40struct pm_api_feature_data {
41 u32 pm_api_id;
42 int feature_status;
43 struct hlist_node hentry;
44};
45
46static const struct mfd_cell firmware_devs[] = {
47 {
48 .name = "zynqmp_power_controller",
49 },
50};
51
52
53
54
55
56
57
58static int zynqmp_pm_ret_code(u32 ret_status)
59{
60 switch (ret_status) {
61 case XST_PM_SUCCESS:
62 case XST_PM_DOUBLE_REQ:
63 return 0;
64 case XST_PM_NO_FEATURE:
65 return -ENOTSUPP;
66 case XST_PM_NO_ACCESS:
67 return -EACCES;
68 case XST_PM_ABORT_SUSPEND:
69 return -ECANCELED;
70 case XST_PM_MULT_USER:
71 return -EUSERS;
72 case XST_PM_INTERNAL:
73 case XST_PM_CONFLICT:
74 case XST_PM_INVALID_NODE:
75 default:
76 return -EINVAL;
77 }
78}
79
80static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2,
81 u32 *ret_payload)
82{
83 return -ENODEV;
84}
85
86
87
88
89
90static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail;
91
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101
102
103static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2,
104 u32 *ret_payload)
105{
106 struct arm_smccc_res res;
107
108 arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
109
110 if (ret_payload) {
111 ret_payload[0] = lower_32_bits(res.a0);
112 ret_payload[1] = upper_32_bits(res.a0);
113 ret_payload[2] = lower_32_bits(res.a1);
114 ret_payload[3] = upper_32_bits(res.a1);
115 }
116
117 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
118}
119
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131
132
133static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2,
134 u32 *ret_payload)
135{
136 struct arm_smccc_res res;
137
138 arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
139
140 if (ret_payload) {
141 ret_payload[0] = lower_32_bits(res.a0);
142 ret_payload[1] = upper_32_bits(res.a0);
143 ret_payload[2] = lower_32_bits(res.a1);
144 ret_payload[3] = upper_32_bits(res.a1);
145 }
146
147 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
148}
149
150
151
152
153
154
155
156static int zynqmp_pm_feature(u32 api_id)
157{
158 int ret;
159 u32 ret_payload[PAYLOAD_ARG_CNT];
160 u64 smc_arg[2];
161 struct pm_api_feature_data *feature_data;
162
163 if (!feature_check_enabled)
164 return 0;
165
166
167 hash_for_each_possible(pm_api_features_map, feature_data, hentry,
168 api_id) {
169 if (feature_data->pm_api_id == api_id)
170 return feature_data->feature_status;
171 }
172
173
174 feature_data = kmalloc(sizeof(*feature_data), GFP_KERNEL);
175 if (!feature_data)
176 return -ENOMEM;
177
178 feature_data->pm_api_id = api_id;
179 smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
180 smc_arg[1] = api_id;
181
182 ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload);
183 if (ret)
184 ret = -EOPNOTSUPP;
185 else
186 ret = ret_payload[1];
187
188 feature_data->feature_status = ret;
189 hash_add(pm_api_features_map, &feature_data->hentry, api_id);
190
191 return ret;
192}
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219int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
220 u32 arg2, u32 arg3, u32 *ret_payload)
221{
222
223
224
225
226 u64 smc_arg[4];
227 int ret;
228
229
230 ret = zynqmp_pm_feature(pm_api_id);
231 if (ret < 0)
232 return ret;
233
234 smc_arg[0] = PM_SIP_SVC | pm_api_id;
235 smc_arg[1] = ((u64)arg1 << 32) | arg0;
236 smc_arg[2] = ((u64)arg3 << 32) | arg2;
237
238 return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload);
239}
240
241static u32 pm_api_version;
242static u32 pm_tz_version;
243
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248
249
250int zynqmp_pm_get_api_version(u32 *version)
251{
252 u32 ret_payload[PAYLOAD_ARG_CNT];
253 int ret;
254
255 if (!version)
256 return -EINVAL;
257
258
259 if (pm_api_version > 0) {
260 *version = pm_api_version;
261 return 0;
262 }
263 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload);
264 *version = ret_payload[1];
265
266 return ret;
267}
268EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version);
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277
278int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
279{
280 u32 ret_payload[PAYLOAD_ARG_CNT];
281 int ret;
282
283 if (!idcode || !version)
284 return -EINVAL;
285
286 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
287 *idcode = ret_payload[1];
288 *version = ret_payload[2];
289
290 return ret;
291}
292EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid);
293
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298
299
300static int zynqmp_pm_get_trustzone_version(u32 *version)
301{
302 u32 ret_payload[PAYLOAD_ARG_CNT];
303 int ret;
304
305 if (!version)
306 return -EINVAL;
307
308
309 if (pm_tz_version > 0) {
310 *version = pm_tz_version;
311 return 0;
312 }
313 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0,
314 0, 0, ret_payload);
315 *version = ret_payload[1];
316
317 return ret;
318}
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327
328static int get_set_conduit_method(struct device_node *np)
329{
330 const char *method;
331
332 if (of_property_read_string(np, "method", &method)) {
333 pr_warn("%s missing \"method\" property\n", __func__);
334 return -ENXIO;
335 }
336
337 if (!strcmp("hvc", method)) {
338 do_fw_call = do_fw_call_hvc;
339 } else if (!strcmp("smc", method)) {
340 do_fw_call = do_fw_call_smc;
341 } else {
342 pr_warn("%s Invalid \"method\" property: %s\n",
343 __func__, method);
344 return -EINVAL;
345 }
346
347 return 0;
348}
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356
357int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
358{
359 int ret;
360
361 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1,
362 qdata.arg2, qdata.arg3, out);
363
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369 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
370}
371EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
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381
382int zynqmp_pm_clock_enable(u32 clock_id)
383{
384 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL);
385}
386EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
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397int zynqmp_pm_clock_disable(u32 clock_id)
398{
399 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL);
400}
401EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
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411
412
413int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
414{
415 u32 ret_payload[PAYLOAD_ARG_CNT];
416 int ret;
417
418 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0,
419 0, 0, ret_payload);
420 *state = ret_payload[1];
421
422 return ret;
423}
424EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
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435
436int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
437{
438 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider,
439 0, 0, NULL);
440}
441EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
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452
453int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
454{
455 u32 ret_payload[PAYLOAD_ARG_CNT];
456 int ret;
457
458 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0,
459 0, 0, ret_payload);
460 *divider = ret_payload[1];
461
462 return ret;
463}
464EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
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474
475int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
476{
477 return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id,
478 lower_32_bits(rate),
479 upper_32_bits(rate),
480 0, NULL);
481}
482EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate);
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494int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
495{
496 u32 ret_payload[PAYLOAD_ARG_CNT];
497 int ret;
498
499 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0,
500 0, 0, ret_payload);
501 *rate = ((u64)ret_payload[2] << 32) | ret_payload[1];
502
503 return ret;
504}
505EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate);
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516int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
517{
518 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id,
519 parent_id, 0, 0, NULL);
520}
521EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
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533int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
534{
535 u32 ret_payload[PAYLOAD_ARG_CNT];
536 int ret;
537
538 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0,
539 0, 0, ret_payload);
540 *parent_id = ret_payload[1];
541
542 return ret;
543}
544EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
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556int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
557{
558 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE,
559 clk_id, mode, NULL);
560}
561EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
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573int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
574{
575 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE,
576 clk_id, 0, mode);
577}
578EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
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591int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
592{
593 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA,
594 clk_id, data, NULL);
595}
596EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
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608int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
609{
610 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA,
611 clk_id, 0, data);
612}
613EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
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626int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
627{
628 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY,
629 type, value, NULL);
630}
631EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
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643int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
644{
645 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET,
646 type, 0, NULL);
647}
648EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
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659int zynqmp_pm_write_ggs(u32 index, u32 value)
660{
661 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS,
662 index, value, NULL);
663}
664EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
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675int zynqmp_pm_read_ggs(u32 index, u32 *value)
676{
677 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS,
678 index, 0, value);
679}
680EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
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692int zynqmp_pm_write_pggs(u32 index, u32 value)
693{
694 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value,
695 NULL);
696}
697EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
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709int zynqmp_pm_read_pggs(u32 index, u32 *value)
710{
711 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0,
712 value);
713}
714EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
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725int zynqmp_pm_set_boot_health_status(u32 value)
726{
727 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS,
728 value, 0, NULL);
729}
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738
739int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
740 const enum zynqmp_pm_reset_action assert_flag)
741{
742 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag,
743 0, 0, NULL);
744}
745EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
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754int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status)
755{
756 u32 ret_payload[PAYLOAD_ARG_CNT];
757 int ret;
758
759 if (!status)
760 return -EINVAL;
761
762 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0,
763 0, 0, ret_payload);
764 *status = ret_payload[1];
765
766 return ret;
767}
768EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
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783int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
784{
785 return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
786 upper_32_bits(address), size, flags, NULL);
787}
788EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
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799int zynqmp_pm_fpga_get_status(u32 *value)
800{
801 u32 ret_payload[PAYLOAD_ARG_CNT];
802 int ret;
803
804 if (!value)
805 return -EINVAL;
806
807 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload);
808 *value = ret_payload[1];
809
810 return ret;
811}
812EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
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821
822int zynqmp_pm_pinctrl_request(const u32 pin)
823{
824 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL);
825}
826EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request);
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836int zynqmp_pm_pinctrl_release(const u32 pin)
837{
838 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, NULL);
839}
840EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release);
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850
851int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id)
852{
853 u32 ret_payload[PAYLOAD_ARG_CNT];
854 int ret;
855
856 if (!id)
857 return -EINVAL;
858
859 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, pin, 0,
860 0, 0, ret_payload);
861 *id = ret_payload[1];
862
863 return ret;
864}
865EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function);
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875
876int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id)
877{
878 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, pin, id,
879 0, 0, NULL);
880}
881EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function);
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892
893int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
894 u32 *value)
895{
896 u32 ret_payload[PAYLOAD_ARG_CNT];
897 int ret;
898
899 if (!value)
900 return -EINVAL;
901
902 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, pin, param,
903 0, 0, ret_payload);
904 *value = ret_payload[1];
905
906 return ret;
907}
908EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config);
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920int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
921 u32 value)
922{
923 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, pin,
924 param, value, 0, NULL);
925}
926EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config);
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937int zynqmp_pm_init_finalize(void)
938{
939 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL);
940}
941EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
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950
951int zynqmp_pm_set_suspend_mode(u32 mode)
952{
953 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL);
954}
955EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
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969int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
970 const u32 qos, const enum zynqmp_pm_request_ack ack)
971{
972 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities,
973 qos, ack, NULL);
974}
975EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
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987int zynqmp_pm_release_node(const u32 node)
988{
989 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL);
990}
991EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
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1005int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
1006 const u32 qos,
1007 const enum zynqmp_pm_request_ack ack)
1008{
1009 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities,
1010 qos, ack, NULL);
1011}
1012EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022int zynqmp_pm_aes_engine(const u64 address, u32 *out)
1023{
1024 u32 ret_payload[PAYLOAD_ARG_CNT];
1025 int ret;
1026
1027 if (!out)
1028 return -EINVAL;
1029
1030 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
1031 lower_32_bits(address),
1032 0, 0, ret_payload);
1033 *out = ret_payload[1];
1034
1035 return ret;
1036}
1037EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
1038
1039
1040
1041
1042
1043
1044
1045
1046int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
1047{
1048 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype,
1049 0, 0, NULL);
1050}
1051
1052
1053
1054
1055
1056
1057
1058
1059struct zynqmp_pm_shutdown_scope {
1060 const enum zynqmp_pm_shutdown_subtype subtype;
1061 const char *name;
1062};
1063
1064static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = {
1065 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = {
1066 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM,
1067 .name = "subsystem",
1068 },
1069 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = {
1070 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY,
1071 .name = "ps_only",
1072 },
1073 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = {
1074 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM,
1075 .name = "system",
1076 },
1077};
1078
1079static struct zynqmp_pm_shutdown_scope *selected_scope =
1080 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM];
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090static struct zynqmp_pm_shutdown_scope*
1091 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string)
1092{
1093 int count;
1094
1095 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++)
1096 if (sysfs_streq(scope_string, shutdown_scopes[count].name))
1097 return &shutdown_scopes[count];
1098
1099 return NULL;
1100}
1101
1102static ssize_t shutdown_scope_show(struct device *device,
1103 struct device_attribute *attr,
1104 char *buf)
1105{
1106 int i;
1107
1108 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) {
1109 if (&shutdown_scopes[i] == selected_scope) {
1110 strcat(buf, "[");
1111 strcat(buf, shutdown_scopes[i].name);
1112 strcat(buf, "]");
1113 } else {
1114 strcat(buf, shutdown_scopes[i].name);
1115 }
1116 strcat(buf, " ");
1117 }
1118 strcat(buf, "\n");
1119
1120 return strlen(buf);
1121}
1122
1123static ssize_t shutdown_scope_store(struct device *device,
1124 struct device_attribute *attr,
1125 const char *buf, size_t count)
1126{
1127 int ret;
1128 struct zynqmp_pm_shutdown_scope *scope;
1129
1130 scope = zynqmp_pm_is_shutdown_scope_valid(buf);
1131 if (!scope)
1132 return -EINVAL;
1133
1134 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
1135 scope->subtype);
1136 if (ret) {
1137 pr_err("unable to set shutdown scope %s\n", buf);
1138 return ret;
1139 }
1140
1141 selected_scope = scope;
1142
1143 return count;
1144}
1145
1146static DEVICE_ATTR_RW(shutdown_scope);
1147
1148static ssize_t health_status_store(struct device *device,
1149 struct device_attribute *attr,
1150 const char *buf, size_t count)
1151{
1152 int ret;
1153 unsigned int value;
1154
1155 ret = kstrtouint(buf, 10, &value);
1156 if (ret)
1157 return ret;
1158
1159 ret = zynqmp_pm_set_boot_health_status(value);
1160 if (ret) {
1161 dev_err(device, "unable to set healthy bit value to %u\n",
1162 value);
1163 return ret;
1164 }
1165
1166 return count;
1167}
1168
1169static DEVICE_ATTR_WO(health_status);
1170
1171static ssize_t ggs_show(struct device *device,
1172 struct device_attribute *attr,
1173 char *buf,
1174 u32 reg)
1175{
1176 int ret;
1177 u32 ret_payload[PAYLOAD_ARG_CNT];
1178
1179 ret = zynqmp_pm_read_ggs(reg, ret_payload);
1180 if (ret)
1181 return ret;
1182
1183 return sprintf(buf, "0x%x\n", ret_payload[1]);
1184}
1185
1186static ssize_t ggs_store(struct device *device,
1187 struct device_attribute *attr,
1188 const char *buf, size_t count,
1189 u32 reg)
1190{
1191 long value;
1192 int ret;
1193
1194 if (reg >= GSS_NUM_REGS)
1195 return -EINVAL;
1196
1197 ret = kstrtol(buf, 16, &value);
1198 if (ret) {
1199 count = -EFAULT;
1200 goto err;
1201 }
1202
1203 ret = zynqmp_pm_write_ggs(reg, value);
1204 if (ret)
1205 count = -EFAULT;
1206err:
1207 return count;
1208}
1209
1210
1211#define GGS0_SHOW(N) \
1212 ssize_t ggs##N##_show(struct device *device, \
1213 struct device_attribute *attr, \
1214 char *buf) \
1215 { \
1216 return ggs_show(device, attr, buf, N); \
1217 }
1218
1219static GGS0_SHOW(0);
1220static GGS0_SHOW(1);
1221static GGS0_SHOW(2);
1222static GGS0_SHOW(3);
1223
1224
1225#define GGS0_STORE(N) \
1226 ssize_t ggs##N##_store(struct device *device, \
1227 struct device_attribute *attr, \
1228 const char *buf, \
1229 size_t count) \
1230 { \
1231 return ggs_store(device, attr, buf, count, N); \
1232 }
1233
1234static GGS0_STORE(0);
1235static GGS0_STORE(1);
1236static GGS0_STORE(2);
1237static GGS0_STORE(3);
1238
1239static ssize_t pggs_show(struct device *device,
1240 struct device_attribute *attr,
1241 char *buf,
1242 u32 reg)
1243{
1244 int ret;
1245 u32 ret_payload[PAYLOAD_ARG_CNT];
1246
1247 ret = zynqmp_pm_read_pggs(reg, ret_payload);
1248 if (ret)
1249 return ret;
1250
1251 return sprintf(buf, "0x%x\n", ret_payload[1]);
1252}
1253
1254static ssize_t pggs_store(struct device *device,
1255 struct device_attribute *attr,
1256 const char *buf, size_t count,
1257 u32 reg)
1258{
1259 long value;
1260 int ret;
1261
1262 if (reg >= GSS_NUM_REGS)
1263 return -EINVAL;
1264
1265 ret = kstrtol(buf, 16, &value);
1266 if (ret) {
1267 count = -EFAULT;
1268 goto err;
1269 }
1270
1271 ret = zynqmp_pm_write_pggs(reg, value);
1272 if (ret)
1273 count = -EFAULT;
1274
1275err:
1276 return count;
1277}
1278
1279#define PGGS0_SHOW(N) \
1280 ssize_t pggs##N##_show(struct device *device, \
1281 struct device_attribute *attr, \
1282 char *buf) \
1283 { \
1284 return pggs_show(device, attr, buf, N); \
1285 }
1286
1287#define PGGS0_STORE(N) \
1288 ssize_t pggs##N##_store(struct device *device, \
1289 struct device_attribute *attr, \
1290 const char *buf, \
1291 size_t count) \
1292 { \
1293 return pggs_store(device, attr, buf, count, N); \
1294 }
1295
1296
1297static PGGS0_SHOW(0);
1298static PGGS0_SHOW(1);
1299static PGGS0_SHOW(2);
1300static PGGS0_SHOW(3);
1301
1302
1303static PGGS0_STORE(0);
1304static PGGS0_STORE(1);
1305static PGGS0_STORE(2);
1306static PGGS0_STORE(3);
1307
1308
1309static DEVICE_ATTR_RW(ggs0);
1310static DEVICE_ATTR_RW(ggs1);
1311static DEVICE_ATTR_RW(ggs2);
1312static DEVICE_ATTR_RW(ggs3);
1313
1314
1315static DEVICE_ATTR_RW(pggs0);
1316static DEVICE_ATTR_RW(pggs1);
1317static DEVICE_ATTR_RW(pggs2);
1318static DEVICE_ATTR_RW(pggs3);
1319
1320static struct attribute *zynqmp_firmware_attrs[] = {
1321 &dev_attr_ggs0.attr,
1322 &dev_attr_ggs1.attr,
1323 &dev_attr_ggs2.attr,
1324 &dev_attr_ggs3.attr,
1325 &dev_attr_pggs0.attr,
1326 &dev_attr_pggs1.attr,
1327 &dev_attr_pggs2.attr,
1328 &dev_attr_pggs3.attr,
1329 &dev_attr_shutdown_scope.attr,
1330 &dev_attr_health_status.attr,
1331 NULL,
1332};
1333
1334ATTRIBUTE_GROUPS(zynqmp_firmware);
1335
1336static int zynqmp_firmware_probe(struct platform_device *pdev)
1337{
1338 struct device *dev = &pdev->dev;
1339 struct device_node *np;
1340 int ret;
1341
1342 np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp");
1343 if (!np) {
1344 np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
1345 if (!np)
1346 return 0;
1347
1348 feature_check_enabled = true;
1349 }
1350 of_node_put(np);
1351
1352 ret = get_set_conduit_method(dev->of_node);
1353 if (ret)
1354 return ret;
1355
1356
1357 zynqmp_pm_get_api_version(&pm_api_version);
1358 if (pm_api_version < ZYNQMP_PM_VERSION) {
1359 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
1360 __func__,
1361 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
1362 pm_api_version >> 16, pm_api_version & 0xFFFF);
1363 }
1364
1365 pr_info("%s Platform Management API v%d.%d\n", __func__,
1366 pm_api_version >> 16, pm_api_version & 0xFFFF);
1367
1368
1369 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
1370 if (ret)
1371 panic("Legacy trustzone found without version support\n");
1372
1373 if (pm_tz_version < ZYNQMP_TZ_VERSION)
1374 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
1375 __func__,
1376 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
1377 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1378
1379 pr_info("%s Trustzone version v%d.%d\n", __func__,
1380 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1381
1382 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
1383 ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
1384 if (ret) {
1385 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
1386 return ret;
1387 }
1388
1389 zynqmp_pm_api_debugfs_init();
1390
1391 return of_platform_populate(dev->of_node, NULL, NULL, dev);
1392}
1393
1394static int zynqmp_firmware_remove(struct platform_device *pdev)
1395{
1396 struct pm_api_feature_data *feature_data;
1397 struct hlist_node *tmp;
1398 int i;
1399
1400 mfd_remove_devices(&pdev->dev);
1401 zynqmp_pm_api_debugfs_exit();
1402
1403 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) {
1404 hash_del(&feature_data->hentry);
1405 kfree(feature_data);
1406 }
1407
1408 return 0;
1409}
1410
1411static const struct of_device_id zynqmp_firmware_of_match[] = {
1412 {.compatible = "xlnx,zynqmp-firmware"},
1413 {.compatible = "xlnx,versal-firmware"},
1414 {},
1415};
1416MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
1417
1418static struct platform_driver zynqmp_firmware_driver = {
1419 .driver = {
1420 .name = "zynqmp_firmware",
1421 .of_match_table = zynqmp_firmware_of_match,
1422 .dev_groups = zynqmp_firmware_groups,
1423 },
1424 .probe = zynqmp_firmware_probe,
1425 .remove = zynqmp_firmware_remove,
1426};
1427module_platform_driver(zynqmp_firmware_driver);
1428