linux/drivers/gpu/drm/amd/display/dc/inc/resource.h
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   1/*
   2 * Copyright 2015 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 */
  24
  25#ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
  26#define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
  27
  28#include "core_types.h"
  29#include "core_status.h"
  30#include "dal_asic_id.h"
  31#include "dm_pp_smu.h"
  32
  33#define MEMORY_TYPE_MULTIPLIER_CZ 4
  34#define MEMORY_TYPE_HBM 2
  35
  36
  37enum dce_version resource_parse_asic_id(
  38                struct hw_asic_id asic_id);
  39
  40struct resource_caps {
  41        int num_timing_generator;
  42        int num_opp;
  43        int num_video_plane;
  44        int num_audio;
  45        int num_stream_encoder;
  46        int num_pll;
  47        int num_dwb;
  48        int num_ddc;
  49        int num_vmid;
  50        int num_dsc;
  51        unsigned int num_dig_link_enc; // Total number of DIGs (digital encoders) in DIO (Display Input/Output).
  52        int num_mpc_3dlut;
  53};
  54
  55struct resource_straps {
  56        uint32_t hdmi_disable;
  57        uint32_t dc_pinstraps_audio;
  58        uint32_t audio_stream_number;
  59};
  60
  61struct resource_create_funcs {
  62        void (*read_dce_straps)(
  63                        struct dc_context *ctx, struct resource_straps *straps);
  64
  65        struct audio *(*create_audio)(
  66                        struct dc_context *ctx, unsigned int inst);
  67
  68        struct stream_encoder *(*create_stream_encoder)(
  69                        enum engine_id eng_id, struct dc_context *ctx);
  70
  71        struct dce_hwseq *(*create_hwseq)(
  72                        struct dc_context *ctx);
  73};
  74
  75bool resource_construct(
  76        unsigned int num_virtual_links,
  77        struct dc *dc,
  78        struct resource_pool *pool,
  79        const struct resource_create_funcs *create_funcs);
  80
  81struct resource_pool *dc_create_resource_pool(struct dc  *dc,
  82                                              const struct dc_init_data *init_data,
  83                                              enum dce_version dc_version);
  84
  85void dc_destroy_resource_pool(struct dc *dc);
  86
  87enum dc_status resource_map_pool_resources(
  88                const struct dc *dc,
  89                struct dc_state *context,
  90                struct dc_stream_state *stream);
  91
  92bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
  93
  94enum dc_status resource_build_scaling_params_for_context(
  95                const struct dc *dc,
  96                struct dc_state *context);
  97
  98void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
  99
 100void resource_unreference_clock_source(
 101                struct resource_context *res_ctx,
 102                const struct resource_pool *pool,
 103                struct clock_source *clock_source);
 104
 105void resource_reference_clock_source(
 106                struct resource_context *res_ctx,
 107                const struct resource_pool *pool,
 108                struct clock_source *clock_source);
 109
 110int resource_get_clock_source_reference(
 111                struct resource_context *res_ctx,
 112                const struct resource_pool *pool,
 113                struct clock_source *clock_source);
 114
 115bool resource_are_streams_timing_synchronizable(
 116                struct dc_stream_state *stream1,
 117                struct dc_stream_state *stream2);
 118
 119bool resource_are_vblanks_synchronizable(
 120                struct dc_stream_state *stream1,
 121                struct dc_stream_state *stream2);
 122
 123struct clock_source *resource_find_used_clk_src_for_sharing(
 124                struct resource_context *res_ctx,
 125                struct pipe_ctx *pipe_ctx);
 126
 127struct clock_source *dc_resource_find_first_free_pll(
 128                struct resource_context *res_ctx,
 129                const struct resource_pool *pool);
 130
 131struct pipe_ctx *resource_get_head_pipe_for_stream(
 132                struct resource_context *res_ctx,
 133                struct dc_stream_state *stream);
 134
 135bool resource_attach_surfaces_to_context(
 136                struct dc_plane_state *const *plane_state,
 137                int surface_count,
 138                struct dc_stream_state *dc_stream,
 139                struct dc_state *context,
 140                const struct resource_pool *pool);
 141
 142struct pipe_ctx *find_idle_secondary_pipe(
 143                struct resource_context *res_ctx,
 144                const struct resource_pool *pool,
 145                const struct pipe_ctx *primary_pipe);
 146
 147bool resource_validate_attach_surfaces(
 148                const struct dc_validation_set set[],
 149                int set_count,
 150                const struct dc_state *old_context,
 151                struct dc_state *context,
 152                const struct resource_pool *pool);
 153
 154void resource_validate_ctx_update_pointer_after_copy(
 155                const struct dc_state *src_ctx,
 156                struct dc_state *dst_ctx);
 157
 158enum dc_status resource_map_clock_resources(
 159                const struct dc *dc,
 160                struct dc_state *context,
 161                struct dc_stream_state *stream);
 162
 163enum dc_status resource_map_phy_clock_resources(
 164                const struct dc *dc,
 165                struct dc_state *context,
 166                struct dc_stream_state *stream);
 167
 168bool pipe_need_reprogram(
 169                struct pipe_ctx *pipe_ctx_old,
 170                struct pipe_ctx *pipe_ctx);
 171
 172void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
 173                struct bit_depth_reduction_params *fmt_bit_depth);
 174
 175void update_audio_usage(
 176                struct resource_context *res_ctx,
 177                const struct resource_pool *pool,
 178                struct audio *audio,
 179                bool acquired);
 180
 181unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format);
 182
 183void get_audio_check(struct audio_info *aud_modes,
 184        struct audio_check *aud_chk);
 185
 186int get_num_mpc_splits(struct pipe_ctx *pipe);
 187
 188int get_num_odm_splits(struct pipe_ctx *pipe);
 189
 190#endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */
 191