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7#include <linux/acpi.h>
8#include <linux/delay.h>
9#include <linux/err.h>
10#include <linux/i2c.h>
11#include <linux/mutex.h>
12#include <linux/module.h>
13#include <linux/mod_devicetable.h>
14#include <linux/interrupt.h>
15#include <linux/regulator/consumer.h>
16#include <linux/iio/iio.h>
17#include <linux/iio/sysfs.h>
18#include <linux/iio/events.h>
19#include <linux/init.h>
20
21
22#define CM32181_REG_ADDR_CMD 0x00
23#define CM32181_REG_ADDR_WH 0x01
24#define CM32181_REG_ADDR_WL 0x02
25#define CM32181_REG_ADDR_TEST 0x03
26#define CM32181_REG_ADDR_ALS 0x04
27#define CM32181_REG_ADDR_STATUS 0x06
28#define CM32181_REG_ADDR_ID 0x07
29
30
31#define CM32181_CONF_REG_NUM 4
32
33
34#define CM32181_CMD_ALS_DISABLE BIT(0)
35#define CM32181_CMD_ALS_INT_EN BIT(1)
36#define CM32181_CMD_ALS_THRES_WINDOW BIT(2)
37
38#define CM32181_CMD_ALS_PERS_SHIFT 4
39#define CM32181_CMD_ALS_PERS_MASK (0x03 << CM32181_CMD_ALS_PERS_SHIFT)
40#define CM32181_CMD_ALS_PERS_DEFAULT (0x01 << CM32181_CMD_ALS_PERS_SHIFT)
41
42#define CM32181_CMD_ALS_IT_SHIFT 6
43#define CM32181_CMD_ALS_IT_MASK (0x0F << CM32181_CMD_ALS_IT_SHIFT)
44#define CM32181_CMD_ALS_IT_DEFAULT (0x00 << CM32181_CMD_ALS_IT_SHIFT)
45
46#define CM32181_CMD_ALS_SM_SHIFT 11
47#define CM32181_CMD_ALS_SM_MASK (0x03 << CM32181_CMD_ALS_SM_SHIFT)
48#define CM32181_CMD_ALS_SM_DEFAULT (0x01 << CM32181_CMD_ALS_SM_SHIFT)
49
50#define CM32181_LUX_PER_BIT 500
51#define CM32181_LUX_PER_BIT_RESOLUTION 100000
52#define CM32181_LUX_PER_BIT_BASE_IT 800000
53#define CM32181_CALIBSCALE_DEFAULT 100000
54#define CM32181_CALIBSCALE_RESOLUTION 100000
55
56#define SMBUS_ALERT_RESPONSE_ADDRESS 0x0c
57
58
59#define CPM0_REGS_BITMAP 2
60#define CPM0_HEADER_SIZE 3
61
62
63#define CPM1_LUX_PER_BIT 0
64#define CPM1_CALIBSCALE 1
65#define CPM1_SIZE 3
66
67
68static const int cm3218_als_it_bits[] = { 0, 1, 2, 3 };
69static const int cm3218_als_it_values[] = { 100000, 200000, 400000, 800000 };
70
71
72static const int cm32181_als_it_bits[] = { 12, 8, 0, 1, 2, 3 };
73static const int cm32181_als_it_values[] = {
74 25000, 50000, 100000, 200000, 400000, 800000
75};
76
77struct cm32181_chip {
78 struct i2c_client *client;
79 struct device *dev;
80 struct mutex lock;
81 u16 conf_regs[CM32181_CONF_REG_NUM];
82 unsigned long init_regs_bitmap;
83 int calibscale;
84 int lux_per_bit;
85 int lux_per_bit_base_it;
86 int num_als_it;
87 const int *als_it_bits;
88 const int *als_it_values;
89};
90
91static int cm32181_read_als_it(struct cm32181_chip *cm32181, int *val2);
92
93#ifdef CONFIG_ACPI
94
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103
104
105static int cm32181_acpi_get_cpm(struct device *dev, char *obj_name,
106 u64 *values, int count)
107{
108 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
109 union acpi_object *cpm, *elem;
110 acpi_handle handle;
111 acpi_status status;
112 int i;
113
114 handle = ACPI_HANDLE(dev);
115 if (!handle)
116 return -ENODEV;
117
118 status = acpi_evaluate_object(handle, obj_name, NULL, &buffer);
119 if (ACPI_FAILURE(status)) {
120 dev_err(dev, "object %s not found\n", obj_name);
121 return -ENODEV;
122 }
123
124 cpm = buffer.pointer;
125 if (cpm->package.count > count)
126 dev_warn(dev, "%s table contains %u values, only using first %d values\n",
127 obj_name, cpm->package.count, count);
128
129 count = min_t(int, cpm->package.count, count);
130 for (i = 0; i < count; i++) {
131 elem = &(cpm->package.elements[i]);
132 values[i] = elem->integer.value;
133 }
134
135 kfree(buffer.pointer);
136
137 return count;
138}
139
140static void cm32181_acpi_parse_cpm_tables(struct cm32181_chip *cm32181)
141{
142 u64 vals[CPM0_HEADER_SIZE + CM32181_CONF_REG_NUM];
143 struct device *dev = cm32181->dev;
144 int i, count;
145
146 count = cm32181_acpi_get_cpm(dev, "CPM0", vals, ARRAY_SIZE(vals));
147 if (count <= CPM0_HEADER_SIZE)
148 return;
149
150 count -= CPM0_HEADER_SIZE;
151
152 cm32181->init_regs_bitmap = vals[CPM0_REGS_BITMAP];
153 cm32181->init_regs_bitmap &= GENMASK(count - 1, 0);
154 for_each_set_bit(i, &cm32181->init_regs_bitmap, count)
155 cm32181->conf_regs[i] = vals[CPM0_HEADER_SIZE + i];
156
157 count = cm32181_acpi_get_cpm(dev, "CPM1", vals, ARRAY_SIZE(vals));
158 if (count != CPM1_SIZE)
159 return;
160
161 cm32181->lux_per_bit = vals[CPM1_LUX_PER_BIT];
162
163
164 if (vals[CPM1_CALIBSCALE] == CM32181_CALIBSCALE_DEFAULT)
165 return;
166
167 cm32181->calibscale = vals[CPM1_CALIBSCALE];
168
169 cm32181_read_als_it(cm32181, &cm32181->lux_per_bit_base_it);
170}
171#else
172static void cm32181_acpi_parse_cpm_tables(struct cm32181_chip *cm32181)
173{
174}
175#endif
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184
185static int cm32181_reg_init(struct cm32181_chip *cm32181)
186{
187 struct i2c_client *client = cm32181->client;
188 int i;
189 s32 ret;
190
191 ret = i2c_smbus_read_word_data(client, CM32181_REG_ADDR_ID);
192 if (ret < 0)
193 return ret;
194
195
196 switch (ret & 0xFF) {
197 case 0x18:
198 cm32181->num_als_it = ARRAY_SIZE(cm3218_als_it_bits);
199 cm32181->als_it_bits = cm3218_als_it_bits;
200 cm32181->als_it_values = cm3218_als_it_values;
201 break;
202 case 0x81:
203 case 0x82:
204 cm32181->num_als_it = ARRAY_SIZE(cm32181_als_it_bits);
205 cm32181->als_it_bits = cm32181_als_it_bits;
206 cm32181->als_it_values = cm32181_als_it_values;
207 break;
208 default:
209 return -ENODEV;
210 }
211
212
213 cm32181->conf_regs[CM32181_REG_ADDR_CMD] =
214 CM32181_CMD_ALS_IT_DEFAULT | CM32181_CMD_ALS_SM_DEFAULT;
215 cm32181->init_regs_bitmap = BIT(CM32181_REG_ADDR_CMD);
216 cm32181->calibscale = CM32181_CALIBSCALE_DEFAULT;
217 cm32181->lux_per_bit = CM32181_LUX_PER_BIT;
218 cm32181->lux_per_bit_base_it = CM32181_LUX_PER_BIT_BASE_IT;
219
220 if (ACPI_HANDLE(cm32181->dev))
221 cm32181_acpi_parse_cpm_tables(cm32181);
222
223
224 for_each_set_bit(i, &cm32181->init_regs_bitmap, CM32181_CONF_REG_NUM) {
225 ret = i2c_smbus_write_word_data(client, i,
226 cm32181->conf_regs[i]);
227 if (ret < 0)
228 return ret;
229 }
230
231 return 0;
232}
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242
243static int cm32181_read_als_it(struct cm32181_chip *cm32181, int *val2)
244{
245 u16 als_it;
246 int i;
247
248 als_it = cm32181->conf_regs[CM32181_REG_ADDR_CMD];
249 als_it &= CM32181_CMD_ALS_IT_MASK;
250 als_it >>= CM32181_CMD_ALS_IT_SHIFT;
251 for (i = 0; i < cm32181->num_als_it; i++) {
252 if (als_it == cm32181->als_it_bits[i]) {
253 *val2 = cm32181->als_it_values[i];
254 return IIO_VAL_INT_PLUS_MICRO;
255 }
256 }
257
258 return -EINVAL;
259}
260
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269
270static int cm32181_write_als_it(struct cm32181_chip *cm32181, int val)
271{
272 struct i2c_client *client = cm32181->client;
273 u16 als_it;
274 int ret, i, n;
275
276 n = cm32181->num_als_it;
277 for (i = 0; i < n; i++)
278 if (val <= cm32181->als_it_values[i])
279 break;
280 if (i >= n)
281 i = n - 1;
282
283 als_it = cm32181->als_it_bits[i];
284 als_it <<= CM32181_CMD_ALS_IT_SHIFT;
285
286 mutex_lock(&cm32181->lock);
287 cm32181->conf_regs[CM32181_REG_ADDR_CMD] &=
288 ~CM32181_CMD_ALS_IT_MASK;
289 cm32181->conf_regs[CM32181_REG_ADDR_CMD] |=
290 als_it;
291 ret = i2c_smbus_write_word_data(client, CM32181_REG_ADDR_CMD,
292 cm32181->conf_regs[CM32181_REG_ADDR_CMD]);
293 mutex_unlock(&cm32181->lock);
294
295 return ret;
296}
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306
307static int cm32181_get_lux(struct cm32181_chip *cm32181)
308{
309 struct i2c_client *client = cm32181->client;
310 int ret;
311 int als_it;
312 u64 lux;
313
314 ret = cm32181_read_als_it(cm32181, &als_it);
315 if (ret < 0)
316 return -EINVAL;
317
318 lux = cm32181->lux_per_bit;
319 lux *= cm32181->lux_per_bit_base_it;
320 lux = div_u64(lux, als_it);
321
322 ret = i2c_smbus_read_word_data(client, CM32181_REG_ADDR_ALS);
323 if (ret < 0)
324 return ret;
325
326 lux *= ret;
327 lux *= cm32181->calibscale;
328 lux = div_u64(lux, CM32181_CALIBSCALE_RESOLUTION);
329 lux = div_u64(lux, CM32181_LUX_PER_BIT_RESOLUTION);
330
331 if (lux > 0xFFFF)
332 lux = 0xFFFF;
333
334 return lux;
335}
336
337static int cm32181_read_raw(struct iio_dev *indio_dev,
338 struct iio_chan_spec const *chan,
339 int *val, int *val2, long mask)
340{
341 struct cm32181_chip *cm32181 = iio_priv(indio_dev);
342 int ret;
343
344 switch (mask) {
345 case IIO_CHAN_INFO_PROCESSED:
346 ret = cm32181_get_lux(cm32181);
347 if (ret < 0)
348 return ret;
349 *val = ret;
350 return IIO_VAL_INT;
351 case IIO_CHAN_INFO_CALIBSCALE:
352 *val = cm32181->calibscale;
353 return IIO_VAL_INT;
354 case IIO_CHAN_INFO_INT_TIME:
355 *val = 0;
356 ret = cm32181_read_als_it(cm32181, val2);
357 return ret;
358 }
359
360 return -EINVAL;
361}
362
363static int cm32181_write_raw(struct iio_dev *indio_dev,
364 struct iio_chan_spec const *chan,
365 int val, int val2, long mask)
366{
367 struct cm32181_chip *cm32181 = iio_priv(indio_dev);
368 int ret;
369
370 switch (mask) {
371 case IIO_CHAN_INFO_CALIBSCALE:
372 cm32181->calibscale = val;
373 return val;
374 case IIO_CHAN_INFO_INT_TIME:
375 ret = cm32181_write_als_it(cm32181, val2);
376 return ret;
377 }
378
379 return -EINVAL;
380}
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390
391
392static ssize_t cm32181_get_it_available(struct device *dev,
393 struct device_attribute *attr, char *buf)
394{
395 struct cm32181_chip *cm32181 = iio_priv(dev_to_iio_dev(dev));
396 int i, n, len;
397
398 n = cm32181->num_als_it;
399 for (i = 0, len = 0; i < n; i++)
400 len += sprintf(buf + len, "0.%06u ", cm32181->als_it_values[i]);
401 return len + sprintf(buf + len, "\n");
402}
403
404static const struct iio_chan_spec cm32181_channels[] = {
405 {
406 .type = IIO_LIGHT,
407 .info_mask_separate =
408 BIT(IIO_CHAN_INFO_PROCESSED) |
409 BIT(IIO_CHAN_INFO_CALIBSCALE) |
410 BIT(IIO_CHAN_INFO_INT_TIME),
411 }
412};
413
414static IIO_DEVICE_ATTR(in_illuminance_integration_time_available,
415 S_IRUGO, cm32181_get_it_available, NULL, 0);
416
417static struct attribute *cm32181_attributes[] = {
418 &iio_dev_attr_in_illuminance_integration_time_available.dev_attr.attr,
419 NULL,
420};
421
422static const struct attribute_group cm32181_attribute_group = {
423 .attrs = cm32181_attributes
424};
425
426static const struct iio_info cm32181_info = {
427 .read_raw = &cm32181_read_raw,
428 .write_raw = &cm32181_write_raw,
429 .attrs = &cm32181_attribute_group,
430};
431
432static int cm32181_probe(struct i2c_client *client)
433{
434 struct device *dev = &client->dev;
435 struct cm32181_chip *cm32181;
436 struct iio_dev *indio_dev;
437 int ret;
438
439 indio_dev = devm_iio_device_alloc(dev, sizeof(*cm32181));
440 if (!indio_dev)
441 return -ENOMEM;
442
443
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451
452
453 if (ACPI_HANDLE(dev) && client->addr == SMBUS_ALERT_RESPONSE_ADDRESS) {
454 struct i2c_board_info board_info = { .type = "dummy" };
455
456 i2c_smbus_read_byte(client);
457
458 client = i2c_acpi_new_device(dev, 1, &board_info);
459 if (IS_ERR(client))
460 return PTR_ERR(client);
461 }
462
463 cm32181 = iio_priv(indio_dev);
464 cm32181->client = client;
465 cm32181->dev = dev;
466
467 mutex_init(&cm32181->lock);
468 indio_dev->channels = cm32181_channels;
469 indio_dev->num_channels = ARRAY_SIZE(cm32181_channels);
470 indio_dev->info = &cm32181_info;
471 indio_dev->name = dev_name(dev);
472 indio_dev->modes = INDIO_DIRECT_MODE;
473
474 ret = cm32181_reg_init(cm32181);
475 if (ret) {
476 dev_err(dev, "%s: register init failed\n", __func__);
477 return ret;
478 }
479
480 ret = devm_iio_device_register(dev, indio_dev);
481 if (ret) {
482 dev_err(dev, "%s: regist device failed\n", __func__);
483 return ret;
484 }
485
486 return 0;
487}
488
489static const struct of_device_id cm32181_of_match[] = {
490 { .compatible = "capella,cm3218" },
491 { .compatible = "capella,cm32181" },
492 { }
493};
494MODULE_DEVICE_TABLE(of, cm32181_of_match);
495
496#ifdef CONFIG_ACPI
497static const struct acpi_device_id cm32181_acpi_match[] = {
498 { "CPLM3218", 0 },
499 { }
500};
501MODULE_DEVICE_TABLE(acpi, cm32181_acpi_match);
502#endif
503
504static struct i2c_driver cm32181_driver = {
505 .driver = {
506 .name = "cm32181",
507 .acpi_match_table = ACPI_PTR(cm32181_acpi_match),
508 .of_match_table = cm32181_of_match,
509 },
510 .probe_new = cm32181_probe,
511};
512
513module_i2c_driver(cm32181_driver);
514
515MODULE_AUTHOR("Kevin Tsai <ktsai@capellamicro.com>");
516MODULE_DESCRIPTION("CM32181 ambient light sensor driver");
517MODULE_LICENSE("GPL");
518