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12#include <linux/clk.h>
13#include <linux/delay.h>
14#include <linux/gpio.h>
15#include <linux/gpio/consumer.h>
16#include <linux/i2c.h>
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/of_gpio.h>
21#include <linux/pm_runtime.h>
22#include <linux/regmap.h>
23#include <linux/regulator/consumer.h>
24#include <linux/slab.h>
25#include <linux/v4l2-mediabus.h>
26#include <linux/videodev2.h>
27
28#include <media/v4l2-ctrls.h>
29#include <media/v4l2-device.h>
30#include <media/v4l2-subdev.h>
31
32
33
34
35#define IMX274_DEFAULT_FRAME_LENGTH (4550)
36#define IMX274_MAX_FRAME_LENGTH (0x000fffff)
37
38
39
40
41#define IMX274_PIXCLK_CONST1 (72000000)
42#define IMX274_PIXCLK_CONST2 (1000000)
43
44
45
46
47
48
49#define IMX274_GAIN_SHIFT (8)
50#define IMX274_GAIN_SHIFT_MASK ((1 << IMX274_GAIN_SHIFT) - 1)
51
52
53
54
55
56
57#define IMX274_GAIN_REG_MAX (1957)
58#define IMX274_MIN_GAIN (0x01 << IMX274_GAIN_SHIFT)
59#define IMX274_MAX_ANALOG_GAIN ((2048 << IMX274_GAIN_SHIFT)\
60 / (2048 - IMX274_GAIN_REG_MAX))
61#define IMX274_MAX_DIGITAL_GAIN (8)
62#define IMX274_DEF_GAIN (20 << IMX274_GAIN_SHIFT)
63#define IMX274_GAIN_CONST (2048)
64
65
66
67
68#define IMX274_MIN_EXPOSURE_TIME (4 * 260 / 72)
69
70#define IMX274_MAX_WIDTH (3840)
71#define IMX274_MAX_HEIGHT (2160)
72#define IMX274_MAX_FRAME_RATE (120)
73#define IMX274_MIN_FRAME_RATE (5)
74#define IMX274_DEF_FRAME_RATE (60)
75
76
77
78
79#define IMX274_SHR_LIMIT_CONST (4)
80
81
82
83
84#define IMX274_RESET_DELAY1 (2000)
85#define IMX274_RESET_DELAY2 (2200)
86
87
88
89
90#define IMX274_SHIFT_8_BITS (8)
91#define IMX274_SHIFT_16_BITS (16)
92#define IMX274_MASK_LSB_2_BITS (0x03)
93#define IMX274_MASK_LSB_3_BITS (0x07)
94#define IMX274_MASK_LSB_4_BITS (0x0f)
95#define IMX274_MASK_LSB_8_BITS (0x00ff)
96
97#define DRIVER_NAME "IMX274"
98
99
100
101
102#define IMX274_SHR_REG_MSB 0x300D
103#define IMX274_SHR_REG_LSB 0x300C
104#define IMX274_SVR_REG_MSB 0x300F
105#define IMX274_SVR_REG_LSB 0x300E
106#define IMX274_HTRIM_EN_REG 0x3037
107#define IMX274_HTRIM_START_REG_LSB 0x3038
108#define IMX274_HTRIM_START_REG_MSB 0x3039
109#define IMX274_HTRIM_END_REG_LSB 0x303A
110#define IMX274_HTRIM_END_REG_MSB 0x303B
111#define IMX274_VWIDCUTEN_REG 0x30DD
112#define IMX274_VWIDCUT_REG_LSB 0x30DE
113#define IMX274_VWIDCUT_REG_MSB 0x30DF
114#define IMX274_VWINPOS_REG_LSB 0x30E0
115#define IMX274_VWINPOS_REG_MSB 0x30E1
116#define IMX274_WRITE_VSIZE_REG_LSB 0x3130
117#define IMX274_WRITE_VSIZE_REG_MSB 0x3131
118#define IMX274_Y_OUT_SIZE_REG_LSB 0x3132
119#define IMX274_Y_OUT_SIZE_REG_MSB 0x3133
120#define IMX274_VMAX_REG_1 0x30FA
121#define IMX274_VMAX_REG_2 0x30F9
122#define IMX274_VMAX_REG_3 0x30F8
123#define IMX274_HMAX_REG_MSB 0x30F7
124#define IMX274_HMAX_REG_LSB 0x30F6
125#define IMX274_ANALOG_GAIN_ADDR_LSB 0x300A
126#define IMX274_ANALOG_GAIN_ADDR_MSB 0x300B
127#define IMX274_DIGITAL_GAIN_REG 0x3012
128#define IMX274_VFLIP_REG 0x301A
129#define IMX274_TEST_PATTERN_REG 0x303D
130#define IMX274_STANDBY_REG 0x3000
131
132#define IMX274_TABLE_WAIT_MS 0
133#define IMX274_TABLE_END 1
134
135
136static const char * const imx274_supply_names[] = {
137 "vddl",
138 "vdig",
139 "vana",
140};
141
142#define IMX274_NUM_SUPPLIES ARRAY_SIZE(imx274_supply_names)
143
144
145
146
147struct reg_8 {
148 u16 addr;
149 u8 val;
150};
151
152static const struct regmap_config imx274_regmap_config = {
153 .reg_bits = 16,
154 .val_bits = 8,
155 .cache_type = REGCACHE_RBTREE,
156};
157
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174
175struct imx274_mode {
176 const struct reg_8 *init_regs;
177 u8 wbin_ratio;
178 u8 hbin_ratio;
179 int min_frame_len;
180 int min_SHR;
181 int max_fps;
182 int nocpiop;
183};
184
185
186
187
188enum {
189 TEST_PATTERN_DISABLED = 0,
190 TEST_PATTERN_ALL_000H,
191 TEST_PATTERN_ALL_FFFH,
192 TEST_PATTERN_ALL_555H,
193 TEST_PATTERN_ALL_AAAH,
194 TEST_PATTERN_VSP_5AH,
195 TEST_PATTERN_VSP_A5H,
196 TEST_PATTERN_VSP_05H,
197 TEST_PATTERN_VSP_50H,
198 TEST_PATTERN_VSP_0FH,
199 TEST_PATTERN_VSP_F0H,
200 TEST_PATTERN_H_COLOR_BARS,
201 TEST_PATTERN_V_COLOR_BARS,
202};
203
204static const char * const tp_qmenu[] = {
205 "Disabled",
206 "All 000h Pattern",
207 "All FFFh Pattern",
208 "All 555h Pattern",
209 "All AAAh Pattern",
210 "Vertical Stripe (555h / AAAh)",
211 "Vertical Stripe (AAAh / 555h)",
212 "Vertical Stripe (000h / 555h)",
213 "Vertical Stripe (555h / 000h)",
214 "Vertical Stripe (000h / FFFh)",
215 "Vertical Stripe (FFFh / 000h)",
216 "Vertical Color Bars",
217 "Horizontal Color Bars",
218};
219
220
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222
223
224
225static const struct reg_8 imx274_mode1_3840x2160_raw10[] = {
226 {0x3004, 0x01},
227 {0x3005, 0x01},
228 {0x3006, 0x00},
229 {0x3007, 0xa2},
230
231 {0x3018, 0xA2},
232
233 {0x306B, 0x05},
234 {0x30E2, 0x01},
235
236 {0x30EE, 0x01},
237 {0x3342, 0x0A},
238 {0x3343, 0x00},
239 {0x3344, 0x16},
240 {0x3345, 0x00},
241 {0x33A6, 0x01},
242 {0x3528, 0x0E},
243 {0x3554, 0x1F},
244 {0x3555, 0x01},
245 {0x3556, 0x01},
246 {0x3557, 0x01},
247 {0x3558, 0x01},
248 {0x3559, 0x00},
249 {0x355A, 0x00},
250 {0x35BA, 0x0E},
251 {0x366A, 0x1B},
252 {0x366B, 0x1A},
253 {0x366C, 0x19},
254 {0x366D, 0x17},
255 {0x3A41, 0x08},
256
257 {IMX274_TABLE_END, 0x00}
258};
259
260
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263
264
265
266static const struct reg_8 imx274_mode3_1920x1080_raw10[] = {
267 {0x3004, 0x02},
268 {0x3005, 0x21},
269 {0x3006, 0x00},
270 {0x3007, 0xb1},
271
272 {0x3018, 0xA2},
273
274 {0x306B, 0x05},
275 {0x30E2, 0x02},
276
277 {0x30EE, 0x01},
278 {0x3342, 0x0A},
279 {0x3343, 0x00},
280 {0x3344, 0x1A},
281 {0x3345, 0x00},
282 {0x33A6, 0x01},
283 {0x3528, 0x0E},
284 {0x3554, 0x00},
285 {0x3555, 0x01},
286 {0x3556, 0x01},
287 {0x3557, 0x01},
288 {0x3558, 0x01},
289 {0x3559, 0x00},
290 {0x355A, 0x00},
291 {0x35BA, 0x0E},
292 {0x366A, 0x1B},
293 {0x366B, 0x1A},
294 {0x366C, 0x19},
295 {0x366D, 0x17},
296 {0x3A41, 0x08},
297
298 {IMX274_TABLE_END, 0x00}
299};
300
301
302
303
304
305
306static const struct reg_8 imx274_mode5_1280x720_raw10[] = {
307 {0x3004, 0x03},
308 {0x3005, 0x31},
309 {0x3006, 0x00},
310 {0x3007, 0xa9},
311
312 {0x3018, 0xA2},
313
314 {0x306B, 0x05},
315 {0x30E2, 0x03},
316
317 {0x30EE, 0x01},
318 {0x3342, 0x0A},
319 {0x3343, 0x00},
320 {0x3344, 0x1B},
321 {0x3345, 0x00},
322 {0x33A6, 0x01},
323 {0x3528, 0x0E},
324 {0x3554, 0x00},
325 {0x3555, 0x01},
326 {0x3556, 0x01},
327 {0x3557, 0x01},
328 {0x3558, 0x01},
329 {0x3559, 0x00},
330 {0x355A, 0x00},
331 {0x35BA, 0x0E},
332 {0x366A, 0x1B},
333 {0x366B, 0x19},
334 {0x366C, 0x17},
335 {0x366D, 0x17},
336 {0x3A41, 0x04},
337
338 {IMX274_TABLE_END, 0x00}
339};
340
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342
343
344
345
346static const struct reg_8 imx274_mode6_1280x540_raw10[] = {
347 {0x3004, 0x04},
348 {0x3005, 0x31},
349 {0x3006, 0x00},
350 {0x3007, 0x02},
351
352 {0x3018, 0xA2},
353
354 {0x306B, 0x05},
355 {0x30E2, 0x04},
356
357 {0x30EE, 0x01},
358 {0x3342, 0x0A},
359 {0x3343, 0x00},
360 {0x3344, 0x16},
361 {0x3345, 0x00},
362 {0x33A6, 0x01},
363 {0x3528, 0x0E},
364 {0x3554, 0x1F},
365 {0x3555, 0x01},
366 {0x3556, 0x01},
367 {0x3557, 0x01},
368 {0x3558, 0x01},
369 {0x3559, 0x00},
370 {0x355A, 0x00},
371 {0x35BA, 0x0E},
372 {0x366A, 0x1B},
373 {0x366B, 0x1A},
374 {0x366C, 0x19},
375 {0x366D, 0x17},
376 {0x3A41, 0x04},
377
378 {IMX274_TABLE_END, 0x00}
379};
380
381
382
383
384
385static const struct reg_8 imx274_start_1[] = {
386 {IMX274_STANDBY_REG, 0x12},
387
388
389 {0x3120, 0xF0},
390 {0x3121, 0x00},
391 {0x3122, 0x02},
392 {0x3129, 0x9C},
393 {0x312A, 0x02},
394 {0x312D, 0x02},
395
396 {0x310B, 0x00},
397
398
399 {0x304C, 0x00},
400 {0x304D, 0x03},
401 {0x331C, 0x1A},
402 {0x331D, 0x00},
403 {0x3502, 0x02},
404 {0x3529, 0x0E},
405 {0x352A, 0x0E},
406 {0x352B, 0x0E},
407 {0x3538, 0x0E},
408 {0x3539, 0x0E},
409 {0x3553, 0x00},
410 {0x357D, 0x05},
411 {0x357F, 0x05},
412 {0x3581, 0x04},
413 {0x3583, 0x76},
414 {0x3587, 0x01},
415 {0x35BB, 0x0E},
416 {0x35BC, 0x0E},
417 {0x35BD, 0x0E},
418 {0x35BE, 0x0E},
419 {0x35BF, 0x0E},
420 {0x366E, 0x00},
421 {0x366F, 0x00},
422 {0x3670, 0x00},
423 {0x3671, 0x00},
424
425
426 {0x3304, 0x32},
427 {0x3305, 0x00},
428 {0x3306, 0x32},
429 {0x3307, 0x00},
430 {0x3590, 0x32},
431 {0x3591, 0x00},
432 {0x3686, 0x32},
433 {0x3687, 0x00},
434
435 {IMX274_TABLE_END, 0x00}
436};
437
438
439
440
441
442static const struct reg_8 imx274_start_2[] = {
443 {IMX274_STANDBY_REG, 0x00},
444 {0x303E, 0x02},
445 {IMX274_TABLE_END, 0x00}
446};
447
448
449
450
451
452static const struct reg_8 imx274_start_3[] = {
453 {0x30F4, 0x00},
454 {0x3018, 0xA2},
455 {IMX274_TABLE_END, 0x00}
456};
457
458
459
460
461static const struct reg_8 imx274_stop[] = {
462 {IMX274_STANDBY_REG, 0x01},
463 {IMX274_TABLE_END, 0x00}
464};
465
466
467
468
469static const struct reg_8 imx274_tp_disabled[] = {
470 {0x303C, 0x00},
471 {0x377F, 0x00},
472 {0x3781, 0x00},
473 {0x370B, 0x00},
474 {IMX274_TABLE_END, 0x00}
475};
476
477
478
479
480
481static const struct reg_8 imx274_tp_regs[] = {
482 {0x303C, 0x11},
483 {0x370E, 0x01},
484 {0x377F, 0x01},
485 {0x3781, 0x01},
486 {0x370B, 0x11},
487 {IMX274_TABLE_END, 0x00}
488};
489
490
491static const struct imx274_mode imx274_modes[] = {
492 {
493
494 .wbin_ratio = 1,
495 .hbin_ratio = 1,
496 .init_regs = imx274_mode1_3840x2160_raw10,
497 .min_frame_len = 4550,
498 .min_SHR = 12,
499 .max_fps = 60,
500 .nocpiop = 112,
501 },
502 {
503
504 .wbin_ratio = 2,
505 .hbin_ratio = 2,
506 .init_regs = imx274_mode3_1920x1080_raw10,
507 .min_frame_len = 2310,
508 .min_SHR = 8,
509 .max_fps = 120,
510 .nocpiop = 112,
511 },
512 {
513
514 .wbin_ratio = 3,
515 .hbin_ratio = 3,
516 .init_regs = imx274_mode5_1280x720_raw10,
517 .min_frame_len = 2310,
518 .min_SHR = 8,
519 .max_fps = 120,
520 .nocpiop = 112,
521 },
522 {
523
524 .wbin_ratio = 3,
525 .hbin_ratio = 4,
526 .init_regs = imx274_mode6_1280x540_raw10,
527 .min_frame_len = 2310,
528 .min_SHR = 4,
529 .max_fps = 120,
530 .nocpiop = 112,
531 },
532};
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541
542struct imx274_ctrls {
543 struct v4l2_ctrl_handler handler;
544 struct v4l2_ctrl *exposure;
545 struct v4l2_ctrl *gain;
546 struct v4l2_ctrl *vflip;
547 struct v4l2_ctrl *test_pattern;
548};
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567
568struct stimx274 {
569 struct v4l2_subdev sd;
570 struct media_pad pad;
571 struct i2c_client *client;
572 struct imx274_ctrls ctrls;
573 struct v4l2_rect crop;
574 struct v4l2_mbus_framefmt format;
575 struct v4l2_fract frame_interval;
576 struct regmap *regmap;
577 struct gpio_desc *reset_gpio;
578 struct regulator_bulk_data supplies[IMX274_NUM_SUPPLIES];
579 struct clk *inck;
580 struct mutex lock;
581 const struct imx274_mode *mode;
582};
583
584#define IMX274_ROUND(dim, step, flags) \
585 ((flags) & V4L2_SEL_FLAG_GE \
586 ? roundup((dim), (step)) \
587 : ((flags) & V4L2_SEL_FLAG_LE \
588 ? rounddown((dim), (step)) \
589 : rounddown((dim) + (step) / 2, (step))))
590
591
592
593
594static int imx274_set_gain(struct stimx274 *priv, struct v4l2_ctrl *ctrl);
595static int imx274_set_exposure(struct stimx274 *priv, int val);
596static int imx274_set_vflip(struct stimx274 *priv, int val);
597static int imx274_set_test_pattern(struct stimx274 *priv, int val);
598static int imx274_set_frame_interval(struct stimx274 *priv,
599 struct v4l2_fract frame_interval);
600
601static inline void msleep_range(unsigned int delay_base)
602{
603 usleep_range(delay_base * 1000, delay_base * 1000 + 500);
604}
605
606
607
608
609static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
610{
611 return &container_of(ctrl->handler,
612 struct stimx274, ctrls.handler)->sd;
613}
614
615static inline struct stimx274 *to_imx274(struct v4l2_subdev *sd)
616{
617 return container_of(sd, struct stimx274, sd);
618}
619
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623
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628
629
630static int imx274_write_table(struct stimx274 *priv, const struct reg_8 table[])
631{
632 struct regmap *regmap = priv->regmap;
633 int err = 0;
634 const struct reg_8 *next;
635 u8 val;
636
637 int range_start = -1;
638 int range_count = 0;
639 u8 range_vals[16];
640 int max_range_vals = ARRAY_SIZE(range_vals);
641
642 for (next = table;; next++) {
643 if ((next->addr != range_start + range_count) ||
644 (next->addr == IMX274_TABLE_END) ||
645 (next->addr == IMX274_TABLE_WAIT_MS) ||
646 (range_count == max_range_vals)) {
647 if (range_count == 1)
648 err = regmap_write(regmap,
649 range_start, range_vals[0]);
650 else if (range_count > 1)
651 err = regmap_bulk_write(regmap, range_start,
652 &range_vals[0],
653 range_count);
654 else
655 err = 0;
656
657 if (err)
658 return err;
659
660 range_start = -1;
661 range_count = 0;
662
663
664 if (next->addr == IMX274_TABLE_END)
665 break;
666
667 if (next->addr == IMX274_TABLE_WAIT_MS) {
668 msleep_range(next->val);
669 continue;
670 }
671 }
672
673 val = next->val;
674
675 if (range_start == -1)
676 range_start = next->addr;
677
678 range_vals[range_count++] = val;
679 }
680 return 0;
681}
682
683static inline int imx274_write_reg(struct stimx274 *priv, u16 addr, u8 val)
684{
685 int err;
686
687 err = regmap_write(priv->regmap, addr, val);
688 if (err)
689 dev_err(&priv->client->dev,
690 "%s : i2c write failed, %x = %x\n", __func__,
691 addr, val);
692 else
693 dev_dbg(&priv->client->dev,
694 "%s : addr 0x%x, val=0x%x\n", __func__,
695 addr, val);
696 return err;
697}
698
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712
713static int imx274_read_mbreg(struct stimx274 *priv, u16 addr, u32 *val,
714 size_t nbytes)
715{
716 __le32 val_le = 0;
717 int err;
718
719 err = regmap_bulk_read(priv->regmap, addr, &val_le, nbytes);
720 if (err) {
721 dev_err(&priv->client->dev,
722 "%s : i2c bulk read failed, %x (%zu bytes)\n",
723 __func__, addr, nbytes);
724 } else {
725 *val = le32_to_cpu(val_le);
726 dev_dbg(&priv->client->dev,
727 "%s : addr 0x%x, val=0x%x (%zu bytes)\n",
728 __func__, addr, *val, nbytes);
729 }
730
731 return err;
732}
733
734
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743
744
745static int imx274_write_mbreg(struct stimx274 *priv, u16 addr, u32 val,
746 size_t nbytes)
747{
748 __le32 val_le = cpu_to_le32(val);
749 int err;
750
751 err = regmap_bulk_write(priv->regmap, addr, &val_le, nbytes);
752 if (err)
753 dev_err(&priv->client->dev,
754 "%s : i2c bulk write failed, %x = %x (%zu bytes)\n",
755 __func__, addr, val, nbytes);
756 else
757 dev_dbg(&priv->client->dev,
758 "%s : addr 0x%x, val=0x%x (%zu bytes)\n",
759 __func__, addr, val, nbytes);
760 return err;
761}
762
763
764
765
766
767
768
769static int imx274_mode_regs(struct stimx274 *priv)
770{
771 int err = 0;
772
773 err = imx274_write_table(priv, imx274_start_1);
774 if (err)
775 return err;
776
777 err = imx274_write_table(priv, priv->mode->init_regs);
778
779 return err;
780}
781
782
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787
788static int imx274_start_stream(struct stimx274 *priv)
789{
790 int err = 0;
791
792 err = __v4l2_ctrl_handler_setup(&priv->ctrls.handler);
793 if (err) {
794 dev_err(&priv->client->dev, "Error %d setup controls\n", err);
795 return err;
796 }
797
798
799
800
801
802
803 msleep_range(11);
804 err = imx274_write_table(priv, imx274_start_2);
805 if (err)
806 return err;
807
808
809
810
811
812
813 msleep_range(8);
814 err = imx274_write_table(priv, imx274_start_3);
815 if (err)
816 return err;
817
818 return 0;
819}
820
821
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830
831static void imx274_reset(struct stimx274 *priv, int rst)
832{
833 gpiod_set_value_cansleep(priv->reset_gpio, 0);
834 usleep_range(IMX274_RESET_DELAY1, IMX274_RESET_DELAY2);
835 gpiod_set_value_cansleep(priv->reset_gpio, !!rst);
836 usleep_range(IMX274_RESET_DELAY1, IMX274_RESET_DELAY2);
837}
838
839static int imx274_power_on(struct device *dev)
840{
841 struct i2c_client *client = to_i2c_client(dev);
842 struct v4l2_subdev *sd = i2c_get_clientdata(client);
843 struct stimx274 *imx274 = to_imx274(sd);
844 int ret;
845
846
847 imx274_reset(imx274, 0);
848
849 ret = clk_prepare_enable(imx274->inck);
850 if (ret) {
851 dev_err(&imx274->client->dev,
852 "Failed to enable input clock: %d\n", ret);
853 return ret;
854 }
855
856 ret = regulator_bulk_enable(IMX274_NUM_SUPPLIES, imx274->supplies);
857 if (ret) {
858 dev_err(&imx274->client->dev,
859 "Failed to enable regulators: %d\n", ret);
860 goto fail_reg;
861 }
862
863 udelay(2);
864 imx274_reset(imx274, 1);
865
866 return 0;
867
868fail_reg:
869 clk_disable_unprepare(imx274->inck);
870 return ret;
871}
872
873static int imx274_power_off(struct device *dev)
874{
875 struct i2c_client *client = to_i2c_client(dev);
876 struct v4l2_subdev *sd = i2c_get_clientdata(client);
877 struct stimx274 *imx274 = to_imx274(sd);
878
879 imx274_reset(imx274, 0);
880
881 regulator_bulk_disable(IMX274_NUM_SUPPLIES, imx274->supplies);
882
883 clk_disable_unprepare(imx274->inck);
884
885 return 0;
886}
887
888static int imx274_regulators_get(struct device *dev, struct stimx274 *imx274)
889{
890 unsigned int i;
891
892 for (i = 0; i < IMX274_NUM_SUPPLIES; i++)
893 imx274->supplies[i].supply = imx274_supply_names[i];
894
895 return devm_regulator_bulk_get(dev, IMX274_NUM_SUPPLIES,
896 imx274->supplies);
897}
898
899
900
901
902
903
904
905
906
907static int imx274_s_ctrl(struct v4l2_ctrl *ctrl)
908{
909 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
910 struct stimx274 *imx274 = to_imx274(sd);
911 int ret = -EINVAL;
912
913 if (!pm_runtime_get_if_in_use(&imx274->client->dev))
914 return 0;
915
916 dev_dbg(&imx274->client->dev,
917 "%s : s_ctrl: %s, value: %d\n", __func__,
918 ctrl->name, ctrl->val);
919
920 switch (ctrl->id) {
921 case V4L2_CID_EXPOSURE:
922 dev_dbg(&imx274->client->dev,
923 "%s : set V4L2_CID_EXPOSURE\n", __func__);
924 ret = imx274_set_exposure(imx274, ctrl->val);
925 break;
926
927 case V4L2_CID_GAIN:
928 dev_dbg(&imx274->client->dev,
929 "%s : set V4L2_CID_GAIN\n", __func__);
930 ret = imx274_set_gain(imx274, ctrl);
931 break;
932
933 case V4L2_CID_VFLIP:
934 dev_dbg(&imx274->client->dev,
935 "%s : set V4L2_CID_VFLIP\n", __func__);
936 ret = imx274_set_vflip(imx274, ctrl->val);
937 break;
938
939 case V4L2_CID_TEST_PATTERN:
940 dev_dbg(&imx274->client->dev,
941 "%s : set V4L2_CID_TEST_PATTERN\n", __func__);
942 ret = imx274_set_test_pattern(imx274, ctrl->val);
943 break;
944 }
945
946 pm_runtime_put(&imx274->client->dev);
947
948 return ret;
949}
950
951static int imx274_binning_goodness(struct stimx274 *imx274,
952 int w, int ask_w,
953 int h, int ask_h, u32 flags)
954{
955 struct device *dev = &imx274->client->dev;
956 const int goodness = 100000;
957 int val = 0;
958
959 if (flags & V4L2_SEL_FLAG_GE) {
960 if (w < ask_w)
961 val -= goodness;
962 if (h < ask_h)
963 val -= goodness;
964 }
965
966 if (flags & V4L2_SEL_FLAG_LE) {
967 if (w > ask_w)
968 val -= goodness;
969 if (h > ask_h)
970 val -= goodness;
971 }
972
973 val -= abs(w - ask_w);
974 val -= abs(h - ask_h);
975
976 dev_dbg(dev, "%s: ask %dx%d, size %dx%d, goodness %d\n",
977 __func__, ask_w, ask_h, w, h, val);
978
979 return val;
980}
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007static int __imx274_change_compose(struct stimx274 *imx274,
1008 struct v4l2_subdev_state *sd_state,
1009 u32 which,
1010 u32 *width,
1011 u32 *height,
1012 u32 flags)
1013{
1014 struct device *dev = &imx274->client->dev;
1015 const struct v4l2_rect *cur_crop;
1016 struct v4l2_mbus_framefmt *tgt_fmt;
1017 unsigned int i;
1018 const struct imx274_mode *best_mode = &imx274_modes[0];
1019 int best_goodness = INT_MIN;
1020
1021 if (which == V4L2_SUBDEV_FORMAT_TRY) {
1022 cur_crop = &sd_state->pads->try_crop;
1023 tgt_fmt = &sd_state->pads->try_fmt;
1024 } else {
1025 cur_crop = &imx274->crop;
1026 tgt_fmt = &imx274->format;
1027 }
1028
1029 for (i = 0; i < ARRAY_SIZE(imx274_modes); i++) {
1030 u8 wratio = imx274_modes[i].wbin_ratio;
1031 u8 hratio = imx274_modes[i].hbin_ratio;
1032
1033 int goodness = imx274_binning_goodness(
1034 imx274,
1035 cur_crop->width / wratio, *width,
1036 cur_crop->height / hratio, *height,
1037 flags);
1038
1039 if (goodness >= best_goodness) {
1040 best_goodness = goodness;
1041 best_mode = &imx274_modes[i];
1042 }
1043 }
1044
1045 *width = cur_crop->width / best_mode->wbin_ratio;
1046 *height = cur_crop->height / best_mode->hbin_ratio;
1047
1048 if (which == V4L2_SUBDEV_FORMAT_ACTIVE)
1049 imx274->mode = best_mode;
1050
1051 dev_dbg(dev, "%s: selected %ux%u binning\n",
1052 __func__, best_mode->wbin_ratio, best_mode->hbin_ratio);
1053
1054 tgt_fmt->width = *width;
1055 tgt_fmt->height = *height;
1056 tgt_fmt->field = V4L2_FIELD_NONE;
1057
1058 return 0;
1059}
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071static int imx274_get_fmt(struct v4l2_subdev *sd,
1072 struct v4l2_subdev_state *sd_state,
1073 struct v4l2_subdev_format *fmt)
1074{
1075 struct stimx274 *imx274 = to_imx274(sd);
1076
1077 mutex_lock(&imx274->lock);
1078 fmt->format = imx274->format;
1079 mutex_unlock(&imx274->lock);
1080 return 0;
1081}
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093static int imx274_set_fmt(struct v4l2_subdev *sd,
1094 struct v4l2_subdev_state *sd_state,
1095 struct v4l2_subdev_format *format)
1096{
1097 struct v4l2_mbus_framefmt *fmt = &format->format;
1098 struct stimx274 *imx274 = to_imx274(sd);
1099 int err = 0;
1100
1101 mutex_lock(&imx274->lock);
1102
1103 err = __imx274_change_compose(imx274, sd_state, format->which,
1104 &fmt->width, &fmt->height, 0);
1105
1106 if (err)
1107 goto out;
1108
1109
1110
1111
1112
1113
1114 fmt->field = V4L2_FIELD_NONE;
1115 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
1116 sd_state->pads->try_fmt = *fmt;
1117 else
1118 imx274->format = *fmt;
1119
1120out:
1121 mutex_unlock(&imx274->lock);
1122
1123 return err;
1124}
1125
1126static int imx274_get_selection(struct v4l2_subdev *sd,
1127 struct v4l2_subdev_state *sd_state,
1128 struct v4l2_subdev_selection *sel)
1129{
1130 struct stimx274 *imx274 = to_imx274(sd);
1131 const struct v4l2_rect *src_crop;
1132 const struct v4l2_mbus_framefmt *src_fmt;
1133 int ret = 0;
1134
1135 if (sel->pad != 0)
1136 return -EINVAL;
1137
1138 if (sel->target == V4L2_SEL_TGT_CROP_BOUNDS) {
1139 sel->r.left = 0;
1140 sel->r.top = 0;
1141 sel->r.width = IMX274_MAX_WIDTH;
1142 sel->r.height = IMX274_MAX_HEIGHT;
1143 return 0;
1144 }
1145
1146 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1147 src_crop = &sd_state->pads->try_crop;
1148 src_fmt = &sd_state->pads->try_fmt;
1149 } else {
1150 src_crop = &imx274->crop;
1151 src_fmt = &imx274->format;
1152 }
1153
1154 mutex_lock(&imx274->lock);
1155
1156 switch (sel->target) {
1157 case V4L2_SEL_TGT_CROP:
1158 sel->r = *src_crop;
1159 break;
1160 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1161 sel->r.top = 0;
1162 sel->r.left = 0;
1163 sel->r.width = src_crop->width;
1164 sel->r.height = src_crop->height;
1165 break;
1166 case V4L2_SEL_TGT_COMPOSE:
1167 sel->r.top = 0;
1168 sel->r.left = 0;
1169 sel->r.width = src_fmt->width;
1170 sel->r.height = src_fmt->height;
1171 break;
1172 default:
1173 ret = -EINVAL;
1174 }
1175
1176 mutex_unlock(&imx274->lock);
1177
1178 return ret;
1179}
1180
1181static int imx274_set_selection_crop(struct stimx274 *imx274,
1182 struct v4l2_subdev_state *sd_state,
1183 struct v4l2_subdev_selection *sel)
1184{
1185 struct v4l2_rect *tgt_crop;
1186 struct v4l2_rect new_crop;
1187 bool size_changed;
1188
1189
1190
1191
1192
1193
1194
1195 const u32 h_step = 24;
1196
1197 new_crop.width = min_t(u32,
1198 IMX274_ROUND(sel->r.width, h_step, sel->flags),
1199 IMX274_MAX_WIDTH);
1200
1201
1202 if (new_crop.width < 144)
1203 new_crop.width = 144;
1204
1205 new_crop.left = min_t(u32,
1206 IMX274_ROUND(sel->r.left, h_step, 0),
1207 IMX274_MAX_WIDTH - new_crop.width);
1208
1209 new_crop.height = min_t(u32,
1210 IMX274_ROUND(sel->r.height, 2, sel->flags),
1211 IMX274_MAX_HEIGHT);
1212
1213 new_crop.top = min_t(u32, IMX274_ROUND(sel->r.top, 2, 0),
1214 IMX274_MAX_HEIGHT - new_crop.height);
1215
1216 sel->r = new_crop;
1217
1218 if (sel->which == V4L2_SUBDEV_FORMAT_TRY)
1219 tgt_crop = &sd_state->pads->try_crop;
1220 else
1221 tgt_crop = &imx274->crop;
1222
1223 mutex_lock(&imx274->lock);
1224
1225 size_changed = (new_crop.width != tgt_crop->width ||
1226 new_crop.height != tgt_crop->height);
1227
1228
1229 *tgt_crop = new_crop;
1230
1231
1232 if (size_changed)
1233 __imx274_change_compose(imx274, sd_state, sel->which,
1234 &new_crop.width, &new_crop.height,
1235 sel->flags);
1236
1237 mutex_unlock(&imx274->lock);
1238
1239 return 0;
1240}
1241
1242static int imx274_set_selection(struct v4l2_subdev *sd,
1243 struct v4l2_subdev_state *sd_state,
1244 struct v4l2_subdev_selection *sel)
1245{
1246 struct stimx274 *imx274 = to_imx274(sd);
1247
1248 if (sel->pad != 0)
1249 return -EINVAL;
1250
1251 if (sel->target == V4L2_SEL_TGT_CROP)
1252 return imx274_set_selection_crop(imx274, sd_state, sel);
1253
1254 if (sel->target == V4L2_SEL_TGT_COMPOSE) {
1255 int err;
1256
1257 mutex_lock(&imx274->lock);
1258 err = __imx274_change_compose(imx274, sd_state, sel->which,
1259 &sel->r.width, &sel->r.height,
1260 sel->flags);
1261 mutex_unlock(&imx274->lock);
1262
1263
1264
1265
1266
1267 if (!err) {
1268 sel->r.top = 0;
1269 sel->r.left = 0;
1270 }
1271
1272 return err;
1273 }
1274
1275 return -EINVAL;
1276}
1277
1278static int imx274_apply_trimming(struct stimx274 *imx274)
1279{
1280 u32 h_start;
1281 u32 h_end;
1282 u32 hmax;
1283 u32 v_cut;
1284 s32 v_pos;
1285 u32 write_v_size;
1286 u32 y_out_size;
1287 int err;
1288
1289 h_start = imx274->crop.left + 12;
1290 h_end = h_start + imx274->crop.width;
1291
1292
1293
1294
1295 hmax = max_t(u32, 260, (imx274->crop.width) / 16 + 23);
1296
1297
1298 v_pos = imx274->ctrls.vflip->cur.val ?
1299 (-imx274->crop.top / 2) : (imx274->crop.top / 2);
1300 v_cut = (IMX274_MAX_HEIGHT - imx274->crop.height) / 2;
1301 write_v_size = imx274->crop.height + 22;
1302 y_out_size = imx274->crop.height;
1303
1304 err = imx274_write_mbreg(imx274, IMX274_HMAX_REG_LSB, hmax, 2);
1305 if (!err)
1306 err = imx274_write_mbreg(imx274, IMX274_HTRIM_EN_REG, 1, 1);
1307 if (!err)
1308 err = imx274_write_mbreg(imx274, IMX274_HTRIM_START_REG_LSB,
1309 h_start, 2);
1310 if (!err)
1311 err = imx274_write_mbreg(imx274, IMX274_HTRIM_END_REG_LSB,
1312 h_end, 2);
1313 if (!err)
1314 err = imx274_write_mbreg(imx274, IMX274_VWIDCUTEN_REG, 1, 1);
1315 if (!err)
1316 err = imx274_write_mbreg(imx274, IMX274_VWIDCUT_REG_LSB,
1317 v_cut, 2);
1318 if (!err)
1319 err = imx274_write_mbreg(imx274, IMX274_VWINPOS_REG_LSB,
1320 v_pos, 2);
1321 if (!err)
1322 err = imx274_write_mbreg(imx274, IMX274_WRITE_VSIZE_REG_LSB,
1323 write_v_size, 2);
1324 if (!err)
1325 err = imx274_write_mbreg(imx274, IMX274_Y_OUT_SIZE_REG_LSB,
1326 y_out_size, 2);
1327
1328 return err;
1329}
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340static int imx274_g_frame_interval(struct v4l2_subdev *sd,
1341 struct v4l2_subdev_frame_interval *fi)
1342{
1343 struct stimx274 *imx274 = to_imx274(sd);
1344
1345 fi->interval = imx274->frame_interval;
1346 dev_dbg(&imx274->client->dev, "%s frame rate = %d / %d\n",
1347 __func__, imx274->frame_interval.numerator,
1348 imx274->frame_interval.denominator);
1349
1350 return 0;
1351}
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362static int imx274_s_frame_interval(struct v4l2_subdev *sd,
1363 struct v4l2_subdev_frame_interval *fi)
1364{
1365 struct stimx274 *imx274 = to_imx274(sd);
1366 struct v4l2_ctrl *ctrl = imx274->ctrls.exposure;
1367 int min, max, def;
1368 int ret;
1369
1370 mutex_lock(&imx274->lock);
1371 ret = imx274_set_frame_interval(imx274, fi->interval);
1372
1373 if (!ret) {
1374 fi->interval = imx274->frame_interval;
1375
1376
1377
1378
1379
1380 min = IMX274_MIN_EXPOSURE_TIME;
1381 max = fi->interval.numerator * 1000000
1382 / fi->interval.denominator;
1383 def = max;
1384 ret = __v4l2_ctrl_modify_range(ctrl, min, max, 1, def);
1385 if (ret) {
1386 dev_err(&imx274->client->dev,
1387 "Exposure ctrl range update failed\n");
1388 goto unlock;
1389 }
1390
1391
1392 imx274_set_exposure(imx274, ctrl->val);
1393
1394 dev_dbg(&imx274->client->dev, "set frame interval to %uus\n",
1395 fi->interval.numerator * 1000000
1396 / fi->interval.denominator);
1397 }
1398
1399unlock:
1400 mutex_unlock(&imx274->lock);
1401
1402 return ret;
1403}
1404
1405
1406
1407
1408
1409
1410
1411static void imx274_load_default(struct stimx274 *priv)
1412{
1413
1414 priv->frame_interval.numerator = 1;
1415 priv->frame_interval.denominator = IMX274_DEF_FRAME_RATE;
1416 priv->ctrls.exposure->val = 1000000 / IMX274_DEF_FRAME_RATE;
1417 priv->ctrls.gain->val = IMX274_DEF_GAIN;
1418 priv->ctrls.vflip->val = 0;
1419 priv->ctrls.test_pattern->val = TEST_PATTERN_DISABLED;
1420}
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432static int imx274_s_stream(struct v4l2_subdev *sd, int on)
1433{
1434 struct stimx274 *imx274 = to_imx274(sd);
1435 int ret = 0;
1436
1437 dev_dbg(&imx274->client->dev, "%s : %s, mode index = %td\n", __func__,
1438 on ? "Stream Start" : "Stream Stop",
1439 imx274->mode - &imx274_modes[0]);
1440
1441 mutex_lock(&imx274->lock);
1442
1443 if (on) {
1444 ret = pm_runtime_resume_and_get(&imx274->client->dev);
1445 if (ret < 0) {
1446 mutex_unlock(&imx274->lock);
1447 return ret;
1448 }
1449
1450
1451 ret = imx274_mode_regs(imx274);
1452 if (ret)
1453 goto fail;
1454
1455 ret = imx274_apply_trimming(imx274);
1456 if (ret)
1457 goto fail;
1458
1459
1460
1461
1462
1463
1464
1465 ret = imx274_set_frame_interval(imx274,
1466 imx274->frame_interval);
1467 if (ret)
1468 goto fail;
1469
1470
1471 ret = imx274_start_stream(imx274);
1472 if (ret)
1473 goto fail;
1474 } else {
1475
1476 ret = imx274_write_table(imx274, imx274_stop);
1477 if (ret)
1478 goto fail;
1479
1480 pm_runtime_put(&imx274->client->dev);
1481 }
1482
1483 mutex_unlock(&imx274->lock);
1484 dev_dbg(&imx274->client->dev, "%s : Done\n", __func__);
1485 return 0;
1486
1487fail:
1488 pm_runtime_put(&imx274->client->dev);
1489 mutex_unlock(&imx274->lock);
1490 dev_err(&imx274->client->dev, "s_stream failed\n");
1491 return ret;
1492}
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503static int imx274_get_frame_length(struct stimx274 *priv, u32 *val)
1504{
1505 int err;
1506 u32 svr;
1507 u32 vmax;
1508
1509 err = imx274_read_mbreg(priv, IMX274_SVR_REG_LSB, &svr, 2);
1510 if (err)
1511 goto fail;
1512
1513 err = imx274_read_mbreg(priv, IMX274_VMAX_REG_3, &vmax, 3);
1514 if (err)
1515 goto fail;
1516
1517 *val = vmax * (svr + 1);
1518
1519 return 0;
1520
1521fail:
1522 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1523 return err;
1524}
1525
1526static int imx274_clamp_coarse_time(struct stimx274 *priv, u32 *val,
1527 u32 *frame_length)
1528{
1529 int err;
1530
1531 err = imx274_get_frame_length(priv, frame_length);
1532 if (err)
1533 return err;
1534
1535 if (*frame_length < priv->mode->min_frame_len)
1536 *frame_length = priv->mode->min_frame_len;
1537
1538 *val = *frame_length - *val;
1539 if (*val > *frame_length - IMX274_SHR_LIMIT_CONST)
1540 *val = *frame_length - IMX274_SHR_LIMIT_CONST;
1541 else if (*val < priv->mode->min_SHR)
1542 *val = priv->mode->min_SHR;
1543
1544 return 0;
1545}
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556static int imx274_set_digital_gain(struct stimx274 *priv, u32 dgain)
1557{
1558 u8 reg_val;
1559
1560 reg_val = ffs(dgain);
1561
1562 if (reg_val)
1563 reg_val--;
1564
1565 reg_val = clamp(reg_val, (u8)0, (u8)3);
1566
1567 return imx274_write_reg(priv, IMX274_DIGITAL_GAIN_REG,
1568 reg_val & IMX274_MASK_LSB_4_BITS);
1569}
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582static int imx274_set_gain(struct stimx274 *priv, struct v4l2_ctrl *ctrl)
1583{
1584 int err;
1585 u32 gain, analog_gain, digital_gain, gain_reg;
1586
1587 gain = (u32)(ctrl->val);
1588
1589 dev_dbg(&priv->client->dev,
1590 "%s : input gain = %d.%d\n", __func__,
1591 gain >> IMX274_GAIN_SHIFT,
1592 ((gain & IMX274_GAIN_SHIFT_MASK) * 100) >> IMX274_GAIN_SHIFT);
1593
1594 if (gain > IMX274_MAX_DIGITAL_GAIN * IMX274_MAX_ANALOG_GAIN)
1595 gain = IMX274_MAX_DIGITAL_GAIN * IMX274_MAX_ANALOG_GAIN;
1596 else if (gain < IMX274_MIN_GAIN)
1597 gain = IMX274_MIN_GAIN;
1598
1599 if (gain <= IMX274_MAX_ANALOG_GAIN)
1600 digital_gain = 1;
1601 else if (gain <= IMX274_MAX_ANALOG_GAIN * 2)
1602 digital_gain = 2;
1603 else if (gain <= IMX274_MAX_ANALOG_GAIN * 4)
1604 digital_gain = 4;
1605 else
1606 digital_gain = IMX274_MAX_DIGITAL_GAIN;
1607
1608 analog_gain = gain / digital_gain;
1609
1610 dev_dbg(&priv->client->dev,
1611 "%s : digital gain = %d, analog gain = %d.%d\n",
1612 __func__, digital_gain, analog_gain >> IMX274_GAIN_SHIFT,
1613 ((analog_gain & IMX274_GAIN_SHIFT_MASK) * 100)
1614 >> IMX274_GAIN_SHIFT);
1615
1616 err = imx274_set_digital_gain(priv, digital_gain);
1617 if (err)
1618 goto fail;
1619
1620
1621 gain_reg = (u32)IMX274_GAIN_CONST -
1622 (IMX274_GAIN_CONST << IMX274_GAIN_SHIFT) / analog_gain;
1623 if (gain_reg > IMX274_GAIN_REG_MAX)
1624 gain_reg = IMX274_GAIN_REG_MAX;
1625
1626 err = imx274_write_mbreg(priv, IMX274_ANALOG_GAIN_ADDR_LSB, gain_reg,
1627 2);
1628 if (err)
1629 goto fail;
1630
1631 if (IMX274_GAIN_CONST - gain_reg == 0) {
1632 err = -EINVAL;
1633 goto fail;
1634 }
1635
1636
1637 ctrl->val = (IMX274_GAIN_CONST << IMX274_GAIN_SHIFT)
1638 / (IMX274_GAIN_CONST - gain_reg) * digital_gain;
1639
1640 dev_dbg(&priv->client->dev,
1641 "%s : GAIN control success, gain_reg = %d, new gain = %d\n",
1642 __func__, gain_reg, ctrl->val);
1643
1644 return 0;
1645
1646fail:
1647 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1648 return err;
1649}
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660static int imx274_set_coarse_time(struct stimx274 *priv, u32 *val)
1661{
1662 int err;
1663 u32 coarse_time, frame_length;
1664
1665 coarse_time = *val;
1666
1667
1668 err = imx274_clamp_coarse_time(priv, &coarse_time, &frame_length);
1669 if (err)
1670 goto fail;
1671
1672 err = imx274_write_mbreg(priv, IMX274_SHR_REG_LSB, coarse_time, 2);
1673 if (err)
1674 goto fail;
1675
1676 *val = frame_length - coarse_time;
1677 return 0;
1678
1679fail:
1680 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1681 return err;
1682}
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694static int imx274_set_exposure(struct stimx274 *priv, int val)
1695{
1696 int err;
1697 u32 hmax;
1698 u32 coarse_time;
1699
1700 dev_dbg(&priv->client->dev,
1701 "%s : EXPOSURE control input = %d\n", __func__, val);
1702
1703
1704
1705 err = imx274_read_mbreg(priv, IMX274_HMAX_REG_LSB, &hmax, 2);
1706 if (err)
1707 goto fail;
1708
1709 if (hmax == 0) {
1710 err = -EINVAL;
1711 goto fail;
1712 }
1713
1714 coarse_time = (IMX274_PIXCLK_CONST1 / IMX274_PIXCLK_CONST2 * val
1715 - priv->mode->nocpiop) / hmax;
1716
1717
1718
1719
1720 err = imx274_set_coarse_time(priv, &coarse_time);
1721 if (err)
1722 goto fail;
1723
1724 priv->ctrls.exposure->val =
1725 (coarse_time * hmax + priv->mode->nocpiop)
1726 / (IMX274_PIXCLK_CONST1 / IMX274_PIXCLK_CONST2);
1727
1728 dev_dbg(&priv->client->dev,
1729 "%s : EXPOSURE control success\n", __func__);
1730 return 0;
1731
1732fail:
1733 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1734
1735 return err;
1736}
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750static int imx274_set_vflip(struct stimx274 *priv, int val)
1751{
1752 int err;
1753
1754 err = imx274_write_reg(priv, IMX274_VFLIP_REG, val);
1755 if (err) {
1756 dev_err(&priv->client->dev, "VFLIP control error\n");
1757 return err;
1758 }
1759
1760 dev_dbg(&priv->client->dev,
1761 "%s : VFLIP control success\n", __func__);
1762
1763 return 0;
1764}
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775static int imx274_set_test_pattern(struct stimx274 *priv, int val)
1776{
1777 int err = 0;
1778
1779 if (val == TEST_PATTERN_DISABLED) {
1780 err = imx274_write_table(priv, imx274_tp_disabled);
1781 } else if (val <= TEST_PATTERN_V_COLOR_BARS) {
1782 err = imx274_write_reg(priv, IMX274_TEST_PATTERN_REG, val - 1);
1783 if (!err)
1784 err = imx274_write_table(priv, imx274_tp_regs);
1785 } else {
1786 err = -EINVAL;
1787 }
1788
1789 if (!err)
1790 dev_dbg(&priv->client->dev,
1791 "%s : TEST PATTERN control success\n", __func__);
1792 else
1793 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1794
1795 return err;
1796}
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807static int imx274_set_frame_length(struct stimx274 *priv, u32 val)
1808{
1809 int err;
1810 u32 frame_length;
1811
1812 dev_dbg(&priv->client->dev, "%s : input length = %d\n",
1813 __func__, val);
1814
1815 frame_length = (u32)val;
1816
1817 err = imx274_write_mbreg(priv, IMX274_VMAX_REG_3, frame_length, 3);
1818 if (err)
1819 goto fail;
1820
1821 return 0;
1822
1823fail:
1824 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1825 return err;
1826}
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838static int imx274_set_frame_interval(struct stimx274 *priv,
1839 struct v4l2_fract frame_interval)
1840{
1841 int err;
1842 u32 frame_length, req_frame_rate;
1843 u32 svr;
1844 u32 hmax;
1845
1846 dev_dbg(&priv->client->dev, "%s: input frame interval = %d / %d",
1847 __func__, frame_interval.numerator,
1848 frame_interval.denominator);
1849
1850 if (frame_interval.numerator == 0 || frame_interval.denominator == 0) {
1851 frame_interval.denominator = IMX274_DEF_FRAME_RATE;
1852 frame_interval.numerator = 1;
1853 }
1854
1855 req_frame_rate = (u32)(frame_interval.denominator
1856 / frame_interval.numerator);
1857
1858
1859 if (req_frame_rate > priv->mode->max_fps) {
1860 frame_interval.numerator = 1;
1861 frame_interval.denominator = priv->mode->max_fps;
1862 } else if (req_frame_rate < IMX274_MIN_FRAME_RATE) {
1863 frame_interval.numerator = 1;
1864 frame_interval.denominator = IMX274_MIN_FRAME_RATE;
1865 }
1866
1867
1868
1869
1870
1871
1872 err = imx274_read_mbreg(priv, IMX274_SVR_REG_LSB, &svr, 2);
1873 if (err)
1874 goto fail;
1875
1876 dev_dbg(&priv->client->dev,
1877 "%s : register SVR = %d\n", __func__, svr);
1878
1879 err = imx274_read_mbreg(priv, IMX274_HMAX_REG_LSB, &hmax, 2);
1880 if (err)
1881 goto fail;
1882
1883 dev_dbg(&priv->client->dev,
1884 "%s : register HMAX = %d\n", __func__, hmax);
1885
1886 if (hmax == 0 || frame_interval.denominator == 0) {
1887 err = -EINVAL;
1888 goto fail;
1889 }
1890
1891 frame_length = IMX274_PIXCLK_CONST1 / (svr + 1) / hmax
1892 * frame_interval.numerator
1893 / frame_interval.denominator;
1894
1895 err = imx274_set_frame_length(priv, frame_length);
1896 if (err)
1897 goto fail;
1898
1899 priv->frame_interval = frame_interval;
1900 return 0;
1901
1902fail:
1903 dev_err(&priv->client->dev, "%s error = %d\n", __func__, err);
1904 return err;
1905}
1906
1907static const struct v4l2_subdev_pad_ops imx274_pad_ops = {
1908 .get_fmt = imx274_get_fmt,
1909 .set_fmt = imx274_set_fmt,
1910 .get_selection = imx274_get_selection,
1911 .set_selection = imx274_set_selection,
1912};
1913
1914static const struct v4l2_subdev_video_ops imx274_video_ops = {
1915 .g_frame_interval = imx274_g_frame_interval,
1916 .s_frame_interval = imx274_s_frame_interval,
1917 .s_stream = imx274_s_stream,
1918};
1919
1920static const struct v4l2_subdev_ops imx274_subdev_ops = {
1921 .pad = &imx274_pad_ops,
1922 .video = &imx274_video_ops,
1923};
1924
1925static const struct v4l2_ctrl_ops imx274_ctrl_ops = {
1926 .s_ctrl = imx274_s_ctrl,
1927};
1928
1929static const struct of_device_id imx274_of_id_table[] = {
1930 { .compatible = "sony,imx274" },
1931 { }
1932};
1933MODULE_DEVICE_TABLE(of, imx274_of_id_table);
1934
1935static const struct i2c_device_id imx274_id[] = {
1936 { "IMX274", 0 },
1937 { }
1938};
1939MODULE_DEVICE_TABLE(i2c, imx274_id);
1940
1941static int imx274_probe(struct i2c_client *client)
1942{
1943 struct v4l2_subdev *sd;
1944 struct stimx274 *imx274;
1945 int ret;
1946
1947
1948 imx274 = devm_kzalloc(&client->dev, sizeof(*imx274), GFP_KERNEL);
1949 if (!imx274)
1950 return -ENOMEM;
1951
1952 mutex_init(&imx274->lock);
1953
1954 imx274->inck = devm_clk_get_optional(&client->dev, "inck");
1955 if (IS_ERR(imx274->inck))
1956 return PTR_ERR(imx274->inck);
1957
1958 ret = imx274_regulators_get(&client->dev, imx274);
1959 if (ret) {
1960 dev_err(&client->dev,
1961 "Failed to get power regulators, err: %d\n", ret);
1962 return ret;
1963 }
1964
1965
1966 imx274->mode = &imx274_modes[0];
1967 imx274->crop.width = IMX274_MAX_WIDTH;
1968 imx274->crop.height = IMX274_MAX_HEIGHT;
1969 imx274->format.width = imx274->crop.width / imx274->mode->wbin_ratio;
1970 imx274->format.height = imx274->crop.height / imx274->mode->hbin_ratio;
1971 imx274->format.field = V4L2_FIELD_NONE;
1972 imx274->format.code = MEDIA_BUS_FMT_SRGGB10_1X10;
1973 imx274->format.colorspace = V4L2_COLORSPACE_SRGB;
1974 imx274->frame_interval.numerator = 1;
1975 imx274->frame_interval.denominator = IMX274_DEF_FRAME_RATE;
1976
1977
1978 imx274->regmap = devm_regmap_init_i2c(client, &imx274_regmap_config);
1979 if (IS_ERR(imx274->regmap)) {
1980 dev_err(&client->dev,
1981 "regmap init failed: %ld\n", PTR_ERR(imx274->regmap));
1982 ret = -ENODEV;
1983 goto err_regmap;
1984 }
1985
1986
1987 imx274->client = client;
1988 sd = &imx274->sd;
1989 v4l2_i2c_subdev_init(sd, client, &imx274_subdev_ops);
1990 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
1991
1992
1993 imx274->pad.flags = MEDIA_PAD_FL_SOURCE;
1994 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1995 ret = media_entity_pads_init(&sd->entity, 1, &imx274->pad);
1996 if (ret < 0) {
1997 dev_err(&client->dev,
1998 "%s : media entity init Failed %d\n", __func__, ret);
1999 goto err_regmap;
2000 }
2001
2002
2003 imx274->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
2004 GPIOD_OUT_HIGH);
2005 if (IS_ERR(imx274->reset_gpio)) {
2006 if (PTR_ERR(imx274->reset_gpio) != -EPROBE_DEFER)
2007 dev_err(&client->dev, "Reset GPIO not setup in DT");
2008 ret = PTR_ERR(imx274->reset_gpio);
2009 goto err_me;
2010 }
2011
2012
2013 ret = imx274_power_on(&client->dev);
2014 if (ret < 0) {
2015 dev_err(&client->dev,
2016 "%s : imx274 power on failed\n", __func__);
2017 goto err_me;
2018 }
2019
2020
2021 ret = v4l2_ctrl_handler_init(&imx274->ctrls.handler, 4);
2022 if (ret < 0) {
2023 dev_err(&client->dev,
2024 "%s : ctrl handler init Failed\n", __func__);
2025 goto err_power_off;
2026 }
2027
2028 imx274->ctrls.handler.lock = &imx274->lock;
2029
2030
2031 imx274->ctrls.test_pattern = v4l2_ctrl_new_std_menu_items(
2032 &imx274->ctrls.handler, &imx274_ctrl_ops,
2033 V4L2_CID_TEST_PATTERN,
2034 ARRAY_SIZE(tp_qmenu) - 1, 0, 0, tp_qmenu);
2035
2036 imx274->ctrls.gain = v4l2_ctrl_new_std(
2037 &imx274->ctrls.handler,
2038 &imx274_ctrl_ops,
2039 V4L2_CID_GAIN, IMX274_MIN_GAIN,
2040 IMX274_MAX_DIGITAL_GAIN * IMX274_MAX_ANALOG_GAIN, 1,
2041 IMX274_DEF_GAIN);
2042
2043 imx274->ctrls.exposure = v4l2_ctrl_new_std(
2044 &imx274->ctrls.handler,
2045 &imx274_ctrl_ops,
2046 V4L2_CID_EXPOSURE, IMX274_MIN_EXPOSURE_TIME,
2047 1000000 / IMX274_DEF_FRAME_RATE, 1,
2048 IMX274_MIN_EXPOSURE_TIME);
2049
2050 imx274->ctrls.vflip = v4l2_ctrl_new_std(
2051 &imx274->ctrls.handler,
2052 &imx274_ctrl_ops,
2053 V4L2_CID_VFLIP, 0, 1, 1, 0);
2054
2055 imx274->sd.ctrl_handler = &imx274->ctrls.handler;
2056 if (imx274->ctrls.handler.error) {
2057 ret = imx274->ctrls.handler.error;
2058 goto err_ctrls;
2059 }
2060
2061
2062 imx274_load_default(imx274);
2063
2064
2065 ret = v4l2_async_register_subdev(sd);
2066 if (ret < 0) {
2067 dev_err(&client->dev,
2068 "%s : v4l2_async_register_subdev failed %d\n",
2069 __func__, ret);
2070 goto err_ctrls;
2071 }
2072
2073 pm_runtime_set_active(&client->dev);
2074 pm_runtime_enable(&client->dev);
2075 pm_runtime_idle(&client->dev);
2076
2077 dev_info(&client->dev, "imx274 : imx274 probe success !\n");
2078 return 0;
2079
2080err_ctrls:
2081 v4l2_ctrl_handler_free(&imx274->ctrls.handler);
2082err_power_off:
2083 imx274_power_off(&client->dev);
2084err_me:
2085 media_entity_cleanup(&sd->entity);
2086err_regmap:
2087 mutex_destroy(&imx274->lock);
2088 return ret;
2089}
2090
2091static int imx274_remove(struct i2c_client *client)
2092{
2093 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2094 struct stimx274 *imx274 = to_imx274(sd);
2095
2096 pm_runtime_disable(&client->dev);
2097 if (!pm_runtime_status_suspended(&client->dev))
2098 imx274_power_off(&client->dev);
2099 pm_runtime_set_suspended(&client->dev);
2100
2101 v4l2_async_unregister_subdev(sd);
2102 v4l2_ctrl_handler_free(&imx274->ctrls.handler);
2103
2104 media_entity_cleanup(&sd->entity);
2105 mutex_destroy(&imx274->lock);
2106 return 0;
2107}
2108
2109static const struct dev_pm_ops imx274_pm_ops = {
2110 SET_RUNTIME_PM_OPS(imx274_power_off, imx274_power_on, NULL)
2111};
2112
2113static struct i2c_driver imx274_i2c_driver = {
2114 .driver = {
2115 .name = DRIVER_NAME,
2116 .pm = &imx274_pm_ops,
2117 .of_match_table = imx274_of_id_table,
2118 },
2119 .probe_new = imx274_probe,
2120 .remove = imx274_remove,
2121 .id_table = imx274_id,
2122};
2123
2124module_i2c_driver(imx274_i2c_driver);
2125
2126MODULE_AUTHOR("Leon Luo <leonl@leopardimaging.com>");
2127MODULE_DESCRIPTION("IMX274 CMOS Image Sensor driver");
2128MODULE_LICENSE("GPL v2");
2129