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7#include <linux/version.h>
8#include <linux/types.h>
9#include <linux/netdevice.h>
10#include <linux/etherdevice.h>
11#include <linux/ethtool.h>
12#include <linux/string.h>
13#include <linux/pci.h>
14#include <linux/capability.h>
15#include <linux/vmalloc.h>
16#include <linux/phylink.h>
17
18#include "qede.h"
19#include "qede_ptp.h"
20
21#define QEDE_RQSTAT_OFFSET(stat_name) \
22 (offsetof(struct qede_rx_queue, stat_name))
23#define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
24#define QEDE_RQSTAT(stat_name) \
25 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
26
27#define QEDE_SELFTEST_POLL_COUNT 100
28#define QEDE_DUMP_VERSION 0x1
29#define QEDE_DUMP_NVM_ARG_COUNT 2
30
31static const struct {
32 u64 offset;
33 char string[ETH_GSTRING_LEN];
34} qede_rqstats_arr[] = {
35 QEDE_RQSTAT(rcv_pkts),
36 QEDE_RQSTAT(rx_hw_errors),
37 QEDE_RQSTAT(rx_alloc_errors),
38 QEDE_RQSTAT(rx_ip_frags),
39 QEDE_RQSTAT(xdp_no_pass),
40};
41
42#define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
43#define QEDE_TQSTAT_OFFSET(stat_name) \
44 (offsetof(struct qede_tx_queue, stat_name))
45#define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
46#define QEDE_TQSTAT(stat_name) \
47 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
48#define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
49static const struct {
50 u64 offset;
51 char string[ETH_GSTRING_LEN];
52} qede_tqstats_arr[] = {
53 QEDE_TQSTAT(xmit_pkts),
54 QEDE_TQSTAT(stopped_cnt),
55 QEDE_TQSTAT(tx_mem_alloc_err),
56};
57
58#define QEDE_STAT_OFFSET(stat_name, type, base) \
59 (offsetof(type, stat_name) + (base))
60#define QEDE_STAT_STRING(stat_name) (#stat_name)
61#define _QEDE_STAT(stat_name, type, base, attr) \
62 {QEDE_STAT_OFFSET(stat_name, type, base), \
63 QEDE_STAT_STRING(stat_name), \
64 attr}
65#define QEDE_STAT(stat_name) \
66 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
67#define QEDE_PF_STAT(stat_name) \
68 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \
69 BIT(QEDE_STAT_PF_ONLY))
70#define QEDE_PF_BB_STAT(stat_name) \
71 _QEDE_STAT(stat_name, struct qede_stats_bb, \
72 offsetof(struct qede_stats, bb), \
73 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
74#define QEDE_PF_AH_STAT(stat_name) \
75 _QEDE_STAT(stat_name, struct qede_stats_ah, \
76 offsetof(struct qede_stats, ah), \
77 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
78static const struct {
79 u64 offset;
80 char string[ETH_GSTRING_LEN];
81 unsigned long attr;
82#define QEDE_STAT_PF_ONLY 0
83#define QEDE_STAT_BB_ONLY 1
84#define QEDE_STAT_AH_ONLY 2
85} qede_stats_arr[] = {
86 QEDE_STAT(rx_ucast_bytes),
87 QEDE_STAT(rx_mcast_bytes),
88 QEDE_STAT(rx_bcast_bytes),
89 QEDE_STAT(rx_ucast_pkts),
90 QEDE_STAT(rx_mcast_pkts),
91 QEDE_STAT(rx_bcast_pkts),
92
93 QEDE_STAT(tx_ucast_bytes),
94 QEDE_STAT(tx_mcast_bytes),
95 QEDE_STAT(tx_bcast_bytes),
96 QEDE_STAT(tx_ucast_pkts),
97 QEDE_STAT(tx_mcast_pkts),
98 QEDE_STAT(tx_bcast_pkts),
99
100 QEDE_PF_STAT(rx_64_byte_packets),
101 QEDE_PF_STAT(rx_65_to_127_byte_packets),
102 QEDE_PF_STAT(rx_128_to_255_byte_packets),
103 QEDE_PF_STAT(rx_256_to_511_byte_packets),
104 QEDE_PF_STAT(rx_512_to_1023_byte_packets),
105 QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
106 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
107 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
108 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
109 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
110 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
111 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
112 QEDE_PF_STAT(tx_64_byte_packets),
113 QEDE_PF_STAT(tx_65_to_127_byte_packets),
114 QEDE_PF_STAT(tx_128_to_255_byte_packets),
115 QEDE_PF_STAT(tx_256_to_511_byte_packets),
116 QEDE_PF_STAT(tx_512_to_1023_byte_packets),
117 QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
118 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
119 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
120 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
121 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
122 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
123 QEDE_PF_STAT(rx_mac_crtl_frames),
124 QEDE_PF_STAT(tx_mac_ctrl_frames),
125 QEDE_PF_STAT(rx_pause_frames),
126 QEDE_PF_STAT(tx_pause_frames),
127 QEDE_PF_STAT(rx_pfc_frames),
128 QEDE_PF_STAT(tx_pfc_frames),
129
130 QEDE_PF_STAT(rx_crc_errors),
131 QEDE_PF_STAT(rx_align_errors),
132 QEDE_PF_STAT(rx_carrier_errors),
133 QEDE_PF_STAT(rx_oversize_packets),
134 QEDE_PF_STAT(rx_jabbers),
135 QEDE_PF_STAT(rx_undersize_packets),
136 QEDE_PF_STAT(rx_fragments),
137 QEDE_PF_BB_STAT(tx_lpi_entry_count),
138 QEDE_PF_BB_STAT(tx_total_collisions),
139 QEDE_PF_STAT(brb_truncates),
140 QEDE_PF_STAT(brb_discards),
141 QEDE_STAT(no_buff_discards),
142 QEDE_PF_STAT(mftag_filter_discards),
143 QEDE_PF_STAT(mac_filter_discards),
144 QEDE_PF_STAT(gft_filter_drop),
145 QEDE_STAT(tx_err_drop_pkts),
146 QEDE_STAT(ttl0_discard),
147 QEDE_STAT(packet_too_big_discard),
148
149 QEDE_STAT(coalesced_pkts),
150 QEDE_STAT(coalesced_events),
151 QEDE_STAT(coalesced_aborts_num),
152 QEDE_STAT(non_coalesced_pkts),
153 QEDE_STAT(coalesced_bytes),
154
155 QEDE_STAT(link_change_count),
156 QEDE_STAT(ptp_skip_txts),
157};
158
159#define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
160#define QEDE_STAT_IS_PF_ONLY(i) \
161 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
162#define QEDE_STAT_IS_BB_ONLY(i) \
163 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
164#define QEDE_STAT_IS_AH_ONLY(i) \
165 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
166
167enum {
168 QEDE_PRI_FLAG_CMT,
169 QEDE_PRI_FLAG_SMART_AN_SUPPORT,
170 QEDE_PRI_FLAG_RECOVER_ON_ERROR,
171 QEDE_PRI_FLAG_LEN,
172};
173
174static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
175 "Coupled-Function",
176 "SmartAN capable",
177 "Recover on error",
178};
179
180enum qede_ethtool_tests {
181 QEDE_ETHTOOL_INT_LOOPBACK,
182 QEDE_ETHTOOL_INTERRUPT_TEST,
183 QEDE_ETHTOOL_MEMORY_TEST,
184 QEDE_ETHTOOL_REGISTER_TEST,
185 QEDE_ETHTOOL_CLOCK_TEST,
186 QEDE_ETHTOOL_NVRAM_TEST,
187 QEDE_ETHTOOL_TEST_MAX
188};
189
190static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
191 "Internal loopback (offline)",
192 "Interrupt (online)\t",
193 "Memory (online)\t\t",
194 "Register (online)\t",
195 "Clock (online)\t\t",
196 "Nvram (online)\t\t",
197};
198
199
200
201struct qede_forced_speed_map {
202 u32 speed;
203 __ETHTOOL_DECLARE_LINK_MODE_MASK(caps);
204
205 const u32 *cap_arr;
206 u32 arr_size;
207};
208
209#define QEDE_FORCED_SPEED_MAP(value) \
210{ \
211 .speed = SPEED_##value, \
212 .cap_arr = qede_forced_speed_##value, \
213 .arr_size = ARRAY_SIZE(qede_forced_speed_##value), \
214}
215
216static const u32 qede_forced_speed_1000[] __initconst = {
217 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
218 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
219 ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
220};
221
222static const u32 qede_forced_speed_10000[] __initconst = {
223 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
224 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
225 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
226 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
227 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
228 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
229 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
230 ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT,
231};
232
233static const u32 qede_forced_speed_20000[] __initconst = {
234 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
235};
236
237static const u32 qede_forced_speed_25000[] __initconst = {
238 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
239 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
240 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
241};
242
243static const u32 qede_forced_speed_40000[] __initconst = {
244 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
245 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
246 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
247 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
248};
249
250static const u32 qede_forced_speed_50000[] __initconst = {
251 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
252 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
253 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
254};
255
256static const u32 qede_forced_speed_100000[] __initconst = {
257 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
258 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
259 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
260 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
261};
262
263static struct qede_forced_speed_map qede_forced_speed_maps[] __ro_after_init = {
264 QEDE_FORCED_SPEED_MAP(1000),
265 QEDE_FORCED_SPEED_MAP(10000),
266 QEDE_FORCED_SPEED_MAP(20000),
267 QEDE_FORCED_SPEED_MAP(25000),
268 QEDE_FORCED_SPEED_MAP(40000),
269 QEDE_FORCED_SPEED_MAP(50000),
270 QEDE_FORCED_SPEED_MAP(100000),
271};
272
273void __init qede_forced_speed_maps_init(void)
274{
275 struct qede_forced_speed_map *map;
276 u32 i;
277
278 for (i = 0; i < ARRAY_SIZE(qede_forced_speed_maps); i++) {
279 map = qede_forced_speed_maps + i;
280
281 linkmode_set_bit_array(map->cap_arr, map->arr_size, map->caps);
282 map->cap_arr = NULL;
283 map->arr_size = 0;
284 }
285}
286
287
288
289static void qede_get_strings_stats_txq(struct qede_dev *edev,
290 struct qede_tx_queue *txq, u8 **buf)
291{
292 int i;
293
294 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
295 if (txq->is_xdp)
296 sprintf(*buf, "%d [XDP]: %s",
297 QEDE_TXQ_XDP_TO_IDX(edev, txq),
298 qede_tqstats_arr[i].string);
299 else
300 sprintf(*buf, "%d_%d: %s", txq->index, txq->cos,
301 qede_tqstats_arr[i].string);
302 *buf += ETH_GSTRING_LEN;
303 }
304}
305
306static void qede_get_strings_stats_rxq(struct qede_dev *edev,
307 struct qede_rx_queue *rxq, u8 **buf)
308{
309 int i;
310
311 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
312 sprintf(*buf, "%d: %s", rxq->rxq_id,
313 qede_rqstats_arr[i].string);
314 *buf += ETH_GSTRING_LEN;
315 }
316}
317
318static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
319{
320 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
321 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
322 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
323}
324
325static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
326{
327 struct qede_fastpath *fp;
328 int i;
329
330
331 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
332 fp = &edev->fp_array[i];
333
334 if (fp->type & QEDE_FASTPATH_RX)
335 qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
336
337 if (fp->type & QEDE_FASTPATH_XDP)
338 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
339
340 if (fp->type & QEDE_FASTPATH_TX) {
341 int cos;
342
343 for_each_cos_in_txq(edev, cos)
344 qede_get_strings_stats_txq(edev,
345 &fp->txq[cos], &buf);
346 }
347 }
348
349
350 for (i = 0; i < QEDE_NUM_STATS; i++) {
351 if (qede_is_irrelevant_stat(edev, i))
352 continue;
353 strcpy(buf, qede_stats_arr[i].string);
354 buf += ETH_GSTRING_LEN;
355 }
356}
357
358static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
359{
360 struct qede_dev *edev = netdev_priv(dev);
361
362 switch (stringset) {
363 case ETH_SS_STATS:
364 qede_get_strings_stats(edev, buf);
365 break;
366 case ETH_SS_PRIV_FLAGS:
367 memcpy(buf, qede_private_arr,
368 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
369 break;
370 case ETH_SS_TEST:
371 memcpy(buf, qede_tests_str_arr,
372 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
373 break;
374 default:
375 DP_VERBOSE(edev, QED_MSG_DEBUG,
376 "Unsupported stringset 0x%08x\n", stringset);
377 }
378}
379
380static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
381{
382 int i;
383
384 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
385 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
386 (*buf)++;
387 }
388}
389
390static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
391{
392 int i;
393
394 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
395 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
396 (*buf)++;
397 }
398}
399
400static void qede_get_ethtool_stats(struct net_device *dev,
401 struct ethtool_stats *stats, u64 *buf)
402{
403 struct qede_dev *edev = netdev_priv(dev);
404 struct qede_fastpath *fp;
405 int i;
406
407 qede_fill_by_demand_stats(edev);
408
409
410 __qede_lock(edev);
411
412 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
413 fp = &edev->fp_array[i];
414
415 if (fp->type & QEDE_FASTPATH_RX)
416 qede_get_ethtool_stats_rxq(fp->rxq, &buf);
417
418 if (fp->type & QEDE_FASTPATH_XDP)
419 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
420
421 if (fp->type & QEDE_FASTPATH_TX) {
422 int cos;
423
424 for_each_cos_in_txq(edev, cos)
425 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf);
426 }
427 }
428
429 for (i = 0; i < QEDE_NUM_STATS; i++) {
430 if (qede_is_irrelevant_stat(edev, i))
431 continue;
432 *buf = *((u64 *)(((void *)&edev->stats) +
433 qede_stats_arr[i].offset));
434
435 buf++;
436 }
437
438 __qede_unlock(edev);
439}
440
441static int qede_get_sset_count(struct net_device *dev, int stringset)
442{
443 struct qede_dev *edev = netdev_priv(dev);
444 int num_stats = QEDE_NUM_STATS, i;
445
446 switch (stringset) {
447 case ETH_SS_STATS:
448 for (i = 0; i < QEDE_NUM_STATS; i++)
449 if (qede_is_irrelevant_stat(edev, i))
450 num_stats--;
451
452
453 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS *
454 edev->dev_info.num_tc;
455
456
457 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
458
459
460 if (edev->xdp_prog)
461 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
462 return num_stats;
463
464 case ETH_SS_PRIV_FLAGS:
465 return QEDE_PRI_FLAG_LEN;
466 case ETH_SS_TEST:
467 if (!IS_VF(edev))
468 return QEDE_ETHTOOL_TEST_MAX;
469 else
470 return 0;
471 default:
472 DP_VERBOSE(edev, QED_MSG_DEBUG,
473 "Unsupported stringset 0x%08x\n", stringset);
474 return -EINVAL;
475 }
476}
477
478static u32 qede_get_priv_flags(struct net_device *dev)
479{
480 struct qede_dev *edev = netdev_priv(dev);
481 u32 flags = 0;
482
483 if (edev->dev_info.common.num_hwfns > 1)
484 flags |= BIT(QEDE_PRI_FLAG_CMT);
485
486 if (edev->dev_info.common.smart_an)
487 flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT);
488
489 if (edev->err_flags & BIT(QEDE_ERR_IS_RECOVERABLE))
490 flags |= BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR);
491
492 return flags;
493}
494
495static int qede_set_priv_flags(struct net_device *dev, u32 flags)
496{
497 struct qede_dev *edev = netdev_priv(dev);
498 u32 cflags = qede_get_priv_flags(dev);
499 u32 dflags = flags ^ cflags;
500
501
502 if (dflags & ~BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR))
503 return -EINVAL;
504
505 if (flags & BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR))
506 set_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags);
507 else
508 clear_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags);
509
510 return 0;
511}
512
513static int qede_get_link_ksettings(struct net_device *dev,
514 struct ethtool_link_ksettings *cmd)
515{
516 typeof(cmd->link_modes) *link_modes = &cmd->link_modes;
517 struct ethtool_link_settings *base = &cmd->base;
518 struct qede_dev *edev = netdev_priv(dev);
519 struct qed_link_output current_link;
520
521 __qede_lock(edev);
522
523 memset(¤t_link, 0, sizeof(current_link));
524 edev->ops->common->get_link(edev->cdev, ¤t_link);
525
526 linkmode_copy(link_modes->supported, current_link.supported_caps);
527 linkmode_copy(link_modes->advertising, current_link.advertised_caps);
528 linkmode_copy(link_modes->lp_advertising, current_link.lp_caps);
529
530 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
531 base->speed = current_link.speed;
532 base->duplex = current_link.duplex;
533 } else {
534 base->speed = SPEED_UNKNOWN;
535 base->duplex = DUPLEX_UNKNOWN;
536 }
537
538 __qede_unlock(edev);
539
540 base->port = current_link.port;
541 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
542 AUTONEG_DISABLE;
543
544 return 0;
545}
546
547static int qede_set_link_ksettings(struct net_device *dev,
548 const struct ethtool_link_ksettings *cmd)
549{
550 const struct ethtool_link_settings *base = &cmd->base;
551 struct qede_dev *edev = netdev_priv(dev);
552 const struct qede_forced_speed_map *map;
553 struct qed_link_output current_link;
554 struct qed_link_params params;
555 u32 i;
556
557 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
558 DP_INFO(edev, "Link settings are not allowed to be changed\n");
559 return -EOPNOTSUPP;
560 }
561 memset(¤t_link, 0, sizeof(current_link));
562 memset(¶ms, 0, sizeof(params));
563 edev->ops->common->get_link(edev->cdev, ¤t_link);
564
565 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
566 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
567
568 if (base->autoneg == AUTONEG_ENABLE) {
569 if (!phylink_test(current_link.supported_caps, Autoneg)) {
570 DP_INFO(edev, "Auto negotiation is not supported\n");
571 return -EOPNOTSUPP;
572 }
573
574 params.autoneg = true;
575 params.forced_speed = 0;
576
577 linkmode_copy(params.adv_speeds, cmd->link_modes.advertising);
578 } else {
579 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
580 params.autoneg = false;
581 params.forced_speed = base->speed;
582
583 for (i = 0; i < ARRAY_SIZE(qede_forced_speed_maps); i++) {
584 map = qede_forced_speed_maps + i;
585
586 if (base->speed != map->speed ||
587 !linkmode_intersects(current_link.supported_caps,
588 map->caps))
589 continue;
590
591 linkmode_and(params.adv_speeds,
592 current_link.supported_caps, map->caps);
593 goto set_link;
594 }
595
596 DP_INFO(edev, "Unsupported speed %u\n", base->speed);
597 return -EINVAL;
598 }
599
600set_link:
601 params.link_up = true;
602 edev->ops->common->set_link(edev->cdev, ¶ms);
603
604 return 0;
605}
606
607static void qede_get_drvinfo(struct net_device *ndev,
608 struct ethtool_drvinfo *info)
609{
610 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
611 struct qede_dev *edev = netdev_priv(ndev);
612 char mbi[ETHTOOL_FWVERS_LEN];
613
614 strlcpy(info->driver, "qede", sizeof(info->driver));
615
616 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
617 edev->dev_info.common.fw_major,
618 edev->dev_info.common.fw_minor,
619 edev->dev_info.common.fw_rev,
620 edev->dev_info.common.fw_eng);
621
622 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
623 (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
624 (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
625 (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
626 edev->dev_info.common.mfw_rev & 0xFF);
627
628 if ((strlen(storm) + strlen(DRV_MODULE_VERSION) + strlen("[storm] ")) <
629 sizeof(info->version))
630 snprintf(info->version, sizeof(info->version),
631 "%s [storm %s]", DRV_MODULE_VERSION, storm);
632 else
633 snprintf(info->version, sizeof(info->version),
634 "%s %s", DRV_MODULE_VERSION, storm);
635
636 if (edev->dev_info.common.mbi_version) {
637 snprintf(mbi, ETHTOOL_FWVERS_LEN, "%d.%d.%d",
638 (edev->dev_info.common.mbi_version &
639 QED_MBI_VERSION_2_MASK) >> QED_MBI_VERSION_2_OFFSET,
640 (edev->dev_info.common.mbi_version &
641 QED_MBI_VERSION_1_MASK) >> QED_MBI_VERSION_1_OFFSET,
642 (edev->dev_info.common.mbi_version &
643 QED_MBI_VERSION_0_MASK) >> QED_MBI_VERSION_0_OFFSET);
644 snprintf(info->fw_version, sizeof(info->fw_version),
645 "mbi %s [mfw %s]", mbi, mfw);
646 } else {
647 snprintf(info->fw_version, sizeof(info->fw_version),
648 "mfw %s", mfw);
649 }
650
651 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
652}
653
654static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
655{
656 struct qede_dev *edev = netdev_priv(ndev);
657
658 if (edev->dev_info.common.wol_support) {
659 wol->supported = WAKE_MAGIC;
660 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
661 }
662}
663
664static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
665{
666 struct qede_dev *edev = netdev_priv(ndev);
667 bool wol_requested;
668 int rc;
669
670 if (wol->wolopts & ~WAKE_MAGIC) {
671 DP_INFO(edev,
672 "Can't support WoL options other than magic-packet\n");
673 return -EINVAL;
674 }
675
676 wol_requested = !!(wol->wolopts & WAKE_MAGIC);
677 if (wol_requested == edev->wol_enabled)
678 return 0;
679
680
681 if (!edev->dev_info.common.wol_support) {
682 DP_INFO(edev, "Device doesn't support WoL\n");
683 return -EINVAL;
684 }
685
686 rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
687 if (!rc)
688 edev->wol_enabled = wol_requested;
689
690 return rc;
691}
692
693static u32 qede_get_msglevel(struct net_device *ndev)
694{
695 struct qede_dev *edev = netdev_priv(ndev);
696
697 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
698}
699
700static void qede_set_msglevel(struct net_device *ndev, u32 level)
701{
702 struct qede_dev *edev = netdev_priv(ndev);
703 u32 dp_module = 0;
704 u8 dp_level = 0;
705
706 qede_config_debug(level, &dp_module, &dp_level);
707
708 edev->dp_level = dp_level;
709 edev->dp_module = dp_module;
710 edev->ops->common->update_msglvl(edev->cdev,
711 dp_module, dp_level);
712}
713
714static int qede_nway_reset(struct net_device *dev)
715{
716 struct qede_dev *edev = netdev_priv(dev);
717 struct qed_link_output current_link;
718 struct qed_link_params link_params;
719
720 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
721 DP_INFO(edev, "Link settings are not allowed to be changed\n");
722 return -EOPNOTSUPP;
723 }
724
725 if (!netif_running(dev))
726 return 0;
727
728 memset(¤t_link, 0, sizeof(current_link));
729 edev->ops->common->get_link(edev->cdev, ¤t_link);
730 if (!current_link.link_up)
731 return 0;
732
733
734 memset(&link_params, 0, sizeof(link_params));
735 link_params.link_up = false;
736 edev->ops->common->set_link(edev->cdev, &link_params);
737 link_params.link_up = true;
738 edev->ops->common->set_link(edev->cdev, &link_params);
739
740 return 0;
741}
742
743static u32 qede_get_link(struct net_device *dev)
744{
745 struct qede_dev *edev = netdev_priv(dev);
746 struct qed_link_output current_link;
747
748 memset(¤t_link, 0, sizeof(current_link));
749 edev->ops->common->get_link(edev->cdev, ¤t_link);
750
751 return current_link.link_up;
752}
753
754static int qede_flash_device(struct net_device *dev,
755 struct ethtool_flash *flash)
756{
757 struct qede_dev *edev = netdev_priv(dev);
758
759 return edev->ops->common->nvm_flash(edev->cdev, flash->data);
760}
761
762static int qede_get_coalesce(struct net_device *dev,
763 struct ethtool_coalesce *coal)
764{
765 void *rx_handle = NULL, *tx_handle = NULL;
766 struct qede_dev *edev = netdev_priv(dev);
767 u16 rx_coal, tx_coal, i, rc = 0;
768 struct qede_fastpath *fp;
769
770 rx_coal = QED_DEFAULT_RX_USECS;
771 tx_coal = QED_DEFAULT_TX_USECS;
772
773 memset(coal, 0, sizeof(struct ethtool_coalesce));
774
775 __qede_lock(edev);
776 if (edev->state == QEDE_STATE_OPEN) {
777 for_each_queue(i) {
778 fp = &edev->fp_array[i];
779
780 if (fp->type & QEDE_FASTPATH_RX) {
781 rx_handle = fp->rxq->handle;
782 break;
783 }
784 }
785
786 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle);
787 if (rc) {
788 DP_INFO(edev, "Read Rx coalesce error\n");
789 goto out;
790 }
791
792 for_each_queue(i) {
793 struct qede_tx_queue *txq;
794
795 fp = &edev->fp_array[i];
796
797
798
799
800
801 if (fp->type & QEDE_FASTPATH_TX) {
802 txq = QEDE_FP_TC0_TXQ(fp);
803 tx_handle = txq->handle;
804 break;
805 }
806 }
807
808 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle);
809 if (rc)
810 DP_INFO(edev, "Read Tx coalesce error\n");
811 }
812
813out:
814 __qede_unlock(edev);
815
816 coal->rx_coalesce_usecs = rx_coal;
817 coal->tx_coalesce_usecs = tx_coal;
818
819 return rc;
820}
821
822int qede_set_coalesce(struct net_device *dev, struct ethtool_coalesce *coal)
823{
824 struct qede_dev *edev = netdev_priv(dev);
825 struct qede_fastpath *fp;
826 int i, rc = 0;
827 u16 rxc, txc;
828
829 if (!netif_running(dev)) {
830 DP_INFO(edev, "Interface is down\n");
831 return -EINVAL;
832 }
833
834 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
835 coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
836 DP_INFO(edev,
837 "Can't support requested %s coalesce value [max supported value %d]\n",
838 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" :
839 "tx", QED_COALESCE_MAX);
840 return -EINVAL;
841 }
842
843 rxc = (u16)coal->rx_coalesce_usecs;
844 txc = (u16)coal->tx_coalesce_usecs;
845 for_each_queue(i) {
846 fp = &edev->fp_array[i];
847
848 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
849 rc = edev->ops->common->set_coalesce(edev->cdev,
850 rxc, 0,
851 fp->rxq->handle);
852 if (rc) {
853 DP_INFO(edev,
854 "Set RX coalesce error, rc = %d\n", rc);
855 return rc;
856 }
857 edev->coal_entry[i].rxc = rxc;
858 edev->coal_entry[i].isvalid = true;
859 }
860
861 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
862 struct qede_tx_queue *txq;
863
864
865
866
867
868 txq = QEDE_FP_TC0_TXQ(fp);
869
870 rc = edev->ops->common->set_coalesce(edev->cdev,
871 0, txc,
872 txq->handle);
873 if (rc) {
874 DP_INFO(edev,
875 "Set TX coalesce error, rc = %d\n", rc);
876 return rc;
877 }
878 edev->coal_entry[i].txc = txc;
879 edev->coal_entry[i].isvalid = true;
880 }
881 }
882
883 return rc;
884}
885
886static void qede_get_ringparam(struct net_device *dev,
887 struct ethtool_ringparam *ering)
888{
889 struct qede_dev *edev = netdev_priv(dev);
890
891 ering->rx_max_pending = NUM_RX_BDS_MAX;
892 ering->rx_pending = edev->q_num_rx_buffers;
893 ering->tx_max_pending = NUM_TX_BDS_MAX;
894 ering->tx_pending = edev->q_num_tx_buffers;
895}
896
897static int qede_set_ringparam(struct net_device *dev,
898 struct ethtool_ringparam *ering)
899{
900 struct qede_dev *edev = netdev_priv(dev);
901
902 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
903 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
904 ering->rx_pending, ering->tx_pending);
905
906
907 if (ering->rx_pending > NUM_RX_BDS_MAX ||
908 ering->rx_pending < NUM_RX_BDS_MIN ||
909 ering->tx_pending > NUM_TX_BDS_MAX ||
910 ering->tx_pending < NUM_TX_BDS_MIN) {
911 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
912 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
913 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
914 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
915 return -EINVAL;
916 }
917
918
919 edev->q_num_rx_buffers = ering->rx_pending;
920 edev->q_num_tx_buffers = ering->tx_pending;
921
922 qede_reload(edev, NULL, false);
923
924 return 0;
925}
926
927static void qede_get_pauseparam(struct net_device *dev,
928 struct ethtool_pauseparam *epause)
929{
930 struct qede_dev *edev = netdev_priv(dev);
931 struct qed_link_output current_link;
932
933 memset(¤t_link, 0, sizeof(current_link));
934 edev->ops->common->get_link(edev->cdev, ¤t_link);
935
936 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
937 epause->autoneg = true;
938 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
939 epause->rx_pause = true;
940 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
941 epause->tx_pause = true;
942
943 DP_VERBOSE(edev, QED_MSG_DEBUG,
944 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
945 epause->cmd, epause->autoneg, epause->rx_pause,
946 epause->tx_pause);
947}
948
949static int qede_set_pauseparam(struct net_device *dev,
950 struct ethtool_pauseparam *epause)
951{
952 struct qede_dev *edev = netdev_priv(dev);
953 struct qed_link_params params;
954 struct qed_link_output current_link;
955
956 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
957 DP_INFO(edev,
958 "Pause settings are not allowed to be changed\n");
959 return -EOPNOTSUPP;
960 }
961
962 memset(¤t_link, 0, sizeof(current_link));
963 edev->ops->common->get_link(edev->cdev, ¤t_link);
964
965 memset(¶ms, 0, sizeof(params));
966 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
967
968 if (epause->autoneg) {
969 if (!phylink_test(current_link.supported_caps, Autoneg)) {
970 DP_INFO(edev, "autoneg not supported\n");
971 return -EINVAL;
972 }
973
974 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
975 }
976
977 if (epause->rx_pause)
978 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
979 if (epause->tx_pause)
980 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
981
982 params.link_up = true;
983 edev->ops->common->set_link(edev->cdev, ¶ms);
984
985 return 0;
986}
987
988static void qede_get_regs(struct net_device *ndev,
989 struct ethtool_regs *regs, void *buffer)
990{
991 struct qede_dev *edev = netdev_priv(ndev);
992
993 regs->version = 0;
994 memset(buffer, 0, regs->len);
995
996 if (edev->ops && edev->ops->common)
997 edev->ops->common->dbg_all_data(edev->cdev, buffer);
998}
999
1000static int qede_get_regs_len(struct net_device *ndev)
1001{
1002 struct qede_dev *edev = netdev_priv(ndev);
1003
1004 if (edev->ops && edev->ops->common)
1005 return edev->ops->common->dbg_all_data_size(edev->cdev);
1006 else
1007 return -EINVAL;
1008}
1009
1010static void qede_update_mtu(struct qede_dev *edev,
1011 struct qede_reload_args *args)
1012{
1013 edev->ndev->mtu = args->u.mtu;
1014}
1015
1016
1017int qede_change_mtu(struct net_device *ndev, int new_mtu)
1018{
1019 struct qede_dev *edev = netdev_priv(ndev);
1020 struct qede_reload_args args;
1021
1022 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1023 "Configuring MTU size of %d\n", new_mtu);
1024
1025 if (new_mtu > PAGE_SIZE)
1026 ndev->features &= ~NETIF_F_GRO_HW;
1027
1028
1029 args.u.mtu = new_mtu;
1030 args.func = &qede_update_mtu;
1031 qede_reload(edev, &args, false);
1032#if IS_ENABLED(CONFIG_QED_RDMA)
1033 qede_rdma_event_change_mtu(edev);
1034#endif
1035 edev->ops->common->update_mtu(edev->cdev, new_mtu);
1036
1037 return 0;
1038}
1039
1040static void qede_get_channels(struct net_device *dev,
1041 struct ethtool_channels *channels)
1042{
1043 struct qede_dev *edev = netdev_priv(dev);
1044
1045 channels->max_combined = QEDE_MAX_RSS_CNT(edev);
1046 channels->max_rx = QEDE_MAX_RSS_CNT(edev);
1047 channels->max_tx = QEDE_MAX_RSS_CNT(edev);
1048 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
1049 edev->fp_num_rx;
1050 channels->tx_count = edev->fp_num_tx;
1051 channels->rx_count = edev->fp_num_rx;
1052}
1053
1054static int qede_set_channels(struct net_device *dev,
1055 struct ethtool_channels *channels)
1056{
1057 struct qede_dev *edev = netdev_priv(dev);
1058 u32 count;
1059
1060 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1061 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
1062 channels->rx_count, channels->tx_count,
1063 channels->other_count, channels->combined_count);
1064
1065 count = channels->rx_count + channels->tx_count +
1066 channels->combined_count;
1067
1068
1069 if (channels->other_count) {
1070 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1071 "command parameters not supported\n");
1072 return -EINVAL;
1073 }
1074
1075 if (!(channels->combined_count || (channels->rx_count &&
1076 channels->tx_count))) {
1077 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1078 "need to request at least one transmit and one receive channel\n");
1079 return -EINVAL;
1080 }
1081
1082 if (count > QEDE_MAX_RSS_CNT(edev)) {
1083 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1084 "requested channels = %d max supported channels = %d\n",
1085 count, QEDE_MAX_RSS_CNT(edev));
1086 return -EINVAL;
1087 }
1088
1089
1090 if ((count == QEDE_QUEUE_CNT(edev)) &&
1091 (channels->tx_count == edev->fp_num_tx) &&
1092 (channels->rx_count == edev->fp_num_rx)) {
1093 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1094 "No change in active parameters\n");
1095 return 0;
1096 }
1097
1098
1099 if ((count % edev->dev_info.common.num_hwfns) ||
1100 (channels->tx_count % edev->dev_info.common.num_hwfns) ||
1101 (channels->rx_count % edev->dev_info.common.num_hwfns)) {
1102 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1103 "Number of channels must be divisible by %04x\n",
1104 edev->dev_info.common.num_hwfns);
1105 return -EINVAL;
1106 }
1107
1108
1109 edev->req_queues = count;
1110 edev->req_num_tx = channels->tx_count;
1111 edev->req_num_rx = channels->rx_count;
1112
1113 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
1114 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
1115 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
1116 }
1117
1118 qede_reload(edev, NULL, false);
1119
1120 return 0;
1121}
1122
1123static int qede_get_ts_info(struct net_device *dev,
1124 struct ethtool_ts_info *info)
1125{
1126 struct qede_dev *edev = netdev_priv(dev);
1127
1128 return qede_ptp_get_ts_info(edev, info);
1129}
1130
1131static int qede_set_phys_id(struct net_device *dev,
1132 enum ethtool_phys_id_state state)
1133{
1134 struct qede_dev *edev = netdev_priv(dev);
1135 u8 led_state = 0;
1136
1137 switch (state) {
1138 case ETHTOOL_ID_ACTIVE:
1139 return 1;
1140
1141 case ETHTOOL_ID_ON:
1142 led_state = QED_LED_MODE_ON;
1143 break;
1144
1145 case ETHTOOL_ID_OFF:
1146 led_state = QED_LED_MODE_OFF;
1147 break;
1148
1149 case ETHTOOL_ID_INACTIVE:
1150 led_state = QED_LED_MODE_RESTORE;
1151 break;
1152 }
1153
1154 edev->ops->common->set_led(edev->cdev, led_state);
1155
1156 return 0;
1157}
1158
1159static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1160{
1161 info->data = RXH_IP_SRC | RXH_IP_DST;
1162
1163 switch (info->flow_type) {
1164 case TCP_V4_FLOW:
1165 case TCP_V6_FLOW:
1166 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1167 break;
1168 case UDP_V4_FLOW:
1169 if (edev->rss_caps & QED_RSS_IPV4_UDP)
1170 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1171 break;
1172 case UDP_V6_FLOW:
1173 if (edev->rss_caps & QED_RSS_IPV6_UDP)
1174 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1175 break;
1176 case IPV4_FLOW:
1177 case IPV6_FLOW:
1178 break;
1179 default:
1180 info->data = 0;
1181 break;
1182 }
1183
1184 return 0;
1185}
1186
1187static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1188 u32 *rule_locs)
1189{
1190 struct qede_dev *edev = netdev_priv(dev);
1191 int rc = 0;
1192
1193 switch (info->cmd) {
1194 case ETHTOOL_GRXRINGS:
1195 info->data = QEDE_RSS_COUNT(edev);
1196 break;
1197 case ETHTOOL_GRXFH:
1198 rc = qede_get_rss_flags(edev, info);
1199 break;
1200 case ETHTOOL_GRXCLSRLCNT:
1201 info->rule_cnt = qede_get_arfs_filter_count(edev);
1202 info->data = QEDE_RFS_MAX_FLTR;
1203 break;
1204 case ETHTOOL_GRXCLSRULE:
1205 rc = qede_get_cls_rule_entry(edev, info);
1206 break;
1207 case ETHTOOL_GRXCLSRLALL:
1208 rc = qede_get_cls_rule_all(edev, info, rule_locs);
1209 break;
1210 default:
1211 DP_ERR(edev, "Command parameters not supported\n");
1212 rc = -EOPNOTSUPP;
1213 }
1214
1215 return rc;
1216}
1217
1218static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1219{
1220 struct qed_update_vport_params *vport_update_params;
1221 u8 set_caps = 0, clr_caps = 0;
1222 int rc = 0;
1223
1224 DP_VERBOSE(edev, QED_MSG_DEBUG,
1225 "Set rss flags command parameters: flow type = %d, data = %llu\n",
1226 info->flow_type, info->data);
1227
1228 switch (info->flow_type) {
1229 case TCP_V4_FLOW:
1230 case TCP_V6_FLOW:
1231
1232 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
1233 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1234 DP_INFO(edev, "Command parameters not supported\n");
1235 return -EINVAL;
1236 }
1237 return 0;
1238 case UDP_V4_FLOW:
1239
1240 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1241 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1242 set_caps = QED_RSS_IPV4_UDP;
1243 DP_VERBOSE(edev, QED_MSG_DEBUG,
1244 "UDP 4-tuple enabled\n");
1245 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1246 clr_caps = QED_RSS_IPV4_UDP;
1247 DP_VERBOSE(edev, QED_MSG_DEBUG,
1248 "UDP 4-tuple disabled\n");
1249 } else {
1250 return -EINVAL;
1251 }
1252 break;
1253 case UDP_V6_FLOW:
1254
1255 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1256 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1257 set_caps = QED_RSS_IPV6_UDP;
1258 DP_VERBOSE(edev, QED_MSG_DEBUG,
1259 "UDP 4-tuple enabled\n");
1260 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1261 clr_caps = QED_RSS_IPV6_UDP;
1262 DP_VERBOSE(edev, QED_MSG_DEBUG,
1263 "UDP 4-tuple disabled\n");
1264 } else {
1265 return -EINVAL;
1266 }
1267 break;
1268 case IPV4_FLOW:
1269 case IPV6_FLOW:
1270
1271 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
1272 DP_INFO(edev, "Command parameters not supported\n");
1273 return -EINVAL;
1274 }
1275 return 0;
1276 case SCTP_V4_FLOW:
1277 case AH_ESP_V4_FLOW:
1278 case AH_V4_FLOW:
1279 case ESP_V4_FLOW:
1280 case SCTP_V6_FLOW:
1281 case AH_ESP_V6_FLOW:
1282 case AH_V6_FLOW:
1283 case ESP_V6_FLOW:
1284 case IP_USER_FLOW:
1285 case ETHER_FLOW:
1286
1287 if (info->data) {
1288 DP_INFO(edev, "Command parameters not supported\n");
1289 return -EINVAL;
1290 }
1291 return 0;
1292 default:
1293 return -EINVAL;
1294 }
1295
1296
1297 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
1298 return 0;
1299
1300
1301 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
1302 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
1303
1304
1305 __qede_lock(edev);
1306 if (edev->state == QEDE_STATE_OPEN) {
1307 vport_update_params = vzalloc(sizeof(*vport_update_params));
1308 if (!vport_update_params) {
1309 __qede_unlock(edev);
1310 return -ENOMEM;
1311 }
1312 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1313 &vport_update_params->update_rss_flg);
1314 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1315 vfree(vport_update_params);
1316 }
1317 __qede_unlock(edev);
1318
1319 return rc;
1320}
1321
1322static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
1323{
1324 struct qede_dev *edev = netdev_priv(dev);
1325 int rc;
1326
1327 switch (info->cmd) {
1328 case ETHTOOL_SRXFH:
1329 rc = qede_set_rss_flags(edev, info);
1330 break;
1331 case ETHTOOL_SRXCLSRLINS:
1332 rc = qede_add_cls_rule(edev, info);
1333 break;
1334 case ETHTOOL_SRXCLSRLDEL:
1335 rc = qede_delete_flow_filter(edev, info->fs.location);
1336 break;
1337 default:
1338 DP_INFO(edev, "Command parameters not supported\n");
1339 rc = -EOPNOTSUPP;
1340 }
1341
1342 return rc;
1343}
1344
1345static u32 qede_get_rxfh_indir_size(struct net_device *dev)
1346{
1347 return QED_RSS_IND_TABLE_SIZE;
1348}
1349
1350static u32 qede_get_rxfh_key_size(struct net_device *dev)
1351{
1352 struct qede_dev *edev = netdev_priv(dev);
1353
1354 return sizeof(edev->rss_key);
1355}
1356
1357static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
1358{
1359 struct qede_dev *edev = netdev_priv(dev);
1360 int i;
1361
1362 if (hfunc)
1363 *hfunc = ETH_RSS_HASH_TOP;
1364
1365 if (!indir)
1366 return 0;
1367
1368 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1369 indir[i] = edev->rss_ind_table[i];
1370
1371 if (key)
1372 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev));
1373
1374 return 0;
1375}
1376
1377static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
1378 const u8 *key, const u8 hfunc)
1379{
1380 struct qed_update_vport_params *vport_update_params;
1381 struct qede_dev *edev = netdev_priv(dev);
1382 int i, rc = 0;
1383
1384 if (edev->dev_info.common.num_hwfns > 1) {
1385 DP_INFO(edev,
1386 "RSS configuration is not supported for 100G devices\n");
1387 return -EOPNOTSUPP;
1388 }
1389
1390 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
1391 return -EOPNOTSUPP;
1392
1393 if (!indir && !key)
1394 return 0;
1395
1396 if (indir) {
1397 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1398 edev->rss_ind_table[i] = indir[i];
1399 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
1400 }
1401
1402 if (key) {
1403 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev));
1404 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
1405 }
1406
1407 __qede_lock(edev);
1408 if (edev->state == QEDE_STATE_OPEN) {
1409 vport_update_params = vzalloc(sizeof(*vport_update_params));
1410 if (!vport_update_params) {
1411 __qede_unlock(edev);
1412 return -ENOMEM;
1413 }
1414 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1415 &vport_update_params->update_rss_flg);
1416 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1417 vfree(vport_update_params);
1418 }
1419 __qede_unlock(edev);
1420
1421 return rc;
1422}
1423
1424
1425static void qede_netif_start(struct qede_dev *edev)
1426{
1427 int i;
1428
1429 if (!netif_running(edev->ndev))
1430 return;
1431
1432 for_each_queue(i) {
1433
1434 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
1435 napi_enable(&edev->fp_array[i].napi);
1436 }
1437}
1438
1439
1440static void qede_netif_stop(struct qede_dev *edev)
1441{
1442 int i;
1443
1444 for_each_queue(i) {
1445 napi_disable(&edev->fp_array[i].napi);
1446
1447 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
1448 }
1449}
1450
1451static int qede_selftest_transmit_traffic(struct qede_dev *edev,
1452 struct sk_buff *skb)
1453{
1454 struct qede_tx_queue *txq = NULL;
1455 struct eth_tx_1st_bd *first_bd;
1456 dma_addr_t mapping;
1457 int i, idx;
1458 u16 val;
1459
1460 for_each_queue(i) {
1461 struct qede_fastpath *fp = &edev->fp_array[i];
1462
1463 if (fp->type & QEDE_FASTPATH_TX) {
1464 txq = QEDE_FP_TC0_TXQ(fp);
1465 break;
1466 }
1467 }
1468
1469 if (!txq) {
1470 DP_NOTICE(edev, "Tx path is not available\n");
1471 return -1;
1472 }
1473
1474
1475 idx = txq->sw_tx_prod;
1476 txq->sw_tx_ring.skbs[idx].skb = skb;
1477 first_bd = qed_chain_produce(&txq->tx_pbl);
1478 memset(first_bd, 0, sizeof(*first_bd));
1479 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1480 first_bd->data.bd_flags.bitfields = val;
1481 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
1482 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
1483 first_bd->data.bitfields |= cpu_to_le16(val);
1484
1485
1486 mapping = dma_map_single(&edev->pdev->dev, skb->data,
1487 skb_headlen(skb), DMA_TO_DEVICE);
1488 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
1489 DP_NOTICE(edev, "SKB mapping failed\n");
1490 return -ENOMEM;
1491 }
1492 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1493
1494
1495 first_bd->data.nbds = 1;
1496 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
1497
1498 val = qed_chain_get_prod_idx(&txq->tx_pbl);
1499 txq->tx_db.data.bd_prod = cpu_to_le16(val);
1500
1501
1502
1503
1504 wmb();
1505 barrier();
1506 writel(txq->tx_db.raw, txq->doorbell_addr);
1507
1508 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
1509 if (qede_txq_has_work(txq))
1510 break;
1511 usleep_range(100, 200);
1512 }
1513
1514 if (!qede_txq_has_work(txq)) {
1515 DP_NOTICE(edev, "Tx completion didn't happen\n");
1516 return -1;
1517 }
1518
1519 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
1520 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
1521 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
1522 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
1523 txq->sw_tx_ring.skbs[idx].skb = NULL;
1524
1525 return 0;
1526}
1527
1528static int qede_selftest_receive_traffic(struct qede_dev *edev)
1529{
1530 u16 sw_rx_index, len;
1531 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1532 struct qede_rx_queue *rxq = NULL;
1533 struct sw_rx_data *sw_rx_data;
1534 union eth_rx_cqe *cqe;
1535 int i, iter, rc = 0;
1536 u8 *data_ptr;
1537
1538 for_each_queue(i) {
1539 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
1540 rxq = edev->fp_array[i].rxq;
1541 break;
1542 }
1543 }
1544
1545 if (!rxq) {
1546 DP_NOTICE(edev, "Rx path is not available\n");
1547 return -1;
1548 }
1549
1550
1551
1552
1553
1554 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
1555 if (!qede_has_rx_work(rxq)) {
1556 usleep_range(100, 200);
1557 continue;
1558 }
1559
1560
1561 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1562
1563
1564 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1565 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1566 fp_cqe = &cqe->fast_path_regular;
1567 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1568 data_ptr = (u8 *)(page_address(sw_rx_data->data) +
1569 fp_cqe->placement_offset +
1570 sw_rx_data->page_offset +
1571 rxq->rx_headroom);
1572 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) &&
1573 ether_addr_equal(data_ptr + ETH_ALEN,
1574 edev->ndev->dev_addr)) {
1575 for (i = ETH_HLEN; i < len; i++)
1576 if (data_ptr[i] != (unsigned char)(i & 0xff)) {
1577 rc = -1;
1578 break;
1579 }
1580
1581 qede_recycle_rx_bd_ring(rxq, 1);
1582 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1583 break;
1584 }
1585
1586 DP_INFO(edev, "Not the transmitted packet\n");
1587 qede_recycle_rx_bd_ring(rxq, 1);
1588 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1589 }
1590
1591 if (iter == QEDE_SELFTEST_POLL_COUNT) {
1592 DP_NOTICE(edev, "Failed to receive the traffic\n");
1593 return -1;
1594 }
1595
1596 qede_update_rx_prod(edev, rxq);
1597
1598 return rc;
1599}
1600
1601static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
1602{
1603 struct qed_link_params link_params;
1604 struct sk_buff *skb = NULL;
1605 int rc = 0, i;
1606 u32 pkt_size;
1607 u8 *packet;
1608
1609 if (!netif_running(edev->ndev)) {
1610 DP_NOTICE(edev, "Interface is down\n");
1611 return -EINVAL;
1612 }
1613
1614 qede_netif_stop(edev);
1615
1616
1617 memset(&link_params, 0, sizeof(link_params));
1618 link_params.link_up = true;
1619 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1620 link_params.loopback_mode = loopback_mode;
1621 edev->ops->common->set_link(edev->cdev, &link_params);
1622
1623
1624 msleep_interruptible(500);
1625
1626
1627
1628
1629 pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ?
1630 edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN);
1631
1632 skb = netdev_alloc_skb(edev->ndev, pkt_size);
1633 if (!skb) {
1634 DP_INFO(edev, "Can't allocate skb\n");
1635 rc = -ENOMEM;
1636 goto test_loopback_exit;
1637 }
1638 packet = skb_put(skb, pkt_size);
1639 ether_addr_copy(packet, edev->ndev->dev_addr);
1640 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
1641 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
1642 for (i = ETH_HLEN; i < pkt_size; i++)
1643 packet[i] = (unsigned char)(i & 0xff);
1644
1645 rc = qede_selftest_transmit_traffic(edev, skb);
1646 if (rc)
1647 goto test_loopback_exit;
1648
1649 rc = qede_selftest_receive_traffic(edev);
1650 if (rc)
1651 goto test_loopback_exit;
1652
1653 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
1654
1655test_loopback_exit:
1656 dev_kfree_skb(skb);
1657
1658
1659 memset(&link_params, 0, sizeof(link_params));
1660 link_params.link_up = true;
1661 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1662 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
1663 edev->ops->common->set_link(edev->cdev, &link_params);
1664
1665
1666 msleep_interruptible(500);
1667
1668 qede_netif_start(edev);
1669
1670 return rc;
1671}
1672
1673static void qede_self_test(struct net_device *dev,
1674 struct ethtool_test *etest, u64 *buf)
1675{
1676 struct qede_dev *edev = netdev_priv(dev);
1677
1678 DP_VERBOSE(edev, QED_MSG_DEBUG,
1679 "Self-test command parameters: offline = %d, external_lb = %d\n",
1680 (etest->flags & ETH_TEST_FL_OFFLINE),
1681 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
1682
1683 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
1684
1685 if (etest->flags & ETH_TEST_FL_OFFLINE) {
1686 if (qede_selftest_run_loopback(edev,
1687 QED_LINK_LOOPBACK_INT_PHY)) {
1688 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
1689 etest->flags |= ETH_TEST_FL_FAILED;
1690 }
1691 }
1692
1693 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
1694 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
1695 etest->flags |= ETH_TEST_FL_FAILED;
1696 }
1697
1698 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
1699 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
1700 etest->flags |= ETH_TEST_FL_FAILED;
1701 }
1702
1703 if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
1704 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
1705 etest->flags |= ETH_TEST_FL_FAILED;
1706 }
1707
1708 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
1709 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
1710 etest->flags |= ETH_TEST_FL_FAILED;
1711 }
1712
1713 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
1714 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
1715 etest->flags |= ETH_TEST_FL_FAILED;
1716 }
1717}
1718
1719static int qede_set_tunable(struct net_device *dev,
1720 const struct ethtool_tunable *tuna,
1721 const void *data)
1722{
1723 struct qede_dev *edev = netdev_priv(dev);
1724 u32 val;
1725
1726 switch (tuna->id) {
1727 case ETHTOOL_RX_COPYBREAK:
1728 val = *(u32 *)data;
1729 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
1730 DP_VERBOSE(edev, QED_MSG_DEBUG,
1731 "Invalid rx copy break value, range is [%u, %u]",
1732 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
1733 return -EINVAL;
1734 }
1735
1736 edev->rx_copybreak = *(u32 *)data;
1737 break;
1738 default:
1739 return -EOPNOTSUPP;
1740 }
1741
1742 return 0;
1743}
1744
1745static int qede_get_tunable(struct net_device *dev,
1746 const struct ethtool_tunable *tuna, void *data)
1747{
1748 struct qede_dev *edev = netdev_priv(dev);
1749
1750 switch (tuna->id) {
1751 case ETHTOOL_RX_COPYBREAK:
1752 *(u32 *)data = edev->rx_copybreak;
1753 break;
1754 default:
1755 return -EOPNOTSUPP;
1756 }
1757
1758 return 0;
1759}
1760
1761static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata)
1762{
1763 struct qede_dev *edev = netdev_priv(dev);
1764 struct qed_link_output current_link;
1765
1766 memset(¤t_link, 0, sizeof(current_link));
1767 edev->ops->common->get_link(edev->cdev, ¤t_link);
1768
1769 if (!current_link.eee_supported) {
1770 DP_INFO(edev, "EEE is not supported\n");
1771 return -EOPNOTSUPP;
1772 }
1773
1774 if (current_link.eee.adv_caps & QED_EEE_1G_ADV)
1775 edata->advertised = ADVERTISED_1000baseT_Full;
1776 if (current_link.eee.adv_caps & QED_EEE_10G_ADV)
1777 edata->advertised |= ADVERTISED_10000baseT_Full;
1778 if (current_link.sup_caps & QED_EEE_1G_ADV)
1779 edata->supported = ADVERTISED_1000baseT_Full;
1780 if (current_link.sup_caps & QED_EEE_10G_ADV)
1781 edata->supported |= ADVERTISED_10000baseT_Full;
1782 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV)
1783 edata->lp_advertised = ADVERTISED_1000baseT_Full;
1784 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV)
1785 edata->lp_advertised |= ADVERTISED_10000baseT_Full;
1786
1787 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer;
1788 edata->eee_enabled = current_link.eee.enable;
1789 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable;
1790 edata->eee_active = current_link.eee_active;
1791
1792 return 0;
1793}
1794
1795static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1796{
1797 struct qede_dev *edev = netdev_priv(dev);
1798 struct qed_link_output current_link;
1799 struct qed_link_params params;
1800
1801 if (!edev->ops->common->can_link_change(edev->cdev)) {
1802 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1803 return -EOPNOTSUPP;
1804 }
1805
1806 memset(¤t_link, 0, sizeof(current_link));
1807 edev->ops->common->get_link(edev->cdev, ¤t_link);
1808
1809 if (!current_link.eee_supported) {
1810 DP_INFO(edev, "EEE is not supported\n");
1811 return -EOPNOTSUPP;
1812 }
1813
1814 memset(¶ms, 0, sizeof(params));
1815 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG;
1816
1817 if (!(edata->advertised & (ADVERTISED_1000baseT_Full |
1818 ADVERTISED_10000baseT_Full)) ||
1819 ((edata->advertised & (ADVERTISED_1000baseT_Full |
1820 ADVERTISED_10000baseT_Full)) !=
1821 edata->advertised)) {
1822 DP_VERBOSE(edev, QED_MSG_DEBUG,
1823 "Invalid advertised capabilities %d\n",
1824 edata->advertised);
1825 return -EINVAL;
1826 }
1827
1828 if (edata->advertised & ADVERTISED_1000baseT_Full)
1829 params.eee.adv_caps = QED_EEE_1G_ADV;
1830 if (edata->advertised & ADVERTISED_10000baseT_Full)
1831 params.eee.adv_caps |= QED_EEE_10G_ADV;
1832 params.eee.enable = edata->eee_enabled;
1833 params.eee.tx_lpi_enable = edata->tx_lpi_enabled;
1834 params.eee.tx_lpi_timer = edata->tx_lpi_timer;
1835
1836 params.link_up = true;
1837 edev->ops->common->set_link(edev->cdev, ¶ms);
1838
1839 return 0;
1840}
1841
1842static u32 qede_link_to_ethtool_fec(u32 link_fec)
1843{
1844 u32 eth_fec = 0;
1845
1846 if (link_fec & QED_FEC_MODE_NONE)
1847 eth_fec |= ETHTOOL_FEC_OFF;
1848 if (link_fec & QED_FEC_MODE_FIRECODE)
1849 eth_fec |= ETHTOOL_FEC_BASER;
1850 if (link_fec & QED_FEC_MODE_RS)
1851 eth_fec |= ETHTOOL_FEC_RS;
1852 if (link_fec & QED_FEC_MODE_AUTO)
1853 eth_fec |= ETHTOOL_FEC_AUTO;
1854 if (link_fec & QED_FEC_MODE_UNSUPPORTED)
1855 eth_fec |= ETHTOOL_FEC_NONE;
1856
1857 return eth_fec;
1858}
1859
1860static u32 qede_ethtool_to_link_fec(u32 eth_fec)
1861{
1862 u32 link_fec = 0;
1863
1864 if (eth_fec & ETHTOOL_FEC_OFF)
1865 link_fec |= QED_FEC_MODE_NONE;
1866 if (eth_fec & ETHTOOL_FEC_BASER)
1867 link_fec |= QED_FEC_MODE_FIRECODE;
1868 if (eth_fec & ETHTOOL_FEC_RS)
1869 link_fec |= QED_FEC_MODE_RS;
1870 if (eth_fec & ETHTOOL_FEC_AUTO)
1871 link_fec |= QED_FEC_MODE_AUTO;
1872 if (eth_fec & ETHTOOL_FEC_NONE)
1873 link_fec |= QED_FEC_MODE_UNSUPPORTED;
1874
1875 return link_fec;
1876}
1877
1878static int qede_get_fecparam(struct net_device *dev,
1879 struct ethtool_fecparam *fecparam)
1880{
1881 struct qede_dev *edev = netdev_priv(dev);
1882 struct qed_link_output curr_link;
1883
1884 memset(&curr_link, 0, sizeof(curr_link));
1885 edev->ops->common->get_link(edev->cdev, &curr_link);
1886
1887 fecparam->active_fec = qede_link_to_ethtool_fec(curr_link.active_fec);
1888 fecparam->fec = qede_link_to_ethtool_fec(curr_link.sup_fec);
1889
1890 return 0;
1891}
1892
1893static int qede_set_fecparam(struct net_device *dev,
1894 struct ethtool_fecparam *fecparam)
1895{
1896 struct qede_dev *edev = netdev_priv(dev);
1897 struct qed_link_params params;
1898
1899 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
1900 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1901 return -EOPNOTSUPP;
1902 }
1903
1904 memset(¶ms, 0, sizeof(params));
1905 params.override_flags |= QED_LINK_OVERRIDE_FEC_CONFIG;
1906 params.fec = qede_ethtool_to_link_fec(fecparam->fec);
1907 params.link_up = true;
1908
1909 edev->ops->common->set_link(edev->cdev, ¶ms);
1910
1911 return 0;
1912}
1913
1914static int qede_get_module_info(struct net_device *dev,
1915 struct ethtool_modinfo *modinfo)
1916{
1917 struct qede_dev *edev = netdev_priv(dev);
1918 u8 buf[4];
1919 int rc;
1920
1921
1922 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1923 QED_I2C_DEV_ADDR_A0, 0, 4);
1924 if (rc) {
1925 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc);
1926 return rc;
1927 }
1928
1929 switch (buf[0]) {
1930 case 0x3:
1931 modinfo->type = ETH_MODULE_SFF_8472;
1932 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1933 break;
1934 case 0xc:
1935 case 0xd:
1936 modinfo->type = ETH_MODULE_SFF_8436;
1937 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1938 break;
1939 case 0x11:
1940 modinfo->type = ETH_MODULE_SFF_8636;
1941 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1942 break;
1943 default:
1944 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]);
1945 return -EINVAL;
1946 }
1947
1948 return 0;
1949}
1950
1951static int qede_get_module_eeprom(struct net_device *dev,
1952 struct ethtool_eeprom *ee, u8 *data)
1953{
1954 struct qede_dev *edev = netdev_priv(dev);
1955 u32 start_addr = ee->offset, size = 0;
1956 u8 *buf = data;
1957 int rc = 0;
1958
1959
1960 if (ee->offset < ETH_MODULE_SFF_8079_LEN) {
1961
1962 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN)
1963 size = ETH_MODULE_SFF_8079_LEN - ee->offset;
1964 else
1965 size = ee->len;
1966
1967 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1968 QED_I2C_DEV_ADDR_A0,
1969 start_addr, size);
1970 if (rc) {
1971 DP_ERR(edev, "Failed reading A0 section %d\n", rc);
1972 return rc;
1973 }
1974
1975 buf += size;
1976 start_addr += size;
1977 }
1978
1979
1980 if (start_addr >= ETH_MODULE_SFF_8079_LEN &&
1981 start_addr < ETH_MODULE_SFF_8472_LEN) {
1982 size = ee->len - size;
1983
1984 if (start_addr + size > ETH_MODULE_SFF_8472_LEN)
1985 size = ETH_MODULE_SFF_8472_LEN - start_addr;
1986 start_addr -= ETH_MODULE_SFF_8079_LEN;
1987 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1988 QED_I2C_DEV_ADDR_A2,
1989 start_addr, size);
1990 if (rc) {
1991 DP_VERBOSE(edev, QED_MSG_DEBUG,
1992 "Failed reading A2 section %d\n", rc);
1993 return 0;
1994 }
1995 }
1996
1997 return rc;
1998}
1999
2000static int qede_set_dump(struct net_device *dev, struct ethtool_dump *val)
2001{
2002 struct qede_dev *edev = netdev_priv(dev);
2003 int rc = 0;
2004
2005 if (edev->dump_info.cmd == QEDE_DUMP_CMD_NONE) {
2006 if (val->flag > QEDE_DUMP_CMD_MAX) {
2007 DP_ERR(edev, "Invalid command %d\n", val->flag);
2008 return -EINVAL;
2009 }
2010 edev->dump_info.cmd = val->flag;
2011 edev->dump_info.num_args = 0;
2012 return 0;
2013 }
2014
2015 if (edev->dump_info.num_args == QEDE_DUMP_MAX_ARGS) {
2016 DP_ERR(edev, "Arg count = %d\n", edev->dump_info.num_args);
2017 return -EINVAL;
2018 }
2019
2020 switch (edev->dump_info.cmd) {
2021 case QEDE_DUMP_CMD_NVM_CFG:
2022 edev->dump_info.args[edev->dump_info.num_args] = val->flag;
2023 edev->dump_info.num_args++;
2024 break;
2025 case QEDE_DUMP_CMD_GRCDUMP:
2026 rc = edev->ops->common->set_grc_config(edev->cdev,
2027 val->flag, 1);
2028 break;
2029 default:
2030 break;
2031 }
2032
2033 return rc;
2034}
2035
2036static int qede_get_dump_flag(struct net_device *dev,
2037 struct ethtool_dump *dump)
2038{
2039 struct qede_dev *edev = netdev_priv(dev);
2040
2041 if (!edev->ops || !edev->ops->common) {
2042 DP_ERR(edev, "Edev ops not populated\n");
2043 return -EINVAL;
2044 }
2045
2046 dump->version = QEDE_DUMP_VERSION;
2047 switch (edev->dump_info.cmd) {
2048 case QEDE_DUMP_CMD_NVM_CFG:
2049 dump->flag = QEDE_DUMP_CMD_NVM_CFG;
2050 dump->len = edev->ops->common->read_nvm_cfg_len(edev->cdev,
2051 edev->dump_info.args[0]);
2052 break;
2053 case QEDE_DUMP_CMD_GRCDUMP:
2054 dump->flag = QEDE_DUMP_CMD_GRCDUMP;
2055 dump->len = edev->ops->common->dbg_all_data_size(edev->cdev);
2056 break;
2057 default:
2058 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd);
2059 return -EINVAL;
2060 }
2061
2062 DP_VERBOSE(edev, QED_MSG_DEBUG,
2063 "dump->version = 0x%x dump->flag = %d dump->len = %d\n",
2064 dump->version, dump->flag, dump->len);
2065 return 0;
2066}
2067
2068static int qede_get_dump_data(struct net_device *dev,
2069 struct ethtool_dump *dump, void *buf)
2070{
2071 struct qede_dev *edev = netdev_priv(dev);
2072 int rc = 0;
2073
2074 if (!edev->ops || !edev->ops->common) {
2075 DP_ERR(edev, "Edev ops not populated\n");
2076 rc = -EINVAL;
2077 goto err;
2078 }
2079
2080 switch (edev->dump_info.cmd) {
2081 case QEDE_DUMP_CMD_NVM_CFG:
2082 if (edev->dump_info.num_args != QEDE_DUMP_NVM_ARG_COUNT) {
2083 DP_ERR(edev, "Arg count = %d required = %d\n",
2084 edev->dump_info.num_args,
2085 QEDE_DUMP_NVM_ARG_COUNT);
2086 rc = -EINVAL;
2087 goto err;
2088 }
2089 rc = edev->ops->common->read_nvm_cfg(edev->cdev, (u8 **)&buf,
2090 edev->dump_info.args[0],
2091 edev->dump_info.args[1]);
2092 break;
2093 case QEDE_DUMP_CMD_GRCDUMP:
2094 memset(buf, 0, dump->len);
2095 rc = edev->ops->common->dbg_all_data(edev->cdev, buf);
2096 break;
2097 default:
2098 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd);
2099 rc = -EINVAL;
2100 break;
2101 }
2102
2103err:
2104 edev->dump_info.cmd = QEDE_DUMP_CMD_NONE;
2105 edev->dump_info.num_args = 0;
2106 memset(edev->dump_info.args, 0, sizeof(edev->dump_info.args));
2107
2108 return rc;
2109}
2110
2111int qede_set_per_coalesce(struct net_device *dev, u32 queue,
2112 struct ethtool_coalesce *coal)
2113{
2114 struct qede_dev *edev = netdev_priv(dev);
2115 struct qede_fastpath *fp;
2116 u16 rxc, txc;
2117 int rc = 0;
2118
2119 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
2120 coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
2121 DP_INFO(edev,
2122 "Can't support requested %s coalesce value [max supported value %d]\n",
2123 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx"
2124 : "tx",
2125 QED_COALESCE_MAX);
2126 return -EINVAL;
2127 }
2128
2129 rxc = (u16)coal->rx_coalesce_usecs;
2130 txc = (u16)coal->tx_coalesce_usecs;
2131
2132 __qede_lock(edev);
2133 if (queue >= edev->num_queues) {
2134 DP_INFO(edev, "Invalid queue\n");
2135 rc = -EINVAL;
2136 goto out;
2137 }
2138
2139 if (edev->state != QEDE_STATE_OPEN) {
2140 rc = -EINVAL;
2141 goto out;
2142 }
2143
2144 fp = &edev->fp_array[queue];
2145
2146 if (edev->fp_array[queue].type & QEDE_FASTPATH_RX) {
2147 rc = edev->ops->common->set_coalesce(edev->cdev,
2148 rxc, 0,
2149 fp->rxq->handle);
2150 if (rc) {
2151 DP_INFO(edev,
2152 "Set RX coalesce error, rc = %d\n", rc);
2153 goto out;
2154 }
2155 edev->coal_entry[queue].rxc = rxc;
2156 edev->coal_entry[queue].isvalid = true;
2157 }
2158
2159 if (edev->fp_array[queue].type & QEDE_FASTPATH_TX) {
2160 rc = edev->ops->common->set_coalesce(edev->cdev,
2161 0, txc,
2162 fp->txq->handle);
2163 if (rc) {
2164 DP_INFO(edev,
2165 "Set TX coalesce error, rc = %d\n", rc);
2166 goto out;
2167 }
2168 edev->coal_entry[queue].txc = txc;
2169 edev->coal_entry[queue].isvalid = true;
2170 }
2171out:
2172 __qede_unlock(edev);
2173
2174 return rc;
2175}
2176
2177static int qede_get_per_coalesce(struct net_device *dev,
2178 u32 queue,
2179 struct ethtool_coalesce *coal)
2180{
2181 void *rx_handle = NULL, *tx_handle = NULL;
2182 struct qede_dev *edev = netdev_priv(dev);
2183 struct qede_fastpath *fp;
2184 u16 rx_coal, tx_coal;
2185 int rc = 0;
2186
2187 rx_coal = QED_DEFAULT_RX_USECS;
2188 tx_coal = QED_DEFAULT_TX_USECS;
2189
2190 memset(coal, 0, sizeof(struct ethtool_coalesce));
2191
2192 __qede_lock(edev);
2193 if (queue >= edev->num_queues) {
2194 DP_INFO(edev, "Invalid queue\n");
2195 rc = -EINVAL;
2196 goto out;
2197 }
2198
2199 if (edev->state != QEDE_STATE_OPEN) {
2200 rc = -EINVAL;
2201 goto out;
2202 }
2203
2204 fp = &edev->fp_array[queue];
2205
2206 if (fp->type & QEDE_FASTPATH_RX)
2207 rx_handle = fp->rxq->handle;
2208
2209 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal,
2210 rx_handle);
2211 if (rc) {
2212 DP_INFO(edev, "Read Rx coalesce error\n");
2213 goto out;
2214 }
2215
2216 fp = &edev->fp_array[queue];
2217 if (fp->type & QEDE_FASTPATH_TX)
2218 tx_handle = fp->txq->handle;
2219
2220 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal,
2221 tx_handle);
2222 if (rc)
2223 DP_INFO(edev, "Read Tx coalesce error\n");
2224
2225out:
2226 __qede_unlock(edev);
2227
2228 coal->rx_coalesce_usecs = rx_coal;
2229 coal->tx_coalesce_usecs = tx_coal;
2230
2231 return rc;
2232}
2233
2234static const struct ethtool_ops qede_ethtool_ops = {
2235 .supported_coalesce_params = ETHTOOL_COALESCE_USECS,
2236 .get_link_ksettings = qede_get_link_ksettings,
2237 .set_link_ksettings = qede_set_link_ksettings,
2238 .get_drvinfo = qede_get_drvinfo,
2239 .get_regs_len = qede_get_regs_len,
2240 .get_regs = qede_get_regs,
2241 .get_wol = qede_get_wol,
2242 .set_wol = qede_set_wol,
2243 .get_msglevel = qede_get_msglevel,
2244 .set_msglevel = qede_set_msglevel,
2245 .nway_reset = qede_nway_reset,
2246 .get_link = qede_get_link,
2247 .get_coalesce = qede_get_coalesce,
2248 .set_coalesce = qede_set_coalesce,
2249 .get_ringparam = qede_get_ringparam,
2250 .set_ringparam = qede_set_ringparam,
2251 .get_pauseparam = qede_get_pauseparam,
2252 .set_pauseparam = qede_set_pauseparam,
2253 .get_strings = qede_get_strings,
2254 .set_phys_id = qede_set_phys_id,
2255 .get_ethtool_stats = qede_get_ethtool_stats,
2256 .get_priv_flags = qede_get_priv_flags,
2257 .set_priv_flags = qede_set_priv_flags,
2258 .get_sset_count = qede_get_sset_count,
2259 .get_rxnfc = qede_get_rxnfc,
2260 .set_rxnfc = qede_set_rxnfc,
2261 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
2262 .get_rxfh_key_size = qede_get_rxfh_key_size,
2263 .get_rxfh = qede_get_rxfh,
2264 .set_rxfh = qede_set_rxfh,
2265 .get_ts_info = qede_get_ts_info,
2266 .get_channels = qede_get_channels,
2267 .set_channels = qede_set_channels,
2268 .self_test = qede_self_test,
2269 .get_module_info = qede_get_module_info,
2270 .get_module_eeprom = qede_get_module_eeprom,
2271 .get_eee = qede_get_eee,
2272 .set_eee = qede_set_eee,
2273 .get_fecparam = qede_get_fecparam,
2274 .set_fecparam = qede_set_fecparam,
2275 .get_tunable = qede_get_tunable,
2276 .set_tunable = qede_set_tunable,
2277 .get_per_queue_coalesce = qede_get_per_coalesce,
2278 .set_per_queue_coalesce = qede_set_per_coalesce,
2279 .flash_device = qede_flash_device,
2280 .get_dump_flag = qede_get_dump_flag,
2281 .get_dump_data = qede_get_dump_data,
2282 .set_dump = qede_set_dump,
2283};
2284
2285static const struct ethtool_ops qede_vf_ethtool_ops = {
2286 .supported_coalesce_params = ETHTOOL_COALESCE_USECS,
2287 .get_link_ksettings = qede_get_link_ksettings,
2288 .get_drvinfo = qede_get_drvinfo,
2289 .get_msglevel = qede_get_msglevel,
2290 .set_msglevel = qede_set_msglevel,
2291 .get_link = qede_get_link,
2292 .get_coalesce = qede_get_coalesce,
2293 .set_coalesce = qede_set_coalesce,
2294 .get_ringparam = qede_get_ringparam,
2295 .set_ringparam = qede_set_ringparam,
2296 .get_strings = qede_get_strings,
2297 .get_ethtool_stats = qede_get_ethtool_stats,
2298 .get_priv_flags = qede_get_priv_flags,
2299 .get_sset_count = qede_get_sset_count,
2300 .get_rxnfc = qede_get_rxnfc,
2301 .set_rxnfc = qede_set_rxnfc,
2302 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
2303 .get_rxfh_key_size = qede_get_rxfh_key_size,
2304 .get_rxfh = qede_get_rxfh,
2305 .set_rxfh = qede_set_rxfh,
2306 .get_channels = qede_get_channels,
2307 .set_channels = qede_set_channels,
2308 .get_per_queue_coalesce = qede_get_per_coalesce,
2309 .set_per_queue_coalesce = qede_set_per_coalesce,
2310 .get_tunable = qede_get_tunable,
2311 .set_tunable = qede_set_tunable,
2312};
2313
2314void qede_set_ethtool_ops(struct net_device *dev)
2315{
2316 struct qede_dev *edev = netdev_priv(dev);
2317
2318 if (IS_VF(edev))
2319 dev->ethtool_ops = &qede_vf_ethtool_ops;
2320 else
2321 dev->ethtool_ops = &qede_ethtool_ops;
2322}
2323
