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8#ifndef _WMI_H_
9#define _WMI_H_
10
11#include <linux/types.h>
12#include <linux/ieee80211.h>
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54struct wmi_cmd_hdr {
55 __le32 cmd_id;
56} __packed;
57
58#define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF
59#define WMI_CMD_HDR_CMD_ID_LSB 0
60#define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
61#define WMI_CMD_HDR_PLT_PRIV_LSB 24
62
63#define HTC_PROTOCOL_VERSION 0x0002
64#define WMI_PROTOCOL_VERSION 0x0002
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72
73typedef __s32 __bitwise a_sle32;
74
75static inline a_sle32 a_cpu_to_sle32(s32 val)
76{
77 return (__force a_sle32)cpu_to_le32(val);
78}
79
80static inline s32 a_sle32_to_cpu(a_sle32 val)
81{
82 return le32_to_cpu((__force __le32)val);
83}
84
85enum wmi_service {
86 WMI_SERVICE_BEACON_OFFLOAD = 0,
87 WMI_SERVICE_SCAN_OFFLOAD,
88 WMI_SERVICE_ROAM_OFFLOAD,
89 WMI_SERVICE_BCN_MISS_OFFLOAD,
90 WMI_SERVICE_STA_PWRSAVE,
91 WMI_SERVICE_STA_ADVANCED_PWRSAVE,
92 WMI_SERVICE_AP_UAPSD,
93 WMI_SERVICE_AP_DFS,
94 WMI_SERVICE_11AC,
95 WMI_SERVICE_BLOCKACK,
96 WMI_SERVICE_PHYERR,
97 WMI_SERVICE_BCN_FILTER,
98 WMI_SERVICE_RTT,
99 WMI_SERVICE_RATECTRL,
100 WMI_SERVICE_WOW,
101 WMI_SERVICE_RATECTRL_CACHE,
102 WMI_SERVICE_IRAM_TIDS,
103 WMI_SERVICE_ARPNS_OFFLOAD,
104 WMI_SERVICE_NLO,
105 WMI_SERVICE_GTK_OFFLOAD,
106 WMI_SERVICE_SCAN_SCH,
107 WMI_SERVICE_CSA_OFFLOAD,
108 WMI_SERVICE_CHATTER,
109 WMI_SERVICE_COEX_FREQAVOID,
110 WMI_SERVICE_PACKET_POWER_SAVE,
111 WMI_SERVICE_FORCE_FW_HANG,
112 WMI_SERVICE_GPIO,
113 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
114 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
115 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
116 WMI_SERVICE_STA_KEEP_ALIVE,
117 WMI_SERVICE_TX_ENCAP,
118 WMI_SERVICE_BURST,
119 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
120 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
121 WMI_SERVICE_ROAM_SCAN_OFFLOAD,
122 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
123 WMI_SERVICE_EARLY_RX,
124 WMI_SERVICE_STA_SMPS,
125 WMI_SERVICE_FWTEST,
126 WMI_SERVICE_STA_WMMAC,
127 WMI_SERVICE_TDLS,
128 WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
129 WMI_SERVICE_ADAPTIVE_OCS,
130 WMI_SERVICE_BA_SSN_SUPPORT,
131 WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
132 WMI_SERVICE_WLAN_HB,
133 WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
134 WMI_SERVICE_BATCH_SCAN,
135 WMI_SERVICE_QPOWER,
136 WMI_SERVICE_PLMREQ,
137 WMI_SERVICE_THERMAL_MGMT,
138 WMI_SERVICE_RMC,
139 WMI_SERVICE_MHF_OFFLOAD,
140 WMI_SERVICE_COEX_SAR,
141 WMI_SERVICE_BCN_TXRATE_OVERRIDE,
142 WMI_SERVICE_NAN,
143 WMI_SERVICE_L1SS_STAT,
144 WMI_SERVICE_ESTIMATE_LINKSPEED,
145 WMI_SERVICE_OBSS_SCAN,
146 WMI_SERVICE_TDLS_OFFCHAN,
147 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
148 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
149 WMI_SERVICE_IBSS_PWRSAVE,
150 WMI_SERVICE_LPASS,
151 WMI_SERVICE_EXTSCAN,
152 WMI_SERVICE_D0WOW,
153 WMI_SERVICE_HSOFFLOAD,
154 WMI_SERVICE_ROAM_HO_OFFLOAD,
155 WMI_SERVICE_RX_FULL_REORDER,
156 WMI_SERVICE_DHCP_OFFLOAD,
157 WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
158 WMI_SERVICE_MDNS_OFFLOAD,
159 WMI_SERVICE_SAP_AUTH_OFFLOAD,
160 WMI_SERVICE_ATF,
161 WMI_SERVICE_COEX_GPIO,
162 WMI_SERVICE_ENHANCED_PROXY_STA,
163 WMI_SERVICE_TT,
164 WMI_SERVICE_PEER_CACHING,
165 WMI_SERVICE_AUX_SPECTRAL_INTF,
166 WMI_SERVICE_AUX_CHAN_LOAD_INTF,
167 WMI_SERVICE_BSS_CHANNEL_INFO_64,
168 WMI_SERVICE_EXT_RES_CFG_SUPPORT,
169 WMI_SERVICE_MESH_11S,
170 WMI_SERVICE_MESH_NON_11S,
171 WMI_SERVICE_PEER_STATS,
172 WMI_SERVICE_RESTRT_CHNL_SUPPORT,
173 WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
174 WMI_SERVICE_TX_MODE_PUSH_ONLY,
175 WMI_SERVICE_TX_MODE_PUSH_PULL,
176 WMI_SERVICE_TX_MODE_DYNAMIC,
177 WMI_SERVICE_VDEV_RX_FILTER,
178 WMI_SERVICE_BTCOEX,
179 WMI_SERVICE_CHECK_CAL_VERSION,
180 WMI_SERVICE_DBGLOG_WARN2,
181 WMI_SERVICE_BTCOEX_DUTY_CYCLE,
182 WMI_SERVICE_4_WIRE_COEX_SUPPORT,
183 WMI_SERVICE_EXTENDED_NSS_SUPPORT,
184 WMI_SERVICE_PROG_GPIO_BAND_SELECT,
185 WMI_SERVICE_SMART_LOGGING_SUPPORT,
186 WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
187 WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
188 WMI_SERVICE_MGMT_TX_WMI,
189 WMI_SERVICE_TDLS_WIDER_BANDWIDTH,
190 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
191 WMI_SERVICE_HOST_DFS_CHECK_SUPPORT,
192 WMI_SERVICE_TPC_STATS_FINAL,
193 WMI_SERVICE_RESET_CHIP,
194 WMI_SERVICE_SPOOF_MAC_SUPPORT,
195 WMI_SERVICE_TX_DATA_ACK_RSSI,
196 WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
197 WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
198 WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT,
199 WMI_SERVICE_THERM_THROT,
200 WMI_SERVICE_RTT_RESPONDER_ROLE,
201 WMI_SERVICE_PER_PACKET_SW_ENCRYPT,
202 WMI_SERVICE_REPORT_AIRTIME,
203 WMI_SERVICE_SYNC_DELETE_CMDS,
204 WMI_SERVICE_TX_PWR_PER_PEER,
205 WMI_SERVICE_SUPPORT_EXTEND_ADDRESS,
206 WMI_SERVICE_PEER_TID_CONFIGS_SUPPORT,
207 WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
208
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211
212 WMI_SERVICE_MAX,
213};
214
215enum wmi_10x_service {
216 WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
217 WMI_10X_SERVICE_SCAN_OFFLOAD,
218 WMI_10X_SERVICE_ROAM_OFFLOAD,
219 WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
220 WMI_10X_SERVICE_STA_PWRSAVE,
221 WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
222 WMI_10X_SERVICE_AP_UAPSD,
223 WMI_10X_SERVICE_AP_DFS,
224 WMI_10X_SERVICE_11AC,
225 WMI_10X_SERVICE_BLOCKACK,
226 WMI_10X_SERVICE_PHYERR,
227 WMI_10X_SERVICE_BCN_FILTER,
228 WMI_10X_SERVICE_RTT,
229 WMI_10X_SERVICE_RATECTRL,
230 WMI_10X_SERVICE_WOW,
231 WMI_10X_SERVICE_RATECTRL_CACHE,
232 WMI_10X_SERVICE_IRAM_TIDS,
233 WMI_10X_SERVICE_BURST,
234
235
236 WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
237 WMI_10X_SERVICE_FORCE_FW_HANG,
238 WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
239 WMI_10X_SERVICE_ATF,
240 WMI_10X_SERVICE_COEX_GPIO,
241 WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
242 WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
243 WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
244 WMI_10X_SERVICE_MESH,
245 WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
246 WMI_10X_SERVICE_PEER_STATS,
247 WMI_10X_SERVICE_RESET_CHIP,
248 WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
249 WMI_10X_SERVICE_VDEV_BCN_RATE_CONTROL,
250 WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT,
251 WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT,
252};
253
254enum wmi_main_service {
255 WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
256 WMI_MAIN_SERVICE_SCAN_OFFLOAD,
257 WMI_MAIN_SERVICE_ROAM_OFFLOAD,
258 WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
259 WMI_MAIN_SERVICE_STA_PWRSAVE,
260 WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
261 WMI_MAIN_SERVICE_AP_UAPSD,
262 WMI_MAIN_SERVICE_AP_DFS,
263 WMI_MAIN_SERVICE_11AC,
264 WMI_MAIN_SERVICE_BLOCKACK,
265 WMI_MAIN_SERVICE_PHYERR,
266 WMI_MAIN_SERVICE_BCN_FILTER,
267 WMI_MAIN_SERVICE_RTT,
268 WMI_MAIN_SERVICE_RATECTRL,
269 WMI_MAIN_SERVICE_WOW,
270 WMI_MAIN_SERVICE_RATECTRL_CACHE,
271 WMI_MAIN_SERVICE_IRAM_TIDS,
272 WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
273 WMI_MAIN_SERVICE_NLO,
274 WMI_MAIN_SERVICE_GTK_OFFLOAD,
275 WMI_MAIN_SERVICE_SCAN_SCH,
276 WMI_MAIN_SERVICE_CSA_OFFLOAD,
277 WMI_MAIN_SERVICE_CHATTER,
278 WMI_MAIN_SERVICE_COEX_FREQAVOID,
279 WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
280 WMI_MAIN_SERVICE_FORCE_FW_HANG,
281 WMI_MAIN_SERVICE_GPIO,
282 WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
283 WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
284 WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
285 WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
286 WMI_MAIN_SERVICE_TX_ENCAP,
287};
288
289enum wmi_10_4_service {
290 WMI_10_4_SERVICE_BEACON_OFFLOAD = 0,
291 WMI_10_4_SERVICE_SCAN_OFFLOAD,
292 WMI_10_4_SERVICE_ROAM_OFFLOAD,
293 WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
294 WMI_10_4_SERVICE_STA_PWRSAVE,
295 WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
296 WMI_10_4_SERVICE_AP_UAPSD,
297 WMI_10_4_SERVICE_AP_DFS,
298 WMI_10_4_SERVICE_11AC,
299 WMI_10_4_SERVICE_BLOCKACK,
300 WMI_10_4_SERVICE_PHYERR,
301 WMI_10_4_SERVICE_BCN_FILTER,
302 WMI_10_4_SERVICE_RTT,
303 WMI_10_4_SERVICE_RATECTRL,
304 WMI_10_4_SERVICE_WOW,
305 WMI_10_4_SERVICE_RATECTRL_CACHE,
306 WMI_10_4_SERVICE_IRAM_TIDS,
307 WMI_10_4_SERVICE_BURST,
308 WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
309 WMI_10_4_SERVICE_GTK_OFFLOAD,
310 WMI_10_4_SERVICE_SCAN_SCH,
311 WMI_10_4_SERVICE_CSA_OFFLOAD,
312 WMI_10_4_SERVICE_CHATTER,
313 WMI_10_4_SERVICE_COEX_FREQAVOID,
314 WMI_10_4_SERVICE_PACKET_POWER_SAVE,
315 WMI_10_4_SERVICE_FORCE_FW_HANG,
316 WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
317 WMI_10_4_SERVICE_GPIO,
318 WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
319 WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
320 WMI_10_4_SERVICE_STA_KEEP_ALIVE,
321 WMI_10_4_SERVICE_TX_ENCAP,
322 WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
323 WMI_10_4_SERVICE_EARLY_RX,
324 WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
325 WMI_10_4_SERVICE_TT,
326 WMI_10_4_SERVICE_ATF,
327 WMI_10_4_SERVICE_PEER_CACHING,
328 WMI_10_4_SERVICE_COEX_GPIO,
329 WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
330 WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
331 WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
332 WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
333 WMI_10_4_SERVICE_MESH_NON_11S,
334 WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
335 WMI_10_4_SERVICE_PEER_STATS,
336 WMI_10_4_SERVICE_MESH_11S,
337 WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
338 WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
339 WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
340 WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
341 WMI_10_4_SERVICE_VDEV_RX_FILTER,
342 WMI_10_4_SERVICE_BTCOEX,
343 WMI_10_4_SERVICE_CHECK_CAL_VERSION,
344 WMI_10_4_SERVICE_DBGLOG_WARN2,
345 WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
346 WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
347 WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
348 WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
349 WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
350 WMI_10_4_SERVICE_TDLS,
351 WMI_10_4_SERVICE_TDLS_OFFCHAN,
352 WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
353 WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
354 WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
355 WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
356 WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
357 WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
358 WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
359 WMI_10_4_SERVICE_TPC_STATS_FINAL,
360 WMI_10_4_SERVICE_CFR_CAPTURE_SUPPORT,
361 WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
362 WMI_10_4_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_LEGACY,
363 WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT,
364 WMI_10_4_SERVICE_PEER_TID_CONFIGS_SUPPORT,
365 WMI_10_4_SERVICE_VDEV_BCN_RATE_CONTROL,
366 WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
367 WMI_10_4_SERVICE_HTT_ASSERT_TRIGGER_SUPPORT,
368 WMI_10_4_SERVICE_VDEV_FILTER_NEIGHBOR_RX_PACKETS,
369 WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
370 WMI_10_4_SERVICE_PEER_CHWIDTH_CHANGE,
371 WMI_10_4_SERVICE_RX_FILTER_OUT_COUNT,
372 WMI_10_4_SERVICE_RTT_RESPONDER_ROLE,
373 WMI_10_4_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
374 WMI_10_4_SERVICE_REPORT_AIRTIME,
375 WMI_10_4_SERVICE_TX_PWR_PER_PEER,
376 WMI_10_4_SERVICE_FETCH_PEER_TX_PN,
377 WMI_10_4_SERVICE_MULTIPLE_VDEV_RESTART,
378 WMI_10_4_SERVICE_ENHANCED_RADIO_COUNTERS,
379 WMI_10_4_SERVICE_QINQ_SUPPORT,
380 WMI_10_4_SERVICE_RESET_CHIP,
381};
382
383static inline char *wmi_service_name(enum wmi_service service_id)
384{
385#define SVCSTR(x) case x: return #x
386
387 switch (service_id) {
388 SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
389 SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
390 SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
391 SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
392 SVCSTR(WMI_SERVICE_STA_PWRSAVE);
393 SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
394 SVCSTR(WMI_SERVICE_AP_UAPSD);
395 SVCSTR(WMI_SERVICE_AP_DFS);
396 SVCSTR(WMI_SERVICE_11AC);
397 SVCSTR(WMI_SERVICE_BLOCKACK);
398 SVCSTR(WMI_SERVICE_PHYERR);
399 SVCSTR(WMI_SERVICE_BCN_FILTER);
400 SVCSTR(WMI_SERVICE_RTT);
401 SVCSTR(WMI_SERVICE_RATECTRL);
402 SVCSTR(WMI_SERVICE_WOW);
403 SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
404 SVCSTR(WMI_SERVICE_IRAM_TIDS);
405 SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
406 SVCSTR(WMI_SERVICE_NLO);
407 SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
408 SVCSTR(WMI_SERVICE_SCAN_SCH);
409 SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
410 SVCSTR(WMI_SERVICE_CHATTER);
411 SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
412 SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
413 SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
414 SVCSTR(WMI_SERVICE_GPIO);
415 SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
416 SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
417 SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
418 SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
419 SVCSTR(WMI_SERVICE_TX_ENCAP);
420 SVCSTR(WMI_SERVICE_BURST);
421 SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
422 SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
423 SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
424 SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
425 SVCSTR(WMI_SERVICE_EARLY_RX);
426 SVCSTR(WMI_SERVICE_STA_SMPS);
427 SVCSTR(WMI_SERVICE_FWTEST);
428 SVCSTR(WMI_SERVICE_STA_WMMAC);
429 SVCSTR(WMI_SERVICE_TDLS);
430 SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
431 SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
432 SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
433 SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
434 SVCSTR(WMI_SERVICE_WLAN_HB);
435 SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
436 SVCSTR(WMI_SERVICE_BATCH_SCAN);
437 SVCSTR(WMI_SERVICE_QPOWER);
438 SVCSTR(WMI_SERVICE_PLMREQ);
439 SVCSTR(WMI_SERVICE_THERMAL_MGMT);
440 SVCSTR(WMI_SERVICE_RMC);
441 SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
442 SVCSTR(WMI_SERVICE_COEX_SAR);
443 SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
444 SVCSTR(WMI_SERVICE_NAN);
445 SVCSTR(WMI_SERVICE_L1SS_STAT);
446 SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
447 SVCSTR(WMI_SERVICE_OBSS_SCAN);
448 SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
449 SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
450 SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
451 SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
452 SVCSTR(WMI_SERVICE_LPASS);
453 SVCSTR(WMI_SERVICE_EXTSCAN);
454 SVCSTR(WMI_SERVICE_D0WOW);
455 SVCSTR(WMI_SERVICE_HSOFFLOAD);
456 SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
457 SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
458 SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
459 SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
460 SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
461 SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
462 SVCSTR(WMI_SERVICE_ATF);
463 SVCSTR(WMI_SERVICE_COEX_GPIO);
464 SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA);
465 SVCSTR(WMI_SERVICE_TT);
466 SVCSTR(WMI_SERVICE_PEER_CACHING);
467 SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF);
468 SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF);
469 SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64);
470 SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT);
471 SVCSTR(WMI_SERVICE_MESH_11S);
472 SVCSTR(WMI_SERVICE_MESH_NON_11S);
473 SVCSTR(WMI_SERVICE_PEER_STATS);
474 SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT);
475 SVCSTR(WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT);
476 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY);
477 SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL);
478 SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC);
479 SVCSTR(WMI_SERVICE_VDEV_RX_FILTER);
480 SVCSTR(WMI_SERVICE_BTCOEX);
481 SVCSTR(WMI_SERVICE_CHECK_CAL_VERSION);
482 SVCSTR(WMI_SERVICE_DBGLOG_WARN2);
483 SVCSTR(WMI_SERVICE_BTCOEX_DUTY_CYCLE);
484 SVCSTR(WMI_SERVICE_4_WIRE_COEX_SUPPORT);
485 SVCSTR(WMI_SERVICE_EXTENDED_NSS_SUPPORT);
486 SVCSTR(WMI_SERVICE_PROG_GPIO_BAND_SELECT);
487 SVCSTR(WMI_SERVICE_SMART_LOGGING_SUPPORT);
488 SVCSTR(WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE);
489 SVCSTR(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY);
490 SVCSTR(WMI_SERVICE_MGMT_TX_WMI);
491 SVCSTR(WMI_SERVICE_TDLS_WIDER_BANDWIDTH);
492 SVCSTR(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS);
493 SVCSTR(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT);
494 SVCSTR(WMI_SERVICE_TPC_STATS_FINAL);
495 SVCSTR(WMI_SERVICE_RESET_CHIP);
496 SVCSTR(WMI_SERVICE_SPOOF_MAC_SUPPORT);
497 SVCSTR(WMI_SERVICE_TX_DATA_ACK_RSSI);
498 SVCSTR(WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT);
499 SVCSTR(WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT);
500 SVCSTR(WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT);
501 SVCSTR(WMI_SERVICE_THERM_THROT);
502 SVCSTR(WMI_SERVICE_RTT_RESPONDER_ROLE);
503 SVCSTR(WMI_SERVICE_PER_PACKET_SW_ENCRYPT);
504 SVCSTR(WMI_SERVICE_REPORT_AIRTIME);
505 SVCSTR(WMI_SERVICE_SYNC_DELETE_CMDS);
506 SVCSTR(WMI_SERVICE_TX_PWR_PER_PEER);
507 SVCSTR(WMI_SERVICE_SUPPORT_EXTEND_ADDRESS);
508 SVCSTR(WMI_SERVICE_PEER_TID_CONFIGS_SUPPORT);
509 SVCSTR(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT);
510
511 case WMI_SERVICE_MAX:
512 return NULL;
513 }
514
515#undef SVCSTR
516
517 return NULL;
518}
519
520#define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
521 ((svc_id) < (len) && \
522 __le32_to_cpu((wmi_svc_bmap)[(svc_id) / (sizeof(u32))]) & \
523 BIT((svc_id) % (sizeof(u32))))
524
525
526
527
528
529
530#define WMI_EXT_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
531 ((svc_id) >= (len) && \
532 __le32_to_cpu((wmi_svc_bmap)[((svc_id) - (len)) / 28]) & \
533 BIT(((((svc_id) - (len)) % 28) & 0x1f) + 4))
534
535#define SVCMAP(x, y, len) \
536 do { \
537 if ((WMI_SERVICE_IS_ENABLED((in), (x), (len))) || \
538 (WMI_EXT_SERVICE_IS_ENABLED((in), (x), (len)))) \
539 __set_bit(y, out); \
540 } while (0)
541
542static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
543 size_t len)
544{
545 SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
546 WMI_SERVICE_BEACON_OFFLOAD, len);
547 SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
548 WMI_SERVICE_SCAN_OFFLOAD, len);
549 SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
550 WMI_SERVICE_ROAM_OFFLOAD, len);
551 SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
552 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
553 SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
554 WMI_SERVICE_STA_PWRSAVE, len);
555 SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
556 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
557 SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
558 WMI_SERVICE_AP_UAPSD, len);
559 SVCMAP(WMI_10X_SERVICE_AP_DFS,
560 WMI_SERVICE_AP_DFS, len);
561 SVCMAP(WMI_10X_SERVICE_11AC,
562 WMI_SERVICE_11AC, len);
563 SVCMAP(WMI_10X_SERVICE_BLOCKACK,
564 WMI_SERVICE_BLOCKACK, len);
565 SVCMAP(WMI_10X_SERVICE_PHYERR,
566 WMI_SERVICE_PHYERR, len);
567 SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
568 WMI_SERVICE_BCN_FILTER, len);
569 SVCMAP(WMI_10X_SERVICE_RTT,
570 WMI_SERVICE_RTT, len);
571 SVCMAP(WMI_10X_SERVICE_RATECTRL,
572 WMI_SERVICE_RATECTRL, len);
573 SVCMAP(WMI_10X_SERVICE_WOW,
574 WMI_SERVICE_WOW, len);
575 SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
576 WMI_SERVICE_RATECTRL_CACHE, len);
577 SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
578 WMI_SERVICE_IRAM_TIDS, len);
579 SVCMAP(WMI_10X_SERVICE_BURST,
580 WMI_SERVICE_BURST, len);
581 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
582 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
583 SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
584 WMI_SERVICE_FORCE_FW_HANG, len);
585 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
586 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
587 SVCMAP(WMI_10X_SERVICE_ATF,
588 WMI_SERVICE_ATF, len);
589 SVCMAP(WMI_10X_SERVICE_COEX_GPIO,
590 WMI_SERVICE_COEX_GPIO, len);
591 SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
592 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
593 SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
594 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
595 SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
596 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
597 SVCMAP(WMI_10X_SERVICE_MESH,
598 WMI_SERVICE_MESH_11S, len);
599 SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
600 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
601 SVCMAP(WMI_10X_SERVICE_PEER_STATS,
602 WMI_SERVICE_PEER_STATS, len);
603 SVCMAP(WMI_10X_SERVICE_RESET_CHIP,
604 WMI_SERVICE_RESET_CHIP, len);
605 SVCMAP(WMI_10X_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
606 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
607 SVCMAP(WMI_10X_SERVICE_BB_TIMING_CONFIG_SUPPORT,
608 WMI_SERVICE_BB_TIMING_CONFIG_SUPPORT, len);
609 SVCMAP(WMI_10X_SERVICE_PER_PACKET_SW_ENCRYPT,
610 WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len);
611}
612
613static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
614 size_t len)
615{
616 SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
617 WMI_SERVICE_BEACON_OFFLOAD, len);
618 SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
619 WMI_SERVICE_SCAN_OFFLOAD, len);
620 SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
621 WMI_SERVICE_ROAM_OFFLOAD, len);
622 SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
623 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
624 SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
625 WMI_SERVICE_STA_PWRSAVE, len);
626 SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
627 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
628 SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
629 WMI_SERVICE_AP_UAPSD, len);
630 SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
631 WMI_SERVICE_AP_DFS, len);
632 SVCMAP(WMI_MAIN_SERVICE_11AC,
633 WMI_SERVICE_11AC, len);
634 SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
635 WMI_SERVICE_BLOCKACK, len);
636 SVCMAP(WMI_MAIN_SERVICE_PHYERR,
637 WMI_SERVICE_PHYERR, len);
638 SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
639 WMI_SERVICE_BCN_FILTER, len);
640 SVCMAP(WMI_MAIN_SERVICE_RTT,
641 WMI_SERVICE_RTT, len);
642 SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
643 WMI_SERVICE_RATECTRL, len);
644 SVCMAP(WMI_MAIN_SERVICE_WOW,
645 WMI_SERVICE_WOW, len);
646 SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
647 WMI_SERVICE_RATECTRL_CACHE, len);
648 SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
649 WMI_SERVICE_IRAM_TIDS, len);
650 SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
651 WMI_SERVICE_ARPNS_OFFLOAD, len);
652 SVCMAP(WMI_MAIN_SERVICE_NLO,
653 WMI_SERVICE_NLO, len);
654 SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
655 WMI_SERVICE_GTK_OFFLOAD, len);
656 SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
657 WMI_SERVICE_SCAN_SCH, len);
658 SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
659 WMI_SERVICE_CSA_OFFLOAD, len);
660 SVCMAP(WMI_MAIN_SERVICE_CHATTER,
661 WMI_SERVICE_CHATTER, len);
662 SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
663 WMI_SERVICE_COEX_FREQAVOID, len);
664 SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
665 WMI_SERVICE_PACKET_POWER_SAVE, len);
666 SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
667 WMI_SERVICE_FORCE_FW_HANG, len);
668 SVCMAP(WMI_MAIN_SERVICE_GPIO,
669 WMI_SERVICE_GPIO, len);
670 SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
671 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
672 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
673 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
674 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
675 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
676 SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
677 WMI_SERVICE_STA_KEEP_ALIVE, len);
678 SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
679 WMI_SERVICE_TX_ENCAP, len);
680}
681
682static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
683 size_t len)
684{
685 SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD,
686 WMI_SERVICE_BEACON_OFFLOAD, len);
687 SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD,
688 WMI_SERVICE_SCAN_OFFLOAD, len);
689 SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD,
690 WMI_SERVICE_ROAM_OFFLOAD, len);
691 SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
692 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
693 SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE,
694 WMI_SERVICE_STA_PWRSAVE, len);
695 SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
696 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
697 SVCMAP(WMI_10_4_SERVICE_AP_UAPSD,
698 WMI_SERVICE_AP_UAPSD, len);
699 SVCMAP(WMI_10_4_SERVICE_AP_DFS,
700 WMI_SERVICE_AP_DFS, len);
701 SVCMAP(WMI_10_4_SERVICE_11AC,
702 WMI_SERVICE_11AC, len);
703 SVCMAP(WMI_10_4_SERVICE_BLOCKACK,
704 WMI_SERVICE_BLOCKACK, len);
705 SVCMAP(WMI_10_4_SERVICE_PHYERR,
706 WMI_SERVICE_PHYERR, len);
707 SVCMAP(WMI_10_4_SERVICE_BCN_FILTER,
708 WMI_SERVICE_BCN_FILTER, len);
709 SVCMAP(WMI_10_4_SERVICE_RTT,
710 WMI_SERVICE_RTT, len);
711 SVCMAP(WMI_10_4_SERVICE_RATECTRL,
712 WMI_SERVICE_RATECTRL, len);
713 SVCMAP(WMI_10_4_SERVICE_WOW,
714 WMI_SERVICE_WOW, len);
715 SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE,
716 WMI_SERVICE_RATECTRL_CACHE, len);
717 SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS,
718 WMI_SERVICE_IRAM_TIDS, len);
719 SVCMAP(WMI_10_4_SERVICE_BURST,
720 WMI_SERVICE_BURST, len);
721 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
722 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
723 SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD,
724 WMI_SERVICE_GTK_OFFLOAD, len);
725 SVCMAP(WMI_10_4_SERVICE_SCAN_SCH,
726 WMI_SERVICE_SCAN_SCH, len);
727 SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD,
728 WMI_SERVICE_CSA_OFFLOAD, len);
729 SVCMAP(WMI_10_4_SERVICE_CHATTER,
730 WMI_SERVICE_CHATTER, len);
731 SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID,
732 WMI_SERVICE_COEX_FREQAVOID, len);
733 SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE,
734 WMI_SERVICE_PACKET_POWER_SAVE, len);
735 SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG,
736 WMI_SERVICE_FORCE_FW_HANG, len);
737 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
738 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
739 SVCMAP(WMI_10_4_SERVICE_GPIO,
740 WMI_SERVICE_GPIO, len);
741 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
742 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
743 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
744 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
745 SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE,
746 WMI_SERVICE_STA_KEEP_ALIVE, len);
747 SVCMAP(WMI_10_4_SERVICE_TX_ENCAP,
748 WMI_SERVICE_TX_ENCAP, len);
749 SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
750 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len);
751 SVCMAP(WMI_10_4_SERVICE_EARLY_RX,
752 WMI_SERVICE_EARLY_RX, len);
753 SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
754 WMI_SERVICE_ENHANCED_PROXY_STA, len);
755 SVCMAP(WMI_10_4_SERVICE_TT,
756 WMI_SERVICE_TT, len);
757 SVCMAP(WMI_10_4_SERVICE_ATF,
758 WMI_SERVICE_ATF, len);
759 SVCMAP(WMI_10_4_SERVICE_PEER_CACHING,
760 WMI_SERVICE_PEER_CACHING, len);
761 SVCMAP(WMI_10_4_SERVICE_COEX_GPIO,
762 WMI_SERVICE_COEX_GPIO, len);
763 SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
764 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
765 SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
766 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
767 SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
768 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
769 SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
770 WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
771 SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S,
772 WMI_SERVICE_MESH_NON_11S, len);
773 SVCMAP(WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
774 WMI_SERVICE_RESTRT_CHNL_SUPPORT, len);
775 SVCMAP(WMI_10_4_SERVICE_PEER_STATS,
776 WMI_SERVICE_PEER_STATS, len);
777 SVCMAP(WMI_10_4_SERVICE_MESH_11S,
778 WMI_SERVICE_MESH_11S, len);
779 SVCMAP(WMI_10_4_SERVICE_PERIODIC_CHAN_STAT_SUPPORT,
780 WMI_SERVICE_PERIODIC_CHAN_STAT_SUPPORT, len);
781 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
782 WMI_SERVICE_TX_MODE_PUSH_ONLY, len);
783 SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
784 WMI_SERVICE_TX_MODE_PUSH_PULL, len);
785 SVCMAP(WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
786 WMI_SERVICE_TX_MODE_DYNAMIC, len);
787 SVCMAP(WMI_10_4_SERVICE_VDEV_RX_FILTER,
788 WMI_SERVICE_VDEV_RX_FILTER, len);
789 SVCMAP(WMI_10_4_SERVICE_BTCOEX,
790 WMI_SERVICE_BTCOEX, len);
791 SVCMAP(WMI_10_4_SERVICE_CHECK_CAL_VERSION,
792 WMI_SERVICE_CHECK_CAL_VERSION, len);
793 SVCMAP(WMI_10_4_SERVICE_DBGLOG_WARN2,
794 WMI_SERVICE_DBGLOG_WARN2, len);
795 SVCMAP(WMI_10_4_SERVICE_BTCOEX_DUTY_CYCLE,
796 WMI_SERVICE_BTCOEX_DUTY_CYCLE, len);
797 SVCMAP(WMI_10_4_SERVICE_4_WIRE_COEX_SUPPORT,
798 WMI_SERVICE_4_WIRE_COEX_SUPPORT, len);
799 SVCMAP(WMI_10_4_SERVICE_EXTENDED_NSS_SUPPORT,
800 WMI_SERVICE_EXTENDED_NSS_SUPPORT, len);
801 SVCMAP(WMI_10_4_SERVICE_PROG_GPIO_BAND_SELECT,
802 WMI_SERVICE_PROG_GPIO_BAND_SELECT, len);
803 SVCMAP(WMI_10_4_SERVICE_SMART_LOGGING_SUPPORT,
804 WMI_SERVICE_SMART_LOGGING_SUPPORT, len);
805 SVCMAP(WMI_10_4_SERVICE_TDLS,
806 WMI_SERVICE_TDLS, len);
807 SVCMAP(WMI_10_4_SERVICE_TDLS_OFFCHAN,
808 WMI_SERVICE_TDLS_OFFCHAN, len);
809 SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_BUFFER_STA,
810 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, len);
811 SVCMAP(WMI_10_4_SERVICE_TDLS_UAPSD_SLEEP_STA,
812 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, len);
813 SVCMAP(WMI_10_4_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE,
814 WMI_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE, len);
815 SVCMAP(WMI_10_4_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
816 WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, len);
817 SVCMAP(WMI_10_4_SERVICE_TDLS_WIDER_BANDWIDTH,
818 WMI_SERVICE_TDLS_WIDER_BANDWIDTH, len);
819 SVCMAP(WMI_10_4_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS,
820 WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, len);
821 SVCMAP(WMI_10_4_SERVICE_HOST_DFS_CHECK_SUPPORT,
822 WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, len);
823 SVCMAP(WMI_10_4_SERVICE_TPC_STATS_FINAL,
824 WMI_SERVICE_TPC_STATS_FINAL, len);
825 SVCMAP(WMI_10_4_SERVICE_TX_DATA_ACK_RSSI,
826 WMI_SERVICE_TX_DATA_ACK_RSSI, len);
827 SVCMAP(WMI_10_4_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT,
828 WMI_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT, len);
829 SVCMAP(WMI_10_4_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT,
830 WMI_SERVICE_VDEV_DISABLE_4_ADDR_SRC_LRN_SUPPORT, len);
831 SVCMAP(WMI_10_4_SERVICE_RTT_RESPONDER_ROLE,
832 WMI_SERVICE_RTT_RESPONDER_ROLE, len);
833 SVCMAP(WMI_10_4_SERVICE_PER_PACKET_SW_ENCRYPT,
834 WMI_SERVICE_PER_PACKET_SW_ENCRYPT, len);
835 SVCMAP(WMI_10_4_SERVICE_REPORT_AIRTIME,
836 WMI_SERVICE_REPORT_AIRTIME, len);
837 SVCMAP(WMI_10_4_SERVICE_TX_PWR_PER_PEER,
838 WMI_SERVICE_TX_PWR_PER_PEER, len);
839 SVCMAP(WMI_10_4_SERVICE_RESET_CHIP,
840 WMI_SERVICE_RESET_CHIP, len);
841 SVCMAP(WMI_10_4_SERVICE_PEER_TID_CONFIGS_SUPPORT,
842 WMI_SERVICE_PEER_TID_CONFIGS_SUPPORT, len);
843 SVCMAP(WMI_10_4_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
844 WMI_SERVICE_PEER_TID_CONFIGS_SUPPORT, len);
845}
846
847#undef SVCMAP
848
849
850struct wmi_mac_addr {
851 union {
852 u8 addr[6];
853 struct {
854 u32 word0;
855 u32 word1;
856 } __packed;
857 } __packed;
858} __packed;
859
860struct wmi_cmd_map {
861 u32 init_cmdid;
862 u32 start_scan_cmdid;
863 u32 stop_scan_cmdid;
864 u32 scan_chan_list_cmdid;
865 u32 scan_sch_prio_tbl_cmdid;
866 u32 scan_prob_req_oui_cmdid;
867 u32 pdev_set_regdomain_cmdid;
868 u32 pdev_set_channel_cmdid;
869 u32 pdev_set_param_cmdid;
870 u32 pdev_pktlog_enable_cmdid;
871 u32 pdev_pktlog_disable_cmdid;
872 u32 pdev_set_wmm_params_cmdid;
873 u32 pdev_set_ht_cap_ie_cmdid;
874 u32 pdev_set_vht_cap_ie_cmdid;
875 u32 pdev_set_dscp_tid_map_cmdid;
876 u32 pdev_set_quiet_mode_cmdid;
877 u32 pdev_green_ap_ps_enable_cmdid;
878 u32 pdev_get_tpc_config_cmdid;
879 u32 pdev_set_base_macaddr_cmdid;
880 u32 vdev_create_cmdid;
881 u32 vdev_delete_cmdid;
882 u32 vdev_start_request_cmdid;
883 u32 vdev_restart_request_cmdid;
884 u32 vdev_up_cmdid;
885 u32 vdev_stop_cmdid;
886 u32 vdev_down_cmdid;
887 u32 vdev_set_param_cmdid;
888 u32 vdev_install_key_cmdid;
889 u32 peer_create_cmdid;
890 u32 peer_delete_cmdid;
891 u32 peer_flush_tids_cmdid;
892 u32 peer_set_param_cmdid;
893 u32 peer_assoc_cmdid;
894 u32 peer_add_wds_entry_cmdid;
895 u32 peer_remove_wds_entry_cmdid;
896 u32 peer_mcast_group_cmdid;
897 u32 bcn_tx_cmdid;
898 u32 pdev_send_bcn_cmdid;
899 u32 bcn_tmpl_cmdid;
900 u32 bcn_filter_rx_cmdid;
901 u32 prb_req_filter_rx_cmdid;
902 u32 mgmt_tx_cmdid;
903 u32 mgmt_tx_send_cmdid;
904 u32 prb_tmpl_cmdid;
905 u32 addba_clear_resp_cmdid;
906 u32 addba_send_cmdid;
907 u32 addba_status_cmdid;
908 u32 delba_send_cmdid;
909 u32 addba_set_resp_cmdid;
910 u32 send_singleamsdu_cmdid;
911 u32 sta_powersave_mode_cmdid;
912 u32 sta_powersave_param_cmdid;
913 u32 sta_mimo_ps_mode_cmdid;
914 u32 pdev_dfs_enable_cmdid;
915 u32 pdev_dfs_disable_cmdid;
916 u32 roam_scan_mode;
917 u32 roam_scan_rssi_threshold;
918 u32 roam_scan_period;
919 u32 roam_scan_rssi_change_threshold;
920 u32 roam_ap_profile;
921 u32 ofl_scan_add_ap_profile;
922 u32 ofl_scan_remove_ap_profile;
923 u32 ofl_scan_period;
924 u32 p2p_dev_set_device_info;
925 u32 p2p_dev_set_discoverability;
926 u32 p2p_go_set_beacon_ie;
927 u32 p2p_go_set_probe_resp_ie;
928 u32 p2p_set_vendor_ie_data_cmdid;
929 u32 ap_ps_peer_param_cmdid;
930 u32 ap_ps_peer_uapsd_coex_cmdid;
931 u32 peer_rate_retry_sched_cmdid;
932 u32 wlan_profile_trigger_cmdid;
933 u32 wlan_profile_set_hist_intvl_cmdid;
934 u32 wlan_profile_get_profile_data_cmdid;
935 u32 wlan_profile_enable_profile_id_cmdid;
936 u32 wlan_profile_list_profile_id_cmdid;
937 u32 pdev_suspend_cmdid;
938 u32 pdev_resume_cmdid;
939 u32 add_bcn_filter_cmdid;
940 u32 rmv_bcn_filter_cmdid;
941 u32 wow_add_wake_pattern_cmdid;
942 u32 wow_del_wake_pattern_cmdid;
943 u32 wow_enable_disable_wake_event_cmdid;
944 u32 wow_enable_cmdid;
945 u32 wow_hostwakeup_from_sleep_cmdid;
946 u32 rtt_measreq_cmdid;
947 u32 rtt_tsf_cmdid;
948 u32 vdev_spectral_scan_configure_cmdid;
949 u32 vdev_spectral_scan_enable_cmdid;
950 u32 request_stats_cmdid;
951 u32 request_peer_stats_info_cmdid;
952 u32 set_arp_ns_offload_cmdid;
953 u32 network_list_offload_config_cmdid;
954 u32 gtk_offload_cmdid;
955 u32 csa_offload_enable_cmdid;
956 u32 csa_offload_chanswitch_cmdid;
957 u32 chatter_set_mode_cmdid;
958 u32 peer_tid_addba_cmdid;
959 u32 peer_tid_delba_cmdid;
960 u32 sta_dtim_ps_method_cmdid;
961 u32 sta_uapsd_auto_trig_cmdid;
962 u32 sta_keepalive_cmd;
963 u32 echo_cmdid;
964 u32 pdev_utf_cmdid;
965 u32 dbglog_cfg_cmdid;
966 u32 pdev_qvit_cmdid;
967 u32 pdev_ftm_intg_cmdid;
968 u32 vdev_set_keepalive_cmdid;
969 u32 vdev_get_keepalive_cmdid;
970 u32 force_fw_hang_cmdid;
971 u32 gpio_config_cmdid;
972 u32 gpio_output_cmdid;
973 u32 pdev_get_temperature_cmdid;
974 u32 vdev_set_wmm_params_cmdid;
975 u32 tdls_set_state_cmdid;
976 u32 tdls_peer_update_cmdid;
977 u32 adaptive_qcs_cmdid;
978 u32 scan_update_request_cmdid;
979 u32 vdev_standby_response_cmdid;
980 u32 vdev_resume_response_cmdid;
981 u32 wlan_peer_caching_add_peer_cmdid;
982 u32 wlan_peer_caching_evict_peer_cmdid;
983 u32 wlan_peer_caching_restore_peer_cmdid;
984 u32 wlan_peer_caching_print_all_peers_info_cmdid;
985 u32 peer_update_wds_entry_cmdid;
986 u32 peer_add_proxy_sta_entry_cmdid;
987 u32 rtt_keepalive_cmdid;
988 u32 oem_req_cmdid;
989 u32 nan_cmdid;
990 u32 vdev_ratemask_cmdid;
991 u32 qboost_cfg_cmdid;
992 u32 pdev_smart_ant_enable_cmdid;
993 u32 pdev_smart_ant_set_rx_antenna_cmdid;
994 u32 peer_smart_ant_set_tx_antenna_cmdid;
995 u32 peer_smart_ant_set_train_info_cmdid;
996 u32 peer_smart_ant_set_node_config_ops_cmdid;
997 u32 pdev_set_antenna_switch_table_cmdid;
998 u32 pdev_set_ctl_table_cmdid;
999 u32 pdev_set_mimogain_table_cmdid;
1000 u32 pdev_ratepwr_table_cmdid;
1001 u32 pdev_ratepwr_chainmsk_table_cmdid;
1002 u32 pdev_fips_cmdid;
1003 u32 tt_set_conf_cmdid;
1004 u32 fwtest_cmdid;
1005 u32 vdev_atf_request_cmdid;
1006 u32 peer_atf_request_cmdid;
1007 u32 pdev_get_ani_cck_config_cmdid;
1008 u32 pdev_get_ani_ofdm_config_cmdid;
1009 u32 pdev_reserve_ast_entry_cmdid;
1010 u32 pdev_get_nfcal_power_cmdid;
1011 u32 pdev_get_tpc_cmdid;
1012 u32 pdev_get_ast_info_cmdid;
1013 u32 vdev_set_dscp_tid_map_cmdid;
1014 u32 pdev_get_info_cmdid;
1015 u32 vdev_get_info_cmdid;
1016 u32 vdev_filter_neighbor_rx_packets_cmdid;
1017 u32 mu_cal_start_cmdid;
1018 u32 set_cca_params_cmdid;
1019 u32 pdev_bss_chan_info_request_cmdid;
1020 u32 pdev_enable_adaptive_cca_cmdid;
1021 u32 ext_resource_cfg_cmdid;
1022 u32 vdev_set_ie_cmdid;
1023 u32 set_lteu_config_cmdid;
1024 u32 atf_ssid_grouping_request_cmdid;
1025 u32 peer_atf_ext_request_cmdid;
1026 u32 set_periodic_channel_stats_cfg_cmdid;
1027 u32 peer_bwf_request_cmdid;
1028 u32 btcoex_cfg_cmdid;
1029 u32 peer_tx_mu_txmit_count_cmdid;
1030 u32 peer_tx_mu_txmit_rstcnt_cmdid;
1031 u32 peer_gid_userpos_list_cmdid;
1032 u32 pdev_check_cal_version_cmdid;
1033 u32 coex_version_cfg_cmid;
1034 u32 pdev_get_rx_filter_cmdid;
1035 u32 pdev_extended_nss_cfg_cmdid;
1036 u32 vdev_set_scan_nac_rssi_cmdid;
1037 u32 prog_gpio_band_select_cmdid;
1038 u32 config_smart_logging_cmdid;
1039 u32 debug_fatal_condition_cmdid;
1040 u32 get_tsf_timer_cmdid;
1041 u32 pdev_get_tpc_table_cmdid;
1042 u32 vdev_sifs_trigger_time_cmdid;
1043 u32 pdev_wds_entry_list_cmdid;
1044 u32 tdls_set_offchan_mode_cmdid;
1045 u32 radar_found_cmdid;
1046 u32 set_bb_timing_cmdid;
1047 u32 per_peer_per_tid_config_cmdid;
1048};
1049
1050
1051
1052
1053enum wmi_cmd_group {
1054
1055 WMI_GRP_START = 0x3,
1056 WMI_GRP_SCAN = WMI_GRP_START,
1057 WMI_GRP_PDEV,
1058 WMI_GRP_VDEV,
1059 WMI_GRP_PEER,
1060 WMI_GRP_MGMT,
1061 WMI_GRP_BA_NEG,
1062 WMI_GRP_STA_PS,
1063 WMI_GRP_DFS,
1064 WMI_GRP_ROAM,
1065 WMI_GRP_OFL_SCAN,
1066 WMI_GRP_P2P,
1067 WMI_GRP_AP_PS,
1068 WMI_GRP_RATE_CTRL,
1069 WMI_GRP_PROFILE,
1070 WMI_GRP_SUSPEND,
1071 WMI_GRP_BCN_FILTER,
1072 WMI_GRP_WOW,
1073 WMI_GRP_RTT,
1074 WMI_GRP_SPECTRAL,
1075 WMI_GRP_STATS,
1076 WMI_GRP_ARP_NS_OFL,
1077 WMI_GRP_NLO_OFL,
1078 WMI_GRP_GTK_OFL,
1079 WMI_GRP_CSA_OFL,
1080 WMI_GRP_CHATTER,
1081 WMI_GRP_TID_ADDBA,
1082 WMI_GRP_MISC,
1083 WMI_GRP_GPIO,
1084};
1085
1086#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
1087#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
1088
1089#define WMI_CMD_UNSUPPORTED 0
1090
1091
1092enum wmi_cmd_id {
1093 WMI_INIT_CMDID = 0x1,
1094
1095
1096 WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
1097 WMI_STOP_SCAN_CMDID,
1098 WMI_SCAN_CHAN_LIST_CMDID,
1099 WMI_SCAN_SCH_PRIO_TBL_CMDID,
1100
1101
1102 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
1103 WMI_PDEV_SET_CHANNEL_CMDID,
1104 WMI_PDEV_SET_PARAM_CMDID,
1105 WMI_PDEV_PKTLOG_ENABLE_CMDID,
1106 WMI_PDEV_PKTLOG_DISABLE_CMDID,
1107 WMI_PDEV_SET_WMM_PARAMS_CMDID,
1108 WMI_PDEV_SET_HT_CAP_IE_CMDID,
1109 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
1110 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
1111 WMI_PDEV_SET_QUIET_MODE_CMDID,
1112 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1113 WMI_PDEV_GET_TPC_CONFIG_CMDID,
1114 WMI_PDEV_SET_BASE_MACADDR_CMDID,
1115
1116
1117 WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
1118 WMI_VDEV_DELETE_CMDID,
1119 WMI_VDEV_START_REQUEST_CMDID,
1120 WMI_VDEV_RESTART_REQUEST_CMDID,
1121 WMI_VDEV_UP_CMDID,
1122 WMI_VDEV_STOP_CMDID,
1123 WMI_VDEV_DOWN_CMDID,
1124 WMI_VDEV_SET_PARAM_CMDID,
1125 WMI_VDEV_INSTALL_KEY_CMDID,
1126
1127
1128 WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
1129 WMI_PEER_DELETE_CMDID,
1130 WMI_PEER_FLUSH_TIDS_CMDID,
1131 WMI_PEER_SET_PARAM_CMDID,
1132 WMI_PEER_ASSOC_CMDID,
1133 WMI_PEER_ADD_WDS_ENTRY_CMDID,
1134 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
1135 WMI_PEER_MCAST_GROUP_CMDID,
1136
1137
1138 WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
1139 WMI_PDEV_SEND_BCN_CMDID,
1140 WMI_BCN_TMPL_CMDID,
1141 WMI_BCN_FILTER_RX_CMDID,
1142 WMI_PRB_REQ_FILTER_RX_CMDID,
1143 WMI_MGMT_TX_CMDID,
1144 WMI_PRB_TMPL_CMDID,
1145
1146
1147 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
1148 WMI_ADDBA_SEND_CMDID,
1149 WMI_ADDBA_STATUS_CMDID,
1150 WMI_DELBA_SEND_CMDID,
1151 WMI_ADDBA_SET_RESP_CMDID,
1152 WMI_SEND_SINGLEAMSDU_CMDID,
1153
1154
1155 WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
1156 WMI_STA_POWERSAVE_PARAM_CMDID,
1157 WMI_STA_MIMO_PS_MODE_CMDID,
1158
1159
1160 WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
1161 WMI_PDEV_DFS_DISABLE_CMDID,
1162
1163
1164 WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
1165 WMI_ROAM_SCAN_RSSI_THRESHOLD,
1166 WMI_ROAM_SCAN_PERIOD,
1167 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1168 WMI_ROAM_AP_PROFILE,
1169
1170
1171 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
1172 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
1173 WMI_OFL_SCAN_PERIOD,
1174
1175
1176 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
1177 WMI_P2P_DEV_SET_DISCOVERABILITY,
1178 WMI_P2P_GO_SET_BEACON_IE,
1179 WMI_P2P_GO_SET_PROBE_RESP_IE,
1180 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
1181
1182
1183 WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
1184 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
1185
1186
1187 WMI_PEER_RATE_RETRY_SCHED_CMDID =
1188 WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
1189
1190
1191 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
1192 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1193 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1194 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1195 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1196
1197
1198 WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
1199 WMI_PDEV_RESUME_CMDID,
1200
1201
1202 WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
1203 WMI_RMV_BCN_FILTER_CMDID,
1204
1205
1206 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
1207 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
1208 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1209 WMI_WOW_ENABLE_CMDID,
1210 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1211
1212
1213 WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
1214 WMI_RTT_TSF_CMDID,
1215
1216
1217 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
1218 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1219
1220
1221 WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
1222
1223
1224 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
1225
1226
1227 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
1228
1229
1230 WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
1231
1232
1233 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
1234 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
1235
1236
1237 WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
1238
1239
1240 WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
1241 WMI_PEER_TID_DELBA_CMDID,
1242
1243
1244 WMI_STA_DTIM_PS_METHOD_CMDID,
1245
1246 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
1247
1248
1249
1250
1251 WMI_STA_KEEPALIVE_CMD,
1252
1253
1254 WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
1255 WMI_PDEV_UTF_CMDID,
1256 WMI_DBGLOG_CFG_CMDID,
1257 WMI_PDEV_QVIT_CMDID,
1258 WMI_PDEV_FTM_INTG_CMDID,
1259 WMI_VDEV_SET_KEEPALIVE_CMDID,
1260 WMI_VDEV_GET_KEEPALIVE_CMDID,
1261 WMI_FORCE_FW_HANG_CMDID,
1262
1263
1264 WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
1265 WMI_GPIO_OUTPUT_CMDID,
1266};
1267
1268enum wmi_event_id {
1269 WMI_SERVICE_READY_EVENTID = 0x1,
1270 WMI_READY_EVENTID,
1271 WMI_SERVICE_AVAILABLE_EVENTID,
1272
1273
1274 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
1275
1276
1277 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
1278 WMI_CHAN_INFO_EVENTID,
1279 WMI_PHYERR_EVENTID,
1280
1281
1282 WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
1283 WMI_VDEV_STOPPED_EVENTID,
1284 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
1285
1286
1287 WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
1288
1289
1290 WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
1291 WMI_HOST_SWBA_EVENTID,
1292 WMI_TBTTOFFSET_UPDATE_EVENTID,
1293
1294
1295 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
1296 WMI_TX_ADDBA_COMPLETE_EVENTID,
1297
1298
1299 WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
1300 WMI_PROFILE_MATCH,
1301
1302
1303 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
1304
1305
1306 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
1307 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
1308 WMI_RTT_ERROR_REPORT_EVENTID,
1309
1310
1311 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
1312 WMI_GTK_REKEY_FAIL_EVENTID,
1313
1314
1315 WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
1316
1317
1318 WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
1319 WMI_PDEV_UTF_EVENTID,
1320 WMI_DEBUG_MESG_EVENTID,
1321 WMI_UPDATE_STATS_EVENTID,
1322 WMI_DEBUG_PRINT_EVENTID,
1323 WMI_DCS_INTERFERENCE_EVENTID,
1324 WMI_PDEV_QVIT_EVENTID,
1325 WMI_WLAN_PROFILE_DATA_EVENTID,
1326 WMI_PDEV_FTM_INTG_EVENTID,
1327 WMI_WLAN_FREQ_AVOID_EVENTID,
1328 WMI_VDEV_GET_KEEPALIVE_EVENTID,
1329
1330
1331 WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
1332};
1333
1334
1335enum wmi_10x_cmd_id {
1336 WMI_10X_START_CMDID = 0x9000,
1337 WMI_10X_END_CMDID = 0x9FFF,
1338
1339
1340 WMI_10X_INIT_CMDID,
1341
1342
1343
1344 WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
1345 WMI_10X_STOP_SCAN_CMDID,
1346 WMI_10X_SCAN_CHAN_LIST_CMDID,
1347 WMI_10X_ECHO_CMDID,
1348
1349
1350 WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
1351 WMI_10X_PDEV_SET_CHANNEL_CMDID,
1352 WMI_10X_PDEV_SET_PARAM_CMDID,
1353 WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
1354 WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
1355 WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
1356 WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
1357 WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
1358 WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
1359 WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
1360 WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
1361 WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1362 WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
1363
1364
1365 WMI_10X_VDEV_CREATE_CMDID,
1366 WMI_10X_VDEV_DELETE_CMDID,
1367 WMI_10X_VDEV_START_REQUEST_CMDID,
1368 WMI_10X_VDEV_RESTART_REQUEST_CMDID,
1369 WMI_10X_VDEV_UP_CMDID,
1370 WMI_10X_VDEV_STOP_CMDID,
1371 WMI_10X_VDEV_DOWN_CMDID,
1372 WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
1373 WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
1374 WMI_10X_VDEV_SET_PARAM_CMDID,
1375 WMI_10X_VDEV_INSTALL_KEY_CMDID,
1376
1377
1378 WMI_10X_PEER_CREATE_CMDID,
1379 WMI_10X_PEER_DELETE_CMDID,
1380 WMI_10X_PEER_FLUSH_TIDS_CMDID,
1381 WMI_10X_PEER_SET_PARAM_CMDID,
1382 WMI_10X_PEER_ASSOC_CMDID,
1383 WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
1384 WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
1385 WMI_10X_PEER_MCAST_GROUP_CMDID,
1386
1387
1388
1389 WMI_10X_BCN_TX_CMDID,
1390 WMI_10X_BCN_PRB_TMPL_CMDID,
1391 WMI_10X_BCN_FILTER_RX_CMDID,
1392 WMI_10X_PRB_REQ_FILTER_RX_CMDID,
1393 WMI_10X_MGMT_TX_CMDID,
1394
1395
1396 WMI_10X_ADDBA_CLEAR_RESP_CMDID,
1397 WMI_10X_ADDBA_SEND_CMDID,
1398 WMI_10X_ADDBA_STATUS_CMDID,
1399 WMI_10X_DELBA_SEND_CMDID,
1400 WMI_10X_ADDBA_SET_RESP_CMDID,
1401 WMI_10X_SEND_SINGLEAMSDU_CMDID,
1402
1403
1404 WMI_10X_STA_POWERSAVE_MODE_CMDID,
1405 WMI_10X_STA_POWERSAVE_PARAM_CMDID,
1406 WMI_10X_STA_MIMO_PS_MODE_CMDID,
1407
1408
1409 WMI_10X_DBGLOG_CFG_CMDID,
1410
1411
1412 WMI_10X_PDEV_DFS_ENABLE_CMDID,
1413 WMI_10X_PDEV_DFS_DISABLE_CMDID,
1414
1415
1416 WMI_10X_PDEV_QVIT_CMDID,
1417
1418
1419 WMI_10X_ROAM_SCAN_MODE,
1420 WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
1421 WMI_10X_ROAM_SCAN_PERIOD,
1422 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1423 WMI_10X_ROAM_AP_PROFILE,
1424 WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
1425 WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
1426 WMI_10X_OFL_SCAN_PERIOD,
1427
1428
1429 WMI_10X_P2P_DEV_SET_DEVICE_INFO,
1430 WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
1431 WMI_10X_P2P_GO_SET_BEACON_IE,
1432 WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
1433
1434
1435 WMI_10X_AP_PS_PEER_PARAM_CMDID,
1436 WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
1437
1438
1439 WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
1440
1441
1442 WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
1443 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1444 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1445 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1446 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1447
1448
1449 WMI_10X_PDEV_SUSPEND_CMDID,
1450 WMI_10X_PDEV_RESUME_CMDID,
1451
1452
1453 WMI_10X_ADD_BCN_FILTER_CMDID,
1454 WMI_10X_RMV_BCN_FILTER_CMDID,
1455
1456
1457 WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
1458 WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
1459 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1460 WMI_10X_WOW_ENABLE_CMDID,
1461 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1462
1463
1464 WMI_10X_RTT_MEASREQ_CMDID,
1465 WMI_10X_RTT_TSF_CMDID,
1466
1467
1468 WMI_10X_PDEV_SEND_BCN_CMDID,
1469
1470
1471 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1472 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1473 WMI_10X_REQUEST_STATS_CMDID,
1474
1475
1476 WMI_10X_GPIO_CONFIG_CMDID,
1477 WMI_10X_GPIO_OUTPUT_CMDID,
1478
1479 WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
1480};
1481
1482enum wmi_10x_event_id {
1483 WMI_10X_SERVICE_READY_EVENTID = 0x8000,
1484 WMI_10X_READY_EVENTID,
1485 WMI_10X_START_EVENTID = 0x9000,
1486 WMI_10X_END_EVENTID = 0x9FFF,
1487
1488
1489 WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
1490 WMI_10X_ECHO_EVENTID,
1491 WMI_10X_DEBUG_MESG_EVENTID,
1492 WMI_10X_UPDATE_STATS_EVENTID,
1493
1494
1495 WMI_10X_INST_RSSI_STATS_EVENTID,
1496
1497
1498 WMI_10X_VDEV_START_RESP_EVENTID,
1499 WMI_10X_VDEV_STANDBY_REQ_EVENTID,
1500 WMI_10X_VDEV_RESUME_REQ_EVENTID,
1501 WMI_10X_VDEV_STOPPED_EVENTID,
1502
1503
1504 WMI_10X_PEER_STA_KICKOUT_EVENTID,
1505
1506
1507 WMI_10X_HOST_SWBA_EVENTID,
1508 WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
1509 WMI_10X_MGMT_RX_EVENTID,
1510
1511
1512 WMI_10X_CHAN_INFO_EVENTID,
1513
1514
1515 WMI_10X_PHYERR_EVENTID,
1516
1517
1518 WMI_10X_ROAM_EVENTID,
1519
1520
1521 WMI_10X_PROFILE_MATCH,
1522
1523
1524 WMI_10X_DEBUG_PRINT_EVENTID,
1525
1526 WMI_10X_PDEV_QVIT_EVENTID,
1527
1528 WMI_10X_WLAN_PROFILE_DATA_EVENTID,
1529
1530
1531 WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
1532 WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
1533 WMI_10X_RTT_ERROR_REPORT_EVENTID,
1534
1535 WMI_10X_WOW_WAKEUP_HOST_EVENTID,
1536 WMI_10X_DCS_INTERFERENCE_EVENTID,
1537
1538
1539 WMI_10X_PDEV_TPC_CONFIG_EVENTID,
1540
1541 WMI_10X_GPIO_INPUT_EVENTID,
1542 WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID - 1,
1543};
1544
1545enum wmi_10_2_cmd_id {
1546 WMI_10_2_START_CMDID = 0x9000,
1547 WMI_10_2_END_CMDID = 0x9FFF,
1548 WMI_10_2_INIT_CMDID,
1549 WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
1550 WMI_10_2_STOP_SCAN_CMDID,
1551 WMI_10_2_SCAN_CHAN_LIST_CMDID,
1552 WMI_10_2_ECHO_CMDID,
1553 WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1554 WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1555 WMI_10_2_PDEV_SET_PARAM_CMDID,
1556 WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1557 WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1558 WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1559 WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1560 WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1561 WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1562 WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1563 WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1564 WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1565 WMI_10_2_VDEV_CREATE_CMDID,
1566 WMI_10_2_VDEV_DELETE_CMDID,
1567 WMI_10_2_VDEV_START_REQUEST_CMDID,
1568 WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1569 WMI_10_2_VDEV_UP_CMDID,
1570 WMI_10_2_VDEV_STOP_CMDID,
1571 WMI_10_2_VDEV_DOWN_CMDID,
1572 WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
1573 WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
1574 WMI_10_2_VDEV_SET_PARAM_CMDID,
1575 WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1576 WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
1577 WMI_10_2_PEER_CREATE_CMDID,
1578 WMI_10_2_PEER_DELETE_CMDID,
1579 WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1580 WMI_10_2_PEER_SET_PARAM_CMDID,
1581 WMI_10_2_PEER_ASSOC_CMDID,
1582 WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1583 WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
1584 WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1585 WMI_10_2_PEER_MCAST_GROUP_CMDID,
1586 WMI_10_2_BCN_TX_CMDID,
1587 WMI_10_2_BCN_PRB_TMPL_CMDID,
1588 WMI_10_2_BCN_FILTER_RX_CMDID,
1589 WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1590 WMI_10_2_MGMT_TX_CMDID,
1591 WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1592 WMI_10_2_ADDBA_SEND_CMDID,
1593 WMI_10_2_ADDBA_STATUS_CMDID,
1594 WMI_10_2_DELBA_SEND_CMDID,
1595 WMI_10_2_ADDBA_SET_RESP_CMDID,
1596 WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1597 WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1598 WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1599 WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1600 WMI_10_2_DBGLOG_CFG_CMDID,
1601 WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1602 WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1603 WMI_10_2_PDEV_QVIT_CMDID,
1604 WMI_10_2_ROAM_SCAN_MODE,
1605 WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1606 WMI_10_2_ROAM_SCAN_PERIOD,
1607 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1608 WMI_10_2_ROAM_AP_PROFILE,
1609 WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1610 WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1611 WMI_10_2_OFL_SCAN_PERIOD,
1612 WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1613 WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1614 WMI_10_2_P2P_GO_SET_BEACON_IE,
1615 WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1616 WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1617 WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
1618 WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1619 WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1620 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1621 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1622 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1623 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1624 WMI_10_2_PDEV_SUSPEND_CMDID,
1625 WMI_10_2_PDEV_RESUME_CMDID,
1626 WMI_10_2_ADD_BCN_FILTER_CMDID,
1627 WMI_10_2_RMV_BCN_FILTER_CMDID,
1628 WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1629 WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1630 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1631 WMI_10_2_WOW_ENABLE_CMDID,
1632 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1633 WMI_10_2_RTT_MEASREQ_CMDID,
1634 WMI_10_2_RTT_TSF_CMDID,
1635 WMI_10_2_RTT_KEEPALIVE_CMDID,
1636 WMI_10_2_PDEV_SEND_BCN_CMDID,
1637 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1638 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1639 WMI_10_2_REQUEST_STATS_CMDID,
1640 WMI_10_2_GPIO_CONFIG_CMDID,
1641 WMI_10_2_GPIO_OUTPUT_CMDID,
1642 WMI_10_2_VDEV_RATEMASK_CMDID,
1643 WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
1644 WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1645 WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1646 WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1647 WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1648 WMI_10_2_FORCE_FW_HANG_CMDID,
1649 WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1650 WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
1651 WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1652 WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
1653 WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1654 WMI_10_2_PDEV_GET_INFO,
1655 WMI_10_2_VDEV_GET_INFO,
1656 WMI_10_2_VDEV_ATF_REQUEST_CMDID,
1657 WMI_10_2_PEER_ATF_REQUEST_CMDID,
1658 WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
1659 WMI_10_2_MU_CAL_START_CMDID,
1660 WMI_10_2_SET_LTEU_CONFIG_CMDID,
1661 WMI_10_2_SET_CCA_PARAMS,
1662 WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1663 WMI_10_2_FWTEST_CMDID,
1664 WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID,
1665 WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
1666};
1667
1668enum wmi_10_2_event_id {
1669 WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
1670 WMI_10_2_READY_EVENTID,
1671 WMI_10_2_DEBUG_MESG_EVENTID,
1672 WMI_10_2_START_EVENTID = 0x9000,
1673 WMI_10_2_END_EVENTID = 0x9FFF,
1674 WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
1675 WMI_10_2_ECHO_EVENTID,
1676 WMI_10_2_UPDATE_STATS_EVENTID,
1677 WMI_10_2_INST_RSSI_STATS_EVENTID,
1678 WMI_10_2_VDEV_START_RESP_EVENTID,
1679 WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
1680 WMI_10_2_VDEV_RESUME_REQ_EVENTID,
1681 WMI_10_2_VDEV_STOPPED_EVENTID,
1682 WMI_10_2_PEER_STA_KICKOUT_EVENTID,
1683 WMI_10_2_HOST_SWBA_EVENTID,
1684 WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
1685 WMI_10_2_MGMT_RX_EVENTID,
1686 WMI_10_2_CHAN_INFO_EVENTID,
1687 WMI_10_2_PHYERR_EVENTID,
1688 WMI_10_2_ROAM_EVENTID,
1689 WMI_10_2_PROFILE_MATCH,
1690 WMI_10_2_DEBUG_PRINT_EVENTID,
1691 WMI_10_2_PDEV_QVIT_EVENTID,
1692 WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
1693 WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
1694 WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
1695 WMI_10_2_RTT_ERROR_REPORT_EVENTID,
1696 WMI_10_2_RTT_KEEPALIVE_EVENTID,
1697 WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
1698 WMI_10_2_DCS_INTERFERENCE_EVENTID,
1699 WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
1700 WMI_10_2_GPIO_INPUT_EVENTID,
1701 WMI_10_2_PEER_RATECODE_LIST_EVENTID,
1702 WMI_10_2_GENERIC_BUFFER_EVENTID,
1703 WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
1704 WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
1705 WMI_10_2_WDS_PEER_EVENTID,
1706 WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
1707 WMI_10_2_PDEV_TEMPERATURE_EVENTID,
1708 WMI_10_2_MU_REPORT_EVENTID,
1709 WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID,
1710 WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
1711};
1712
1713enum wmi_10_4_cmd_id {
1714 WMI_10_4_START_CMDID = 0x9000,
1715 WMI_10_4_END_CMDID = 0x9FFF,
1716 WMI_10_4_INIT_CMDID,
1717 WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID,
1718 WMI_10_4_STOP_SCAN_CMDID,
1719 WMI_10_4_SCAN_CHAN_LIST_CMDID,
1720 WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
1721 WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
1722 WMI_10_4_ECHO_CMDID,
1723 WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
1724 WMI_10_4_PDEV_SET_CHANNEL_CMDID,
1725 WMI_10_4_PDEV_SET_PARAM_CMDID,
1726 WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
1727 WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
1728 WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
1729 WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
1730 WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
1731 WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
1732 WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
1733 WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
1734 WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1735 WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
1736 WMI_10_4_VDEV_CREATE_CMDID,
1737 WMI_10_4_VDEV_DELETE_CMDID,
1738 WMI_10_4_VDEV_START_REQUEST_CMDID,
1739 WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
1740 WMI_10_4_VDEV_UP_CMDID,
1741 WMI_10_4_VDEV_STOP_CMDID,
1742 WMI_10_4_VDEV_DOWN_CMDID,
1743 WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
1744 WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
1745 WMI_10_4_VDEV_SET_PARAM_CMDID,
1746 WMI_10_4_VDEV_INSTALL_KEY_CMDID,
1747 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
1748 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
1749 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
1750 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
1751 WMI_10_4_PEER_CREATE_CMDID,
1752 WMI_10_4_PEER_DELETE_CMDID,
1753 WMI_10_4_PEER_FLUSH_TIDS_CMDID,
1754 WMI_10_4_PEER_SET_PARAM_CMDID,
1755 WMI_10_4_PEER_ASSOC_CMDID,
1756 WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
1757 WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
1758 WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
1759 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
1760 WMI_10_4_PEER_MCAST_GROUP_CMDID,
1761 WMI_10_4_BCN_TX_CMDID,
1762 WMI_10_4_PDEV_SEND_BCN_CMDID,
1763 WMI_10_4_BCN_PRB_TMPL_CMDID,
1764 WMI_10_4_BCN_FILTER_RX_CMDID,
1765 WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
1766 WMI_10_4_MGMT_TX_CMDID,
1767 WMI_10_4_PRB_TMPL_CMDID,
1768 WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
1769 WMI_10_4_ADDBA_SEND_CMDID,
1770 WMI_10_4_ADDBA_STATUS_CMDID,
1771 WMI_10_4_DELBA_SEND_CMDID,
1772 WMI_10_4_ADDBA_SET_RESP_CMDID,
1773 WMI_10_4_SEND_SINGLEAMSDU_CMDID,
1774 WMI_10_4_STA_POWERSAVE_MODE_CMDID,
1775 WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
1776 WMI_10_4_STA_MIMO_PS_MODE_CMDID,
1777 WMI_10_4_DBGLOG_CFG_CMDID,
1778 WMI_10_4_PDEV_DFS_ENABLE_CMDID,
1779 WMI_10_4_PDEV_DFS_DISABLE_CMDID,
1780 WMI_10_4_PDEV_QVIT_CMDID,
1781 WMI_10_4_ROAM_SCAN_MODE,
1782 WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
1783 WMI_10_4_ROAM_SCAN_PERIOD,
1784 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1785 WMI_10_4_ROAM_AP_PROFILE,
1786 WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
1787 WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
1788 WMI_10_4_OFL_SCAN_PERIOD,
1789 WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
1790 WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
1791 WMI_10_4_P2P_GO_SET_BEACON_IE,
1792 WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
1793 WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
1794 WMI_10_4_AP_PS_PEER_PARAM_CMDID,
1795 WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
1796 WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
1797 WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
1798 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1799 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1800 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1801 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1802 WMI_10_4_PDEV_SUSPEND_CMDID,
1803 WMI_10_4_PDEV_RESUME_CMDID,
1804 WMI_10_4_ADD_BCN_FILTER_CMDID,
1805 WMI_10_4_RMV_BCN_FILTER_CMDID,
1806 WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
1807 WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
1808 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1809 WMI_10_4_WOW_ENABLE_CMDID,
1810 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1811 WMI_10_4_RTT_MEASREQ_CMDID,
1812 WMI_10_4_RTT_TSF_CMDID,
1813 WMI_10_4_RTT_KEEPALIVE_CMDID,
1814 WMI_10_4_OEM_REQ_CMDID,
1815 WMI_10_4_NAN_CMDID,
1816 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1817 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1818 WMI_10_4_REQUEST_STATS_CMDID,
1819 WMI_10_4_GPIO_CONFIG_CMDID,
1820 WMI_10_4_GPIO_OUTPUT_CMDID,
1821 WMI_10_4_VDEV_RATEMASK_CMDID,
1822 WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
1823 WMI_10_4_GTK_OFFLOAD_CMDID,
1824 WMI_10_4_QBOOST_CFG_CMDID,
1825 WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
1826 WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
1827 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1828 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1829 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1830 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1831 WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
1832 WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
1833 WMI_10_4_FORCE_FW_HANG_CMDID,
1834 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1835 WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
1836 WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1837 WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
1838 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1839 WMI_10_4_PDEV_FIPS_CMDID,
1840 WMI_10_4_TT_SET_CONF_CMDID,
1841 WMI_10_4_FWTEST_CMDID,
1842 WMI_10_4_VDEV_ATF_REQUEST_CMDID,
1843 WMI_10_4_PEER_ATF_REQUEST_CMDID,
1844 WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
1845 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
1846 WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
1847 WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
1848 WMI_10_4_PDEV_GET_TPC_CMDID,
1849 WMI_10_4_PDEV_GET_AST_INFO_CMDID,
1850 WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
1851 WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
1852 WMI_10_4_PDEV_GET_INFO_CMDID,
1853 WMI_10_4_VDEV_GET_INFO_CMDID,
1854 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
1855 WMI_10_4_MU_CAL_START_CMDID,
1856 WMI_10_4_SET_CCA_PARAMS_CMDID,
1857 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1858 WMI_10_4_EXT_RESOURCE_CFG_CMDID,
1859 WMI_10_4_VDEV_SET_IE_CMDID,
1860 WMI_10_4_SET_LTEU_CONFIG_CMDID,
1861 WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
1862 WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
1863 WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
1864 WMI_10_4_PEER_BWF_REQUEST_CMDID,
1865 WMI_10_4_BTCOEX_CFG_CMDID,
1866 WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
1867 WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
1868 WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
1869 WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
1870 WMI_10_4_COEX_VERSION_CFG_CMID,
1871 WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
1872 WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
1873 WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
1874 WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
1875 WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
1876 WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
1877 WMI_10_4_GET_TSF_TIMER_CMDID,
1878 WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
1879 WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
1880 WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
1881 WMI_10_4_TDLS_SET_STATE_CMDID,
1882 WMI_10_4_TDLS_PEER_UPDATE_CMDID,
1883 WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
1884 WMI_10_4_PDEV_SEND_FD_CMDID,
1885 WMI_10_4_ENABLE_FILS_CMDID,
1886 WMI_10_4_PDEV_SET_BRIDGE_MACADDR_CMDID,
1887 WMI_10_4_ATF_GROUP_WMM_AC_CONFIG_REQUEST_CMDID,
1888 WMI_10_4_RADAR_FOUND_CMDID,
1889 WMI_10_4_PEER_CFR_CAPTURE_CMDID,
1890 WMI_10_4_PER_PEER_PER_TID_CONFIG_CMDID,
1891 WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1,
1892};
1893
1894enum wmi_10_4_event_id {
1895 WMI_10_4_SERVICE_READY_EVENTID = 0x8000,
1896 WMI_10_4_READY_EVENTID,
1897 WMI_10_4_DEBUG_MESG_EVENTID,
1898 WMI_10_4_START_EVENTID = 0x9000,
1899 WMI_10_4_END_EVENTID = 0x9FFF,
1900 WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID,
1901 WMI_10_4_ECHO_EVENTID,
1902 WMI_10_4_UPDATE_STATS_EVENTID,
1903 WMI_10_4_INST_RSSI_STATS_EVENTID,
1904 WMI_10_4_VDEV_START_RESP_EVENTID,
1905 WMI_10_4_VDEV_STANDBY_REQ_EVENTID,
1906 WMI_10_4_VDEV_RESUME_REQ_EVENTID,
1907 WMI_10_4_VDEV_STOPPED_EVENTID,
1908 WMI_10_4_PEER_STA_KICKOUT_EVENTID,
1909 WMI_10_4_HOST_SWBA_EVENTID,
1910 WMI_10_4_TBTTOFFSET_UPDATE_EVENTID,
1911 WMI_10_4_MGMT_RX_EVENTID,
1912 WMI_10_4_CHAN_INFO_EVENTID,
1913 WMI_10_4_PHYERR_EVENTID,
1914 WMI_10_4_ROAM_EVENTID,
1915 WMI_10_4_PROFILE_MATCH,
1916 WMI_10_4_DEBUG_PRINT_EVENTID,
1917 WMI_10_4_PDEV_QVIT_EVENTID,
1918 WMI_10_4_WLAN_PROFILE_DATA_EVENTID,
1919 WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID,
1920 WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID,
1921 WMI_10_4_RTT_ERROR_REPORT_EVENTID,
1922 WMI_10_4_RTT_KEEPALIVE_EVENTID,
1923 WMI_10_4_OEM_CAPABILITY_EVENTID,
1924 WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID,
1925 WMI_10_4_OEM_ERROR_REPORT_EVENTID,
1926 WMI_10_4_NAN_EVENTID,
1927 WMI_10_4_WOW_WAKEUP_HOST_EVENTID,
1928 WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID,
1929 WMI_10_4_GTK_REKEY_FAIL_EVENTID,
1930 WMI_10_4_DCS_INTERFERENCE_EVENTID,
1931 WMI_10_4_PDEV_TPC_CONFIG_EVENTID,
1932 WMI_10_4_CSA_HANDLING_EVENTID,
1933 WMI_10_4_GPIO_INPUT_EVENTID,
1934 WMI_10_4_PEER_RATECODE_LIST_EVENTID,
1935 WMI_10_4_GENERIC_BUFFER_EVENTID,
1936 WMI_10_4_MCAST_BUF_RELEASE_EVENTID,
1937 WMI_10_4_MCAST_LIST_AGEOUT_EVENTID,
1938 WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID,
1939 WMI_10_4_WDS_PEER_EVENTID,
1940 WMI_10_4_PEER_STA_PS_STATECHG_EVENTID,
1941 WMI_10_4_PDEV_FIPS_EVENTID,
1942 WMI_10_4_TT_STATS_EVENTID,
1943 WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID,
1944 WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID,
1945 WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID,
1946 WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID,
1947 WMI_10_4_PDEV_NFCAL_POWER_EVENTID,
1948 WMI_10_4_PDEV_TPC_EVENTID,
1949 WMI_10_4_PDEV_GET_AST_INFO_EVENTID,
1950 WMI_10_4_PDEV_TEMPERATURE_EVENTID,
1951 WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
1952 WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID,
1953 WMI_10_4_MU_REPORT_EVENTID,
1954 WMI_10_4_TX_DATA_TRAFFIC_CTRL_EVENTID,
1955 WMI_10_4_PEER_TX_MU_TXMIT_COUNT_EVENTID,
1956 WMI_10_4_PEER_GID_USERPOS_LIST_EVENTID,
1957 WMI_10_4_PDEV_CHECK_CAL_VERSION_EVENTID,
1958 WMI_10_4_ATF_PEER_STATS_EVENTID,
1959 WMI_10_4_PDEV_GET_RX_FILTER_EVENTID,
1960 WMI_10_4_NAC_RSSI_EVENTID,
1961 WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID,
1962 WMI_10_4_GET_TSF_TIMER_RESP_EVENTID,
1963 WMI_10_4_PDEV_TPC_TABLE_EVENTID,
1964 WMI_10_4_PDEV_WDS_ENTRY_LIST_EVENTID,
1965 WMI_10_4_TDLS_PEER_EVENTID,
1966 WMI_10_4_HOST_SWFDA_EVENTID,
1967 WMI_10_4_ESP_ESTIMATE_EVENTID,
1968 WMI_10_4_DFS_STATUS_CHECK_EVENTID,
1969 WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1,
1970};
1971
1972enum wmi_phy_mode {
1973 MODE_11A = 0,
1974 MODE_11G = 1,
1975 MODE_11B = 2,
1976 MODE_11GONLY = 3,
1977 MODE_11NA_HT20 = 4,
1978 MODE_11NG_HT20 = 5,
1979 MODE_11NA_HT40 = 6,
1980 MODE_11NG_HT40 = 7,
1981 MODE_11AC_VHT20 = 8,
1982 MODE_11AC_VHT40 = 9,
1983 MODE_11AC_VHT80 = 10,
1984
1985 MODE_11AC_VHT20_2G = 11,
1986 MODE_11AC_VHT40_2G = 12,
1987 MODE_11AC_VHT80_2G = 13,
1988 MODE_11AC_VHT80_80 = 14,
1989 MODE_11AC_VHT160 = 15,
1990 MODE_UNKNOWN = 16,
1991 MODE_MAX = 16
1992};
1993
1994static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
1995{
1996 switch (mode) {
1997 case MODE_11A:
1998 return "11a";
1999 case MODE_11G:
2000 return "11g";
2001 case MODE_11B:
2002 return "11b";
2003 case MODE_11GONLY:
2004 return "11gonly";
2005 case MODE_11NA_HT20:
2006 return "11na-ht20";
2007 case MODE_11NG_HT20:
2008 return "11ng-ht20";
2009 case MODE_11NA_HT40:
2010 return "11na-ht40";
2011 case MODE_11NG_HT40:
2012 return "11ng-ht40";
2013 case MODE_11AC_VHT20:
2014 return "11ac-vht20";
2015 case MODE_11AC_VHT40:
2016 return "11ac-vht40";
2017 case MODE_11AC_VHT80:
2018 return "11ac-vht80";
2019 case MODE_11AC_VHT160:
2020 return "11ac-vht160";
2021 case MODE_11AC_VHT80_80:
2022 return "11ac-vht80+80";
2023 case MODE_11AC_VHT20_2G:
2024 return "11ac-vht20-2g";
2025 case MODE_11AC_VHT40_2G:
2026 return "11ac-vht40-2g";
2027 case MODE_11AC_VHT80_2G:
2028 return "11ac-vht80-2g";
2029 case MODE_UNKNOWN:
2030
2031 break;
2032
2033
2034
2035
2036 }
2037
2038 return "<unknown>";
2039}
2040
2041#define WMI_CHAN_LIST_TAG 0x1
2042#define WMI_SSID_LIST_TAG 0x2
2043#define WMI_BSSID_LIST_TAG 0x3
2044#define WMI_IE_TAG 0x4
2045
2046struct wmi_channel {
2047 __le32 mhz;
2048 __le32 band_center_freq1;
2049 __le32 band_center_freq2;
2050 union {
2051 __le32 flags;
2052 struct {
2053 u8 mode;
2054 } __packed;
2055 } __packed;
2056 union {
2057 __le32 reginfo0;
2058 struct {
2059
2060 u8 min_power;
2061 u8 max_power;
2062 u8 reg_power;
2063 u8 reg_classid;
2064 } __packed;
2065 } __packed;
2066 union {
2067 __le32 reginfo1;
2068 struct {
2069 u8 antenna_max;
2070 u8 max_tx_power;
2071 } __packed;
2072 } __packed;
2073} __packed;
2074
2075struct wmi_channel_arg {
2076 u32 freq;
2077 u32 band_center_freq1;
2078 u32 band_center_freq2;
2079 bool passive;
2080 bool allow_ibss;
2081 bool allow_ht;
2082 bool allow_vht;
2083 bool ht40plus;
2084 bool chan_radar;
2085
2086 u32 min_power;
2087 u32 max_power;
2088 u32 max_reg_power;
2089 u32 max_antenna_gain;
2090 u32 reg_class_id;
2091 enum wmi_phy_mode mode;
2092};
2093
2094enum wmi_channel_change_cause {
2095 WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
2096 WMI_CHANNEL_CHANGE_CAUSE_CSA,
2097};
2098
2099#define WMI_CHAN_FLAG_HT40_PLUS (1 << 6)
2100#define WMI_CHAN_FLAG_PASSIVE (1 << 7)
2101#define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8)
2102#define WMI_CHAN_FLAG_AP_DISABLED (1 << 9)
2103#define WMI_CHAN_FLAG_DFS (1 << 10)
2104#define WMI_CHAN_FLAG_ALLOW_HT (1 << 11)
2105#define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12)
2106
2107
2108#define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
2109
2110#define WMI_CHAN_FLAG_DFS_CFREQ2 (1 << 15)
2111#define WMI_MAX_SPATIAL_STREAM 3
2112
2113
2114#define WMI_HT_CAP_ENABLED 0x0001
2115#define WMI_HT_CAP_HT20_SGI 0x0002
2116#define WMI_HT_CAP_DYNAMIC_SMPS 0x0004
2117#define WMI_HT_CAP_TX_STBC 0x0008
2118#define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3
2119#define WMI_HT_CAP_RX_STBC 0x0030
2120#define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4
2121#define WMI_HT_CAP_LDPC 0x0040
2122#define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080
2123#define WMI_HT_CAP_MPDU_DENSITY 0x0700
2124#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
2125#define WMI_HT_CAP_HT40_SGI 0x0800
2126#define WMI_HT_CAP_RX_LDPC 0x1000
2127#define WMI_HT_CAP_TX_LDPC 0x2000
2128
2129#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \
2130 WMI_HT_CAP_HT20_SGI | \
2131 WMI_HT_CAP_HT40_SGI | \
2132 WMI_HT_CAP_TX_STBC | \
2133 WMI_HT_CAP_RX_STBC | \
2134 WMI_HT_CAP_LDPC)
2135
2136
2137
2138
2139
2140
2141
2142
2143#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003
2144#define WMI_VHT_CAP_RX_LDPC 0x00000010
2145#define WMI_VHT_CAP_SGI_80MHZ 0x00000020
2146#define WMI_VHT_CAP_SGI_160MHZ 0x00000040
2147#define WMI_VHT_CAP_TX_STBC 0x00000080
2148#define WMI_VHT_CAP_RX_STBC_MASK 0x00000300
2149#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8
2150#define WMI_VHT_CAP_SU_BFER 0x00000800
2151#define WMI_VHT_CAP_SU_BFEE 0x00001000
2152#define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000
2153#define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13
2154#define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000
2155#define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16
2156#define WMI_VHT_CAP_MU_BFER 0x00080000
2157#define WMI_VHT_CAP_MU_BFEE 0x00100000
2158#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000
2159#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23
2160#define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000
2161#define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000
2162
2163
2164#define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000
2165#define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001
2166#define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002
2167
2168#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \
2169 WMI_VHT_CAP_RX_LDPC | \
2170 WMI_VHT_CAP_SGI_80MHZ | \
2171 WMI_VHT_CAP_TX_STBC | \
2172 WMI_VHT_CAP_RX_STBC_MASK | \
2173 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \
2174 WMI_VHT_CAP_RX_FIXED_ANT | \
2175 WMI_VHT_CAP_TX_FIXED_ANT)
2176
2177
2178
2179
2180
2181#define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1))
2182#define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000
2183#define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16
2184
2185enum {
2186 REGDMN_MODE_11A = 0x00001,
2187 REGDMN_MODE_TURBO = 0x00002,
2188 REGDMN_MODE_11B = 0x00004,
2189 REGDMN_MODE_PUREG = 0x00008,
2190 REGDMN_MODE_11G = 0x00008,
2191 REGDMN_MODE_108G = 0x00020,
2192 REGDMN_MODE_108A = 0x00040,
2193 REGDMN_MODE_XR = 0x00100,
2194 REGDMN_MODE_11A_HALF_RATE = 0x00200,
2195 REGDMN_MODE_11A_QUARTER_RATE = 0x00400,
2196 REGDMN_MODE_11NG_HT20 = 0x00800,
2197 REGDMN_MODE_11NA_HT20 = 0x01000,
2198 REGDMN_MODE_11NG_HT40PLUS = 0x02000,
2199 REGDMN_MODE_11NG_HT40MINUS = 0x04000,
2200 REGDMN_MODE_11NA_HT40PLUS = 0x08000,
2201 REGDMN_MODE_11NA_HT40MINUS = 0x10000,
2202 REGDMN_MODE_11AC_VHT20 = 0x20000,
2203 REGDMN_MODE_11AC_VHT40PLUS = 0x40000,
2204 REGDMN_MODE_11AC_VHT40MINUS = 0x80000,
2205 REGDMN_MODE_11AC_VHT80 = 0x100000,
2206 REGDMN_MODE_11AC_VHT160 = 0x200000,
2207 REGDMN_MODE_11AC_VHT80_80 = 0x400000,
2208 REGDMN_MODE_ALL = 0xffffffff
2209};
2210
2211#define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001
2212#define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002
2213#define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004
2214
2215
2216#define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
2217#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
2218#define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100
2219#define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
2220#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
2221#define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
2222
2223struct hal_reg_capabilities {
2224
2225 __le32 eeprom_rd;
2226
2227 __le32 eeprom_rd_ext;
2228
2229 __le32 regcap1;
2230
2231 __le32 regcap2;
2232
2233 __le32 wireless_modes;
2234 __le32 low_2ghz_chan;
2235 __le32 high_2ghz_chan;
2236 __le32 low_5ghz_chan;
2237 __le32 high_5ghz_chan;
2238} __packed;
2239
2240enum wlan_mode_capability {
2241 WHAL_WLAN_11A_CAPABILITY = 0x1,
2242 WHAL_WLAN_11G_CAPABILITY = 0x2,
2243 WHAL_WLAN_11AG_CAPABILITY = 0x3,
2244};
2245
2246
2247struct wlan_host_mem_req {
2248
2249 __le32 req_id;
2250
2251 __le32 unit_size;
2252
2253
2254
2255
2256 __le32 num_unit_info;
2257
2258
2259
2260
2261
2262
2263
2264 __le32 num_units;
2265} __packed;
2266
2267
2268
2269
2270
2271
2272struct wmi_service_ready_event {
2273 __le32 sw_version;
2274 __le32 sw_version_1;
2275 __le32 abi_version;
2276
2277 __le32 phy_capability;
2278
2279 __le32 max_frag_entry;
2280 __le32 wmi_service_bitmap[16];
2281 __le32 num_rf_chains;
2282
2283
2284
2285
2286 __le32 ht_cap_info;
2287 __le32 vht_cap_info;
2288 __le32 vht_supp_mcs;
2289 __le32 hw_min_tx_power;
2290 __le32 hw_max_tx_power;
2291 struct hal_reg_capabilities hal_reg_capabilities;
2292 __le32 sys_cap_info;
2293 __le32 min_pkt_size_enable;
2294
2295
2296
2297
2298 __le32 max_bcn_ie_size;
2299
2300
2301
2302
2303
2304
2305 __le32 num_mem_reqs;
2306 struct wlan_host_mem_req mem_reqs[];
2307} __packed;
2308
2309
2310struct wmi_10x_service_ready_event {
2311 __le32 sw_version;
2312 __le32 abi_version;
2313
2314
2315 __le32 phy_capability;
2316
2317
2318 __le32 max_frag_entry;
2319 __le32 wmi_service_bitmap[16];
2320 __le32 num_rf_chains;
2321
2322
2323
2324
2325
2326 __le32 ht_cap_info;
2327 __le32 vht_cap_info;
2328 __le32 vht_supp_mcs;
2329 __le32 hw_min_tx_power;
2330 __le32 hw_max_tx_power;
2331
2332 struct hal_reg_capabilities hal_reg_capabilities;
2333
2334 __le32 sys_cap_info;
2335 __le32 min_pkt_size_enable;
2336
2337
2338
2339
2340
2341
2342
2343 __le32 num_mem_reqs;
2344
2345 struct wlan_host_mem_req mem_reqs[];
2346} __packed;
2347
2348#define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
2349#define WMI_UNIFIED_READY_TIMEOUT_HZ (5 * HZ)
2350
2351struct wmi_ready_event {
2352 __le32 sw_version;
2353 __le32 abi_version;
2354 struct wmi_mac_addr mac_addr;
2355 __le32 status;
2356} __packed;
2357
2358struct wmi_resource_config {
2359
2360 __le32 num_vdevs;
2361
2362
2363 __le32 num_peers;
2364
2365
2366
2367
2368
2369
2370
2371
2372 __le32 num_offload_peers;
2373
2374
2375 __le32 num_offload_reorder_bufs;
2376
2377
2378 __le32 num_peer_keys;
2379
2380
2381 __le32 num_tids;
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393 __le32 ast_skid_limit;
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403 __le32 tx_chain_mask;
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415 __le32 rx_chain_mask;
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427 __le32 rx_timeout_pri_vi;
2428 __le32 rx_timeout_pri_vo;
2429 __le32 rx_timeout_pri_be;
2430 __le32 rx_timeout_pri_bk;
2431
2432
2433
2434
2435
2436
2437
2438
2439 __le32 rx_decap_mode;
2440
2441
2442 __le32 scan_max_pending_reqs;
2443
2444
2445 __le32 bmiss_offload_max_vdev;
2446
2447
2448 __le32 roam_offload_max_vdev;
2449
2450
2451 __le32 roam_offload_max_ap_profiles;
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465 __le32 num_mcast_groups;
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476 __le32 num_mcast_table_elems;
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496 __le32 mcast2ucast_mode;
2497
2498
2499
2500
2501
2502
2503
2504
2505 __le32 tx_dbg_log_size;
2506
2507
2508 __le32 num_wds_entries;
2509
2510
2511
2512
2513
2514 __le32 dma_burst_size;
2515
2516
2517
2518
2519
2520 __le32 mac_aggr_delim;
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531 __le32 rx_skip_defrag_timeout_dup_detection_check;
2532
2533
2534
2535
2536
2537
2538 __le32 vow_config;
2539
2540
2541 __le32 gtk_offload_max_vdev;
2542
2543
2544 __le32 num_msdu_desc;
2545
2546
2547
2548
2549
2550
2551
2552 __le32 max_frag_entries;
2553} __packed;
2554
2555struct wmi_resource_config_10x {
2556
2557 __le32 num_vdevs;
2558
2559
2560 __le32 num_peers;
2561
2562
2563 __le32 num_peer_keys;
2564
2565
2566 __le32 num_tids;
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578 __le32 ast_skid_limit;
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588 __le32 tx_chain_mask;
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600 __le32 rx_chain_mask;
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612 __le32 rx_timeout_pri_vi;
2613 __le32 rx_timeout_pri_vo;
2614 __le32 rx_timeout_pri_be;
2615 __le32 rx_timeout_pri_bk;
2616
2617
2618
2619
2620
2621
2622
2623
2624 __le32 rx_decap_mode;
2625
2626
2627 __le32 scan_max_pending_reqs;
2628
2629
2630 __le32 bmiss_offload_max_vdev;
2631
2632
2633 __le32 roam_offload_max_vdev;
2634
2635
2636 __le32 roam_offload_max_ap_profiles;
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650 __le32 num_mcast_groups;
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661 __le32 num_mcast_table_elems;
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681 __le32 mcast2ucast_mode;
2682
2683
2684
2685
2686
2687
2688
2689
2690 __le32 tx_dbg_log_size;
2691
2692
2693 __le32 num_wds_entries;
2694
2695
2696
2697
2698
2699 __le32 dma_burst_size;
2700
2701
2702
2703
2704
2705 __le32 mac_aggr_delim;
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716 __le32 rx_skip_defrag_timeout_dup_detection_check;
2717
2718
2719
2720
2721
2722
2723 __le32 vow_config;
2724
2725
2726 __le32 num_msdu_desc;
2727
2728
2729
2730
2731
2732
2733
2734 __le32 max_frag_entries;
2735} __packed;
2736
2737enum wmi_10_2_feature_mask {
2738 WMI_10_2_RX_BATCH_MODE = BIT(0),
2739 WMI_10_2_ATF_CONFIG = BIT(1),
2740 WMI_10_2_COEX_GPIO = BIT(3),
2741 WMI_10_2_BSS_CHAN_INFO = BIT(6),
2742 WMI_10_2_PEER_STATS = BIT(7),
2743};
2744
2745struct wmi_resource_config_10_2 {
2746 struct wmi_resource_config_10x common;
2747 __le32 max_peer_ext_stats;
2748 __le32 smart_ant_cap;
2749 __le32 bk_min_free;
2750 __le32 be_min_free;
2751 __le32 vi_min_free;
2752 __le32 vo_min_free;
2753 __le32 feature_mask;
2754} __packed;
2755
2756#define NUM_UNITS_IS_NUM_VDEVS BIT(0)
2757#define NUM_UNITS_IS_NUM_PEERS BIT(1)
2758#define NUM_UNITS_IS_NUM_ACTIVE_PEERS BIT(2)
2759
2760struct wmi_resource_config_10_4 {
2761
2762 __le32 num_vdevs;
2763
2764
2765 __le32 num_peers;
2766
2767
2768 __le32 num_active_peers;
2769
2770
2771
2772
2773
2774
2775
2776 __le32 num_offload_peers;
2777
2778
2779
2780
2781 __le32 num_offload_reorder_buffs;
2782
2783
2784 __le32 num_peer_keys;
2785
2786
2787 __le32 num_tids;
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797 __le32 ast_skid_limit;
2798
2799
2800
2801
2802
2803
2804
2805 __le32 tx_chain_mask;
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815 __le32 rx_chain_mask;
2816
2817
2818
2819
2820
2821
2822
2823
2824 __le32 rx_timeout_pri[4];
2825
2826
2827
2828
2829
2830
2831 __le32 rx_decap_mode;
2832
2833 __le32 scan_max_pending_req;
2834
2835 __le32 bmiss_offload_max_vdev;
2836
2837 __le32 roam_offload_max_vdev;
2838
2839 __le32 roam_offload_max_ap_profiles;
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850 __le32 num_mcast_groups;
2851
2852
2853
2854
2855
2856
2857
2858
2859 __le32 num_mcast_table_elems;
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876 __le32 mcast2ucast_mode;
2877
2878
2879
2880
2881
2882
2883 __le32 tx_dbg_log_size;
2884
2885
2886 __le32 num_wds_entries;
2887
2888
2889 __le32 dma_burst_size;
2890
2891
2892
2893
2894 __le32 mac_aggr_delim;
2895
2896
2897
2898
2899
2900
2901
2902
2903 __le32 rx_skip_defrag_timeout_dup_detection_check;
2904
2905
2906
2907
2908 __le32 vow_config;
2909
2910
2911 __le32 gtk_offload_max_vdev;
2912
2913
2914 __le32 num_msdu_desc;
2915
2916
2917
2918
2919
2920
2921 __le32 max_frag_entries;
2922
2923
2924
2925
2926
2927 __le32 max_peer_ext_stats;
2928
2929
2930
2931
2932
2933
2934 __le32 smart_ant_cap;
2935
2936
2937
2938
2939 __le32 bk_minfree;
2940 __le32 be_minfree;
2941 __le32 vi_minfree;
2942 __le32 vo_minfree;
2943
2944
2945
2946
2947
2948 __le32 rx_batchmode;
2949
2950
2951
2952
2953
2954 __le32 tt_support;
2955
2956
2957
2958
2959
2960 __le32 atf_config;
2961
2962
2963
2964
2965
2966 __le32 iphdr_pad_config;
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977 __le32 qwrap_config;
2978} __packed;
2979
2980enum wmi_coex_version {
2981 WMI_NO_COEX_VERSION_SUPPORT = 0,
2982
2983 WMI_COEX_VERSION_1 = 1,
2984
2985 WMI_COEX_VERSION_2 = 2,
2986
2987 WMI_COEX_VERSION_3 = 3,
2988
2989 WMI_COEX_VERSION_4 = 4,
2990};
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010enum wmi_10_4_feature_mask {
3011 WMI_10_4_LTEU_SUPPORT = BIT(0),
3012 WMI_10_4_COEX_GPIO_SUPPORT = BIT(1),
3013 WMI_10_4_AUX_RADIO_SPECTRAL_INTF = BIT(2),
3014 WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF = BIT(3),
3015 WMI_10_4_BSS_CHANNEL_INFO_64 = BIT(4),
3016 WMI_10_4_PEER_STATS = BIT(5),
3017 WMI_10_4_VDEV_STATS = BIT(6),
3018 WMI_10_4_TDLS = BIT(7),
3019 WMI_10_4_TDLS_OFFCHAN = BIT(8),
3020 WMI_10_4_TDLS_UAPSD_BUFFER_STA = BIT(9),
3021 WMI_10_4_TDLS_UAPSD_SLEEP_STA = BIT(10),
3022 WMI_10_4_TDLS_CONN_TRACKER_IN_HOST_MODE = BIT(11),
3023 WMI_10_4_TDLS_EXPLICIT_MODE_ONLY = BIT(12),
3024 WMI_10_4_TX_DATA_ACK_RSSI = BIT(16),
3025 WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT = BIT(17),
3026 WMI_10_4_REPORT_AIRTIME = BIT(18),
3027
3028};
3029
3030struct wmi_ext_resource_config_10_4_cmd {
3031
3032 __le32 host_platform_config;
3033
3034 __le32 fw_feature_bitmap;
3035
3036 __le32 wlan_gpio_priority;
3037
3038 __le32 coex_version;
3039
3040 __le32 coex_gpio_pin1;
3041 __le32 coex_gpio_pin2;
3042 __le32 coex_gpio_pin3;
3043
3044 __le32 num_tdls_vdevs;
3045
3046 __le32 num_tdls_conn_table_entries;
3047
3048 __le32 max_tdls_concurrent_sleep_sta;
3049
3050 __le32 max_tdls_concurrent_buffer_sta;
3051};
3052
3053
3054struct host_memory_chunk {
3055
3056 __le32 req_id;
3057
3058 __le32 ptr;
3059
3060 __le32 size;
3061} __packed;
3062
3063#define WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID 8
3064
3065struct wmi_host_mem_chunks {
3066 __le32 count;
3067
3068 struct host_memory_chunk items[1];
3069} __packed;
3070
3071struct wmi_init_cmd {
3072 struct wmi_resource_config resource_config;
3073 struct wmi_host_mem_chunks mem_chunks;
3074} __packed;
3075
3076
3077struct wmi_init_cmd_10x {
3078 struct wmi_resource_config_10x resource_config;
3079 struct wmi_host_mem_chunks mem_chunks;
3080} __packed;
3081
3082struct wmi_init_cmd_10_2 {
3083 struct wmi_resource_config_10_2 resource_config;
3084 struct wmi_host_mem_chunks mem_chunks;
3085} __packed;
3086
3087struct wmi_init_cmd_10_4 {
3088 struct wmi_resource_config_10_4 resource_config;
3089 struct wmi_host_mem_chunks mem_chunks;
3090} __packed;
3091
3092struct wmi_chan_list_entry {
3093 __le16 freq;
3094 u8 phy_mode;
3095 u8 reserved;
3096} __packed;
3097
3098
3099struct wmi_chan_list {
3100 __le32 tag;
3101 __le32 num_chan;
3102 struct wmi_chan_list_entry channel_list[];
3103} __packed;
3104
3105struct wmi_bssid_list {
3106 __le32 tag;
3107 __le32 num_bssid;
3108 struct wmi_mac_addr bssid_list[];
3109} __packed;
3110
3111struct wmi_ie_data {
3112 __le32 tag;
3113 __le32 ie_len;
3114 u8 ie_data[];
3115} __packed;
3116
3117struct wmi_ssid {
3118 __le32 ssid_len;
3119 u8 ssid[32];
3120} __packed;
3121
3122struct wmi_ssid_list {
3123 __le32 tag;
3124 __le32 num_ssids;
3125 struct wmi_ssid ssids[];
3126} __packed;
3127
3128
3129#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
3130
3131
3132
3133#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
3134
3135#define WLAN_SCAN_PARAMS_MAX_SSID 16
3136#define WLAN_SCAN_PARAMS_MAX_BSSID 4
3137#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
3138
3139
3140
3141
3142#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
3143
3144
3145enum wmi_scan_priority {
3146 WMI_SCAN_PRIORITY_VERY_LOW = 0,
3147 WMI_SCAN_PRIORITY_LOW,
3148 WMI_SCAN_PRIORITY_MEDIUM,
3149 WMI_SCAN_PRIORITY_HIGH,
3150 WMI_SCAN_PRIORITY_VERY_HIGH,
3151 WMI_SCAN_PRIORITY_COUNT
3152};
3153
3154struct wmi_start_scan_common {
3155
3156 __le32 scan_id;
3157
3158 __le32 scan_req_id;
3159
3160 __le32 vdev_id;
3161
3162 __le32 scan_priority;
3163
3164 __le32 notify_scan_events;
3165
3166 __le32 dwell_time_active;
3167
3168 __le32 dwell_time_passive;
3169
3170
3171
3172
3173 __le32 min_rest_time;
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187 __le32 max_rest_time;
3188
3189
3190
3191
3192
3193
3194
3195 __le32 repeat_probe_time;
3196
3197 __le32 probe_spacing_time;
3198
3199
3200
3201
3202 __le32 idle_time;
3203
3204 __le32 max_scan_time;
3205
3206
3207
3208
3209 __le32 probe_delay;
3210
3211 __le32 scan_ctrl_flags;
3212} __packed;
3213
3214struct wmi_start_scan_tlvs {
3215
3216
3217
3218 u8 tlvs[0];
3219} __packed;
3220
3221struct wmi_start_scan_cmd {
3222 struct wmi_start_scan_common common;
3223 __le32 burst_duration_ms;
3224 struct wmi_start_scan_tlvs tlvs;
3225} __packed;
3226
3227
3228struct wmi_10x_start_scan_cmd {
3229 struct wmi_start_scan_common common;
3230 struct wmi_start_scan_tlvs tlvs;
3231} __packed;
3232
3233struct wmi_ssid_arg {
3234 int len;
3235 const u8 *ssid;
3236};
3237
3238struct wmi_bssid_arg {
3239 const u8 *bssid;
3240};
3241
3242struct wmi_start_scan_arg {
3243 u32 scan_id;
3244 u32 scan_req_id;
3245 u32 vdev_id;
3246 u32 scan_priority;
3247 u32 notify_scan_events;
3248 u32 dwell_time_active;
3249 u32 dwell_time_passive;
3250 u32 min_rest_time;
3251 u32 max_rest_time;
3252 u32 repeat_probe_time;
3253 u32 probe_spacing_time;
3254 u32 idle_time;
3255 u32 max_scan_time;
3256 u32 probe_delay;
3257 u32 scan_ctrl_flags;
3258 u32 burst_duration_ms;
3259
3260 u32 ie_len;
3261 u32 n_channels;
3262 u32 n_ssids;
3263 u32 n_bssids;
3264
3265 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
3266 u16 channels[64];
3267 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
3268 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
3269 struct wmi_mac_addr mac_addr;
3270 struct wmi_mac_addr mac_mask;
3271};
3272
3273
3274
3275
3276#define WMI_SCAN_FLAG_PASSIVE 0x1
3277
3278#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
3279
3280#define WMI_SCAN_ADD_CCK_RATES 0x4
3281
3282#define WMI_SCAN_ADD_OFDM_RATES 0x8
3283
3284#define WMI_SCAN_CHAN_STAT_EVENT 0x10
3285
3286#define WMI_SCAN_FILTER_PROBE_REQ 0x20
3287
3288#define WMI_SCAN_BYPASS_DFS_CHN 0x40
3289
3290
3291
3292#define WMI_SCAN_CONTINUE_ON_ERROR 0x80
3293
3294
3295
3296
3297
3298#define WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ 0x1000
3299
3300
3301#define WMI_SCAN_CLASS_MASK 0xFF000000
3302
3303enum wmi_stop_scan_type {
3304 WMI_SCAN_STOP_ONE = 0x00000000,
3305 WMI_SCAN_STOP_VDEV_ALL = 0x01000000,
3306 WMI_SCAN_STOP_ALL = 0x04000000,
3307};
3308
3309struct wmi_stop_scan_cmd {
3310 __le32 scan_req_id;
3311 __le32 scan_id;
3312 __le32 req_type;
3313 __le32 vdev_id;
3314} __packed;
3315
3316struct wmi_stop_scan_arg {
3317 u32 req_id;
3318 enum wmi_stop_scan_type req_type;
3319 union {
3320 u32 scan_id;
3321 u32 vdev_id;
3322 } u;
3323};
3324
3325struct wmi_scan_chan_list_cmd {
3326 __le32 num_scan_chans;
3327 struct wmi_channel chan_info[];
3328} __packed;
3329
3330struct wmi_scan_chan_list_arg {
3331 u32 n_channels;
3332 struct wmi_channel_arg *channels;
3333};
3334
3335enum wmi_bss_filter {
3336 WMI_BSS_FILTER_NONE = 0,
3337 WMI_BSS_FILTER_ALL,
3338 WMI_BSS_FILTER_PROFILE,
3339 WMI_BSS_FILTER_ALL_BUT_PROFILE,
3340 WMI_BSS_FILTER_CURRENT_BSS,
3341 WMI_BSS_FILTER_ALL_BUT_BSS,
3342 WMI_BSS_FILTER_PROBED_SSID,
3343 WMI_BSS_FILTER_LAST_BSS,
3344};
3345
3346enum wmi_scan_event_type {
3347 WMI_SCAN_EVENT_STARTED = BIT(0),
3348 WMI_SCAN_EVENT_COMPLETED = BIT(1),
3349 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
3350 WMI_SCAN_EVENT_FOREIGN_CHANNEL = BIT(3),
3351 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
3352
3353 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
3354 WMI_SCAN_EVENT_START_FAILED = BIT(6),
3355 WMI_SCAN_EVENT_RESTARTED = BIT(7),
3356 WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8),
3357 WMI_SCAN_EVENT_MAX = BIT(15),
3358};
3359
3360enum wmi_scan_completion_reason {
3361 WMI_SCAN_REASON_COMPLETED,
3362 WMI_SCAN_REASON_CANCELLED,
3363 WMI_SCAN_REASON_PREEMPTED,
3364 WMI_SCAN_REASON_TIMEDOUT,
3365 WMI_SCAN_REASON_INTERNAL_FAILURE,
3366 WMI_SCAN_REASON_MAX,
3367};
3368
3369struct wmi_scan_event {
3370 __le32 event_type;
3371 __le32 reason;
3372 __le32 channel_freq;
3373 __le32 scan_req_id;
3374 __le32 scan_id;
3375 __le32 vdev_id;
3376} __packed;
3377
3378
3379
3380
3381
3382
3383
3384
3385
3386#define WMI_MGMT_RX_HDR_HEADROOM 52
3387
3388
3389
3390
3391
3392
3393
3394
3395struct wmi_mgmt_rx_hdr_v1 {
3396 __le32 channel;
3397 __le32 snr;
3398 __le32 rate;
3399 __le32 phy_mode;
3400 __le32 buf_len;
3401 __le32 status;
3402} __packed;
3403
3404struct wmi_mgmt_rx_hdr_v2 {
3405 struct wmi_mgmt_rx_hdr_v1 v1;
3406 __le32 rssi_ctl[4];
3407} __packed;
3408
3409struct wmi_mgmt_rx_event_v1 {
3410 struct wmi_mgmt_rx_hdr_v1 hdr;
3411 u8 buf[];
3412} __packed;
3413
3414struct wmi_mgmt_rx_event_v2 {
3415 struct wmi_mgmt_rx_hdr_v2 hdr;
3416 u8 buf[];
3417} __packed;
3418
3419struct wmi_10_4_mgmt_rx_hdr {
3420 __le32 channel;
3421 __le32 snr;
3422 u8 rssi_ctl[4];
3423 __le32 rate;
3424 __le32 phy_mode;
3425 __le32 buf_len;
3426 __le32 status;
3427} __packed;
3428
3429struct wmi_10_4_mgmt_rx_event {
3430 struct wmi_10_4_mgmt_rx_hdr hdr;
3431 u8 buf[];
3432} __packed;
3433
3434struct wmi_mgmt_rx_ext_info {
3435 __le64 rx_mac_timestamp;
3436} __packed __aligned(4);
3437
3438#define WMI_RX_STATUS_OK 0x00
3439#define WMI_RX_STATUS_ERR_CRC 0x01
3440#define WMI_RX_STATUS_ERR_DECRYPT 0x08
3441#define WMI_RX_STATUS_ERR_MIC 0x10
3442#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
3443
3444#define WMI_RX_STATUS_EXT_INFO 0x40
3445
3446#define PHY_ERROR_GEN_SPECTRAL_SCAN 0x26
3447#define PHY_ERROR_GEN_FALSE_RADAR_EXT 0x24
3448#define PHY_ERROR_GEN_RADAR 0x05
3449
3450#define PHY_ERROR_10_4_RADAR_MASK 0x4
3451#define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK 0x4000000
3452
3453enum phy_err_type {
3454 PHY_ERROR_UNKNOWN,
3455 PHY_ERROR_SPECTRAL_SCAN,
3456 PHY_ERROR_FALSE_RADAR_EXT,
3457 PHY_ERROR_RADAR
3458};
3459
3460struct wmi_phyerr {
3461 __le32 tsf_timestamp;
3462 __le16 freq1;
3463 __le16 freq2;
3464 u8 rssi_combined;
3465 u8 chan_width_mhz;
3466 u8 phy_err_code;
3467 u8 rsvd0;
3468 __le32 rssi_chains[4];
3469 __le16 nf_chains[4];
3470 __le32 buf_len;
3471 u8 buf[];
3472} __packed;
3473
3474struct wmi_phyerr_event {
3475 __le32 num_phyerrs;
3476 __le32 tsf_l32;
3477 __le32 tsf_u32;
3478 struct wmi_phyerr phyerrs[];
3479} __packed;
3480
3481struct wmi_10_4_phyerr_event {
3482 __le32 tsf_l32;
3483 __le32 tsf_u32;
3484 __le16 freq1;
3485 __le16 freq2;
3486 u8 rssi_combined;
3487 u8 chan_width_mhz;
3488 u8 phy_err_code;
3489 u8 rsvd0;
3490 __le32 rssi_chains[4];
3491 __le16 nf_chains[4];
3492 __le32 phy_err_mask[2];
3493 __le32 tsf_timestamp;
3494 __le32 buf_len;
3495 u8 buf[];
3496} __packed;
3497
3498struct wmi_radar_found_info {
3499 __le32 pri_min;
3500 __le32 pri_max;
3501 __le32 width_min;
3502 __le32 width_max;
3503 __le32 sidx_min;
3504 __le32 sidx_max;
3505} __packed;
3506
3507enum wmi_radar_confirmation_status {
3508
3509 WMI_SW_RADAR_DETECTED = 0,
3510
3511 WMI_RADAR_DETECTION_FAIL = 1,
3512
3513
3514 WMI_HW_RADAR_DETECTED = 2,
3515};
3516
3517#define PHYERR_TLV_SIG 0xBB
3518#define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB
3519#define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8
3520#define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9
3521
3522struct phyerr_radar_report {
3523 __le32 reg0;
3524 __le32 reg1;
3525} __packed;
3526
3527#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000
3528#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31
3529
3530#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000
3531#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30
3532
3533#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000
3534#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20
3535
3536#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000
3537#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16
3538
3539#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00
3540#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10
3541
3542#define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF
3543#define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0
3544
3545#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000
3546#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31
3547
3548#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000
3549#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24
3550
3551#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000
3552#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16
3553
3554#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00
3555#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8
3556
3557#define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF
3558#define RADAR_REPORT_REG1_PULSE_DUR_LSB 0
3559
3560struct phyerr_fft_report {
3561 __le32 reg0;
3562 __le32 reg1;
3563} __packed;
3564
3565#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000
3566#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23
3567
3568#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000
3569#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14
3570
3571#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000
3572#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12
3573
3574#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF
3575#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0
3576
3577#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000
3578#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26
3579
3580#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000
3581#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18
3582
3583#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00
3584#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8
3585
3586#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF
3587#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0
3588
3589struct phyerr_tlv {
3590 __le16 len;
3591 u8 tag;
3592 u8 sig;
3593} __packed;
3594
3595#define DFS_RSSI_POSSIBLY_FALSE 50
3596#define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40
3597
3598struct wmi_mgmt_tx_hdr {
3599 __le32 vdev_id;
3600 struct wmi_mac_addr peer_macaddr;
3601 __le32 tx_rate;
3602 __le32 tx_power;
3603 __le32 buf_len;
3604} __packed;
3605
3606struct wmi_mgmt_tx_cmd {
3607 struct wmi_mgmt_tx_hdr hdr;
3608 u8 buf[];
3609} __packed;
3610
3611struct wmi_echo_event {
3612 __le32 value;
3613} __packed;
3614
3615struct wmi_echo_cmd {
3616 __le32 value;
3617} __packed;
3618
3619struct wmi_pdev_set_regdomain_cmd {
3620 __le32 reg_domain;
3621 __le32 reg_domain_2G;
3622 __le32 reg_domain_5G;
3623 __le32 conformance_test_limit_2G;
3624 __le32 conformance_test_limit_5G;
3625} __packed;
3626
3627enum wmi_dfs_region {
3628
3629 WMI_UNINIT_DFS_DOMAIN = 0,
3630
3631
3632 WMI_FCC_DFS_DOMAIN = 1,
3633
3634
3635 WMI_ETSI_DFS_DOMAIN = 2,
3636
3637
3638 WMI_MKK4_DFS_DOMAIN = 3,
3639};
3640
3641struct wmi_pdev_set_regdomain_cmd_10x {
3642 __le32 reg_domain;
3643 __le32 reg_domain_2G;
3644 __le32 reg_domain_5G;
3645 __le32 conformance_test_limit_2G;
3646 __le32 conformance_test_limit_5G;
3647
3648
3649 __le32 dfs_domain;
3650} __packed;
3651
3652
3653struct wmi_pdev_set_quiet_cmd {
3654
3655 __le32 period;
3656
3657
3658 __le32 duration;
3659
3660
3661 __le32 next_start;
3662
3663
3664 __le32 enabled;
3665} __packed;
3666
3667
3668
3669
3670enum ath10k_protmode {
3671 ATH10K_PROT_NONE = 0,
3672 ATH10K_PROT_CTSONLY = 1,
3673 ATH10K_PROT_RTSCTS = 2,
3674};
3675
3676enum wmi_rtscts_profile {
3677 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
3678 WMI_RTSCTS_FOR_SECOND_RATESERIES,
3679 WMI_RTSCTS_ACROSS_SW_RETRIES
3680};
3681
3682#define WMI_RTSCTS_ENABLED 1
3683#define WMI_RTSCTS_SET_MASK 0x0f
3684#define WMI_RTSCTS_SET_LSB 0
3685
3686#define WMI_RTSCTS_PROFILE_MASK 0xf0
3687#define WMI_RTSCTS_PROFILE_LSB 4
3688
3689enum wmi_beacon_gen_mode {
3690 WMI_BEACON_STAGGERED_MODE = 0,
3691 WMI_BEACON_BURST_MODE = 1
3692};
3693
3694enum wmi_csa_event_ies_present_flag {
3695 WMI_CSA_IE_PRESENT = 0x00000001,
3696 WMI_XCSA_IE_PRESENT = 0x00000002,
3697 WMI_WBW_IE_PRESENT = 0x00000004,
3698 WMI_CSWARP_IE_PRESENT = 0x00000008,
3699};
3700
3701
3702struct wmi_csa_event {
3703 __le32 i_fc_dur;
3704
3705
3706 struct wmi_mac_addr i_addr1;
3707 struct wmi_mac_addr i_addr2;
3708 __le32 csa_ie[2];
3709 __le32 xcsa_ie[2];
3710 __le32 wb_ie[2];
3711 __le32 cswarp_ie;
3712 __le32 ies_present_flag;
3713} __packed;
3714
3715
3716#define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3717#define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3718#define PEER_DEFAULT_STATS_UPDATE_PERIOD 500
3719
3720struct wmi_pdev_param_map {
3721 u32 tx_chain_mask;
3722 u32 rx_chain_mask;
3723 u32 txpower_limit2g;
3724 u32 txpower_limit5g;
3725 u32 txpower_scale;
3726 u32 beacon_gen_mode;
3727 u32 beacon_tx_mode;
3728 u32 resmgr_offchan_mode;
3729 u32 protection_mode;
3730 u32 dynamic_bw;
3731 u32 non_agg_sw_retry_th;
3732 u32 agg_sw_retry_th;
3733 u32 sta_kickout_th;
3734 u32 ac_aggrsize_scaling;
3735 u32 ltr_enable;
3736 u32 ltr_ac_latency_be;
3737 u32 ltr_ac_latency_bk;
3738 u32 ltr_ac_latency_vi;
3739 u32 ltr_ac_latency_vo;
3740 u32 ltr_ac_latency_timeout;
3741 u32 ltr_sleep_override;
3742 u32 ltr_rx_override;
3743 u32 ltr_tx_activity_timeout;
3744 u32 l1ss_enable;
3745 u32 dsleep_enable;
3746 u32 pcielp_txbuf_flush;
3747 u32 pcielp_txbuf_watermark;
3748 u32 pcielp_txbuf_tmo_en;
3749 u32 pcielp_txbuf_tmo_value;
3750 u32 pdev_stats_update_period;
3751 u32 vdev_stats_update_period;
3752 u32 peer_stats_update_period;
3753 u32 bcnflt_stats_update_period;
3754 u32 pmf_qos;
3755 u32 arp_ac_override;
3756 u32 dcs;
3757 u32 ani_enable;
3758 u32 ani_poll_period;
3759 u32 ani_listen_period;
3760 u32 ani_ofdm_level;
3761 u32 ani_cck_level;
3762 u32 dyntxchain;
3763 u32 proxy_sta;
3764 u32 idle_ps_config;
3765 u32 power_gating_sleep;
3766 u32 fast_channel_reset;
3767 u32 burst_dur;
3768 u32 burst_enable;
3769 u32 cal_period;
3770 u32 aggr_burst;
3771 u32 rx_decap_mode;
3772 u32 smart_antenna_default_antenna;
3773 u32 igmpmld_override;
3774 u32 igmpmld_tid;
3775 u32 antenna_gain;
3776 u32 rx_filter;
3777 u32 set_mcast_to_ucast_tid;
3778 u32 proxy_sta_mode;
3779 u32 set_mcast2ucast_mode;
3780 u32 set_mcast2ucast_buffer;
3781 u32 remove_mcast2ucast_buffer;
3782 u32 peer_sta_ps_statechg_enable;
3783 u32 igmpmld_ac_override;
3784 u32 block_interbss;
3785 u32 set_disable_reset_cmdid;
3786 u32 set_msdu_ttl_cmdid;
3787 u32 set_ppdu_duration_cmdid;
3788 u32 txbf_sound_period_cmdid;
3789 u32 set_promisc_mode_cmdid;
3790 u32 set_burst_mode_cmdid;
3791 u32 en_stats;
3792 u32 mu_group_policy;
3793 u32 noise_detection;
3794 u32 noise_threshold;
3795 u32 dpd_enable;
3796 u32 set_mcast_bcast_echo;
3797 u32 atf_strict_sch;
3798 u32 atf_sched_duration;
3799 u32 ant_plzn;
3800 u32 mgmt_retry_limit;
3801 u32 sensitivity_level;
3802 u32 signed_txpower_2g;
3803 u32 signed_txpower_5g;
3804 u32 enable_per_tid_amsdu;
3805 u32 enable_per_tid_ampdu;
3806 u32 cca_threshold;
3807 u32 rts_fixed_rate;
3808 u32 pdev_reset;
3809 u32 wapi_mbssid_offset;
3810 u32 arp_srcaddr;
3811 u32 arp_dstaddr;
3812 u32 enable_btcoex;
3813 u32 rfkill_config;
3814 u32 rfkill_enable;
3815 u32 peer_stats_info_enable;
3816};
3817
3818#define WMI_PDEV_PARAM_UNSUPPORTED 0
3819
3820enum wmi_pdev_param {
3821
3822 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3823
3824 WMI_PDEV_PARAM_RX_CHAIN_MASK,
3825
3826 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
3827
3828 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
3829
3830 WMI_PDEV_PARAM_TXPOWER_SCALE,
3831
3832 WMI_PDEV_PARAM_BEACON_GEN_MODE,
3833
3834 WMI_PDEV_PARAM_BEACON_TX_MODE,
3835
3836
3837
3838
3839 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3840
3841
3842
3843
3844 WMI_PDEV_PARAM_PROTECTION_MODE,
3845
3846
3847
3848
3849
3850
3851 WMI_PDEV_PARAM_DYNAMIC_BW,
3852
3853 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3854
3855 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
3856
3857 WMI_PDEV_PARAM_STA_KICKOUT_TH,
3858
3859 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3860
3861 WMI_PDEV_PARAM_LTR_ENABLE,
3862
3863 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
3864
3865 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
3866
3867 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
3868
3869 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
3870
3871 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3872
3873 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3874
3875 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
3876
3877 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3878
3879 WMI_PDEV_PARAM_L1SS_ENABLE,
3880
3881 WMI_PDEV_PARAM_DSLEEP_ENABLE,
3882
3883 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3884
3885 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3886
3887 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3888
3889 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3890
3891 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3892
3893 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3894
3895 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3896
3897 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3898
3899 WMI_PDEV_PARAM_PMF_QOS,
3900
3901 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
3902
3903 WMI_PDEV_PARAM_DCS,
3904
3905 WMI_PDEV_PARAM_ANI_ENABLE,
3906
3907 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
3908
3909 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
3910
3911 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
3912
3913 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
3914
3915 WMI_PDEV_PARAM_DYNTXCHAIN,
3916
3917 WMI_PDEV_PARAM_PROXY_STA,
3918
3919 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
3920
3921 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
3922};
3923
3924enum wmi_10x_pdev_param {
3925
3926 WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3927
3928 WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
3929
3930 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
3931
3932 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
3933
3934 WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
3935
3936 WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
3937
3938 WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
3939
3940
3941
3942
3943 WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3944
3945
3946
3947
3948 WMI_10X_PDEV_PARAM_PROTECTION_MODE,
3949
3950 WMI_10X_PDEV_PARAM_DYNAMIC_BW,
3951
3952 WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3953
3954 WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
3955
3956 WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
3957
3958 WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3959
3960 WMI_10X_PDEV_PARAM_LTR_ENABLE,
3961
3962 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
3963
3964 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
3965
3966 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
3967
3968 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
3969
3970 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3971
3972 WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3973
3974 WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
3975
3976 WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3977
3978 WMI_10X_PDEV_PARAM_L1SS_ENABLE,
3979
3980 WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
3981
3982 WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3983
3984 WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3985
3986 WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3987
3988 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3989
3990 WMI_10X_PDEV_PARAM_PMF_QOS,
3991
3992 WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
3993
3994 WMI_10X_PDEV_PARAM_DCS,
3995
3996 WMI_10X_PDEV_PARAM_ANI_ENABLE,
3997
3998 WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
3999
4000 WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
4001
4002 WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
4003
4004 WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
4005
4006 WMI_10X_PDEV_PARAM_DYNTXCHAIN,
4007
4008 WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
4009
4010 WMI_10X_PDEV_PARAM_BURST_DUR,
4011
4012 WMI_10X_PDEV_PARAM_BURST_ENABLE,
4013
4014
4015 WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
4016 WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
4017 WMI_10X_PDEV_PARAM_IGMPMLD_TID,
4018 WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
4019 WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
4020 WMI_10X_PDEV_PARAM_RX_FILTER,
4021 WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
4022 WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
4023 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
4024 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
4025 WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
4026 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
4027 WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
4028 WMI_10X_PDEV_PARAM_CAL_PERIOD,
4029 WMI_10X_PDEV_PARAM_ATF_STRICT_SCH,
4030 WMI_10X_PDEV_PARAM_ATF_SCHED_DURATION,
4031 WMI_10X_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4032 WMI_10X_PDEV_PARAM_PDEV_RESET
4033};
4034
4035enum wmi_10_4_pdev_param {
4036 WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
4037 WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
4038 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
4039 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
4040 WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
4041 WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
4042 WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
4043 WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
4044 WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
4045 WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
4046 WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
4047 WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
4048 WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
4049 WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
4050 WMI_10_4_PDEV_PARAM_LTR_ENABLE,
4051 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
4052 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
4053 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
4054 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
4055 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
4056 WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
4057 WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
4058 WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
4059 WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
4060 WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
4061 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
4062 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
4063 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
4064 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
4065 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
4066 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
4067 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
4068 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
4069 WMI_10_4_PDEV_PARAM_PMF_QOS,
4070 WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
4071 WMI_10_4_PDEV_PARAM_DCS,
4072 WMI_10_4_PDEV_PARAM_ANI_ENABLE,
4073 WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
4074 WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
4075 WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
4076 WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
4077 WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
4078 WMI_10_4_PDEV_PARAM_PROXY_STA,
4079 WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
4080 WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
4081 WMI_10_4_PDEV_PARAM_AGGR_BURST,
4082 WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
4083 WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
4084 WMI_10_4_PDEV_PARAM_BURST_DUR,
4085 WMI_10_4_PDEV_PARAM_BURST_ENABLE,
4086 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
4087 WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
4088 WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
4089 WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
4090 WMI_10_4_PDEV_PARAM_RX_FILTER,
4091 WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
4092 WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
4093 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
4094 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
4095 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
4096 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
4097 WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
4098 WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
4099 WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
4100 WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
4101 WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
4102 WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
4103 WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
4104 WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
4105 WMI_10_4_PDEV_PARAM_EN_STATS,
4106 WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
4107 WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
4108 WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
4109 WMI_10_4_PDEV_PARAM_DPD_ENABLE,
4110 WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
4111 WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
4112 WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
4113 WMI_10_4_PDEV_PARAM_ANT_PLZN,
4114 WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
4115 WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
4116 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
4117 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
4118 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
4119 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
4120 WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
4121 WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
4122 WMI_10_4_PDEV_PARAM_CAL_PERIOD,
4123 WMI_10_4_PDEV_PARAM_PDEV_RESET,
4124 WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
4125 WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
4126 WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
4127 WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB,
4128 WMI_10_4_PDEV_PARAM_RX_BATCHMODE,
4129 WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY,
4130 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
4131 WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
4132 WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE,
4133 WMI_10_4_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
4134 WMI_10_4_PDEV_PARAM_ATF_SSID_GROUP_POLICY,
4135 WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
4136};
4137
4138struct wmi_pdev_set_param_cmd {
4139 __le32 param_id;
4140 __le32 param_value;
4141} __packed;
4142
4143struct wmi_pdev_set_base_macaddr_cmd {
4144 struct wmi_mac_addr mac_addr;
4145} __packed;
4146
4147
4148#define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
4149
4150struct wmi_pdev_get_tpc_config_cmd {
4151
4152 __le32 param;
4153} __packed;
4154
4155#define WMI_TPC_CONFIG_PARAM 1
4156#define WMI_TPC_FINAL_RATE_MAX 240
4157#define WMI_TPC_TX_N_CHAIN 4
4158#define WMI_TPC_RATE_MAX (WMI_TPC_TX_N_CHAIN * 65)
4159#define WMI_TPC_PREAM_TABLE_MAX 10
4160#define WMI_TPC_FLAG 3
4161#define WMI_TPC_BUF_SIZE 10
4162#define WMI_TPC_BEAMFORMING 2
4163
4164enum wmi_tpc_table_type {
4165 WMI_TPC_TABLE_TYPE_CDD = 0,
4166 WMI_TPC_TABLE_TYPE_STBC = 1,
4167 WMI_TPC_TABLE_TYPE_TXBF = 2,
4168};
4169
4170enum wmi_tpc_config_event_flag {
4171 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1,
4172 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2,
4173 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4,
4174};
4175
4176struct wmi_pdev_tpc_config_event {
4177 __le32 reg_domain;
4178 __le32 chan_freq;
4179 __le32 phy_mode;
4180 __le32 twice_antenna_reduction;
4181 __le32 twice_max_rd_power;
4182 a_sle32 twice_antenna_gain;
4183 __le32 power_limit;
4184 __le32 rate_max;
4185 __le32 num_tx_chain;
4186 __le32 ctl;
4187 __le32 flags;
4188 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4189 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4190 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4191 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4192 u8 rates_array[WMI_TPC_RATE_MAX];
4193} __packed;
4194
4195
4196enum wmi_tp_scale {
4197 WMI_TP_SCALE_MAX = 0,
4198 WMI_TP_SCALE_50 = 1,
4199 WMI_TP_SCALE_25 = 2,
4200 WMI_TP_SCALE_12 = 3,
4201 WMI_TP_SCALE_MIN = 4,
4202 WMI_TP_SCALE_SIZE = 5,
4203};
4204
4205struct wmi_pdev_tpc_final_table_event {
4206 __le32 reg_domain;
4207 __le32 chan_freq;
4208 __le32 phy_mode;
4209 __le32 twice_antenna_reduction;
4210 __le32 twice_max_rd_power;
4211 a_sle32 twice_antenna_gain;
4212 __le32 power_limit;
4213 __le32 rate_max;
4214 __le32 num_tx_chain;
4215 __le32 ctl;
4216 __le32 flags;
4217 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
4218 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4219 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4220 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
4221 u8 rates_array[WMI_TPC_FINAL_RATE_MAX];
4222 u8 ctl_power_table[WMI_TPC_BEAMFORMING][WMI_TPC_TX_N_CHAIN]
4223 [WMI_TPC_TX_N_CHAIN];
4224} __packed;
4225
4226struct wmi_pdev_get_tpc_table_cmd {
4227 __le32 param;
4228} __packed;
4229
4230enum wmi_tpc_pream_2ghz {
4231 WMI_TPC_PREAM_2GHZ_CCK = 0,
4232 WMI_TPC_PREAM_2GHZ_OFDM,
4233 WMI_TPC_PREAM_2GHZ_HT20,
4234 WMI_TPC_PREAM_2GHZ_HT40,
4235 WMI_TPC_PREAM_2GHZ_VHT20,
4236 WMI_TPC_PREAM_2GHZ_VHT40,
4237 WMI_TPC_PREAM_2GHZ_VHT80,
4238};
4239
4240enum wmi_tpc_pream_5ghz {
4241 WMI_TPC_PREAM_5GHZ_OFDM = 1,
4242 WMI_TPC_PREAM_5GHZ_HT20,
4243 WMI_TPC_PREAM_5GHZ_HT40,
4244 WMI_TPC_PREAM_5GHZ_VHT20,
4245 WMI_TPC_PREAM_5GHZ_VHT40,
4246 WMI_TPC_PREAM_5GHZ_VHT80,
4247 WMI_TPC_PREAM_5GHZ_HTCUP,
4248};
4249
4250#define WMI_PEER_PS_STATE_DISABLED 2
4251
4252struct wmi_peer_sta_ps_state_chg_event {
4253 struct wmi_mac_addr peer_macaddr;
4254 __le32 peer_ps_state;
4255} __packed;
4256
4257struct wmi_pdev_chanlist_update_event {
4258
4259 __le32 num_chan;
4260
4261 struct wmi_channel channel_list[1];
4262} __packed;
4263
4264#define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
4265
4266struct wmi_debug_mesg_event {
4267
4268 char bufp[WMI_MAX_DEBUG_MESG];
4269} __packed;
4270
4271enum {
4272
4273 VDEV_SUBTYPE_P2PDEV = 0,
4274
4275 VDEV_SUBTYPE_P2PCLI,
4276
4277 VDEV_SUBTYPE_P2PGO,
4278
4279 VDEV_SUBTYPE_BT,
4280};
4281
4282struct wmi_pdev_set_channel_cmd {
4283
4284 struct wmi_channel chan;
4285} __packed;
4286
4287struct wmi_pdev_pktlog_enable_cmd {
4288 __le32 ev_bitmap;
4289} __packed;
4290
4291
4292#define WMI_DSCP_MAP_MAX (64)
4293struct wmi_pdev_set_dscp_tid_map_cmd {
4294
4295 __le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
4296} __packed;
4297
4298enum mcast_bcast_rate_id {
4299 WMI_SET_MCAST_RATE,
4300 WMI_SET_BCAST_RATE
4301};
4302
4303struct mcast_bcast_rate {
4304 enum mcast_bcast_rate_id rate_id;
4305 __le32 rate;
4306} __packed;
4307
4308struct wmi_wmm_params {
4309 __le32 cwmin;
4310 __le32 cwmax;
4311 __le32 aifs;
4312 __le32 txop;
4313 __le32 acm;
4314 __le32 no_ack;
4315} __packed;
4316
4317struct wmi_pdev_set_wmm_params {
4318 struct wmi_wmm_params ac_be;
4319 struct wmi_wmm_params ac_bk;
4320 struct wmi_wmm_params ac_vi;
4321 struct wmi_wmm_params ac_vo;
4322} __packed;
4323
4324struct wmi_wmm_params_arg {
4325 u32 cwmin;
4326 u32 cwmax;
4327 u32 aifs;
4328 u32 txop;
4329 u32 acm;
4330 u32 no_ack;
4331};
4332
4333struct wmi_wmm_params_all_arg {
4334 struct wmi_wmm_params_arg ac_be;
4335 struct wmi_wmm_params_arg ac_bk;
4336 struct wmi_wmm_params_arg ac_vi;
4337 struct wmi_wmm_params_arg ac_vo;
4338};
4339
4340struct wmi_pdev_stats_tx {
4341
4342 __le32 comp_queued;
4343
4344
4345 __le32 comp_delivered;
4346
4347
4348 __le32 msdu_enqued;
4349
4350
4351 __le32 mpdu_enqued;
4352
4353
4354 __le32 wmm_drop;
4355
4356
4357 __le32 local_enqued;
4358
4359
4360 __le32 local_freed;
4361
4362
4363 __le32 hw_queued;
4364
4365
4366 __le32 hw_reaped;
4367
4368
4369 __le32 underrun;
4370
4371
4372 __le32 tx_abort;
4373
4374
4375 __le32 mpdus_requeued;
4376
4377
4378 __le32 tx_ko;
4379
4380
4381 __le32 data_rc;
4382
4383
4384 __le32 self_triggers;
4385
4386
4387 __le32 sw_retry_failure;
4388
4389
4390 __le32 illgl_rate_phy_err;
4391
4392
4393 __le32 pdev_cont_xretry;
4394
4395
4396 __le32 pdev_tx_timeout;
4397
4398
4399 __le32 pdev_resets;
4400
4401
4402 __le32 stateless_tid_alloc_failure;
4403
4404 __le32 phy_underrun;
4405
4406
4407 __le32 txop_ovf;
4408} __packed;
4409
4410struct wmi_10_4_pdev_stats_tx {
4411
4412 __le32 comp_queued;
4413
4414
4415 __le32 comp_delivered;
4416
4417
4418 __le32 msdu_enqued;
4419
4420
4421 __le32 mpdu_enqued;
4422
4423
4424 __le32 wmm_drop;
4425
4426
4427 __le32 local_enqued;
4428
4429
4430 __le32 local_freed;
4431
4432
4433 __le32 hw_queued;
4434
4435
4436 __le32 hw_reaped;
4437
4438
4439 __le32 underrun;
4440
4441
4442 __le32 hw_paused;
4443
4444
4445 __le32 tx_abort;
4446
4447
4448 __le32 mpdus_requeued;
4449
4450
4451 __le32 tx_ko;
4452
4453
4454 __le32 data_rc;
4455
4456
4457 __le32 self_triggers;
4458
4459
4460 __le32 sw_retry_failure;
4461
4462
4463 __le32 illgl_rate_phy_err;
4464
4465
4466 __le32 pdev_cont_xretry;
4467
4468
4469 __le32 pdev_tx_timeout;
4470
4471
4472 __le32 pdev_resets;
4473
4474
4475 __le32 stateless_tid_alloc_failure;
4476
4477 __le32 phy_underrun;
4478
4479
4480 __le32 txop_ovf;
4481
4482
4483 __le32 seq_posted;
4484
4485
4486 __le32 seq_failed_queueing;
4487
4488
4489 __le32 seq_completed;
4490
4491
4492 __le32 seq_restarted;
4493
4494
4495 __le32 mu_seq_posted;
4496
4497
4498 __le32 mpdus_sw_flush;
4499
4500
4501 __le32 mpdus_hw_filter;
4502
4503
4504
4505
4506 __le32 mpdus_truncated;
4507
4508
4509 __le32 mpdus_ack_failed;
4510
4511
4512 __le32 mpdus_expired;
4513} __packed;
4514
4515struct wmi_pdev_stats_rx {
4516
4517 __le32 mid_ppdu_route_change;
4518
4519
4520 __le32 status_rcvd;
4521
4522
4523 __le32 r0_frags;
4524 __le32 r1_frags;
4525 __le32 r2_frags;
4526 __le32 r3_frags;
4527
4528
4529 __le32 htt_msdus;
4530 __le32 htt_mpdus;
4531
4532
4533 __le32 loc_msdus;
4534 __le32 loc_mpdus;
4535
4536
4537 __le32 oversize_amsdu;
4538
4539
4540 __le32 phy_errs;
4541
4542
4543 __le32 phy_err_drop;
4544
4545
4546 __le32 mpdu_errs;
4547} __packed;
4548
4549struct wmi_pdev_stats_peer {
4550
4551 __le32 dummy;
4552} __packed;
4553
4554enum wmi_stats_id {
4555 WMI_STAT_PEER = BIT(0),
4556 WMI_STAT_AP = BIT(1),
4557 WMI_STAT_PDEV = BIT(2),
4558 WMI_STAT_VDEV = BIT(3),
4559 WMI_STAT_BCNFLT = BIT(4),
4560 WMI_STAT_VDEV_RATE = BIT(5),
4561};
4562
4563enum wmi_10_4_stats_id {
4564 WMI_10_4_STAT_PEER = BIT(0),
4565 WMI_10_4_STAT_AP = BIT(1),
4566 WMI_10_4_STAT_INST = BIT(2),
4567 WMI_10_4_STAT_PEER_EXTD = BIT(3),
4568 WMI_10_4_STAT_VDEV_EXTD = BIT(4),
4569};
4570
4571enum wmi_tlv_stats_id {
4572 WMI_TLV_STAT_PEER = BIT(0),
4573 WMI_TLV_STAT_AP = BIT(1),
4574 WMI_TLV_STAT_PDEV = BIT(2),
4575 WMI_TLV_STAT_VDEV = BIT(3),
4576 WMI_TLV_STAT_PEER_EXTD = BIT(10),
4577};
4578
4579struct wlan_inst_rssi_args {
4580 __le16 cfg_retry_count;
4581 __le16 retry_count;
4582};
4583
4584struct wmi_request_stats_cmd {
4585 __le32 stats_id;
4586
4587 __le32 vdev_id;
4588
4589
4590 struct wmi_mac_addr peer_macaddr;
4591
4592
4593 struct wlan_inst_rssi_args inst_rssi_args;
4594} __packed;
4595
4596enum wmi_peer_stats_info_request_type {
4597
4598 WMI_REQUEST_ONE_PEER_STATS_INFO = 0x01,
4599
4600 WMI_REQUEST_VDEV_ALL_PEER_STATS_INFO = 0x02,
4601};
4602
4603
4604enum {
4605
4606 WMI_PDEV_SUSPEND,
4607
4608
4609 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
4610};
4611
4612struct wmi_pdev_suspend_cmd {
4613
4614 __le32 suspend_opt;
4615} __packed;
4616
4617struct wmi_stats_event {
4618 __le32 stats_id;
4619
4620
4621
4622
4623 __le32 num_pdev_stats;
4624
4625
4626
4627
4628 __le32 num_vdev_stats;
4629
4630
4631
4632
4633 __le32 num_peer_stats;
4634 __le32 num_bcnflt_stats;
4635
4636
4637
4638
4639
4640
4641
4642
4643
4644 u8 data[];
4645} __packed;
4646
4647struct wmi_10_2_stats_event {
4648 __le32 stats_id;
4649 __le32 num_pdev_stats;
4650 __le32 num_pdev_ext_stats;
4651 __le32 num_vdev_stats;
4652 __le32 num_peer_stats;
4653 __le32 num_bcnflt_stats;
4654 u8 data[];
4655} __packed;
4656
4657
4658
4659
4660
4661struct wmi_pdev_stats_base {
4662 __le32 chan_nf;
4663 __le32 tx_frame_count;
4664 __le32 rx_frame_count;
4665 __le32 rx_clear_count;
4666 __le32 cycle_count;
4667 __le32 phy_err_count;
4668 __le32 chan_tx_pwr;
4669} __packed;
4670
4671struct wmi_pdev_stats {
4672 struct wmi_pdev_stats_base base;
4673 struct wmi_pdev_stats_tx tx;
4674 struct wmi_pdev_stats_rx rx;
4675 struct wmi_pdev_stats_peer peer;
4676} __packed;
4677
4678struct wmi_pdev_stats_extra {
4679 __le32 ack_rx_bad;
4680 __le32 rts_bad;
4681 __le32 rts_good;
4682 __le32 fcs_bad;
4683 __le32 no_beacons;
4684 __le32 mib_int_count;
4685} __packed;
4686
4687struct wmi_10x_pdev_stats {
4688 struct wmi_pdev_stats_base base;
4689 struct wmi_pdev_stats_tx tx;
4690 struct wmi_pdev_stats_rx rx;
4691 struct wmi_pdev_stats_peer peer;
4692 struct wmi_pdev_stats_extra extra;
4693} __packed;
4694
4695struct wmi_pdev_stats_mem {
4696 __le32 dram_free;
4697 __le32 iram_free;
4698} __packed;
4699
4700struct wmi_10_2_pdev_stats {
4701 struct wmi_pdev_stats_base base;
4702 struct wmi_pdev_stats_tx tx;
4703 __le32 mc_drop;
4704 struct wmi_pdev_stats_rx rx;
4705 __le32 pdev_rx_timeout;
4706 struct wmi_pdev_stats_mem mem;
4707 struct wmi_pdev_stats_peer peer;
4708 struct wmi_pdev_stats_extra extra;
4709} __packed;
4710
4711struct wmi_10_4_pdev_stats {
4712 struct wmi_pdev_stats_base base;
4713 struct wmi_10_4_pdev_stats_tx tx;
4714 struct wmi_pdev_stats_rx rx;
4715 __le32 rx_ovfl_errs;
4716 struct wmi_pdev_stats_mem mem;
4717 __le32 sram_free_size;
4718 struct wmi_pdev_stats_extra extra;
4719} __packed;
4720
4721
4722
4723
4724
4725#define WMI_VDEV_STATS_FTM_COUNT_VALID BIT(31)
4726#define WMI_VDEV_STATS_FTM_COUNT_LSB 0
4727#define WMI_VDEV_STATS_FTM_COUNT_MASK 0x7fffffff
4728
4729struct wmi_vdev_stats {
4730 __le32 vdev_id;
4731} __packed;
4732
4733struct wmi_vdev_stats_extd {
4734 __le32 vdev_id;
4735 __le32 ppdu_aggr_cnt;
4736 __le32 ppdu_noack;
4737 __le32 mpdu_queued;
4738 __le32 ppdu_nonaggr_cnt;
4739 __le32 mpdu_sw_requeued;
4740 __le32 mpdu_suc_retry;
4741 __le32 mpdu_suc_multitry;
4742 __le32 mpdu_fail_retry;
4743 __le32 tx_ftm_suc;
4744 __le32 tx_ftm_suc_retry;
4745 __le32 tx_ftm_fail;
4746 __le32 rx_ftmr_cnt;
4747 __le32 rx_ftmr_dup_cnt;
4748 __le32 rx_iftmr_cnt;
4749 __le32 rx_iftmr_dup_cnt;
4750 __le32 reserved[6];
4751} __packed;
4752
4753
4754
4755
4756
4757struct wmi_peer_stats {
4758 struct wmi_mac_addr peer_macaddr;
4759 __le32 peer_rssi;
4760 __le32 peer_tx_rate;
4761} __packed;
4762
4763struct wmi_10x_peer_stats {
4764 struct wmi_peer_stats old;
4765 __le32 peer_rx_rate;
4766} __packed;
4767
4768struct wmi_10_2_peer_stats {
4769 struct wmi_peer_stats old;
4770 __le32 peer_rx_rate;
4771 __le32 current_per;
4772 __le32 retries;
4773 __le32 tx_rate_count;
4774 __le32 max_4ms_frame_len;
4775 __le32 total_sub_frames;
4776 __le32 tx_bytes;
4777 __le32 num_pkt_loss_overflow[4];
4778 __le32 num_pkt_loss_excess_retry[4];
4779} __packed;
4780
4781struct wmi_10_2_4_peer_stats {
4782 struct wmi_10_2_peer_stats common;
4783 __le32 peer_rssi_changed;
4784} __packed;
4785
4786struct wmi_10_2_4_ext_peer_stats {
4787 struct wmi_10_2_peer_stats common;
4788 __le32 peer_rssi_changed;
4789 __le32 rx_duration;
4790} __packed;
4791
4792struct wmi_10_4_peer_stats {
4793 struct wmi_mac_addr peer_macaddr;
4794 __le32 peer_rssi;
4795 __le32 peer_rssi_seq_num;
4796 __le32 peer_tx_rate;
4797 __le32 peer_rx_rate;
4798 __le32 current_per;
4799 __le32 retries;
4800 __le32 tx_rate_count;
4801 __le32 max_4ms_frame_len;
4802 __le32 total_sub_frames;
4803 __le32 tx_bytes;
4804 __le32 num_pkt_loss_overflow[4];
4805 __le32 num_pkt_loss_excess_retry[4];
4806 __le32 peer_rssi_changed;
4807} __packed;
4808
4809struct wmi_10_4_peer_extd_stats {
4810 struct wmi_mac_addr peer_macaddr;
4811 __le32 inactive_time;
4812 __le32 peer_chain_rssi;
4813 __le32 rx_duration;
4814 __le32 reserved[10];
4815} __packed;
4816
4817struct wmi_10_4_bss_bcn_stats {
4818 __le32 vdev_id;
4819 __le32 bss_bcns_dropped;
4820 __le32 bss_bcn_delivered;
4821} __packed;
4822
4823struct wmi_10_4_bss_bcn_filter_stats {
4824 __le32 bcns_dropped;
4825 __le32 bcns_delivered;
4826 __le32 active_filters;
4827 struct wmi_10_4_bss_bcn_stats bss_stats;
4828} __packed;
4829
4830struct wmi_10_2_pdev_ext_stats {
4831 __le32 rx_rssi_comb;
4832 __le32 rx_rssi[4];
4833 __le32 rx_mcs[10];
4834 __le32 tx_mcs[10];
4835 __le32 ack_rssi;
4836} __packed;
4837
4838struct wmi_vdev_create_cmd {
4839 __le32 vdev_id;
4840 __le32 vdev_type;
4841 __le32 vdev_subtype;
4842 struct wmi_mac_addr vdev_macaddr;
4843} __packed;
4844
4845enum wmi_vdev_type {
4846 WMI_VDEV_TYPE_AP = 1,
4847 WMI_VDEV_TYPE_STA = 2,
4848 WMI_VDEV_TYPE_IBSS = 3,
4849 WMI_VDEV_TYPE_MONITOR = 4,
4850};
4851
4852enum wmi_vdev_subtype {
4853 WMI_VDEV_SUBTYPE_NONE,
4854 WMI_VDEV_SUBTYPE_P2P_DEVICE,
4855 WMI_VDEV_SUBTYPE_P2P_CLIENT,
4856 WMI_VDEV_SUBTYPE_P2P_GO,
4857 WMI_VDEV_SUBTYPE_PROXY_STA,
4858 WMI_VDEV_SUBTYPE_MESH_11S,
4859 WMI_VDEV_SUBTYPE_MESH_NON_11S,
4860};
4861
4862enum wmi_vdev_subtype_legacy {
4863 WMI_VDEV_SUBTYPE_LEGACY_NONE = 0,
4864 WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV = 1,
4865 WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI = 2,
4866 WMI_VDEV_SUBTYPE_LEGACY_P2P_GO = 3,
4867 WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA = 4,
4868};
4869
4870enum wmi_vdev_subtype_10_2_4 {
4871 WMI_VDEV_SUBTYPE_10_2_4_NONE = 0,
4872 WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV = 1,
4873 WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI = 2,
4874 WMI_VDEV_SUBTYPE_10_2_4_P2P_GO = 3,
4875 WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA = 4,
4876 WMI_VDEV_SUBTYPE_10_2_4_MESH_11S = 5,
4877};
4878
4879enum wmi_vdev_subtype_10_4 {
4880 WMI_VDEV_SUBTYPE_10_4_NONE = 0,
4881 WMI_VDEV_SUBTYPE_10_4_P2P_DEV = 1,
4882 WMI_VDEV_SUBTYPE_10_4_P2P_CLI = 2,
4883 WMI_VDEV_SUBTYPE_10_4_P2P_GO = 3,
4884 WMI_VDEV_SUBTYPE_10_4_PROXY_STA = 4,
4885 WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S = 5,
4886 WMI_VDEV_SUBTYPE_10_4_MESH_11S = 6,
4887};
4888
4889
4890
4891
4892
4893
4894
4895
4896#define WMI_VDEV_START_HIDDEN_SSID (1 << 0)
4897
4898
4899
4900
4901
4902
4903
4904#define WMI_VDEV_START_PMF_ENABLED (1 << 1)
4905
4906struct wmi_p2p_noa_descriptor {
4907 __le32 type_count;
4908 __le32 duration;
4909 __le32 interval;
4910 __le32 start_time;
4911} __packed;
4912
4913struct wmi_vdev_start_request_cmd {
4914
4915 struct wmi_channel chan;
4916
4917 __le32 vdev_id;
4918
4919 __le32 requestor_id;
4920
4921 __le32 beacon_interval;
4922
4923 __le32 dtim_period;
4924
4925 __le32 flags;
4926
4927 struct wmi_ssid ssid;
4928
4929 __le32 bcn_tx_rate;
4930
4931 __le32 bcn_tx_power;
4932
4933 __le32 num_noa_descriptors;
4934
4935
4936
4937
4938 __le32 disable_hw_ack;
4939
4940 struct wmi_p2p_noa_descriptor noa_descriptors[2];
4941} __packed;
4942
4943struct wmi_vdev_restart_request_cmd {
4944 struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
4945} __packed;
4946
4947struct wmi_vdev_start_request_arg {
4948 u32 vdev_id;
4949 struct wmi_channel_arg channel;
4950 u32 bcn_intval;
4951 u32 dtim_period;
4952 u8 *ssid;
4953 u32 ssid_len;
4954 u32 bcn_tx_rate;
4955 u32 bcn_tx_power;
4956 bool disable_hw_ack;
4957 bool hidden_ssid;
4958 bool pmf_enabled;
4959};
4960
4961struct wmi_vdev_delete_cmd {
4962
4963 __le32 vdev_id;
4964} __packed;
4965
4966struct wmi_vdev_up_cmd {
4967 __le32 vdev_id;
4968 __le32 vdev_assoc_id;
4969 struct wmi_mac_addr vdev_bssid;
4970} __packed;
4971
4972struct wmi_vdev_stop_cmd {
4973 __le32 vdev_id;
4974} __packed;
4975
4976struct wmi_vdev_down_cmd {
4977 __le32 vdev_id;
4978} __packed;
4979
4980struct wmi_vdev_standby_response_cmd {
4981
4982 __le32 vdev_id;
4983} __packed;
4984
4985struct wmi_vdev_resume_response_cmd {
4986
4987 __le32 vdev_id;
4988} __packed;
4989
4990struct wmi_vdev_set_param_cmd {
4991 __le32 vdev_id;
4992 __le32 param_id;
4993 __le32 param_value;
4994} __packed;
4995
4996#define WMI_MAX_KEY_INDEX 3
4997#define WMI_MAX_KEY_LEN 32
4998
4999#define WMI_KEY_PAIRWISE 0x00
5000#define WMI_KEY_GROUP 0x01
5001#define WMI_KEY_TX_USAGE 0x02
5002
5003struct wmi_key_seq_counter {
5004 __le32 key_seq_counter_l;
5005 __le32 key_seq_counter_h;
5006} __packed;
5007
5008enum wmi_cipher_suites {
5009 WMI_CIPHER_NONE,
5010 WMI_CIPHER_WEP,
5011 WMI_CIPHER_TKIP,
5012 WMI_CIPHER_AES_OCB,
5013 WMI_CIPHER_AES_CCM,
5014 WMI_CIPHER_WAPI,
5015 WMI_CIPHER_CKIP,
5016 WMI_CIPHER_AES_CMAC,
5017 WMI_CIPHER_AES_GCM,
5018};
5019
5020enum wmi_tlv_cipher_suites {
5021 WMI_TLV_CIPHER_NONE,
5022 WMI_TLV_CIPHER_WEP,
5023 WMI_TLV_CIPHER_TKIP,
5024 WMI_TLV_CIPHER_AES_OCB,
5025 WMI_TLV_CIPHER_AES_CCM,
5026 WMI_TLV_CIPHER_WAPI,
5027 WMI_TLV_CIPHER_CKIP,
5028 WMI_TLV_CIPHER_AES_CMAC,
5029 WMI_TLV_CIPHER_ANY,
5030 WMI_TLV_CIPHER_AES_GCM,
5031};
5032
5033struct wmi_vdev_install_key_cmd {
5034 __le32 vdev_id;
5035 struct wmi_mac_addr peer_macaddr;
5036 __le32 key_idx;
5037 __le32 key_flags;
5038 __le32 key_cipher;
5039 struct wmi_key_seq_counter key_rsc_counter;
5040 struct wmi_key_seq_counter key_global_rsc_counter;
5041 struct wmi_key_seq_counter key_tsc_counter;
5042 u8 wpi_key_rsc_counter[16];
5043 u8 wpi_key_tsc_counter[16];
5044 __le32 key_len;
5045 __le32 key_txmic_len;
5046 __le32 key_rxmic_len;
5047
5048
5049 u8 key_data[];
5050} __packed;
5051
5052struct wmi_vdev_install_key_arg {
5053 u32 vdev_id;
5054 const u8 *macaddr;
5055 u32 key_idx;
5056 u32 key_flags;
5057 u32 key_cipher;
5058 u32 key_len;
5059 u32 key_txmic_len;
5060 u32 key_rxmic_len;
5061 const void *key_data;
5062};
5063
5064
5065
5066
5067
5068
5069
5070
5071
5072
5073
5074
5075
5076
5077enum wmi_rate_preamble {
5078 WMI_RATE_PREAMBLE_OFDM,
5079 WMI_RATE_PREAMBLE_CCK,
5080 WMI_RATE_PREAMBLE_HT,
5081 WMI_RATE_PREAMBLE_VHT,
5082};
5083
5084#define ATH10K_HW_NSS(rate) (1 + (((rate) >> 4) & 0x3))
5085#define ATH10K_HW_PREAMBLE(rate) (((rate) >> 6) & 0x3)
5086#define ATH10K_HW_MCS_RATE(rate) ((rate) & 0xf)
5087#define ATH10K_HW_LEGACY_RATE(rate) ((rate) & 0x3f)
5088#define ATH10K_HW_BW(flags) (((flags) >> 3) & 0x3)
5089#define ATH10K_HW_GI(flags) (((flags) >> 5) & 0x1)
5090#define ATH10K_HW_RATECODE(rate, nss, preamble) \
5091 (((preamble) << 6) | ((nss) << 4) | (rate))
5092#define ATH10K_HW_AMPDU(flags) ((flags) & 0x1)
5093#define ATH10K_HW_BA_FAIL(flags) (((flags) >> 1) & 0x3)
5094#define ATH10K_FW_SKIPPED_RATE_CTRL(flags) (((flags) >> 6) & 0x1)
5095
5096#define ATH10K_VHT_MCS_NUM 10
5097#define ATH10K_BW_NUM 6
5098#define ATH10K_NSS_NUM 4
5099#define ATH10K_LEGACY_NUM 12
5100#define ATH10K_GI_NUM 2
5101#define ATH10K_HT_MCS_NUM 32
5102#define ATH10K_RATE_TABLE_NUM 320
5103#define ATH10K_RATE_INFO_FLAGS_SGI_BIT 2
5104
5105
5106#define WMI_FIXED_RATE_NONE (0xff)
5107
5108struct wmi_peer_param_map {
5109 u32 smps_state;
5110 u32 ampdu;
5111 u32 authorize;
5112 u32 chan_width;
5113 u32 nss;
5114 u32 use_4addr;
5115 u32 membership;
5116 u32 use_fixed_power;
5117 u32 user_pos;
5118 u32 crit_proto_hint_enabled;
5119 u32 tx_fail_cnt_thr;
5120 u32 set_hw_retry_cts2s;
5121 u32 ibss_atim_win_len;
5122 u32 debug;
5123 u32 phymode;
5124 u32 dummy_var;
5125};
5126
5127struct wmi_vdev_param_map {
5128 u32 rts_threshold;
5129 u32 fragmentation_threshold;
5130 u32 beacon_interval;
5131 u32 listen_interval;
5132 u32 multicast_rate;
5133 u32 mgmt_tx_rate;
5134 u32 slot_time;
5135 u32 preamble;
5136 u32 swba_time;
5137 u32 wmi_vdev_stats_update_period;
5138 u32 wmi_vdev_pwrsave_ageout_time;
5139 u32 wmi_vdev_host_swba_interval;
5140 u32 dtim_period;
5141 u32 wmi_vdev_oc_scheduler_air_time_limit;
5142 u32 wds;
5143 u32 atim_window;
5144 u32 bmiss_count_max;
5145 u32 bmiss_first_bcnt;
5146 u32 bmiss_final_bcnt;
5147 u32 feature_wmm;
5148 u32 chwidth;
5149 u32 chextoffset;
5150 u32 disable_htprotection;
5151 u32 sta_quickkickout;
5152 u32 mgmt_rate;
5153 u32 protection_mode;
5154 u32 fixed_rate;
5155 u32 sgi;
5156 u32 ldpc;
5157 u32 tx_stbc;
5158 u32 rx_stbc;
5159 u32 intra_bss_fwd;
5160 u32 def_keyid;
5161 u32 nss;
5162 u32 bcast_data_rate;
5163 u32 mcast_data_rate;
5164 u32 mcast_indicate;
5165 u32 dhcp_indicate;
5166 u32 unknown_dest_indicate;
5167 u32 ap_keepalive_min_idle_inactive_time_secs;
5168 u32 ap_keepalive_max_idle_inactive_time_secs;
5169 u32 ap_keepalive_max_unresponsive_time_secs;
5170 u32 ap_enable_nawds;
5171 u32 mcast2ucast_set;
5172 u32 enable_rtscts;
5173 u32 txbf;
5174 u32 packet_powersave;
5175 u32 drop_unencry;
5176 u32 tx_encap_type;
5177 u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
5178 u32 rc_num_retries;
5179 u32 cabq_maxdur;
5180 u32 mfptest_set;
5181 u32 rts_fixed_rate;
5182 u32 vht_sgimask;
5183 u32 vht80_ratemask;
5184 u32 early_rx_adjust_enable;
5185 u32 early_rx_tgt_bmiss_num;
5186 u32 early_rx_bmiss_sample_cycle;
5187 u32 early_rx_slop_step;
5188 u32 early_rx_init_slop;
5189 u32 early_rx_adjust_pause;
5190 u32 proxy_sta;
5191 u32 meru_vc;
5192 u32 rx_decap_type;
5193 u32 bw_nss_ratemask;
5194 u32 inc_tsf;
5195 u32 dec_tsf;
5196 u32 disable_4addr_src_lrn;
5197 u32 rtt_responder_role;
5198};
5199
5200#define WMI_VDEV_PARAM_UNSUPPORTED 0
5201
5202
5203enum wmi_vdev_param {
5204
5205 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5206
5207 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5208
5209 WMI_VDEV_PARAM_BEACON_INTERVAL,
5210
5211 WMI_VDEV_PARAM_LISTEN_INTERVAL,
5212
5213 WMI_VDEV_PARAM_MULTICAST_RATE,
5214
5215 WMI_VDEV_PARAM_MGMT_TX_RATE,
5216
5217 WMI_VDEV_PARAM_SLOT_TIME,
5218
5219 WMI_VDEV_PARAM_PREAMBLE,
5220
5221 WMI_VDEV_PARAM_SWBA_TIME,
5222
5223 WMI_VDEV_STATS_UPDATE_PERIOD,
5224
5225 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
5226
5227
5228
5229
5230 WMI_VDEV_HOST_SWBA_INTERVAL,
5231
5232 WMI_VDEV_PARAM_DTIM_PERIOD,
5233
5234
5235
5236
5237 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5238
5239 WMI_VDEV_PARAM_WDS,
5240
5241 WMI_VDEV_PARAM_ATIM_WINDOW,
5242
5243 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
5244
5245 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
5246
5247 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
5248
5249 WMI_VDEV_PARAM_FEATURE_WMM,
5250
5251 WMI_VDEV_PARAM_CHWIDTH,
5252
5253 WMI_VDEV_PARAM_CHEXTOFFSET,
5254
5255 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
5256
5257 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
5258
5259 WMI_VDEV_PARAM_MGMT_RATE,
5260
5261 WMI_VDEV_PARAM_PROTECTION_MODE,
5262
5263 WMI_VDEV_PARAM_FIXED_RATE,
5264
5265 WMI_VDEV_PARAM_SGI,
5266
5267 WMI_VDEV_PARAM_LDPC,
5268
5269 WMI_VDEV_PARAM_TX_STBC,
5270
5271 WMI_VDEV_PARAM_RX_STBC,
5272
5273 WMI_VDEV_PARAM_INTRA_BSS_FWD,
5274
5275 WMI_VDEV_PARAM_DEF_KEYID,
5276
5277 WMI_VDEV_PARAM_NSS,
5278
5279 WMI_VDEV_PARAM_BCAST_DATA_RATE,
5280
5281 WMI_VDEV_PARAM_MCAST_DATA_RATE,
5282
5283 WMI_VDEV_PARAM_MCAST_INDICATE,
5284
5285 WMI_VDEV_PARAM_DHCP_INDICATE,
5286
5287 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5288
5289
5290 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5291
5292
5293
5294
5295
5296
5297
5298
5299
5300
5301
5302 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5303
5304
5305
5306
5307
5308
5309
5310 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5311
5312
5313 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
5314
5315 WMI_VDEV_PARAM_ENABLE_RTSCTS,
5316
5317 WMI_VDEV_PARAM_TXBF,
5318
5319
5320 WMI_VDEV_PARAM_PACKET_POWERSAVE,
5321
5322
5323
5324
5325
5326 WMI_VDEV_PARAM_DROP_UNENCRY,
5327
5328
5329
5330
5331 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
5332};
5333
5334
5335enum wmi_10x_vdev_param {
5336
5337 WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5338
5339 WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5340
5341 WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
5342
5343 WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
5344
5345 WMI_10X_VDEV_PARAM_MULTICAST_RATE,
5346
5347 WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
5348
5349 WMI_10X_VDEV_PARAM_SLOT_TIME,
5350
5351 WMI_10X_VDEV_PARAM_PREAMBLE,
5352
5353 WMI_10X_VDEV_PARAM_SWBA_TIME,
5354
5355 WMI_10X_VDEV_STATS_UPDATE_PERIOD,
5356
5357 WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
5358
5359
5360
5361
5362 WMI_10X_VDEV_HOST_SWBA_INTERVAL,
5363
5364 WMI_10X_VDEV_PARAM_DTIM_PERIOD,
5365
5366
5367
5368
5369 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5370
5371 WMI_10X_VDEV_PARAM_WDS,
5372
5373 WMI_10X_VDEV_PARAM_ATIM_WINDOW,
5374
5375 WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
5376
5377 WMI_10X_VDEV_PARAM_FEATURE_WMM,
5378
5379 WMI_10X_VDEV_PARAM_CHWIDTH,
5380
5381 WMI_10X_VDEV_PARAM_CHEXTOFFSET,
5382
5383 WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
5384
5385 WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
5386
5387 WMI_10X_VDEV_PARAM_MGMT_RATE,
5388
5389 WMI_10X_VDEV_PARAM_PROTECTION_MODE,
5390
5391 WMI_10X_VDEV_PARAM_FIXED_RATE,
5392
5393 WMI_10X_VDEV_PARAM_SGI,
5394
5395 WMI_10X_VDEV_PARAM_LDPC,
5396
5397 WMI_10X_VDEV_PARAM_TX_STBC,
5398
5399 WMI_10X_VDEV_PARAM_RX_STBC,
5400
5401 WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
5402
5403 WMI_10X_VDEV_PARAM_DEF_KEYID,
5404
5405 WMI_10X_VDEV_PARAM_NSS,
5406
5407 WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
5408
5409 WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
5410
5411 WMI_10X_VDEV_PARAM_MCAST_INDICATE,
5412
5413 WMI_10X_VDEV_PARAM_DHCP_INDICATE,
5414
5415 WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5416
5417
5418 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5419
5420
5421
5422
5423
5424
5425
5426
5427
5428
5429
5430 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5431
5432
5433
5434
5435
5436
5437
5438 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5439
5440
5441 WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
5442
5443 WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
5444
5445 WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
5446
5447 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
5448
5449
5450 WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
5451 WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
5452 WMI_10X_VDEV_PARAM_MFPTEST_SET,
5453 WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
5454 WMI_10X_VDEV_PARAM_VHT_SGIMASK,
5455 WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
5456 WMI_10X_VDEV_PARAM_TSF_INCREMENT,
5457};
5458
5459enum wmi_10_4_vdev_param {
5460 WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1,
5461 WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
5462 WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
5463 WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
5464 WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
5465 WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
5466 WMI_10_4_VDEV_PARAM_SLOT_TIME,
5467 WMI_10_4_VDEV_PARAM_PREAMBLE,
5468 WMI_10_4_VDEV_PARAM_SWBA_TIME,
5469 WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
5470 WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
5471 WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
5472 WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
5473 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
5474 WMI_10_4_VDEV_PARAM_WDS,
5475 WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
5476 WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
5477 WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
5478 WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
5479 WMI_10_4_VDEV_PARAM_FEATURE_WMM,
5480 WMI_10_4_VDEV_PARAM_CHWIDTH,
5481 WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
5482 WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
5483 WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
5484 WMI_10_4_VDEV_PARAM_MGMT_RATE,
5485 WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
5486 WMI_10_4_VDEV_PARAM_FIXED_RATE,
5487 WMI_10_4_VDEV_PARAM_SGI,
5488 WMI_10_4_VDEV_PARAM_LDPC,
5489 WMI_10_4_VDEV_PARAM_TX_STBC,
5490 WMI_10_4_VDEV_PARAM_RX_STBC,
5491 WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
5492 WMI_10_4_VDEV_PARAM_DEF_KEYID,
5493 WMI_10_4_VDEV_PARAM_NSS,
5494 WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
5495 WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
5496 WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
5497 WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
5498 WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
5499 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
5500 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
5501 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
5502 WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
5503 WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
5504 WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
5505 WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
5506 WMI_10_4_VDEV_PARAM_TXBF,
5507 WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
5508 WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
5509 WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
5510 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
5511 WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
5512 WMI_10_4_VDEV_PARAM_MFPTEST_SET,
5513 WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
5514 WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
5515 WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
5516 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
5517 WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
5518 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
5519 WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
5520 WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
5521 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
5522 WMI_10_4_VDEV_PARAM_PROXY_STA,
5523 WMI_10_4_VDEV_PARAM_MERU_VC,
5524 WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
5525 WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
5526 WMI_10_4_VDEV_PARAM_SENSOR_AP,
5527 WMI_10_4_VDEV_PARAM_BEACON_RATE,
5528 WMI_10_4_VDEV_PARAM_DTIM_ENABLE_CTS,
5529 WMI_10_4_VDEV_PARAM_STA_KICKOUT,
5530 WMI_10_4_VDEV_PARAM_CAPABILITIES,
5531 WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
5532 WMI_10_4_VDEV_PARAM_RX_FILTER,
5533 WMI_10_4_VDEV_PARAM_MGMT_TX_POWER,
5534 WMI_10_4_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
5535 WMI_10_4_VDEV_PARAM_DISABLE_DYN_BW_RTS,
5536 WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
5537 WMI_10_4_VDEV_PARAM_SELFGEN_FIXED_RATE,
5538 WMI_10_4_VDEV_PARAM_AMPDU_SUBFRAME_SIZE_PER_AC,
5539 WMI_10_4_VDEV_PARAM_NSS_VHT160,
5540 WMI_10_4_VDEV_PARAM_NSS_VHT80_80,
5541 WMI_10_4_VDEV_PARAM_AMSDU_SUBFRAME_SIZE_PER_AC,
5542 WMI_10_4_VDEV_PARAM_DISABLE_CABQ,
5543 WMI_10_4_VDEV_PARAM_SIFS_TRIGGER_RATE,
5544 WMI_10_4_VDEV_PARAM_TX_POWER,
5545 WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE,
5546 WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN,
5547};
5548
5549#define WMI_VDEV_DISABLE_4_ADDR_SRC_LRN 1
5550
5551#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
5552#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
5553#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
5554#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
5555
5556#define WMI_TXBF_STS_CAP_OFFSET_LSB 4
5557#define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70
5558#define WMI_TXBF_CONF_IMPLICIT_BF BIT(7)
5559#define WMI_BF_SOUND_DIM_OFFSET_LSB 8
5560#define WMI_BF_SOUND_DIM_OFFSET_MASK 0xf00
5561
5562
5563#define WMI_VDEV_SLOT_TIME_LONG 0x1
5564
5565#define WMI_VDEV_SLOT_TIME_SHORT 0x2
5566
5567#define WMI_VDEV_PREAMBLE_LONG 0x1
5568
5569#define WMI_VDEV_PREAMBLE_SHORT 0x2
5570
5571enum wmi_start_event_param {
5572 WMI_VDEV_RESP_START_EVENT = 0,
5573 WMI_VDEV_RESP_RESTART_EVENT,
5574};
5575
5576struct wmi_vdev_start_response_event {
5577 __le32 vdev_id;
5578 __le32 req_id;
5579 __le32 resp_type;
5580 __le32 status;
5581} __packed;
5582
5583struct wmi_vdev_standby_req_event {
5584
5585 __le32 vdev_id;
5586} __packed;
5587
5588struct wmi_vdev_resume_req_event {
5589
5590 __le32 vdev_id;
5591} __packed;
5592
5593struct wmi_vdev_stopped_event {
5594
5595 __le32 vdev_id;
5596} __packed;
5597
5598
5599
5600
5601
5602struct wmi_vdev_simple_event {
5603
5604 __le32 vdev_id;
5605} __packed;
5606
5607
5608
5609#define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0
5610
5611
5612#define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1
5613
5614
5615#define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2
5616
5617
5618struct wmi_vdev_spectral_conf_cmd {
5619 __le32 vdev_id;
5620
5621
5622 __le32 scan_count;
5623 __le32 scan_period;
5624 __le32 scan_priority;
5625
5626
5627 __le32 scan_fft_size;
5628 __le32 scan_gc_ena;
5629 __le32 scan_restart_ena;
5630 __le32 scan_noise_floor_ref;
5631 __le32 scan_init_delay;
5632 __le32 scan_nb_tone_thr;
5633 __le32 scan_str_bin_thr;
5634 __le32 scan_wb_rpt_mode;
5635 __le32 scan_rssi_rpt_mode;
5636 __le32 scan_rssi_thr;
5637 __le32 scan_pwr_format;
5638
5639
5640
5641
5642
5643
5644
5645
5646
5647
5648
5649
5650 __le32 scan_rpt_mode;
5651 __le32 scan_bin_scale;
5652 __le32 scan_dbm_adj;
5653 __le32 scan_chn_mask;
5654} __packed;
5655
5656struct wmi_vdev_spectral_conf_arg {
5657 u32 vdev_id;
5658 u32 scan_count;
5659 u32 scan_period;
5660 u32 scan_priority;
5661 u32 scan_fft_size;
5662 u32 scan_gc_ena;
5663 u32 scan_restart_ena;
5664 u32 scan_noise_floor_ref;
5665 u32 scan_init_delay;
5666 u32 scan_nb_tone_thr;
5667 u32 scan_str_bin_thr;
5668 u32 scan_wb_rpt_mode;
5669 u32 scan_rssi_rpt_mode;
5670 u32 scan_rssi_thr;
5671 u32 scan_pwr_format;
5672 u32 scan_rpt_mode;
5673 u32 scan_bin_scale;
5674 u32 scan_dbm_adj;
5675 u32 scan_chn_mask;
5676};
5677
5678#define WMI_SPECTRAL_ENABLE_DEFAULT 0
5679#define WMI_SPECTRAL_COUNT_DEFAULT 0
5680#define WMI_SPECTRAL_PERIOD_DEFAULT 35
5681#define WMI_SPECTRAL_PRIORITY_DEFAULT 1
5682#define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
5683#define WMI_SPECTRAL_GC_ENA_DEFAULT 1
5684#define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
5685#define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
5686#define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
5687#define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
5688#define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
5689#define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
5690#define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
5691#define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
5692#define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
5693#define WMI_SPECTRAL_RPT_MODE_DEFAULT 2
5694#define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
5695#define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
5696#define WMI_SPECTRAL_CHN_MASK_DEFAULT 1
5697
5698struct wmi_vdev_spectral_enable_cmd {
5699 __le32 vdev_id;
5700 __le32 trigger_cmd;
5701 __le32 enable_cmd;
5702} __packed;
5703
5704#define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
5705#define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
5706#define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
5707#define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
5708
5709
5710struct wmi_bcn_tx_hdr {
5711 __le32 vdev_id;
5712 __le32 tx_rate;
5713 __le32 tx_power;
5714 __le32 bcn_len;
5715} __packed;
5716
5717struct wmi_bcn_tx_cmd {
5718 struct wmi_bcn_tx_hdr hdr;
5719 u8 *bcn[];
5720} __packed;
5721
5722struct wmi_bcn_tx_arg {
5723 u32 vdev_id;
5724 u32 tx_rate;
5725 u32 tx_power;
5726 u32 bcn_len;
5727 const void *bcn;
5728};
5729
5730enum wmi_bcn_tx_ref_flags {
5731 WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
5732 WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
5733};
5734
5735
5736
5737
5738#define WMI_BCN_TX_REF_DEF_ANTENNA 0
5739
5740struct wmi_bcn_tx_ref_cmd {
5741 __le32 vdev_id;
5742 __le32 data_len;
5743
5744 __le32 data_ptr;
5745
5746 __le32 msdu_id;
5747
5748 __le32 frame_control;
5749
5750 __le32 flags;
5751
5752 __le32 antenna_mask;
5753} __packed;
5754
5755
5756#define WMI_BCN_FILTER_ALL 0
5757#define WMI_BCN_FILTER_NONE 1
5758#define WMI_BCN_FILTER_RSSI 2
5759#define WMI_BCN_FILTER_BSSID 3
5760#define WMI_BCN_FILTER_SSID 4
5761
5762struct wmi_bcn_filter_rx_cmd {
5763
5764 __le32 bcn_filter_id;
5765
5766 __le32 bcn_filter;
5767
5768 __le32 bcn_filter_len;
5769
5770 u8 *bcn_filter_buf;
5771} __packed;
5772
5773
5774struct wmi_bcn_prb_info {
5775
5776 __le32 caps;
5777
5778 __le32 erp;
5779
5780
5781
5782
5783
5784
5785
5786
5787
5788} __packed;
5789
5790struct wmi_bcn_tmpl_cmd {
5791
5792 __le32 vdev_id;
5793
5794 __le32 tim_ie_offset;
5795
5796 struct wmi_bcn_prb_info bcn_prb_info;
5797
5798 __le32 buf_len;
5799
5800 u8 data[1];
5801} __packed;
5802
5803struct wmi_prb_tmpl_cmd {
5804
5805 __le32 vdev_id;
5806
5807 struct wmi_bcn_prb_info bcn_prb_info;
5808
5809 __le32 buf_len;
5810
5811 u8 data[1];
5812} __packed;
5813
5814enum wmi_sta_ps_mode {
5815
5816 WMI_STA_PS_MODE_DISABLED = 0,
5817
5818 WMI_STA_PS_MODE_ENABLED = 1,
5819};
5820
5821struct wmi_sta_powersave_mode_cmd {
5822
5823 __le32 vdev_id;
5824
5825
5826
5827
5828
5829 __le32 sta_ps_mode;
5830} __packed;
5831
5832enum wmi_csa_offload_en {
5833 WMI_CSA_OFFLOAD_DISABLE = 0,
5834 WMI_CSA_OFFLOAD_ENABLE = 1,
5835};
5836
5837struct wmi_csa_offload_enable_cmd {
5838 __le32 vdev_id;
5839 __le32 csa_offload_enable;
5840} __packed;
5841
5842struct wmi_csa_offload_chanswitch_cmd {
5843 __le32 vdev_id;
5844 struct wmi_channel chan;
5845} __packed;
5846
5847
5848
5849
5850
5851
5852
5853enum wmi_sta_ps_param_rx_wake_policy {
5854
5855
5856
5857
5858
5859
5860 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
5861
5862
5863
5864
5865
5866
5867
5868
5869 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
5870};
5871
5872
5873
5874
5875
5876
5877
5878
5879
5880enum wmi_sta_ps_param_tx_wake_threshold {
5881 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
5882 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
5883
5884
5885
5886
5887
5888};
5889
5890
5891
5892
5893
5894
5895
5896
5897
5898
5899enum wmi_sta_ps_param_pspoll_count {
5900 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
5901
5902
5903
5904
5905
5906
5907
5908
5909
5910
5911 WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
5912};
5913
5914
5915
5916
5917
5918
5919
5920#define WMI_UAPSD_AC_TYPE_DELI 0
5921#define WMI_UAPSD_AC_TYPE_TRIG 1
5922
5923#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5924 (type == WMI_UAPSD_AC_TYPE_DELI ? 1 << (ac << 1) : 1 << ((ac << 1) + 1))
5925
5926enum wmi_sta_ps_param_uapsd {
5927 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5928 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5929 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5930 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5931 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5932 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5933 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5934 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5935};
5936
5937#define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
5938
5939struct wmi_sta_uapsd_auto_trig_param {
5940 __le32 wmm_ac;
5941 __le32 user_priority;
5942 __le32 service_interval;
5943 __le32 suspend_interval;
5944 __le32 delay_interval;
5945};
5946
5947struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
5948 __le32 vdev_id;
5949 struct wmi_mac_addr peer_macaddr;
5950 __le32 num_ac;
5951};
5952
5953struct wmi_sta_uapsd_auto_trig_arg {
5954 u32 wmm_ac;
5955 u32 user_priority;
5956 u32 service_interval;
5957 u32 suspend_interval;
5958 u32 delay_interval;
5959};
5960
5961enum wmi_sta_powersave_param {
5962
5963
5964
5965
5966
5967 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
5968
5969
5970
5971
5972
5973
5974 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
5975
5976
5977
5978
5979
5980
5981
5982 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
5983
5984
5985
5986
5987
5988
5989
5990
5991 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
5992
5993
5994
5995
5996
5997
5998 WMI_STA_PS_PARAM_UAPSD = 4,
5999};
6000
6001struct wmi_sta_powersave_param_cmd {
6002 __le32 vdev_id;
6003 __le32 param_id;
6004 __le32 param_value;
6005} __packed;
6006
6007
6008#define WMI_STA_MIMO_PS_MODE_DISABLE
6009
6010#define WMI_STA_MIMO_PS_MODE_STATIC
6011
6012#define WMI_STA_MIMO_PS_MODE_DYNAMIC
6013
6014struct wmi_sta_mimo_ps_mode_cmd {
6015
6016 __le32 vdev_id;
6017
6018 __le32 mimo_pwrsave_mode;
6019} __packed;
6020
6021
6022enum wmi_ap_ps_param_uapsd {
6023 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
6024 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
6025 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
6026 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
6027 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
6028 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
6029 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
6030 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
6031};
6032
6033
6034enum wmi_ap_ps_peer_param_max_sp {
6035 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
6036 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
6037 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
6038 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
6039 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
6040};
6041
6042
6043
6044
6045
6046enum wmi_ap_ps_peer_param {
6047
6048
6049
6050
6051
6052
6053
6054
6055
6056
6057
6058 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
6059
6060
6061
6062
6063
6064
6065
6066
6067 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
6068
6069
6070 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
6071};
6072
6073struct wmi_ap_ps_peer_cmd {
6074
6075 __le32 vdev_id;
6076
6077
6078 struct wmi_mac_addr peer_macaddr;
6079
6080
6081 __le32 param_id;
6082
6083
6084 __le32 param_value;
6085} __packed;
6086
6087
6088#define WMI_TIM_BITMAP_ARRAY_SIZE 4
6089
6090struct wmi_tim_info {
6091 __le32 tim_len;
6092 __le32 tim_mcast;
6093 __le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
6094 __le32 tim_changed;
6095 __le32 tim_num_ps_pending;
6096} __packed;
6097
6098struct wmi_tim_info_arg {
6099 __le32 tim_len;
6100 __le32 tim_mcast;
6101 const __le32 *tim_bitmap;
6102 __le32 tim_changed;
6103 __le32 tim_num_ps_pending;
6104} __packed;
6105
6106
6107#define WMI_P2P_MAX_NOA_DESCRIPTORS 4
6108#define WMI_P2P_OPPPS_ENABLE_BIT BIT(0)
6109#define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1
6110#define WMI_P2P_NOA_CHANGED_BIT BIT(0)
6111
6112struct wmi_p2p_noa_info {
6113
6114
6115
6116 u8 changed;
6117
6118 u8 index;
6119
6120
6121
6122 u8 ctwindow_oppps;
6123
6124 u8 num_descriptors;
6125
6126 struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
6127} __packed;
6128
6129struct wmi_bcn_info {
6130 struct wmi_tim_info tim_info;
6131 struct wmi_p2p_noa_info p2p_noa_info;
6132} __packed;
6133
6134struct wmi_host_swba_event {
6135 __le32 vdev_map;
6136 struct wmi_bcn_info bcn_info[];
6137} __packed;
6138
6139struct wmi_10_2_4_bcn_info {
6140 struct wmi_tim_info tim_info;
6141
6142} __packed;
6143
6144struct wmi_10_2_4_host_swba_event {
6145 __le32 vdev_map;
6146 struct wmi_10_2_4_bcn_info bcn_info[];
6147} __packed;
6148
6149
6150#define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17
6151
6152struct wmi_10_4_tim_info {
6153 __le32 tim_len;
6154 __le32 tim_mcast;
6155 __le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE];
6156 __le32 tim_changed;
6157 __le32 tim_num_ps_pending;
6158} __packed;
6159
6160#define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1
6161
6162struct wmi_10_4_p2p_noa_info {
6163
6164
6165
6166 u8 changed;
6167
6168 u8 index;
6169
6170
6171
6172 u8 ctwindow_oppps;
6173
6174 u8 num_descriptors;
6175
6176 struct wmi_p2p_noa_descriptor
6177 noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS];
6178} __packed;
6179
6180struct wmi_10_4_bcn_info {
6181 struct wmi_10_4_tim_info tim_info;
6182 struct wmi_10_4_p2p_noa_info p2p_noa_info;
6183} __packed;
6184
6185struct wmi_10_4_host_swba_event {
6186 __le32 vdev_map;
6187 struct wmi_10_4_bcn_info bcn_info[];
6188} __packed;
6189
6190#define WMI_MAX_AP_VDEV 16
6191
6192struct wmi_tbtt_offset_event {
6193 __le32 vdev_map;
6194 __le32 tbttoffset_list[WMI_MAX_AP_VDEV];
6195} __packed;
6196
6197struct wmi_peer_create_cmd {
6198 __le32 vdev_id;
6199 struct wmi_mac_addr peer_macaddr;
6200 __le32 peer_type;
6201} __packed;
6202
6203enum wmi_peer_type {
6204 WMI_PEER_TYPE_DEFAULT = 0,
6205 WMI_PEER_TYPE_BSS = 1,
6206 WMI_PEER_TYPE_TDLS = 2,
6207};
6208
6209struct wmi_peer_delete_cmd {
6210 __le32 vdev_id;
6211 struct wmi_mac_addr peer_macaddr;
6212} __packed;
6213
6214struct wmi_peer_flush_tids_cmd {
6215 __le32 vdev_id;
6216 struct wmi_mac_addr peer_macaddr;
6217 __le32 peer_tid_bitmap;
6218} __packed;
6219
6220struct wmi_fixed_rate {
6221
6222
6223
6224
6225
6226
6227 __le32 rate_mode;
6228
6229
6230
6231
6232 __le32 rate_series;
6233
6234
6235
6236
6237
6238 __le32 rate_retries;
6239} __packed;
6240
6241struct wmi_peer_fixed_rate_cmd {
6242
6243 __le32 vdev_id;
6244
6245 struct wmi_mac_addr peer_macaddr;
6246
6247 struct wmi_fixed_rate peer_fixed_rate;
6248} __packed;
6249
6250#define WMI_MGMT_TID 17
6251
6252struct wmi_addba_clear_resp_cmd {
6253
6254 __le32 vdev_id;
6255
6256 struct wmi_mac_addr peer_macaddr;
6257} __packed;
6258
6259struct wmi_addba_send_cmd {
6260
6261 __le32 vdev_id;
6262
6263 struct wmi_mac_addr peer_macaddr;
6264
6265 __le32 tid;
6266
6267 __le32 buffersize;
6268} __packed;
6269
6270struct wmi_delba_send_cmd {
6271
6272 __le32 vdev_id;
6273
6274 struct wmi_mac_addr peer_macaddr;
6275
6276 __le32 tid;
6277
6278 __le32 initiator;
6279
6280 __le32 reasoncode;
6281} __packed;
6282
6283struct wmi_addba_setresponse_cmd {
6284
6285 __le32 vdev_id;
6286
6287 struct wmi_mac_addr peer_macaddr;
6288
6289 __le32 tid;
6290
6291 __le32 statuscode;
6292} __packed;
6293
6294struct wmi_send_singleamsdu_cmd {
6295
6296 __le32 vdev_id;
6297
6298 struct wmi_mac_addr peer_macaddr;
6299
6300 __le32 tid;
6301} __packed;
6302
6303enum wmi_peer_smps_state {
6304 WMI_PEER_SMPS_PS_NONE = 0x0,
6305 WMI_PEER_SMPS_STATIC = 0x1,
6306 WMI_PEER_SMPS_DYNAMIC = 0x2
6307};
6308
6309enum wmi_peer_chwidth {
6310 WMI_PEER_CHWIDTH_20MHZ = 0,
6311 WMI_PEER_CHWIDTH_40MHZ = 1,
6312 WMI_PEER_CHWIDTH_80MHZ = 2,
6313 WMI_PEER_CHWIDTH_160MHZ = 3,
6314};
6315
6316enum wmi_peer_param {
6317 WMI_PEER_SMPS_STATE = 0x1,
6318 WMI_PEER_AMPDU = 0x2,
6319 WMI_PEER_AUTHORIZE = 0x3,
6320 WMI_PEER_CHAN_WIDTH = 0x4,
6321 WMI_PEER_NSS = 0x5,
6322 WMI_PEER_USE_4ADDR = 0x6,
6323 WMI_PEER_USE_FIXED_PWR = 0x8,
6324 WMI_PEER_PARAM_FIXED_RATE = 0x9,
6325 WMI_PEER_DEBUG = 0xa,
6326 WMI_PEER_PHYMODE = 0xd,
6327 WMI_PEER_DUMMY_VAR = 0xff,
6328};
6329
6330struct wmi_peer_set_param_cmd {
6331 __le32 vdev_id;
6332 struct wmi_mac_addr peer_macaddr;
6333 __le32 param_id;
6334 __le32 param_value;
6335} __packed;
6336
6337#define MAX_SUPPORTED_RATES 128
6338
6339struct wmi_rate_set {
6340
6341 __le32 num_rates;
6342
6343
6344
6345
6346
6347 __le32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
6348} __packed;
6349
6350struct wmi_rate_set_arg {
6351 unsigned int num_rates;
6352 u8 rates[MAX_SUPPORTED_RATES];
6353};
6354
6355
6356
6357
6358
6359
6360struct wmi_vht_rate_set {
6361 __le32 rx_max_rate;
6362 __le32 rx_mcs_set;
6363 __le32 tx_max_rate;
6364 __le32 tx_mcs_set;
6365} __packed;
6366
6367struct wmi_vht_rate_set_arg {
6368 u32 rx_max_rate;
6369 u32 rx_mcs_set;
6370 u32 tx_max_rate;
6371 u32 tx_mcs_set;
6372};
6373
6374struct wmi_peer_set_rates_cmd {
6375
6376 struct wmi_mac_addr peer_macaddr;
6377
6378 struct wmi_rate_set peer_legacy_rates;
6379
6380 struct wmi_rate_set peer_ht_rates;
6381} __packed;
6382
6383struct wmi_peer_set_q_empty_callback_cmd {
6384
6385 __le32 vdev_id;
6386
6387 struct wmi_mac_addr peer_macaddr;
6388 __le32 callback_enable;
6389} __packed;
6390
6391struct wmi_peer_flags_map {
6392 u32 auth;
6393 u32 qos;
6394 u32 need_ptk_4_way;
6395 u32 need_gtk_2_way;
6396 u32 apsd;
6397 u32 ht;
6398 u32 bw40;
6399 u32 stbc;
6400 u32 ldbc;
6401 u32 dyn_mimops;
6402 u32 static_mimops;
6403 u32 spatial_mux;
6404 u32 vht;
6405 u32 bw80;
6406 u32 vht_2g;
6407 u32 pmf;
6408 u32 bw160;
6409};
6410
6411enum wmi_peer_flags {
6412 WMI_PEER_AUTH = 0x00000001,
6413 WMI_PEER_QOS = 0x00000002,
6414 WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
6415 WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
6416 WMI_PEER_APSD = 0x00000800,
6417 WMI_PEER_HT = 0x00001000,
6418 WMI_PEER_40MHZ = 0x00002000,
6419 WMI_PEER_STBC = 0x00008000,
6420 WMI_PEER_LDPC = 0x00010000,
6421 WMI_PEER_DYN_MIMOPS = 0x00020000,
6422 WMI_PEER_STATIC_MIMOPS = 0x00040000,
6423 WMI_PEER_SPATIAL_MUX = 0x00200000,
6424 WMI_PEER_VHT = 0x02000000,
6425 WMI_PEER_80MHZ = 0x04000000,
6426 WMI_PEER_VHT_2G = 0x08000000,
6427 WMI_PEER_PMF = 0x10000000,
6428 WMI_PEER_160MHZ = 0x20000000
6429};
6430
6431enum wmi_10x_peer_flags {
6432 WMI_10X_PEER_AUTH = 0x00000001,
6433 WMI_10X_PEER_QOS = 0x00000002,
6434 WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004,
6435 WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010,
6436 WMI_10X_PEER_APSD = 0x00000800,
6437 WMI_10X_PEER_HT = 0x00001000,
6438 WMI_10X_PEER_40MHZ = 0x00002000,
6439 WMI_10X_PEER_STBC = 0x00008000,
6440 WMI_10X_PEER_LDPC = 0x00010000,
6441 WMI_10X_PEER_DYN_MIMOPS = 0x00020000,
6442 WMI_10X_PEER_STATIC_MIMOPS = 0x00040000,
6443 WMI_10X_PEER_SPATIAL_MUX = 0x00200000,
6444 WMI_10X_PEER_VHT = 0x02000000,
6445 WMI_10X_PEER_80MHZ = 0x04000000,
6446 WMI_10X_PEER_160MHZ = 0x20000000
6447};
6448
6449enum wmi_10_2_peer_flags {
6450 WMI_10_2_PEER_AUTH = 0x00000001,
6451 WMI_10_2_PEER_QOS = 0x00000002,
6452 WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004,
6453 WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010,
6454 WMI_10_2_PEER_APSD = 0x00000800,
6455 WMI_10_2_PEER_HT = 0x00001000,
6456 WMI_10_2_PEER_40MHZ = 0x00002000,
6457 WMI_10_2_PEER_STBC = 0x00008000,
6458 WMI_10_2_PEER_LDPC = 0x00010000,
6459 WMI_10_2_PEER_DYN_MIMOPS = 0x00020000,
6460 WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000,
6461 WMI_10_2_PEER_SPATIAL_MUX = 0x00200000,
6462 WMI_10_2_PEER_VHT = 0x02000000,
6463 WMI_10_2_PEER_80MHZ = 0x04000000,
6464 WMI_10_2_PEER_VHT_2G = 0x08000000,
6465 WMI_10_2_PEER_PMF = 0x10000000,
6466 WMI_10_2_PEER_160MHZ = 0x20000000
6467};
6468
6469
6470
6471
6472
6473
6474
6475
6476#define WMI_RC_DS_FLAG 0x01
6477#define WMI_RC_CW40_FLAG 0x02
6478#define WMI_RC_SGI_FLAG 0x04
6479#define WMI_RC_HT_FLAG 0x08
6480#define WMI_RC_RTSCTS_FLAG 0x10
6481#define WMI_RC_TX_STBC_FLAG 0x20
6482#define WMI_RC_RX_STBC_FLAG 0xC0
6483#define WMI_RC_RX_STBC_FLAG_S 6
6484#define WMI_RC_WEP_TKIP_FLAG 0x100
6485#define WMI_RC_TS_FLAG 0x200
6486#define WMI_RC_UAPSD_FLAG 0x400
6487
6488
6489#define ATH10K_MAX_HW_LISTEN_INTERVAL 5
6490
6491struct wmi_common_peer_assoc_complete_cmd {
6492 struct wmi_mac_addr peer_macaddr;
6493 __le32 vdev_id;
6494 __le32 peer_new_assoc;
6495 __le32 peer_associd;
6496 __le32 peer_flags;
6497 __le32 peer_caps;
6498 __le32 peer_listen_intval;
6499 __le32 peer_ht_caps;
6500 __le32 peer_max_mpdu;
6501 __le32 peer_mpdu_density;
6502 __le32 peer_rate_caps;
6503 struct wmi_rate_set peer_legacy_rates;
6504 struct wmi_rate_set peer_ht_rates;
6505 __le32 peer_nss;
6506 __le32 peer_vht_caps;
6507 __le32 peer_phymode;
6508 struct wmi_vht_rate_set peer_vht_rates;
6509};
6510
6511struct wmi_main_peer_assoc_complete_cmd {
6512 struct wmi_common_peer_assoc_complete_cmd cmd;
6513
6514
6515
6516
6517 __le32 peer_ht_info[2];
6518} __packed;
6519
6520struct wmi_10_1_peer_assoc_complete_cmd {
6521 struct wmi_common_peer_assoc_complete_cmd cmd;
6522} __packed;
6523
6524#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
6525#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
6526#define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
6527#define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
6528
6529struct wmi_10_2_peer_assoc_complete_cmd {
6530 struct wmi_common_peer_assoc_complete_cmd cmd;
6531 __le32 info0;
6532} __packed;
6533
6534
6535#define WMI_PEER_NSS_MAP_ENABLE BIT(31)
6536#define WMI_PEER_NSS_160MHZ_MASK GENMASK(2, 0)
6537#define WMI_PEER_NSS_80_80MHZ_MASK GENMASK(5, 3)
6538
6539struct wmi_10_4_peer_assoc_complete_cmd {
6540 struct wmi_10_2_peer_assoc_complete_cmd cmd;
6541 __le32 peer_bw_rxnss_override;
6542} __packed;
6543
6544struct wmi_peer_assoc_complete_arg {
6545 u8 addr[ETH_ALEN];
6546 u32 vdev_id;
6547 bool peer_reassoc;
6548 u16 peer_aid;
6549 u32 peer_flags;
6550 u16 peer_caps;
6551 u32 peer_listen_intval;
6552 u32 peer_ht_caps;
6553 u32 peer_max_mpdu;
6554 u32 peer_mpdu_density;
6555 u32 peer_rate_caps;
6556 struct wmi_rate_set_arg peer_legacy_rates;
6557 struct wmi_rate_set_arg peer_ht_rates;
6558 u32 peer_num_spatial_streams;
6559 u32 peer_vht_caps;
6560 enum wmi_phy_mode peer_phymode;
6561 struct wmi_vht_rate_set_arg peer_vht_rates;
6562 u32 peer_bw_rxnss_override;
6563};
6564
6565struct wmi_peer_add_wds_entry_cmd {
6566
6567 struct wmi_mac_addr peer_macaddr;
6568
6569 struct wmi_mac_addr wds_macaddr;
6570} __packed;
6571
6572struct wmi_peer_remove_wds_entry_cmd {
6573
6574 struct wmi_mac_addr wds_macaddr;
6575} __packed;
6576
6577struct wmi_peer_q_empty_callback_event {
6578
6579 struct wmi_mac_addr peer_macaddr;
6580} __packed;
6581
6582
6583
6584
6585struct wmi_chan_info_event {
6586 __le32 err_code;
6587 __le32 freq;
6588 __le32 cmd_flags;
6589 __le32 noise_floor;
6590 __le32 rx_clear_count;
6591 __le32 cycle_count;
6592} __packed;
6593
6594struct wmi_10_4_chan_info_event {
6595 __le32 err_code;
6596 __le32 freq;
6597 __le32 cmd_flags;
6598 __le32 noise_floor;
6599 __le32 rx_clear_count;
6600 __le32 cycle_count;
6601 __le32 chan_tx_pwr_range;
6602 __le32 chan_tx_pwr_tp;
6603 __le32 rx_frame_count;
6604} __packed;
6605
6606struct wmi_peer_sta_kickout_event {
6607 struct wmi_mac_addr peer_macaddr;
6608} __packed;
6609
6610#define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
6611#define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
6612
6613
6614#define BCN_FLT_MAX_SUPPORTED_IES 256
6615#define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32)
6616
6617struct bss_bcn_stats {
6618 __le32 vdev_id;
6619 __le32 bss_bcnsdropped;
6620 __le32 bss_bcnsdelivered;
6621} __packed;
6622
6623struct bcn_filter_stats {
6624 __le32 bcns_dropped;
6625 __le32 bcns_delivered;
6626 __le32 activefilters;
6627 struct bss_bcn_stats bss_stats;
6628} __packed;
6629
6630struct wmi_add_bcn_filter_cmd {
6631 u32 vdev_id;
6632 u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
6633} __packed;
6634
6635enum wmi_sta_keepalive_method {
6636 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
6637 WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
6638};
6639
6640#define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
6641
6642
6643#define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
6644
6645
6646struct wmi_sta_keepalive_arp_resp {
6647 __be32 src_ip4_addr;
6648 __be32 dest_ip4_addr;
6649 struct wmi_mac_addr dest_mac_addr;
6650} __packed;
6651
6652struct wmi_sta_keepalive_cmd {
6653 __le32 vdev_id;
6654 __le32 enabled;
6655 __le32 method;
6656 __le32 interval;
6657 struct wmi_sta_keepalive_arp_resp arp_resp;
6658} __packed;
6659
6660struct wmi_sta_keepalive_arg {
6661 u32 vdev_id;
6662 u32 enabled;
6663 u32 method;
6664 u32 interval;
6665 __be32 src_ip4_addr;
6666 __be32 dest_ip4_addr;
6667 const u8 dest_mac_addr[ETH_ALEN];
6668};
6669
6670enum wmi_force_fw_hang_type {
6671 WMI_FORCE_FW_HANG_ASSERT = 1,
6672 WMI_FORCE_FW_HANG_NO_DETECT,
6673 WMI_FORCE_FW_HANG_CTRL_EP_FULL,
6674 WMI_FORCE_FW_HANG_EMPTY_POINT,
6675 WMI_FORCE_FW_HANG_STACK_OVERFLOW,
6676 WMI_FORCE_FW_HANG_INFINITE_LOOP,
6677};
6678
6679#define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
6680
6681struct wmi_force_fw_hang_cmd {
6682 __le32 type;
6683 __le32 delay_ms;
6684} __packed;
6685
6686enum wmi_pdev_reset_mode_type {
6687 WMI_RST_MODE_TX_FLUSH = 1,
6688 WMI_RST_MODE_WARM_RESET,
6689 WMI_RST_MODE_COLD_RESET,
6690 WMI_RST_MODE_WARM_RESET_RESTORE_CAL,
6691 WMI_RST_MODE_COLD_RESET_RESTORE_CAL,
6692 WMI_RST_MODE_MAX,
6693};
6694
6695enum ath10k_dbglog_level {
6696 ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
6697 ATH10K_DBGLOG_LEVEL_INFO = 1,
6698 ATH10K_DBGLOG_LEVEL_WARN = 2,
6699 ATH10K_DBGLOG_LEVEL_ERR = 3,
6700};
6701
6702
6703#define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0
6704#define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff
6705
6706
6707#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16
6708#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000
6709
6710
6711#define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17
6712#define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000
6713
6714
6715#define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20
6716#define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000
6717
6718
6719
6720
6721
6722#define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28
6723#define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000
6724
6725
6726
6727
6728
6729struct wmi_dbglog_cfg_cmd {
6730
6731 __le32 module_enable;
6732
6733
6734 __le32 config_enable;
6735
6736
6737 __le32 module_valid;
6738
6739
6740 __le32 config_valid;
6741} __packed;
6742
6743struct wmi_10_4_dbglog_cfg_cmd {
6744
6745 __le64 module_enable;
6746
6747
6748 __le32 config_enable;
6749
6750
6751 __le64 module_valid;
6752
6753
6754 __le32 config_valid;
6755} __packed;
6756
6757enum wmi_roam_reason {
6758 WMI_ROAM_REASON_BETTER_AP = 1,
6759 WMI_ROAM_REASON_BEACON_MISS = 2,
6760 WMI_ROAM_REASON_LOW_RSSI = 3,
6761 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
6762 WMI_ROAM_REASON_HO_FAILED = 5,
6763
6764
6765 WMI_ROAM_REASON_MAX,
6766};
6767
6768struct wmi_roam_ev {
6769 __le32 vdev_id;
6770 __le32 reason;
6771} __packed;
6772
6773#define ATH10K_FRAGMT_THRESHOLD_MIN 540
6774#define ATH10K_FRAGMT_THRESHOLD_MAX 2346
6775
6776#define WMI_MAX_EVENT 0x1000
6777
6778#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
6779
6780
6781#define ATH10K_DEFAULT_ATIM 0
6782
6783#define WMI_MAX_MEM_REQS 16
6784
6785struct wmi_scan_ev_arg {
6786 __le32 event_type;
6787 __le32 reason;
6788 __le32 channel_freq;
6789 __le32 scan_req_id;
6790 __le32 scan_id;
6791 __le32 vdev_id;
6792};
6793
6794struct mgmt_tx_compl_params {
6795 u32 desc_id;
6796 u32 status;
6797 u32 ppdu_id;
6798 int ack_rssi;
6799};
6800
6801struct wmi_tlv_mgmt_tx_compl_ev_arg {
6802 __le32 desc_id;
6803 __le32 status;
6804 __le32 pdev_id;
6805 __le32 ppdu_id;
6806 __le32 ack_rssi;
6807};
6808
6809struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg {
6810 __le32 num_reports;
6811 const __le32 *desc_ids;
6812 const __le32 *status;
6813 const __le32 *ppdu_ids;
6814 const __le32 *ack_rssi;
6815};
6816
6817struct wmi_peer_delete_resp_ev_arg {
6818 __le32 vdev_id;
6819 struct wmi_mac_addr peer_addr;
6820};
6821
6822#define WMI_MGMT_RX_NUM_RSSI 4
6823struct wmi_mgmt_rx_ev_arg {
6824 __le32 channel;
6825 __le32 snr;
6826 __le32 rate;
6827 __le32 phy_mode;
6828 __le32 buf_len;
6829 __le32 status;
6830 struct wmi_mgmt_rx_ext_info ext_info;
6831 __le32 rssi[WMI_MGMT_RX_NUM_RSSI];
6832};
6833
6834struct wmi_ch_info_ev_arg {
6835 __le32 err_code;
6836 __le32 freq;
6837 __le32 cmd_flags;
6838 __le32 noise_floor;
6839 __le32 rx_clear_count;
6840 __le32 cycle_count;
6841 __le32 chan_tx_pwr_range;
6842 __le32 chan_tx_pwr_tp;
6843 __le32 rx_frame_count;
6844 __le32 my_bss_rx_cycle_count;
6845 __le32 rx_11b_mode_data_duration;
6846 __le32 tx_frame_cnt;
6847 __le32 mac_clk_mhz;
6848};
6849
6850
6851enum wmi_vdev_start_status {
6852 WMI_VDEV_START_OK = 0,
6853 WMI_VDEV_START_CHAN_INVALID,
6854};
6855
6856struct wmi_vdev_start_ev_arg {
6857 __le32 vdev_id;
6858 __le32 req_id;
6859 __le32 resp_type;
6860 __le32 status;
6861};
6862
6863struct wmi_peer_kick_ev_arg {
6864 const u8 *mac_addr;
6865};
6866
6867struct wmi_swba_ev_arg {
6868 __le32 vdev_map;
6869 struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV];
6870 const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
6871};
6872
6873struct wmi_phyerr_ev_arg {
6874 u32 tsf_timestamp;
6875 u16 freq1;
6876 u16 freq2;
6877 u8 rssi_combined;
6878 u8 chan_width_mhz;
6879 u8 phy_err_code;
6880 u16 nf_chains[4];
6881 u32 buf_len;
6882 const u8 *buf;
6883 u8 hdr_len;
6884};
6885
6886struct wmi_phyerr_hdr_arg {
6887 u32 num_phyerrs;
6888 u32 tsf_l32;
6889 u32 tsf_u32;
6890 u32 buf_len;
6891 const void *phyerrs;
6892};
6893
6894struct wmi_dfs_status_ev_arg {
6895 u32 status;
6896};
6897
6898struct wmi_svc_rdy_ev_arg {
6899 __le32 min_tx_power;
6900 __le32 max_tx_power;
6901 __le32 ht_cap;
6902 __le32 vht_cap;
6903 __le32 vht_supp_mcs;
6904 __le32 sw_ver0;
6905 __le32 sw_ver1;
6906 __le32 fw_build;
6907 __le32 phy_capab;
6908 __le32 num_rf_chains;
6909 __le32 eeprom_rd;
6910 __le32 num_mem_reqs;
6911 __le32 low_2ghz_chan;
6912 __le32 high_2ghz_chan;
6913 __le32 low_5ghz_chan;
6914 __le32 high_5ghz_chan;
6915 __le32 sys_cap_info;
6916 const __le32 *service_map;
6917 size_t service_map_len;
6918 const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
6919};
6920
6921struct wmi_svc_avail_ev_arg {
6922 bool service_map_ext_valid;
6923 __le32 service_map_ext_len;
6924 const __le32 *service_map_ext;
6925};
6926
6927struct wmi_rdy_ev_arg {
6928 __le32 sw_version;
6929 __le32 abi_version;
6930 __le32 status;
6931 const u8 *mac_addr;
6932};
6933
6934struct wmi_roam_ev_arg {
6935 __le32 vdev_id;
6936 __le32 reason;
6937 __le32 rssi;
6938};
6939
6940struct wmi_echo_ev_arg {
6941 __le32 value;
6942};
6943
6944struct wmi_pdev_temperature_event {
6945
6946 __le32 temperature;
6947} __packed;
6948
6949struct wmi_pdev_bss_chan_info_event {
6950 __le32 freq;
6951 __le32 noise_floor;
6952 __le64 cycle_busy;
6953 __le64 cycle_total;
6954 __le64 cycle_tx;
6955 __le64 cycle_rx;
6956 __le64 cycle_rx_bss;
6957 __le32 reserved;
6958} __packed;
6959
6960
6961enum wmi_wow_wakeup_event {
6962 WOW_BMISS_EVENT = 0,
6963 WOW_BETTER_AP_EVENT,
6964 WOW_DEAUTH_RECVD_EVENT,
6965 WOW_MAGIC_PKT_RECVD_EVENT,
6966 WOW_GTK_ERR_EVENT,
6967 WOW_FOURWAY_HSHAKE_EVENT,
6968 WOW_EAPOL_RECVD_EVENT,
6969 WOW_NLO_DETECTED_EVENT,
6970 WOW_DISASSOC_RECVD_EVENT,
6971 WOW_PATTERN_MATCH_EVENT,
6972 WOW_CSA_IE_EVENT,
6973 WOW_PROBE_REQ_WPS_IE_EVENT,
6974 WOW_AUTH_REQ_EVENT,
6975 WOW_ASSOC_REQ_EVENT,
6976 WOW_HTT_EVENT,
6977 WOW_RA_MATCH_EVENT,
6978 WOW_HOST_AUTO_SHUTDOWN_EVENT,
6979 WOW_IOAC_MAGIC_EVENT,
6980 WOW_IOAC_SHORT_EVENT,
6981 WOW_IOAC_EXTEND_EVENT,
6982 WOW_IOAC_TIMER_EVENT,
6983 WOW_DFS_PHYERR_RADAR_EVENT,
6984 WOW_BEACON_EVENT,
6985 WOW_CLIENT_KICKOUT_EVENT,
6986 WOW_EVENT_MAX,
6987};
6988
6989#define C2S(x) case x: return #x
6990
6991static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
6992{
6993 switch (ev) {
6994 C2S(WOW_BMISS_EVENT);
6995 C2S(WOW_BETTER_AP_EVENT);
6996 C2S(WOW_DEAUTH_RECVD_EVENT);
6997 C2S(WOW_MAGIC_PKT_RECVD_EVENT);
6998 C2S(WOW_GTK_ERR_EVENT);
6999 C2S(WOW_FOURWAY_HSHAKE_EVENT);
7000 C2S(WOW_EAPOL_RECVD_EVENT);
7001 C2S(WOW_NLO_DETECTED_EVENT);
7002 C2S(WOW_DISASSOC_RECVD_EVENT);
7003 C2S(WOW_PATTERN_MATCH_EVENT);
7004 C2S(WOW_CSA_IE_EVENT);
7005 C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
7006 C2S(WOW_AUTH_REQ_EVENT);
7007 C2S(WOW_ASSOC_REQ_EVENT);
7008 C2S(WOW_HTT_EVENT);
7009 C2S(WOW_RA_MATCH_EVENT);
7010 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
7011 C2S(WOW_IOAC_MAGIC_EVENT);
7012 C2S(WOW_IOAC_SHORT_EVENT);
7013 C2S(WOW_IOAC_EXTEND_EVENT);
7014 C2S(WOW_IOAC_TIMER_EVENT);
7015 C2S(WOW_DFS_PHYERR_RADAR_EVENT);
7016 C2S(WOW_BEACON_EVENT);
7017 C2S(WOW_CLIENT_KICKOUT_EVENT);
7018 C2S(WOW_EVENT_MAX);
7019 default:
7020 return NULL;
7021 }
7022}
7023
7024enum wmi_wow_wake_reason {
7025 WOW_REASON_UNSPECIFIED = -1,
7026 WOW_REASON_NLOD = 0,
7027 WOW_REASON_AP_ASSOC_LOST,
7028 WOW_REASON_LOW_RSSI,
7029 WOW_REASON_DEAUTH_RECVD,
7030 WOW_REASON_DISASSOC_RECVD,
7031 WOW_REASON_GTK_HS_ERR,
7032 WOW_REASON_EAP_REQ,
7033 WOW_REASON_FOURWAY_HS_RECV,
7034 WOW_REASON_TIMER_INTR_RECV,
7035 WOW_REASON_PATTERN_MATCH_FOUND,
7036 WOW_REASON_RECV_MAGIC_PATTERN,
7037 WOW_REASON_P2P_DISC,
7038 WOW_REASON_WLAN_HB,
7039 WOW_REASON_CSA_EVENT,
7040 WOW_REASON_PROBE_REQ_WPS_IE_RECV,
7041 WOW_REASON_AUTH_REQ_RECV,
7042 WOW_REASON_ASSOC_REQ_RECV,
7043 WOW_REASON_HTT_EVENT,
7044 WOW_REASON_RA_MATCH,
7045 WOW_REASON_HOST_AUTO_SHUTDOWN,
7046 WOW_REASON_IOAC_MAGIC_EVENT,
7047 WOW_REASON_IOAC_SHORT_EVENT,
7048 WOW_REASON_IOAC_EXTEND_EVENT,
7049 WOW_REASON_IOAC_TIMER_EVENT,
7050 WOW_REASON_ROAM_HO,
7051 WOW_REASON_DFS_PHYERR_RADADR_EVENT,
7052 WOW_REASON_BEACON_RECV,
7053 WOW_REASON_CLIENT_KICKOUT_EVENT,
7054 WOW_REASON_DEBUG_TEST = 0xFF,
7055};
7056
7057static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
7058{
7059 switch (reason) {
7060 C2S(WOW_REASON_UNSPECIFIED);
7061 C2S(WOW_REASON_NLOD);
7062 C2S(WOW_REASON_AP_ASSOC_LOST);
7063 C2S(WOW_REASON_LOW_RSSI);
7064 C2S(WOW_REASON_DEAUTH_RECVD);
7065 C2S(WOW_REASON_DISASSOC_RECVD);
7066 C2S(WOW_REASON_GTK_HS_ERR);
7067 C2S(WOW_REASON_EAP_REQ);
7068 C2S(WOW_REASON_FOURWAY_HS_RECV);
7069 C2S(WOW_REASON_TIMER_INTR_RECV);
7070 C2S(WOW_REASON_PATTERN_MATCH_FOUND);
7071 C2S(WOW_REASON_RECV_MAGIC_PATTERN);
7072 C2S(WOW_REASON_P2P_DISC);
7073 C2S(WOW_REASON_WLAN_HB);
7074 C2S(WOW_REASON_CSA_EVENT);
7075 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
7076 C2S(WOW_REASON_AUTH_REQ_RECV);
7077 C2S(WOW_REASON_ASSOC_REQ_RECV);
7078 C2S(WOW_REASON_HTT_EVENT);
7079 C2S(WOW_REASON_RA_MATCH);
7080 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
7081 C2S(WOW_REASON_IOAC_MAGIC_EVENT);
7082 C2S(WOW_REASON_IOAC_SHORT_EVENT);
7083 C2S(WOW_REASON_IOAC_EXTEND_EVENT);
7084 C2S(WOW_REASON_IOAC_TIMER_EVENT);
7085 C2S(WOW_REASON_ROAM_HO);
7086 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
7087 C2S(WOW_REASON_BEACON_RECV);
7088 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
7089 C2S(WOW_REASON_DEBUG_TEST);
7090 default:
7091 return NULL;
7092 }
7093}
7094
7095#undef C2S
7096
7097struct wmi_wow_ev_arg {
7098 u32 vdev_id;
7099 u32 flag;
7100 enum wmi_wow_wake_reason wake_reason;
7101 u32 data_len;
7102};
7103
7104#define WOW_MIN_PATTERN_SIZE 1
7105#define WOW_MAX_PATTERN_SIZE 148
7106#define WOW_MAX_PKT_OFFSET 128
7107#define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \
7108 sizeof(struct rfc1042_hdr))
7109#define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \
7110 offsetof(struct ieee80211_hdr_3addr, addr1))
7111
7112enum wmi_tdls_state {
7113 WMI_TDLS_DISABLE,
7114 WMI_TDLS_ENABLE_PASSIVE,
7115 WMI_TDLS_ENABLE_ACTIVE,
7116 WMI_TDLS_ENABLE_ACTIVE_EXTERNAL_CONTROL,
7117};
7118
7119enum wmi_tdls_peer_state {
7120 WMI_TDLS_PEER_STATE_PEERING,
7121 WMI_TDLS_PEER_STATE_CONNECTED,
7122 WMI_TDLS_PEER_STATE_TEARDOWN,
7123};
7124
7125struct wmi_tdls_peer_update_cmd_arg {
7126 u32 vdev_id;
7127 enum wmi_tdls_peer_state peer_state;
7128 u8 addr[ETH_ALEN];
7129};
7130
7131#define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
7132
7133#define WMI_TDLS_PEER_SP_MASK 0x60
7134#define WMI_TDLS_PEER_SP_LSB 5
7135
7136enum wmi_tdls_options {
7137 WMI_TDLS_OFFCHAN_EN = BIT(0),
7138 WMI_TDLS_BUFFER_STA_EN = BIT(1),
7139 WMI_TDLS_SLEEP_STA_EN = BIT(2),
7140};
7141
7142enum {
7143 WMI_TDLS_PEER_QOS_AC_VO = BIT(0),
7144 WMI_TDLS_PEER_QOS_AC_VI = BIT(1),
7145 WMI_TDLS_PEER_QOS_AC_BK = BIT(2),
7146 WMI_TDLS_PEER_QOS_AC_BE = BIT(3),
7147};
7148
7149struct wmi_tdls_peer_capab_arg {
7150 u8 peer_uapsd_queues;
7151 u8 peer_max_sp;
7152 u32 buff_sta_support;
7153 u32 off_chan_support;
7154 u32 peer_curr_operclass;
7155 u32 self_curr_operclass;
7156 u32 peer_chan_len;
7157 u32 peer_operclass_len;
7158 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
7159 u32 is_peer_responder;
7160 u32 pref_offchan_num;
7161 u32 pref_offchan_bw;
7162};
7163
7164struct wmi_10_4_tdls_set_state_cmd {
7165 __le32 vdev_id;
7166 __le32 state;
7167 __le32 notification_interval_ms;
7168 __le32 tx_discovery_threshold;
7169 __le32 tx_teardown_threshold;
7170 __le32 rssi_teardown_threshold;
7171 __le32 rssi_delta;
7172 __le32 tdls_options;
7173 __le32 tdls_peer_traffic_ind_window;
7174 __le32 tdls_peer_traffic_response_timeout_ms;
7175 __le32 tdls_puapsd_mask;
7176 __le32 tdls_puapsd_inactivity_time_ms;
7177 __le32 tdls_puapsd_rx_frame_threshold;
7178 __le32 teardown_notification_ms;
7179 __le32 tdls_peer_kickout_threshold;
7180} __packed;
7181
7182struct wmi_tdls_peer_capabilities {
7183 __le32 peer_qos;
7184 __le32 buff_sta_support;
7185 __le32 off_chan_support;
7186 __le32 peer_curr_operclass;
7187 __le32 self_curr_operclass;
7188 __le32 peer_chan_len;
7189 __le32 peer_operclass_len;
7190 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
7191 __le32 is_peer_responder;
7192 __le32 pref_offchan_num;
7193 __le32 pref_offchan_bw;
7194 struct wmi_channel peer_chan_list[1];
7195} __packed;
7196
7197struct wmi_10_4_tdls_peer_update_cmd {
7198 __le32 vdev_id;
7199 struct wmi_mac_addr peer_macaddr;
7200 __le32 peer_state;
7201 __le32 reserved[4];
7202 struct wmi_tdls_peer_capabilities peer_capab;
7203} __packed;
7204
7205enum wmi_tdls_peer_reason {
7206 WMI_TDLS_TEARDOWN_REASON_TX,
7207 WMI_TDLS_TEARDOWN_REASON_RSSI,
7208 WMI_TDLS_TEARDOWN_REASON_SCAN,
7209 WMI_TDLS_DISCONNECTED_REASON_PEER_DELETE,
7210 WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT,
7211 WMI_TDLS_TEARDOWN_REASON_BAD_PTR,
7212 WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE,
7213 WMI_TDLS_ENTER_BUF_STA,
7214 WMI_TDLS_EXIT_BUF_STA,
7215 WMI_TDLS_ENTER_BT_BUSY_MODE,
7216 WMI_TDLS_EXIT_BT_BUSY_MODE,
7217 WMI_TDLS_SCAN_STARTED_EVENT,
7218 WMI_TDLS_SCAN_COMPLETED_EVENT,
7219};
7220
7221enum wmi_tdls_peer_notification {
7222 WMI_TDLS_SHOULD_DISCOVER,
7223 WMI_TDLS_SHOULD_TEARDOWN,
7224 WMI_TDLS_PEER_DISCONNECTED,
7225 WMI_TDLS_CONNECTION_TRACKER_NOTIFICATION,
7226};
7227
7228struct wmi_tdls_peer_event {
7229 struct wmi_mac_addr peer_macaddr;
7230
7231 __le32 peer_status;
7232
7233 __le32 peer_reason;
7234 __le32 vdev_id;
7235} __packed;
7236
7237enum wmi_tid_aggr_control_conf {
7238 WMI_TID_CONFIG_AGGR_CONTROL_IGNORE,
7239 WMI_TID_CONFIG_AGGR_CONTROL_ENABLE,
7240 WMI_TID_CONFIG_AGGR_CONTROL_DISABLE,
7241};
7242
7243enum wmi_noack_tid_conf {
7244 WMI_NOACK_TID_CONFIG_IGNORE_ACK_POLICY,
7245 WMI_PEER_TID_CONFIG_ACK,
7246 WMI_PEER_TID_CONFIG_NOACK,
7247};
7248
7249enum wmi_tid_rate_ctrl_conf {
7250 WMI_TID_CONFIG_RATE_CONTROL_IGNORE,
7251 WMI_TID_CONFIG_RATE_CONTROL_AUTO,
7252 WMI_TID_CONFIG_RATE_CONTROL_FIXED_RATE,
7253 WMI_TID_CONFIG_RATE_CONTROL_DEFAULT_LOWEST_RATE,
7254 WMI_PEER_TID_CONFIG_RATE_UPPER_CAP,
7255};
7256
7257enum wmi_tid_rtscts_control_conf {
7258 WMI_TID_CONFIG_RTSCTS_CONTROL_ENABLE,
7259 WMI_TID_CONFIG_RTSCTS_CONTROL_DISABLE,
7260};
7261
7262enum wmi_ext_tid_config_map {
7263 WMI_EXT_TID_RTS_CTS_CONFIG = BIT(0),
7264};
7265
7266struct wmi_per_peer_per_tid_cfg_arg {
7267 u32 vdev_id;
7268 struct wmi_mac_addr peer_macaddr;
7269 u32 tid;
7270 enum wmi_noack_tid_conf ack_policy;
7271 enum wmi_tid_aggr_control_conf aggr_control;
7272 u8 rate_ctrl;
7273 u32 retry_count;
7274 u32 rcode_flags;
7275 u32 ext_tid_cfg_bitmap;
7276 u32 rtscts_ctrl;
7277};
7278
7279struct wmi_peer_per_tid_cfg_cmd {
7280 __le32 vdev_id;
7281 struct wmi_mac_addr peer_macaddr;
7282 __le32 tid;
7283
7284
7285 __le32 ack_policy;
7286
7287
7288 __le32 aggr_control;
7289
7290
7291 __le32 rate_control;
7292 __le32 rcode_flags;
7293 __le32 retry_count;
7294
7295
7296 __le32 ext_tid_cfg_bitmap;
7297
7298
7299 __le32 rtscts_ctrl;
7300} __packed;
7301
7302enum wmi_txbf_conf {
7303 WMI_TXBF_CONF_UNSUPPORTED,
7304 WMI_TXBF_CONF_BEFORE_ASSOC,
7305 WMI_TXBF_CONF_AFTER_ASSOC,
7306};
7307
7308#define WMI_CCA_DETECT_LEVEL_AUTO 0
7309#define WMI_CCA_DETECT_MARGIN_AUTO 0
7310
7311struct wmi_pdev_set_adaptive_cca_params {
7312 __le32 enable;
7313 __le32 cca_detect_level;
7314 __le32 cca_detect_margin;
7315} __packed;
7316
7317#define WMI_PNO_MAX_SCHED_SCAN_PLANS 2
7318#define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200
7319#define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100
7320#define WMI_PNO_MAX_NETW_CHANNELS 26
7321#define WMI_PNO_MAX_NETW_CHANNELS_EX 60
7322#define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID
7323#define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN
7324
7325
7326#define WMI_PNO_MAX_PB_REQ_SIZE 450
7327
7328#define WMI_PNO_24G_DEFAULT_CH 1
7329#define WMI_PNO_5G_DEFAULT_CH 36
7330
7331#define WMI_ACTIVE_MAX_CHANNEL_TIME 40
7332#define WMI_PASSIVE_MAX_CHANNEL_TIME 110
7333
7334
7335enum wmi_SSID_bcast_type {
7336 BCAST_UNKNOWN = 0,
7337 BCAST_NORMAL = 1,
7338 BCAST_HIDDEN = 2,
7339};
7340
7341struct wmi_network_type {
7342 struct wmi_ssid ssid;
7343 u32 authentication;
7344 u32 encryption;
7345 u32 bcast_nw_type;
7346 u8 channel_count;
7347 u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX];
7348 s32 rssi_threshold;
7349} __packed;
7350
7351struct wmi_pno_scan_req {
7352 u8 enable;
7353 u8 vdev_id;
7354 u8 uc_networks_count;
7355 struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS];
7356 u32 fast_scan_period;
7357 u32 slow_scan_period;
7358 u8 fast_scan_max_cycles;
7359
7360 bool do_passive_scan;
7361
7362 u32 delay_start_time;
7363 u32 active_min_time;
7364 u32 active_max_time;
7365 u32 passive_min_time;
7366 u32 passive_max_time;
7367
7368
7369 u32 enable_pno_scan_randomization;
7370 u8 mac_addr[ETH_ALEN];
7371 u8 mac_addr_mask[ETH_ALEN];
7372} __packed;
7373
7374enum wmi_host_platform_type {
7375 WMI_HOST_PLATFORM_HIGH_PERF,
7376 WMI_HOST_PLATFORM_LOW_PERF,
7377};
7378
7379enum wmi_bss_survey_req_type {
7380 WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
7381 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
7382};
7383
7384struct wmi_pdev_chan_info_req_cmd {
7385 __le32 type;
7386 __le32 reserved;
7387} __packed;
7388
7389
7390struct wmi_bb_timing_cfg_arg {
7391
7392 u32 bb_tx_timing;
7393
7394
7395 u32 bb_xpa_timing;
7396};
7397
7398struct wmi_pdev_bb_timing_cfg_cmd {
7399
7400 __le32 bb_tx_timing;
7401
7402
7403 __le32 bb_xpa_timing;
7404} __packed;
7405
7406struct ath10k;
7407struct ath10k_vif;
7408struct ath10k_fw_stats_pdev;
7409struct ath10k_fw_stats_peer;
7410struct ath10k_fw_stats;
7411
7412int ath10k_wmi_attach(struct ath10k *ar);
7413void ath10k_wmi_detach(struct ath10k *ar);
7414void ath10k_wmi_free_host_mem(struct ath10k *ar);
7415int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
7416int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
7417
7418struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
7419int ath10k_wmi_connect(struct ath10k *ar);
7420
7421int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
7422int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
7423 u32 cmd_id);
7424void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *arg);
7425
7426void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
7427 struct ath10k_fw_stats_pdev *dst);
7428void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
7429 struct ath10k_fw_stats_pdev *dst);
7430void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
7431 struct ath10k_fw_stats_pdev *dst);
7432void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
7433 struct ath10k_fw_stats_pdev *dst);
7434void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
7435 struct ath10k_fw_stats_peer *dst);
7436void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
7437 struct wmi_host_mem_chunks *chunks);
7438void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
7439 const struct wmi_start_scan_arg *arg);
7440void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
7441 const struct wmi_wmm_params_arg *arg);
7442void ath10k_wmi_put_wmi_channel(struct ath10k *ar, struct wmi_channel *ch,
7443 const struct wmi_channel_arg *arg);
7444int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
7445
7446int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
7447int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
7448int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb);
7449int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb);
7450void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
7451void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
7452int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
7453void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
7454void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
7455void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
7456void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
7457void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
7458void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
7459void ath10k_wmi_event_dfs(struct ath10k *ar,
7460 struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
7461void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
7462 struct wmi_phyerr_ev_arg *phyerr,
7463 u64 tsf);
7464void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
7465void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
7466void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
7467void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
7468void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
7469void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
7470void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
7471 struct sk_buff *skb);
7472void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
7473 struct sk_buff *skb);
7474void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
7475void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
7476void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
7477void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
7478void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
7479void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
7480 struct sk_buff *skb);
7481void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
7482void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
7483void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
7484void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
7485 struct sk_buff *skb);
7486void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
7487void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
7488void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
7489void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
7490int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
7491void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb);
7492int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
7493 int left_len, struct wmi_phyerr_ev_arg *arg);
7494void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
7495 struct ath10k_fw_stats *fw_stats,
7496 char *buf);
7497void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
7498 struct ath10k_fw_stats *fw_stats,
7499 char *buf);
7500size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head);
7501size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head);
7502void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
7503 struct ath10k_fw_stats *fw_stats,
7504 char *buf);
7505int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
7506 enum wmi_vdev_subtype subtype);
7507int ath10k_wmi_barrier(struct ath10k *ar);
7508void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
7509 u32 num_tx_chain);
7510void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb);
7511
7512#endif
7513
